A method for characterizing the compactness of insulating passivation layers

Abstract

The present invention provides a method for characterizing the compactness of an insulating passivation layer, comprising providing an insulating substrate, vapor-depositing a conductive metal layer on the insulating substrate, depositing an insulating passivation layer on the conductive metal layer, providing a plurality of pores on the insulating passivation layer, coating a conductive pore color development layer on the surface of the insulating passivation layer, and covering the insulating passivation layer with the pore color development layer; connecting the conductive metal layer and the pore color development layer to the positive and negative electrodes of an external power source respectively, controlling the power-on time of the power source so that the pore color development layer develops color and forms spots; and calculating the pore density and diameter of the pores according to the spot density, spot diameter and power-on time. The method for characterizing the compactness of an insulating passivation layer in the present invention directly characterizes the compactness of the insulating passivation layer through the density and diameter of the pores by electrochemical reactions occurring in the pores penetrating the insulating passivation layer.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a method for characterizing the compactness of an insulating passivation layer. Background Art

[0002] Conventional LED chip structures generally include substrate, epitaxial structure, current blocking layer, transparent conductive layer, P-type and N-type electrodes, and insulating passivation layer. The epitaxial structure generally includes N-type semiconductor, quantum well light-emitting area, and P-type semiconductor. The insulating passivation layer protects the chip and prevents water vapor, impurities, and other pollutants from getting on the chip, causing chip failure. The density of the insulating passivation layer is particularly important at this time.

[0003] The method for characterizing the compactness of the insulating passivation layer is generally to immerse the insulating passivation layer in BOE (Buffered Oxide Etch) and determine whether the compactness is good by calculating the etching rate of the insulating passivation layer surface in the solution.

[0004] In the prior art, the characterization of the density of the insulating passivation layer is mainly related to its ability to resist solution penetration, and the ability of the insulating passivation layer to resist solution penetration is directly related to the density and size of the pores. Characterizing the density of the passivation layer by the rate at which BOE etches the insulating passivation layer can only indicate the chemical reaction rate between the BOE solution and the insulating passivation layer, but cannot directly characterize the pores of the insulating passivation layer film, nor can it determine the ability of the insulating layer to resist solution penetration, and therefore cannot directly characterize the density of the insulating passivation layer. Summary of the invention

[0005] Based on this, the purpose of the present invention is to provide a method for characterizing the density of an insulating passivation layer, so as to solve the problem that the density of the passivation layer cannot be intuitively characterized by characterizing the density of the insulating passivation layer by the rate of etching the insulating passivation layer by BOE in the background technology.

[0006] An embodiment of the present invention provides a method for characterizing the compactness of an insulating passivation layer, comprising:

[0007] An insulating substrate is provided, a conductive metal layer is evaporated on the insulating substrate, an insulating passivation layer is deposited on the conductive metal layer, a plurality of pores are provided on the insulating passivation layer, a conductive pore color development layer is coated on the surface of the insulating passivation layer, and the pore color development layer covers the insulating passivation layer;

[0008] The conductive metal layer and the pore color development layer are respectively connected to the positive and negative electrodes of an external power source, and the power-on time of the power source is controlled so that the pore color development layer develops color and forms spots;

[0009] The spot density and spot diameter of the spots are measured, and the pore density and diameter of the pores are calculated according to the spot density, spot diameter and power-on time. The pore density and diameter of the pores are used to characterize the compactness of the insulating passivation layer.

[0010] The method for characterizing the compactness of the insulating passivation layer in the present invention is prepared by sequentially preparing a conductive metal layer, an insulating passivation layer and a conductive porous color development layer on an insulating substrate, and the porous color development layer and the conductive metal layer are respectively connected to the positive and negative electrodes of an external power supply, so that after being turned on, a color development reaction can occur at the pores in the insulating passivation layer, and an electrochemical reaction occurs by penetrating the pores of the insulating passivation layer, and then the density and size of the pores are calculated according to the density and size of the colored spots. The ability of the insulating layer to resist solution penetration can be judged by the density and size of the pores, thereby intuitively characterizing the compactness of the insulating passivation layer, thereby solving the problem that the compactness of the insulating passivation layer cannot be intuitively characterized in the background technology.

[0011] Furthermore, the pore color development layer is a mixed sol, and the mixed sol includes starch and potassium iodide.

[0012] Furthermore, the power-on time is 0.5h to 3h.

[0013] Further, the step of calculating the pore density and diameter of the pores according to the spot density, the spot diameter and the power-on time includes:

[0014] N = M / T, where N is the pore density, M is the spot density, and T is the power-on time.

[0015] Further, the step of calculating the pore density and diameter of the pores according to the spot density, the spot diameter and the power-on time includes:

[0016] O = P / 6T, where O is the pore diameter, P is the spot diameter, and T is the power-on time.

[0017] Furthermore, the conductive metal layer includes at least one metal material with good conductivity and relatively inertness, and the metal materials are Pt and Au.

[0018] Furthermore, the insulating passivation layer includes at least one insulating material, and the insulating material includes SiO 2 、Al 2 O 3 、TiO 2 、SiN X and SiON.

[0019] Furthermore, the thickness of the insulating passivation layer is 1000 nm.

[0020] Furthermore, the thickness of the conductive metal layer is 0.5 um to 100 um.

[0021] Furthermore, the thickness of the pore color development layer is 1 mm to 30 mm. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic flow chart of a method for characterizing the compactness of an insulating passivation layer in an embodiment of the present invention;

[0023] Figure 2 Schematic diagram of the structure of the electrochemical reaction plate in an embodiment of the present invention.

[0024] Description of main structural symbols:

[0025] Insulation substrate 400 Conductive metal layer 300 Insulation passivation layer 200 Pore ​​color layer 100 Porosity 210

[0026] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0027] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0028] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0030] Example

[0031] like Figure 1 As shown, a method for characterizing the compactness of an insulating passivation layer is provided in an embodiment of the present invention, comprising the following steps S1-S5.

[0032] S1. Provide an insulating substrate, and evaporate a conductive metal layer on the insulating substrate.

[0033] like Figure 2As shown, an insulating substrate 400 is provided, wherein the insulating substrate 400 is a sapphire substrate and has an insulating function. Then, a conductive metal layer 300 is evaporated on the insulating substrate 400 by vacuum evaporation coating equipment. The conductive metal layer 300 completely covers the insulating substrate 400. The conductive metal layer 300 has a conductive function and is composed of a metal with a conductive function. Its thickness is 0.5um~um. In this embodiment, the conductive metal layer 300 is composed of at least one conductive metal material such as Pt and Au.

[0034] S2. Depositing an insulating passivation layer on the conductive metal layer.

[0035] A transparent insulating passivation layer 200 with a thickness of 1 nm is deposited on the conductive metal layer 300 by chemical vapor deposition. The insulating passivation layer 200 is composed of at least one non-conductive material, which can be SiO2, Al2O3, TiO2, SiN X 、SiON。

[0036] S3. Coat a conductive porous color development layer on the surface of the insulating passivation layer.

[0037] A conductive pore color layer 100 is continuously coated on the surface of the insulating passivation layer 200, and the thickness of the pore color layer 100 is 1 mm to 30 mm. The pore color layer 100 covers the insulating passivation layer 200. When the pore color layer 100 is conductive, the pore color layer 100 will have a color reaction in the place where electricity is supplied, showing a different color from when electricity is not supplied. The pore color layer 100 is composed of a material that can change color according to conductivity. In this embodiment, the pore color layer 100 is a sol mixed with starch and potassium iodide.

[0038] S4. Connect the conductive metal layer and the pore color development layer to the positive and negative electrodes of a power source respectively, and control the power-on time of the power source so that the pore color development layer develops color and forms spots.

[0039] According to the above steps S1-S3, a substrate with an insulating passivation layer 200 is obtained. Optionally, in some other embodiments, an electrochemical reaction substrate is provided, which includes, from bottom to top, an insulating substrate 400, a conductive metal layer 300, an insulating passivation layer 200 and a conductive porous color development layer 100.

[0040] The pore color development layer 100 is connected to the positive electrode of a power source, and the conductive metal layer 300 is connected to the negative electrode of the power source. Alternatively, the pore color development layer 100 is connected to the negative electrode of a power source, and the conductive metal layer 300 is connected to the positive electrode of the power source, and the power supply time is controlled to be 0.5h to 3h. An insulating passivation layer 200 is provided between the pore color development layer 100 and the conductive metal layer 300. Figure 2As shown, there are a plurality of pores 210 on the insulating passivation layer 200, and leakage occurs at the positions of the pores 210. Therefore, conduction occurs between each pore 210 in the insulating passivation layer 200. After the power supply is turned on, the pore color development layer 100 forms a closed circuit, and an electrochemical reaction occurs.

[0041] The pore color development layer 100 includes a sol of starch and potassium iodide, and the electrochemical reaction that occurs is as follows:

[0042] KI+H2O→KOH+I2+H2

[0043] I2+ starch → blue

[0044] After the pore color development layer 100 undergoes an electrochemical reaction, potassium iodide is reduced to generate elemental iodine, which reacts with starch to show a blue color, forming a plurality of blue spots on the pore color development layer 100. The diameter and density of the spots can reflect the density and diameter of the pores 210.

[0045] S5. The pore density and diameter of the pores are calculated according to the spot density, spot diameter and power-on time.

[0046] The size and number of spots on the porous color development layer 100 will show different changes according to the size of the pores 210 of the insulating passivation layer 200 and the power-on time. After T hours of power-on, the density and diameter of the blue spots are measured and counted, and the density and diameter of the pores 210 of the insulating passivation layer 200 are calculated.

[0047] The density calculation formula of the pores 210 of the insulating passivation layer 200 is:

[0048] N=M / T, where N is the density of pores 210 (in pieces / mm2), M is the spot density (in pieces / mm2), and T is the power-on time (in hours).

[0049] The spot density is proportional to the pore density. When the reaction time is fixed, the greater the spot density, the greater the pore density.

[0050] The diameter of the pore 210 of the insulating passivation layer 200 is calculated as follows:

[0051] O=P / 6T, where O is the diameter of the pore 210 (in μm), P is the spot diameter (in μm), and T is the power-on time (in h).

[0052] The diameter of the pores is directly proportional to the diameter of the spots. The larger the spot diameter, the larger the displayed pore diameter. The diameter and density of the pores can be estimated based on the diameter and density of the spots.

[0053] The following table shows the spot data and the calculated pore data obtained by experimental measurement according to the technical solution of this embodiment, wherein Table 1 shows the data calculated according to the density calculation formula, and Table 2 shows the data calculated according to the diameter calculation formula.

[0054]

[0055]

[0056] Table 1

[0057]

[0058] Table 2

[0059] The number of pores in the insulating passivation layer 200 is fixed, and the pores 210 can only be called pores if their diameter is greater than a preset value. According to the data shown in Table 1, when the power-on time is fixed, such as about 1 hour, the density of pores 210 can be approximately equal to the spot density. At this time, the pore density can be estimated based on the spot density. The power-on time cannot be too short or too long. If the power-on time is too short (such as 0.5 hours), the pores 210 will not have time to react with color; if the power-on time is too long (such as 2 hours), the color reaction will be severe, and color reaction will occur even in places that are not pores 210. According to the data in Table 1 and Table 2, the larger the density and diameter of the spots, the larger the diameter or density of the pores 210, and the more and larger the leakage channels of the insulating passivation layer 200, that is, the worse the density of the insulating passivation layer 200. The density and size of the pores 210 in the insulating passivation layer 200 can characterize the density of the insulating passivation layer 200, and finally the spots generated by the electrochemical reaction can intuitively characterize the density of the insulating passivation layer 200.

[0060] In summary, the method for characterizing the density of the insulating passivation layer in the above-mentioned embodiment of the present invention is to prepare a conductive metal layer, an insulating passivation layer and a conductive porous color development layer in sequence on an insulating substrate, and respectively connect the porous color development layer and the conductive metal layer to the positive and negative electrodes of an external power supply. After being turned on, a color development reaction can occur at the pores in the insulating passivation layer, and an electrochemical reaction occurs by penetrating the pores of the insulating passivation layer. The density and size of the pores are calculated according to the density and size of the colored spots. The ability of the insulating layer to resist solution penetration can be judged according to the density and size of the pores, thereby intuitively characterizing the density of the insulating passivation layer, which solves the problem that the density of the insulating passivation layer cannot be intuitively characterized in the background technology.

[0061] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0062] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for characterizing the compactness of an insulating passivation layer, It is characterized in that include: An insulating substrate is provided, a conductive metal layer is evaporated on the insulating substrate, an insulating passivation layer is deposited on the conductive metal layer, a plurality of pores are provided on the insulating passivation layer, a conductive pore color development layer is coated on the surface of the insulating passivation layer, and the pore color development layer covers the insulating passivation layer; The conductive metal layer and the pore color development layer are respectively connected to the positive electrode and the negative electrode of the power supply, and the power-on time of the power supply is controlled so that the pore color development layer develops color and forms spots; The spot density and the spot diameter of the spots are measured, the pore density and the diameter of the pores are calculated according to the spot density, the spot diameter and the power-on time, and the density of the insulating passivation layer is characterized by the pore density and the diameter of the pores.

2. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The pore color development layer is a mixed sol, and the mixed sol includes starch and potassium iodide.

3. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The power-on time is 0.5h to 3h.

4. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The step of calculating the pore density and diameter of the pores according to the spot density, the spot diameter and the power-on time comprises: N = M / T, where N is the pore density, M is the spot density, and T is the power-on time.

5. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The step of calculating the pore density and diameter of the pores according to the spot density, the spot diameter and the power-on time comprises: O=P / 6T, where O is the pore diameter, P is the spot diameter, and T is the power-on time.

6. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The conductive metal layer includes at least one metal material with good conductivity and relatively inertness, and the metal material is Pt and Au.

7. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The insulating passivation layer includes at least one insulating material, wherein the insulating material includes SiO 2 、Al 2 O 3 、TiO 2 、SiN X and SiON.

8. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The thickness of the insulating passivation layer is 1000 nm.

9. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The thickness of the conductive metal layer is 0.5um to 100um.

10. The method for characterizing the compactness of the insulating passivation layer according to claim 1, It is characterized in that The thickness of the pore color development layer is 1 mm to 30 mm.

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