Semiconductor device, light detecting device, and vehicle sensor

Abstract

The present disclosure relates to a semiconductor device, a light detecting device, and a vehicle sensor with improved reliability. The semiconductor device includes a sensor substrate including a photodiode, a transistor, and a first wiring layer; and a circuit substrate including a signal processing circuit and a second wiring layer, the sensor substrate being laminated on the circuit substrate, wherein the first wiring layer includes a first connection pad and a first insulating film, the second wiring layer includes a second connection pad and a second insulating film, a first portion of a first barrier metal is in contact with a first portion of the second connection pad, a first portion of the first connection pad is in contact with a second portion of the second connection pad, a second portion of the first connection pad is in contact with a first portion of a barrier film, a second portion of the first barrier metal is in contact with a second portion of the barrier film, and the first portion of the first barrier metal and the second portion of the first barrier metal are on opposite sides of the first connection pad. The present technology can be applied to, for example, a laminated CMOS image sensor.

Description

[0001] This application is a divisional application of patent application No. 201680023993.1, filed on May 6, 2016, entitled "Semiconductor Device, Manufacturing Method, Solid-State Imaging Element and Electronic Device". Technical Field

[0002] This disclosure relates to a semiconductor device, a manufacturing method, a solid-state imaging element, and an electronic device, and more specifically, to a semiconductor device, a manufacturing method, a solid-state imaging element, and an electronic device that can achieve further improvements in reliability. Background Technology

[0003] Typically, solid-state imaging elements, such as charge-coupled devices (CCDs) or complementary metal-oxide-semiconductor (CMOS) image sensors, are used in electronic devices with imaging capabilities, such as digital cameras or digital camcorders. Solid-state imaging elements have pixels in which photodiodes for photoelectric conversion and multiple transistors are combined, and an image is created based on pixel signals output from the multiple pixels, which are arranged on an image plane that produces an image of the subject.

[0004] Furthermore, in recent years, to achieve miniaturization and high performance of solid-state imaging elements, a stacked solid-state imaging element has been developed, in which a signal processing substrate is stacked on a sensor substrate (on which pixels are formed) to perform signal processing on the image signals output from the sensor substrate. In this stacked solid-state imaging element, composite bonding, such as physical connection of the bonding surfaces of the wafer and electrical connection of the connection pads formed on the bonding surfaces, is performed.

[0005] For example, Patent Document 1 discloses a semiconductor device in which a metal film is formed by forming a metal film on the entire bonding surface of two semiconductor substrates and performing heat treatment while the metal films are in contact with each other, thereby reacting with a portion of the metal film in contact with the interlayer insulating layer to form an insulating film.

[0006] [List of cited references]

[0007] [Patent Literature]

[0008] Patent Document 1: JP2013-168419A Summary of the Invention

[0009] [The technical problem that the invention aims to solve]

[0010] On the other hand, misalignment can often occur during wafer bonding, resulting in a structure where a portion of the bonding pad (Cu) of one wafer is bonded to the insulating layer (SiO2) of another wafer. In this structure, no barrier metal is provided at the interface between the bonding pad and the insulating layer. This raises concerns that during subsequent heated processes (e.g., post-bond annealing or ILD deposition), the copper constituting the bonding pad diffuses from the interface between the bonding pad and the insulating layer into the insulating layer, causing leakage.

[0011] Furthermore, the low bond strength between the bonding pads (Cu) and the insulating layer (SiO2) raises concerns about reduced overall bonding strength (wafer bonding strength). This leads to decreased electromigration resistance and stress-induced voiding resistance, resulting in a decline in overall reliability.

[0012] This disclosure was made in view of these circumstances, and this disclosure can further improve reliability.

[0013] [Solution to the problem]

[0014] One aspect of this disclosure of a semiconductor device includes: a connection pad formed in an interlayer film disposed in a wiring layer of a first semiconductor substrate and a wiring layer of a second semiconductor substrate, for forming an electrical connection between the first semiconductor substrate and the second semiconductor substrate; and a metal oxide film formed between the interlayer film of the first semiconductor substrate and the interlayer film of the second semiconductor substrate, between the connection pad formed on the first semiconductor substrate side and the interlayer film formed on the second semiconductor substrate side, and between the connection pad formed on the second semiconductor substrate side and the interlayer film formed on the first semiconductor substrate side.

[0015] In a method for manufacturing a semiconductor device according to one aspect of this disclosure, the semiconductor device includes: a bonding pad formed in an interlayer film disposed in a wiring layer of a first semiconductor substrate and a wiring layer of a second semiconductor substrate, to form an electrical connection between the first semiconductor substrate and the second semiconductor substrate; and a metal oxide film formed between the interlayer film of the first semiconductor substrate and the interlayer film of the second semiconductor substrate, between the bonding pad formed on the first semiconductor substrate side and the interlayer film formed on the second semiconductor substrate side, and between the bonding pad formed on the second semiconductor substrate side and the interlayer film formed on the first semiconductor substrate side. The method includes the following steps: forming a metal film on at least one of the bonding surfaces of the interlayer film on the first semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film, and the bonding surface of the interlayer film on the second semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film; and spontaneously forming the metal oxide film generated by the reaction between the metal film and the interlayer film by performing heat treatment in a state in which the first semiconductor substrate and the second semiconductor substrate are in close contact with each other in such a way that the metal film is between the first semiconductor substrate and the second semiconductor substrate.

[0016] One aspect of this disclosure discloses a solid-state imaging element comprising: a bonding pad formed in an interlayer film disposed in a wiring layer of a sensor substrate and a wiring layer of a signal processing substrate, respectively, to form an electrical connection between the sensor substrate and the signal processing substrate, wherein a sensor surface having pixels is formed on the sensor substrate, and the signal processing substrate is configured to perform signal processing on the sensor substrate; and a metal oxide film formed between the interlayer film of the sensor substrate and the interlayer film of the signal processing substrate, between the bonding pad formed on the sensor substrate side and the interlayer film formed on the signal processing substrate side, and between the bonding pad formed on the signal processing substrate side and the interlayer film formed on the sensor substrate side.

[0017] An electronic device according to one aspect of this disclosure includes a solid-state imaging element, the solid-state imaging element comprising: a bonding pad formed in an interlayer film respectively disposed in a wiring layer of a sensor substrate and a wiring layer of a signal processing substrate to form an electrical connection between the sensor substrate and the signal processing substrate, the sensor substrate having a sensor surface having pixels, the signal processing substrate being configured to perform signal processing on the sensor substrate; and a metal oxide film formed between the interlayer film of the sensor substrate and the interlayer film of the signal processing substrate, between the bonding pad formed on the sensor substrate side and the interlayer film formed on the signal processing substrate side, and between the bonding pad formed on the signal processing substrate side and the interlayer film formed on the sensor substrate side.

[0018] In one aspect of this disclosure, bonding pads are formed within interlayer films disposed in wiring layers of a first semiconductor substrate (sensor substrate) and wiring layers of a second semiconductor substrate (signal processing substrate), respectively, to form an electrical connection between the first and second semiconductor substrates. Additionally, metal oxide films are formed between the interlayer films of the first and second semiconductor substrates, between bonding pads formed on the first semiconductor substrate side and interlayer films on the second semiconductor substrate side, and between bonding pads formed on the second semiconductor substrate side and interlayer films on the first semiconductor substrate side.

[0019] [Beneficial effects of the present invention]

[0020] According to one aspect of this disclosure, further improvements in reliability can be achieved. Attached Figure Description

[0021] Figure 1 This is a diagram illustrating an example configuration of a solid-state imaging element to which this technology is applicable.

[0022] Figure 2 This is a diagram illustrating the manufacturing method of a solid-state imaging element.

[0023] Figure 3 This is a block diagram illustrating an example of the configuration of an imaging device installed on an electronic device.

[0024] Figure 4 The diagram illustrates an example of using an image sensor. Detailed Implementation

[0025] The specific implementation schemes to which this technology applies are described in detail below with reference to the accompanying drawings.

[0026] Figure 1 This is a diagram illustrating an example configuration of a solid-state imaging element as an application of the present technology in a semiconductor device.

[0027] exist Figure 1 The cross-sectional configuration example of the solid-state imaging element 11 and its magnified portion are shown in the figure.

[0028] like Figure 1 As shown, the solid-state imaging element 11 is constructed by stacking a sensor substrate 13 on which a sensor surface 12 is formed and a signal processing substrate 14 connected in a manner that supports the sensor substrate 13. The sensor surface 12 is disposed on the image plane, and an image of the subject is generated on the image plane by an optical system not shown.

[0029] In the sensor surface 12, photodiodes, which serve as photoelectric conversion units that receive light and convert it into charge, are arranged in a matrix and form an image when their pixels receive light.

[0030] For example, the sensor substrate 13 is constructed by stacking a silicon layer in which photodiodes and transistors constituting pixels are formed, and a wiring layer in which wiring to be connected to the pixels is formed, and outputs an image signal of an image image formed on the sensor surface 12. For example, the wiring layer is constructed by forming conductive metal wirings within an interlayer film 15 made of silicon dioxide (SiO2).

[0031] The signal processing substrate 14 performs various types of signal processing on the image signal output from the sensor substrate 13, and then outputs the image signal to the later-stage image processing circuit. In addition, the signal processing substrate 14 is provided with a wiring layer in which wiring for capturing the image signal output from the sensor substrate 13 is formed, and the wiring layer is provided with an interlayer film 16 similar to the interlayer film 15 of the sensor substrate 13.

[0032] In this manner, the solid-state imaging element 11 is constructed by stacking a sensor substrate 13 and a signal processing substrate 14, and the sensor substrate 13 and the signal processing substrate 14 are physically and electrically bonded. For example, in Figure 1 On the right side, an enlarged view shows an example of the cross-sectional configuration near the two joint terminals 21-1 and 21-2 that form an electrical connection between the sensor substrate 13 and the signal processing substrate 14.

[0033] In the bonding surface between the sensor substrate 13 and the signal processing substrate 14, a metal oxide film 22 is formed on all positions on the entire surface except where bonding terminals 21-1 and 21-2 are formed.

[0034] Furthermore, a connection pad 23-1 is formed in the bonding terminal portion 21-1, wherein the connection pads formed on the interlayer film 15 side of the sensor substrate 13 and the connection pads formed on the interlayer film 16 side of the signal processing substrate 14 are integrally connected, and an electrical connection is formed. The side of the connection pad 23-1 on the interlayer film 15 side is covered by a barrier metal 24a-1, and the side of the connection pad 23-1 on the interlayer film 16 side is covered by a barrier metal 24b-1. Similarly, for the connection pad 23-2 formed in the bonding terminal portion 21-2, the side of the connection pad 23-2 on the interlayer film 15 side is covered by a barrier metal 24a-2, and the side of the connection pad 23-2 on the interlayer film 16 side is covered by a barrier metal 24b-2.

[0035] It should be noted that the bonding terminals 21-1 and 21-2 have similar structures, and in the following text, unless otherwise specified, they will be simply referred to as bonding terminal 21. Similarly, the connecting pads 23-1 and 23-2 will be referred to as connecting pads 23, the blocking metals 24a-1 and 24a-2 will be referred to as blocking metals 24a, and the blocking metals 24b-1 and 24b-2 will be referred to as blocking metals 24b.

[0036] Here, when bonding the sensor substrate 13 and the signal processing substrate 14, adjustments are made to align the connection pads formed in the interlayer film 15 of the sensor substrate 13 with the connection pads formed in the interlayer film 16 of the signal processing substrate 14. At this time, if their positions can be perfectly matched, the connection pads 23 can be covered by the blocking metals 24a, 24b. However, in reality, slight misalignment occurs. Therefore, as... Figure 1 As shown, the connecting pad 23 is formed in a shape in which the portion on the interlayer film 15 side and the portion on the interlayer film 16 side are misaligned.

[0037] The solid-state imaging element 11 is configured such that even if such misalignment occurs, the bonding pads 23 will not directly contact the interlayer films 15 and 16 by forming the metal oxide film 22. That is, in the solid-state imaging element 11, a metal oxide film 22 is formed between the interlayer film 15 of the sensor substrate 13 and the interlayer film 16 of the signal processing substrate 14, between the bonding pads 23 formed on the sensor substrate 13 side and the interlayer film 16 of the signal processing substrate 14, and between the bonding pads 23 formed on the signal processing substrate 14 side and the interlayer film 15 of the sensor substrate 13.

[0038] Because the metal oxide film 22 formed in this way acts as a diffusion barrier layer, it can prevent the copper constituting the bonding pad 23 from diffusing into the interlayer film 15 or interlayer film 16, and can suppress the occurrence of leakage (short circuit between wirings).

[0039] Furthermore, it is known that the adhesion strength between the copper constituting the bonding pad 23 and the SiO2 constituting the interlayer films 15 and 16 is low. In this respect, in the solid-state imaging element 11, as will be discussed later... Figure 2 As illustrated, a metal oxide film 22 can spontaneously form at the interface between the bonding pad 23 and the interlayer films 15, 16, thereby ensuring adhesion strength. Therefore, the solid-state imaging element 11 can have higher electromigration resistance and higher stress migration resistance, and can achieve higher reliability than conventional methods.

[0040] Next, refer to Figure 2 The bonding step of the sensor substrate 13 and the signal processing substrate 14 in the manufacturing method of the solid-state imaging element 11 will be described.

[0041] First, before the bonding step of the sensor substrate 13 and the signal processing substrate 14, connection pads 23a and 23b are formed on the sensor substrate 13 and the signal processing substrate 14 respectively by an inlay process.

[0042] Here, the steps for forming the connection pads 23a in the interlayer film 15 of the sensor substrate 13 will be described. First, wiring trenches are formed in the silicon dioxide (SiO2) or equivalent insulating film used as the interlayer film 15 by photolithography and dry etching, and a barrier metal 24a is formed in the wiring trenches to serve as a diffusion barrier layer between the connection pads 23a and the interlayer film 15. For example, the barrier metal 24a can be formed by physical vapor deposition (PVD) of tantalum (Ta).

[0043] Subsequently, for example, a copper (copper alloy) seed layer is formed by physical vapor deposition to serve as an electrode in the subsequent electroplating process. Then, copper is filled by electroplating, and excess copper is removed by chemical mechanical polishing (CMP) to fill the wiring trench with copper. Through these steps, connection pads 23a are formed. Additionally, through similar steps, connection pads 23b are formed in the interlayer film 16 of the signal processing substrate 14 by using a barrier metal 24b as a diffusion barrier layer.

[0044] Then, a metal film 31a is formed on the entire surface of the interlayer film 15 and the bonding pad 23a. Similarly, a metal film 31b is formed on the entire surface of the interlayer film 16 and the bonding pad 23b. At this time, the metal films 31a and 31b contain at least one or more elements selected from manganese (Mn), vanadium (V), aluminum (Al), magnesium (Mg), and zirconium (Zr), and are formed by depositing them to a thickness of about 0.1 to 10 nm.

[0045] For example, the metals used in these metal films 31a and 31b are chosen to have the property of reacting with the SiO2 constituting the interlayer films 15 and 16 in subsequent heat treatment to produce oxides. Therefore, leakage between the bonding pads 23 can be suppressed. That is, it is desirable to use oxides that have insulating properties as a barrier layer to prevent copper diffusion and the property of melting into the copper constituting the bonding pads 23 (without hindering the conductivity of the interface between the bonding pads 23).

[0046] Therefore, as Figure 2 As shown in the upper part, in the sensor substrate 13, a metal film 31a is formed on the entire surface of the interlayer film 15 and the connecting pad 23a, and in the signal processing substrate 14, a metal film 31b is formed on the entire surface of the interlayer film 16 and the connecting pad 23b. Then, the metal film 31a of the sensor substrate 13 and the metal film 31b of the signal processing substrate 14 are made to face each other, and the alignment is adjusted so that the positions of the connecting pads 23a and 23b are matched.

[0047] Then, as Figure 2 As shown in the middle, the following steps are performed: the entire surface of the metal film 31a of the sensor substrate 13 and the entire surface of the metal film 31b of the signal processing substrate 14 are brought into close contact and bonded, so that there are no areas where they are not bonded to each other. At this time, for example, bonding is performed with the metal film 31 formed on the entire surface of either the bonding surface of the sensor substrate 13 or the bonding surface of the signal processing substrate 14. It should be noted that, preferably, before performing this step, the metal films 31a and 31b are pretreated using a hydrogen-containing liquid or gas to improve the bonding strength through hydrogen bonding.

[0048] Subsequently, for example, while the sensor substrate 13 and the signal processing substrate 14 remain in close contact, a step of applying a thermal load of less than 400 degrees is performed.

[0049] Therefore, as Figure 2 As shown in the lower part, the metal films 31a and 31b melt into the copper constituting the connecting pads 23a and 23b, and spontaneously form a metal oxide film 22 generated by the reaction between the metal and the oxide film. That is, as the final structure, a metal oxide film 22 is formed between the connecting pads 23 and the interlayer films 15 and 16, the connecting pads 23a and 23b are integrated, and there is no metal film 31 at their interface. It should be noted that it is generally known that many metals are prone to oxidation, and when a metal used as a conventional diffusion barrier layer (e.g., tantalum) is used for the metal films 31a and 31b, the diffusion barrier function of tantalum will be lost due to oxidation, so the choice of element is important.

[0050] The sensor substrate 13 and the signal processing substrate 14 are physically and electrically bonded through the steps described above.

[0051] The solid-state imaging element 11 manufactured by this method can suppress leakage (short circuits between wirings) between the bonding pads 23 because the metal oxide film 22 acts as a diffusion barrier layer. Furthermore, since the bonding strength can be ensured by the spontaneous formation of the metal oxide film 22, further improvements in reliability can be achieved.

[0052] Furthermore, as described above, the solid-state imaging element 11 can achieve good conductivity because there is no metal film 31 at the interface between the bonding pads 23a and 23b. For example, when using a metal element (e.g., titanium) that retains the metal film 31 at the interface between the bonding pads 23a and 23b even after heat treatment, the resistance value increases. In contrast, this increase in resistance value can be avoided in the solid-state imaging element 11. It should be noted that elements constituting the metal film 31 present between the bonding pads 23a and 23b are detected in the bonding pads 23.

[0053] In addition, by making the metal films 31a and 31b have a thickness of about 0.1 to 10 nm, the metal oxide film 22 can be formed thinner, which can advantageously suppress the occurrence of leakage.

[0054] It should be noted that, as referred to Figure 2 As explained, it is not necessary to form a metal film 31 on both the interlayer film 15 of the sensor substrate 13 and the interlayer film 16 of the signal processing substrate 14. Instead, the metal film 31 should be formed on only one of them, and it should be configured to reliably form a metal oxide film 22.

[0055] In addition to the elements mentioned above, nickel (Ni), cobalt (Co), iron (Fe), zinc (Zn), or silver (Ag) can also be used as elements that can be used in the metal film 31. For example, although Patent Document 1 discloses a configuration in which titanium (Ti) is used in the metal film, titanium is prone to oxidation and easily forms a passivation state in which the reactivity shown in the normal state is lost, thus resulting in a state in which the entire film cannot be oxidized. It is unsuitable to use such a metal that easily forms a passivation state in the metal film 31 of the solid-state imaging element 11, but it is suitable to use a metal such as manganese that does not form a passivation state in the metal film 31 of the solid-state imaging element 11.

[0056] It should be noted that, for example, in addition to the solid-state imaging element 11 as described above, this technology can also be applied to various stacked semiconductor devices (e.g., memory) constructed by bonding wafers.

[0057] It should be noted that, for example, the solid-state imaging element 11 of the various embodiments described above can be applied to various types of electronic devices such as imaging systems (e.g., digital still cameras or digital video cameras), mobile phones with imaging capabilities, or other devices with imaging capabilities.

[0058] Figure 3 This is a block diagram illustrating an example of the configuration of an imaging device installed on an electronic device.

[0059] like Figure 3 As shown, the imaging device 101 includes an optical system 102, an imaging element 103, a signal processing circuit 104, a display 105, and a memory 106, and is capable of capturing still images and moving images.

[0060] The optical system 102 has one or more lenses and directs image light (incident light) from the subject to the imaging element 103 to generate an image on the light receiving surface (sensor portion) of the imaging element 103.

[0061] As the imaging element 103, the solid-state imaging element 11 of the above embodiment is used. In the imaging element 103, electrons are accumulated for a certain period of time based on the image generated on the light-receiving surface via the optical system 102. Then, a signal corresponding to the electrons accumulated in the imaging element 103 is supplied to the signal processing circuit 104.

[0062] The signal processing circuit 104 performs various types of signal processing on the pixel signals output from the imaging element 103. The image (image data) obtained by the signal processing circuit 104 is supplied to the display 105 for display or to the memory 106 for storage (recording).

[0063] For example, the imaging device 101 constructed in this way can further improve durability and reliably perform imaging by applying the solid-state imaging element 11 of the above-described embodiment.

[0064] Figure 4 The figure shows an example of using the solid-state imaging element 11 (image sensor) described above.

[0065] For example, the image sensor described above can be used to detect various types of light, such as visible light, infrared light, ultraviolet light, or X-rays:

[0066] - Devices used for capturing images for appreciation, such as digital cameras and portable devices with camera functions.

[0067] - Devices for transportation applications, including vehicle-mounted cameras that capture images of the front, rear, surroundings, and interior of a car for safe driving such as automatic parking and for recognizing the driver's state; surveillance cameras that monitor moving vehicles and roads; and distance measuring sensors that measure distances between vehicles.

[0068] - A device used in household appliances such as TVs, refrigerators, and air conditioners to capture the user's gestures and operate the device based on those gestures.

[0069] - Devices used for medical and healthcare purposes, such as endoscopes and devices for angiography by receiving infrared light, etc.

[0070] - Devices used for security purposes, such as surveillance cameras for crime prevention and cameras for personal authentication.

[0071] - Devices used for cosmetic purposes, such as dermatographs for taking images of the skin and microscopes for taking images of the scalp.

[0072] - Devices for sports applications, such as action cameras and wearable cameras for sports use.

[0073] - Devices used for agricultural purposes, such as cameras used to monitor the condition of fields and crops.

[0074] In addition, this technology may also have the following configuration.

[0075] (1) A semiconductor device, comprising:

[0076] Connection pads, formed within interlayer films respectively disposed in wiring layers of a first semiconductor substrate and wiring layers of a second semiconductor substrate, to form an electrical connection between the first semiconductor substrate and the second semiconductor substrate; and

[0077] A metal oxide film is formed between an interlayer film of a first semiconductor substrate and an interlayer film of a second semiconductor substrate, between a bonding pad formed on the first semiconductor substrate side and an interlayer film formed on the second semiconductor substrate side, and between a bonding pad formed on the second semiconductor substrate side and an interlayer film formed on the first semiconductor substrate side.

[0078] (2) The semiconductor device according to (1), wherein

[0079] A metal film is formed on at least one of the bonding surfaces of the interlayer film included on the first semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film, and on at least one of the bonding surfaces of the interlayer film included on the second semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film.

[0080] By performing heat treatment in a state in which the first semiconductor substrate and the second semiconductor substrate are in close contact with each other with the metal film between them, the metal oxide film is spontaneously formed by the reaction between the metal film and the interlayer film.

[0081] (3) The semiconductor device according to (2), wherein

[0082] The metal film is made of a metal having the following properties: during the heat treatment, a portion of the metal film between the connection pads formed on the first semiconductor substrate side and the connection pads formed on the second semiconductor substrate side melts into the connection pads.

[0083] (4) The semiconductor device according to (2) or (3), wherein

[0084] The metal film is composed of a metal that has the property of reacting with the interlayer film during the heat treatment to form an insulating oxide.

[0085] (5) The semiconductor device according to any one of (2) to (4), wherein

[0086] The metal film contains at least one or more elements selected from manganese, vanadium, aluminum, magnesium, and zirconium.

[0087] (6) The semiconductor device according to any one of (2) to (5), wherein

[0088] The metal film is formed to have a thickness of 0.1 nm to 10 nm.

[0089] (7) The semiconductor device according to any one of (2) to (6), wherein

[0090] With the metal film already formed on the entire surface of the interlayer film and the bonding pads, the metal film is pretreated by using a hydrogen-containing liquid or gas.

[0091] (8) The semiconductor device according to any one of (2) to (7), wherein

[0092] When the first semiconductor substrate and the second semiconductor substrate are joined, the joining is performed on the entire surface of at least one of the joining surfaces, provided that the metal film has been formed.

[0093] (9) A method for manufacturing a semiconductor device, wherein

[0094] The semiconductor device includes:

[0095] Connection pads, formed within interlayer films respectively disposed in wiring layers of a first semiconductor substrate and wiring layers of a second semiconductor substrate, to form an electrical connection between the first semiconductor substrate and the second semiconductor substrate; and

[0096] A metal oxide film is formed between the interlayer film of the first semiconductor substrate and the interlayer film of the second semiconductor substrate, between the bonding pads formed on the first semiconductor substrate side and the interlayer film on the second semiconductor substrate side, and between the bonding pads formed on the second semiconductor substrate side and the interlayer film on the first semiconductor substrate side.

[0097] The method includes the following steps:

[0098] A metal film is formed on at least one of the bonding surfaces of the interlayer film included on the first semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film, and the bonding surface of the interlayer film included on the second semiconductor substrate side and the bonding surface of the connection pads formed in the interlayer film; and

[0099] By performing heat treatment in a state in which the first semiconductor substrate and the second semiconductor substrate are in close contact with each other with the metal film between them, the metal oxide film is spontaneously formed by the reaction between the metal film and the interlayer film.

[0100] (10) A solid-state imaging element, comprising:

[0101] Connection pads are formed within interlayer films respectively disposed in the wiring layers of the sensor substrate and the signal processing substrate to form an electrical connection between the sensor substrate and the signal processing substrate. The sensor substrate has a sensor surface with pixels, and the signal processing substrate is configured to perform signal processing on the sensor substrate.

[0102] A metal oxide film is formed between the interlayer film of the sensor substrate and the interlayer film of the signal processing substrate, between the bonding pads formed on the sensor substrate side and the interlayer film on the signal processing substrate side, and between the bonding pads formed on the signal processing substrate side and the interlayer film on the sensor substrate side.

[0103] (11) An electronic device, comprising:

[0104] Solid-state imaging element, the solid-state imaging element comprising:

[0105] Connection pads are formed within interlayer films respectively disposed in the wiring layers of the sensor substrate and the signal processing substrate to form an electrical connection between the sensor substrate and the signal processing substrate. The sensor substrate has a sensor surface with pixels, and the signal processing substrate is configured to perform signal processing on the sensor substrate.

[0106] A metal oxide film is formed between the interlayer film of the sensor substrate and the interlayer film of the signal processing substrate, between the bonding pads formed on the sensor substrate side and the interlayer film on the signal processing substrate side, and between the bonding pads formed on the signal processing substrate side and the interlayer film on the sensor substrate side.

[0107] Furthermore, the implementation schemes disclosed herein are not limited to the above-described implementation schemes, and various modifications may be made within the scope of this disclosure.

[0108] List of reference numerals

[0109] 11 Solid-state imaging elements

[0110] 12 Sensor Surface

[0111] 13 Sensor substrate

[0112] 14 Signal Processing Board

[0113] 15, 16 interlayer membrane

[0114] 21 Connecting terminal section

[0115] 22 Metal oxide film

[0116] 23 Connecting pads

[0117] 24. Blocking metal

[0118] 31 metal film

Claims

1. A semiconductor device, comprising: A sensor substrate, the sensor substrate comprising a photodiode, a transistor and a first wiring layer; and The circuit board includes a signal processing circuit and a second wiring layer, and the sensor substrate is stacked on the circuit board. The first wiring layer includes a first connection pad and a first insulating film. The second wiring layer includes a second connection pad and a second insulating film. In this configuration, a first portion of the first blocking metal contacts a first portion of the second connecting pad. In this configuration, the first portion of the first connecting pad is in direct contact with the second portion of the second connecting pad. In this configuration, the second portion of the first connecting pad contacts the first portion of the barrier film. Wherein, the second portion of the first blocking metal contacts the second portion of the blocking film, and Wherein, the first portion and the second portion of the first blocking metal are on opposite sides of the first connecting pad. Wherein, the first portion and the second portion of the first connection pad and the first portion and the second portion of the second connection pad are both formed of copper. Wherein, the lower surface of the first connection pad is composed of the first portion of the first connection pad and the second portion of the first connection pad, and The upper surface of the second connection pad is composed of the first part of the second connection pad and the second part of the second connection pad.

2. The semiconductor device according to claim 1, wherein, In the cross-sectional view, the third portion of the barrier film is disposed between the first portion of the first insulating film and the first portion of the second insulating film, and is in contact with the first portion of the first insulating film and the first portion of the second insulating film.

3. The semiconductor device according to claim 1, wherein, The first connection pad and the second connection pad are arranged in a peripheral region outside the pixel region containing the photodiode, the peripheral region surrounding the pixel region.

4. The semiconductor device according to claim 1, wherein, The first connection pad and the second connection pad are rectangular in the cross-sectional view.

5. The semiconductor device according to claim 1, wherein, The thickness of the barrier film is in the range of 0.1 nm to 10 nm.

6. The semiconductor device according to claim 1, wherein, The first barrier metal covers three sides of the first connection pad in the cross-sectional view.

7. The semiconductor device according to claim 1, wherein, The second barrier metal covers three sides of the second connection pad in the cross-sectional view.

8. The semiconductor device according to claim 1, wherein, The pixel signal from the photodiode is transmitted to the signal processing circuit via the first connection pad and the second connection pad.

9. The semiconductor device according to claim 1, wherein, The sensor substrate and the circuit substrate are stacked such that the first wiring layer and the second wiring layer face each other.

10. The semiconductor device according to claim 1, wherein, The silicon layer of the sensor substrate contains the photodiode, and the silicon layer is stacked on the first wiring layer.

11. The semiconductor device according to claim 1, wherein, The first connection pad is at least partially covered by the first barrier metal on the side of the first connection pad that is furthest from the second insulating film.

12. The semiconductor device according to claim 7, wherein, The second connection pad is at least partially covered by the second barrier metal on the side of the second connection pad that is furthest from the first insulating film.

13. The semiconductor device according to claim 12, wherein, The second barrier metal covers at least one additional side of the second connection pad.

14. The semiconductor device according to claim 1, wherein, The first barrier metal covers at least one side of the first connection pad.

15. The semiconductor device according to claim 7, wherein, The first blocking metal and the second blocking metal include Ta.

16. The semiconductor device according to claim 1, wherein, The first connection pad and the second connection pad include Cu.

17. A light detection device, comprising: A sensor substrate, the sensor substrate comprising a photodiode, a transistor and a first wiring layer; and The circuit board includes a signal processing circuit and a second wiring layer, and the sensor substrate is stacked on the circuit board. The first wiring layer includes a first connection pad disposed on the surface of the first insulating film. The second wiring layer includes a second connection pad disposed on the surface of the second insulating film. In this configuration, a first portion of the first blocking metal contacts a first portion of the second connecting pad. In this configuration, the first portion of the first connecting pad is in direct contact with the second portion of the second connecting pad. In this configuration, the second portion of the first connecting pad contacts the first portion of the barrier film. The second portion of the first blocking metal is in contact with the second portion of the blocking film. The third portion of the barrier film is disposed between a portion of the surface of the first insulating film and a portion of the surface of the second insulating film, and Wherein, the first portion and the second portion of the first blocking metal are on opposite sides of the first connecting pad. Wherein, the first portion and the second portion of the first connection pad and the first portion and the second portion of the second connection pad are both formed of copper. Wherein, the lower surface of the first connection pad is composed of the first portion of the first connection pad and the second portion of the first connection pad, and The upper surface of the second connection pad is composed of the first part of the second connection pad and the second part of the second connection pad.

18. A vehicle sensor, comprising: A sensor substrate, the sensor substrate comprising a photodiode, a transistor and a first wiring layer; and The circuit board includes a signal processing circuit and a second wiring layer, and the sensor substrate is stacked on the circuit board. The first wiring layer includes a first connection pad disposed on the surface of the first insulating film. The second wiring layer includes a second connection pad disposed on the surface of the second insulating film. In this configuration, a first portion of the first blocking metal contacts a first portion of the second connecting pad. In this configuration, the first portion of the first connecting pad is in direct contact with the second portion of the second connecting pad. In this configuration, the second portion of the first connecting pad contacts the first portion of the barrier film. The second portion of the first blocking metal is in contact with the second portion of the blocking film. The third portion of the barrier film is disposed between a portion of the surface of the first insulating film and a portion of the surface of the second insulating film, and Wherein, the first portion and the second portion of the first blocking metal are on opposite sides of the first connecting pad. Wherein, the first portion and the second portion of the first connection pad and the first portion and the second portion of the second connection pad are both formed of copper. Wherein, the lower surface of the first connection pad is composed of the first portion of the first connection pad and the second portion of the first connection pad, and The upper surface of the second connection pad is composed of the first part of the second connection pad and the second part of the second connection pad.

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