Method for preparing red light emitting diode chip with improved bonding quality

Abstract

The present disclosure provides a method for preparing a red light diode chip with improved bonding quality, and belongs to the field of red light diode production. A liquid insulating glass solution is spin-coated on a first silicon nitride sublayer, and then the liquid insulating glass solution is solidified to a semi-solid state at 110 to 120 degrees. The liquid insulating glass solution is solidified at a low temperature, which can ensure that the liquid insulating glass solution releases stress during the solidification process, reduce the pulling and damage of the bonding layer by the internal stress of the epitaxial material, and improve the bonding quality and luminous efficiency. The liquid insulating glass solution is solidified to a solid state under a second temperature to obtain an insulating glass sublayer, and the second temperature is 100 to 150 degrees higher than 150 degrees. Finally, a second silicon nitride sublayer is deposited on the insulating glass sublayer, which can improve the sealing of the passivation layer and avoid separation of the bonding interface during use.

Description

Technical Field

[0001] The present disclosure relates to the field of red light diode manufacturing, and in particular to a method for preparing a red light diode chip with improved bonding quality. Background Art

[0002] Red light diode is an important light source device, widely used in outdoor lighting and car taillights, and red light diode chip is the basic structure for preparing red light diode. Red light diode chip usually includes a substrate, an epitaxial layer stacked on the substrate, and an n-electrode and a p-electrode arranged on the epitaxial layer. The epitaxial layer usually includes a bonding layer, a p-type layer, a light-emitting layer, an n-type layer and a passivation layer stacked on the substrate in sequence, and the n-electrode and the p-electrode are connected to the n-type layer and the p-type layer respectively.

[0003] In the process of preparing red light diodes, it is necessary to first grow n-type AlInP limiting layers and other materials on materials similar to GaAs substrates to obtain high-quality epitaxial layers, and then bond a temporary substrate to the side of the epitaxial layer away from the GaAs substrate. Then, the epitaxial layer and the GaAs substrate are bonded to a transparent sapphire substrate through a bonding layer. Finally, the temporary substrate is removed and a passivation layer and p and n electrodes are set on the side of the epitaxial layer away from the GaAs substrate.

[0004] Since the thermal expansion coefficient of the passivation layer is different from that of the epitaxial material covered by the passivation layer, and the passivation layer needs to be grown for a long time, during the growth process of the passivation layer, continuous shrinkage stress will be caused to the epitaxial material covered by the passivation layer, and the connection between the bonding layer and the sapphire substrate will be affected, resulting in local detachment of the interface between the bonding layer and the sapphire substrate, resulting in abnormal luminescence at a local position between the bonding layer and the sapphire substrate. Summary of the invention

[0005] The disclosed embodiment provides a method for preparing a red light diode chip with improved bonding quality, which can reduce the possibility of whitening and heat dissipation problems at the bonding point of the red light diode chip, thereby improving the bonding quality of the red light diode chip. The technical solution is as follows:

[0006] The embodiment of the present disclosure provides a method for preparing a red light diode chip with improved bonding quality, and the method for preparing a red light diode chip with improved bonding quality includes:

[0007] Providing a GaAs substrate and a sapphire substrate;

[0008] Growing an n-type layer, a light-emitting layer and a p-type layer in sequence on the GaAs substrate;

[0009] bonding the p-type layer to the sapphire substrate;

[0010] forming a groove on the n-type layer extending to a surface of the p-type layer;

[0011] forming a passivation layer on a surface of the n-type layer and a surface of the p-type layer exposed by the groove;

[0012] forming an n-electrode connected to a surface of the n-type layer and a p-electrode connected to the p-type layer respectively;

[0013] The forming of the passivation layer comprises:

[0014] Depositing a first silicon nitride sublayer on a surface of the n-type layer and a surface of the p-type layer exposed by the groove;

[0015] Spin coating a liquid insulating glass solution on the first silicon nitride sub-layer;

[0016] Solidifying the liquid insulating glass solution to a semi-solid state at 110 to 120 degrees;

[0017] Solidifying the liquid insulating glass solution to a solid state under a second temperature condition to obtain an insulating glass sublayer, wherein the second temperature is 100 to 150 degrees higher than 150 degrees;

[0018] A second silicon nitride sub-layer is deposited on the insulating glass sub-layer.

[0019] Optionally, the ratio of the time taken to solidify the liquid insulating glass solution to a semi-solid state at a temperature of 110 to 120 degrees to the time taken to solidify the liquid insulating glass solution to a solid state at the second temperature is 24 to 30.

[0020] Optionally, the time for curing the liquid insulating glass solution to a semi-solid state at a temperature of 110 to 120 degrees is 12 to 15 hours.

[0021] Optionally, the time for solidifying the liquid insulating glass solution to a solid state under the second temperature condition is 20 to 40 minutes.

[0022] Optionally, the passivation layer has a thickness of 4 to 5 micrometers.

[0023] Optionally, the thickness of the first silicon nitride sublayer is 1500-2500 angstroms, the thickness of the insulating glass sublayer is 3.5-4.5 microns, and the thickness of the second silicon nitride sublayer is 1500-2000 angstroms.

[0024] Optionally, the method for preparing a red light emitting diode chip with improved bonding quality further comprises:

[0025] After depositing a first silicon nitride sublayer on the surface of the n-type layer and the surface of the p-type layer exposed by the groove, before spin coating a liquid insulating glass solution on the first silicon nitride sublayer,

[0026] The first silicon nitride sub-layer is subjected to plasma roughening treatment.

[0027] Optionally, the power of the plasma roughening treatment performed on the first silicon nitride sub-layer is 100-200W.

[0028] Optionally, the plasma roughening treatment of the first silicon nitride sub-layer is performed for 10 to 15 minutes.

[0029] Optionally, the temperature for performing plasma roughening treatment on the first silicon nitride sublayer is 20-30 degrees Celsius.

[0030] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0031] The n-type layer, the light-emitting layer and the p-type layer are sequentially grown on the GaAs substrate, which can meet the basic light-emitting requirements of the red light-emitting diode. The p-type layer is subsequently bonded to the sapphire substrate to ensure the luminous efficiency of the final red light-emitting diode. The subsequent formation of a groove extending from the n-type layer to the p-type layer can facilitate the preparation of the electrode, and then a passivation layer is formed on the surface of the p-type layer exposed by the groove after bonding to ensure stable protection of the epitaxial material, and finally an n-electrode and a p-electrode connected to the n-type layer and the p-type layer are formed respectively. In the process of forming the passivation layer, the first silicon nitride sublayer is first deposited on the surface of the n-type layer and the surface of the p-type layer exposed by the groove, which can stably protect the epitaxial material. At the same time, the adhesion between the first silicon nitride sublayer and the liquid insulating glass solution is good, which can ensure the quality of the passivation layer. The liquid insulating glass solution is spin-coated on the first silicon nitride sublayer, and then the liquid insulating glass solution is solidified to a semi-solid state at 110 to 120 degrees. The liquid insulating glass solution is solidified at low temperature, which can ensure that the liquid insulating glass solution releases stress during the solidification process to offset the accumulated thermal stress caused by the high temperature during the bonding of the p-type layer to the sapphire substrate, and can effectively reduce the pulling and damage of the bonding layer by the internal stress of the epitaxial material, ensure the stable connection between the bonding layer and the sapphire substrate, reduce the possibility of separation between the bonding layer and the sapphire substrate and reduce the abnormal light emission, and the stress direction of the passivation layer during the use of the epitaxial wafer is consistent with the stress direction of the sapphire, thereby effectively improving the bonding quality and light-emitting efficiency of the final red light-emitting diode. After the liquid insulating glass solution forms a semi-solid state, the stress inside the epitaxial material is effectively released. Finally, the liquid insulating glass solution is solidified to a solid state under the condition of a second temperature to obtain an insulating glass sublayer, and the second temperature is 100 degrees to 150 degrees higher than 150 degrees. Under the premise that the stress in the epitaxial material is stably released, the liquid insulating glass solution changes from a semi-solid state to a solid state at the second temperature quickly, which can ensure that the surface of the obtained insulating glass sublayer is relatively dense, which can effectively protect the epitaxial material inside the insulating glass sublayer and ensure the stable connection between the bonding layer and the sapphire substrate. Finally, a second silicon nitride sublayer is deposited on the insulating glass sublayer to improve the sealing of the passivation layer and prevent the separation of the bonding interface during use. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0033] Figure 1It is a flow chart of a method for preparing a red light emitting diode chip with improved bonding quality provided by an embodiment of the present disclosure;

[0034] Figure 2 is a schematic structural diagram of a red light diode chip provided by an embodiment of the present disclosure;

[0035] Figure 3 is a schematic diagram of the structure of a passivation layer provided in an embodiment of the present disclosure;

[0036] Figure 4 is a flow chart of another method for preparing a red light emitting diode chip with improved bonding quality provided by an embodiment of the present disclosure;

[0037] Figure 5 It is a schematic diagram of the structure of another red light emitting diode chip provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0039] Figure 1 is a flow chart of a method for preparing a red light diode chip with improved bonding quality provided by an embodiment of the present disclosure, with reference to Figure 1 It can be seen that the embodiment of the present disclosure provides a method for preparing a red light diode chip with improved bonding quality. The method for preparing a red light diode chip with improved bonding quality includes:

[0040] S101: Provide a GaAs substrate and a sapphire substrate.

[0041] S102: growing an n-type layer, a light-emitting layer and a p-type layer in sequence on a GaAs substrate.

[0042] S103: Bonding the p-type layer to the sapphire substrate.

[0043] S104: forming a groove on the n-type layer extending to the surface of the p-type layer.

[0044] S105: forming a passivation layer on the surface of the n-type layer and the surface of the p-type layer exposed by the groove. The passivation layer is formed, including: depositing a first silicon nitride sublayer on the surface of the n-type layer and the surface of the p-type layer exposed by the groove; spin coating a liquid insulating glass solution on the first silicon nitride sublayer; curing the liquid insulating glass solution to a semi-solid state at 110 to 120 degrees; curing the liquid insulating glass solution to a solid state at a second temperature to obtain an insulating glass sublayer, the second temperature being 100 to 150 degrees higher than 150 degrees; and depositing a second silicon nitride sublayer on the insulating glass sublayer.

[0045] S106: An n-electrode connected to the surface of the n-type layer and a p-electrode connected to the p-type layer are formed respectively.

[0046] The n-type layer, the light-emitting layer and the p-type layer are sequentially grown on the GaAs substrate, which can meet the basic light-emitting requirements of the red light-emitting diode. The p-type layer is subsequently bonded to the sapphire substrate to ensure the luminous efficiency of the final red light-emitting diode. The subsequent formation of a groove extending from the n-type layer to the p-type layer can facilitate the preparation of the electrode, and then a passivation layer is formed on the surface of the p-type layer exposed by the groove after bonding to ensure stable protection of the epitaxial material, and finally an n-electrode and a p-electrode connected to the n-type layer and the p-type layer are formed respectively. In the process of forming the passivation layer, the first silicon nitride sublayer is first deposited on the surface of the n-type layer and the surface of the p-type layer exposed by the groove, which can stably protect the epitaxial material. At the same time, the adhesion between the first silicon nitride sublayer and the liquid insulating glass solution is good, which can ensure the quality of the passivation layer. The liquid insulating glass solution is spin-coated on the first silicon nitride sublayer, and then the liquid insulating glass solution is solidified to a semi-solid state at 110 to 120 degrees. The liquid insulating glass solution is solidified at low temperature, which can ensure that the liquid insulating glass solution releases stress during the solidification process to offset the accumulated thermal stress caused by the high temperature during the bonding of the p-type layer to the sapphire substrate, and can effectively reduce the pulling and damage of the bonding layer by the internal stress of the epitaxial material, ensure the stable connection between the bonding layer and the sapphire substrate, reduce the possibility of separation between the bonding layer and the sapphire substrate and reduce the abnormal light emission, and the stress direction of the passivation layer during the use of the epitaxial wafer is consistent with the stress direction of the sapphire, thereby effectively improving the bonding quality and light-emitting efficiency of the final red light-emitting diode. After the liquid insulating glass solution forms a semi-solid state, the stress inside the epitaxial material is effectively released. Finally, the liquid insulating glass solution is solidified to a solid state under the condition of a second temperature to obtain an insulating glass sublayer, and the second temperature is 100 degrees to 150 degrees higher than 150 degrees. Under the premise that the stress in the epitaxial material is stably released, the liquid insulating glass solution changes from a semi-solid state to a solid state at the second temperature quickly, which can ensure that the surface of the obtained insulating glass sublayer is relatively dense, which can effectively protect the epitaxial material inside the insulating glass sublayer and ensure the stable connection between the bonding layer and the sapphire substrate. Finally, a second silicon nitride sublayer is deposited on the insulating glass sublayer to improve the sealing of the passivation layer and prevent the separation of the bonding interface during use.

[0047] It should be noted that in the actual bonding process, the bonding temperature of the sapphire substrate is relatively high. Therefore, after bonding, the thermal stress in the sapphire substrate is relatively large, and the inside of the sapphire substrate is in an expanded state. After the liquid insulating glass solution is spin-coated, the internal stress of the epitaxial material is released in the process of using a lower temperature to a semi-solid state until the liquid insulating glass solution and the epitaxial material below the liquid insulating glass solution, including the sapphire substrate, are in a relatively stable state. Then, the liquid insulating glass solution is controlled from semi-solid to solid to ensure the connection stability between the final bonding layer and the sapphire substrate. At the same time, the quality of the final passivation layer is ensured to be good, and the passivation layer can be effectively controlled in the final packaging process to play a good protective role. It can ensure that the connection between the epitaxial wafer and the passivation layer of the final red light diode chip and the epitaxial material and the sapphire substrate are relatively stable, which is conducive to improving the overall quality and luminous efficiency of the red light diode chip. The temperature units in this disclosure are all in Celsius. The surfaces involved in this disclosure are all surfaces of the epitaxial material away from the substrate.

[0048] Optionally, in step S105, the ratio of the time for solidifying the liquid insulating glass solution to a semi-solid state at 110°C to 120°C to the time for solidifying the liquid insulating glass solution to a solid state at the second temperature is 24-30.

[0049] The ratio of the time for solidifying the liquid insulating glass solution to a semi-solid state at 110 to 120 degrees to the time for solidifying the liquid insulating glass solution to a solid state at the second temperature is 24 to 30, which can ensure that the process of the liquid insulating glass solution transforming from a liquid state to a semi-solid state is longer, and the liquid insulating glass solution can stably and continuously release stress during the transformation process. During the final solidification process of the liquid insulating glass solution, the density of a shallower layer of the insulating glass sublayer is higher, which can ensure stress release while ensuring that the quality of the insulating glass sublayer finally obtained is better.

[0050] Optionally, in step S105, the time for solidifying the liquid insulating glass solution to a semi-solid state at a temperature of 110 to 120 degrees is 12 to 15 hours.

[0051] The time for solidifying the liquid insulating glass solution to a semi-solid state at 110 to 120 degrees is 12 to 15 hours. The liquid insulating glass solution can stably and continuously release stress during the transformation process to ensure that the connection between the final bonding layer and the sapphire substrate is relatively stable, and the quality of the insulating glass sublayer itself is also good. It can avoid the rapid change of the state of the passivation layer, which may cause excessive concentrated stress on the sapphire substrate and one side of the bonding layer, and effectively improve the connection stability between the final passivation layer and the bonding layer and the sapphire substrate.

[0052] Optionally, in step S105, the time for solidifying the liquid insulating glass solution to a solid state at the second temperature is 20 to 40 minutes.

[0053] The time for solidifying the liquid insulating glass solution to a solid state under the second temperature condition is 20 to 40 minutes, which can ensure that the time of the insulating glass sublayer in the actual solidification process is short, and after the liquid insulating glass solution is relatively stable, including the sapphire substrate and the bonding layer are also in a relatively stable state, the insulating glass sublayer is subjected to a certain density treatment in a short time, which can improve the density and stability of the surface of the insulating glass sublayer, so as to ensure that the passivation layer finally obtained can play a good role in protecting and sealing the inside of the epitaxial material, and reduce the possibility of water vapor or impurities entering the inside of the epitaxial material.

[0054] Optionally, in step S105, the thickness of the passivation layer is 4-5 microns.

[0055] The thickness of the passivation layer is within the above range, which can ensure that the thickness of the passivation layer is moderate, and the stress generated by the passivation layer itself during the growth process is less, thereby avoiding the extreme stress generated by the passivation layer during the growth process and causing the separation between the bonding layer and the sapphire substrate. The connection stability between the bonding layer and the sapphire substrate can be effectively guaranteed.

[0056] In other implementations provided by the present disclosure, the thickness of the passivation layer may also be less than the minimum value within the above passivation layer thickness range, and the present disclosure does not impose any limitation on this.

[0057] Optionally, in step S105, the thickness of the first silicon nitride sublayer is 1500-2500 angstroms, the thickness of the insulating glass sublayer is 3.5-4.5 microns, and the thickness of the second silicon nitride sublayer is 1500-2000 angstroms.

[0058] In the passivation layer, the thickness of the first silicon nitride sublayer, the thickness of the insulating glass sublayer and the thickness of the second silicon nitride sublayer are respectively within the above ranges, which can ensure that the final first silicon nitride sublayer can protect the epitaxial material while not generating large stress on the epitaxial material and the bonding layer side. At the same time, the thicker insulating glass sublayer can stably release the stress on the bonding layer side, thereby improving the stability of the state between the final passivation layer and the epitaxial material and the bonding layer, reducing the possibility of concentrated stress, and effectively improving the connection stability between the bonding layer and the sapphire substrate.

[0059] In an implementation method provided by the present disclosure, step S105 may also include: after depositing the first silicon nitride sublayer on the surface of the n-type layer and the surface of the p-type layer exposed by the groove, before spin coating the liquid insulating glass solution on the first silicon nitride sublayer, plasma roughening the first silicon nitride sublayer.

[0060] Plasma roughening treatment is performed on the first silicon nitride sublayer. On the one hand, it can release the stress accumulated in the first silicon nitride sublayer during the forming process. On the other hand, it can roughen the first silicon nitride sublayer so that there are more nucleation points on the surface of the first silicon nitride sublayer. At the same time, it can also increase the adhesion between the first silicon nitride sublayer and the insulating glass sublayer, which can improve the sealing of the final passivation layer, so as to ensure the internal sealing of the final red light emitting diode chip and improve the luminous efficiency of the final red light emitting diode.

[0061] Optionally, the power of the plasma roughening treatment on the first silicon nitride sub-layer is 100-200W.

[0062] The power of the plasma roughening treatment on the first silicon nitride sub-layer is within the above range, which can ensure that the surface quality of the first silicon nitride sub-layer is good and moderate, and is convenient for spin coating and bonding of the insulating glass sub-layer.

[0063] Optionally, the plasma roughening treatment is performed on the first silicon nitride sub-layer for 10 to 15 minutes.

[0064] The duration of plasma roughening treatment on the first silicon nitride sub-layer is within the above range, which can ensure that the surface quality of the first silicon nitride sub-layer is good and moderate, and is convenient for spin coating and bonding of the insulating glass sub-layer.

[0065] Optionally, the temperature for performing plasma roughening treatment on the first silicon nitride sub-layer is 20-30 degrees Celsius.

[0066] The temperature of the plasma roughening treatment for the first silicon nitride sub-layer is within the above range, which can play a certain role in stress release on the epitaxial material, reduce the possibility of concentrated stress, and improve the bonding quality.

[0067] Step S105 may further include: after the insulating glass sub-layer is formed and before the second silicon nitride sub-layer is formed on the insulating glass sub-layer, performing a plasma roughening treatment on the insulating glass sub-layer.

[0068] Plasma roughening of the insulating glass sublayer can also release stress and increase the contact area between the insulating glass sublayer and the second silicon nitride sublayer, thereby improving the adhesion between the insulating glass sublayer and the second silicon nitride sublayer to improve the quality of the final passivation layer.

[0069] In an implementation provided by the present disclosure, the insulating glass sublayer may be subjected to plasma roughening treatment 5 to 10 hours after the insulating glass sublayer is formed, so as to ensure stress release and better roughening effect.

[0070] Optionally, the power of the plasma roughening treatment on the insulating glass sublayer is 100-200W.

[0071] The duration of the plasma roughening treatment on the insulating glass sublayer is within the above range, which can ensure that the surface quality of the insulating glass sublayer is good and moderate, and facilitates adhesion with the second silicon nitride sublayer.

[0072] Optionally, the duration of the plasma roughening treatment on the insulating glass sublayer is 10 to 15 minutes.

[0073] The duration of the plasma roughening treatment on the insulating glass sublayer is within the above range, which can ensure that the surface quality of the insulating glass sublayer is good and moderate, and facilitates adhesion with the second silicon nitride sublayer.

[0074] Optionally, the temperature for performing plasma roughening treatment on the insulating glass sublayer is 20 to 30 degrees Celsius.

[0075] The temperature of the plasma roughening treatment of the insulating glass sublayer is within the above range, which can play a certain role in stress release on the epitaxial material, reduce the possibility of concentrated stress, and improve the bonding quality.

[0076] It should be noted that both the first silicon nitride sub-layer and the second silicon nitride sub-layer can be obtained by physical vapor deposition.

[0077] For ease of understanding, here is provided Figure 2 , Figure 2 The red diode chip shown in FIG. Figure 1 The red light diode chip is prepared by the method for preparing the red light diode chip shown in Figure 2 is a schematic diagram of the structure of a red light diode chip provided by an embodiment of the present disclosure, with reference to Figure 2 It can be seen that the red light diode chip generally includes a sapphire substrate 1, an epitaxial layer 2 stacked on the sapphire substrate 1, and an n-electrode 3 and a p-electrode 4 arranged on the epitaxial layer 2. The epitaxial layer 2 generally includes a bonding layer 21, a p-type layer 22, a light-emitting layer 23, an n-type layer 24, and a passivation layer 25 stacked in sequence on the sapphire substrate 1. The n-type layer 24 has a groove S extending to the p-type layer 22, and the p-electrode 4 and the n-electrode 3 are connected to the p-type layer 22 and the n-type layer 24, respectively. The passivation layer 25 includes a first silicon nitride sublayer 251, an insulating glass sublayer 252, and a second silicon nitride sublayer 253 stacked in sequence.

[0078] For ease of understanding, here is also provided Figure 3 , Figure 3 is a schematic diagram of the structure of the passivation layer provided in an embodiment of the present disclosure, Figure 3 FIG. 4 illustrates the rough interfaces among the first silicon nitride sublayer 251 , the insulating glass sublayer 252 and the second silicon nitride sublayer 253 .

[0079] Figure 4is another flow chart of a method for preparing a red light diode chip with improved bonding quality provided by an embodiment of the present disclosure, with reference to Figure 4 It can be seen that the method for preparing a red light diode chip with improved bonding quality may include:

[0080] S201: Provide a GaAs substrate and a sapphire substrate.

[0081] Optionally, step S201 may further include: treating the surface of the sapphire substrate in a hydrogen atmosphere for 6 to 10 minutes.

[0082] For example, when processing the surface of a sapphire substrate, the temperature of the reaction chamber may be 1000-1200° C., and the pressure of the reaction chamber may be 200-500 Torr.

[0083] S202: A GaInP layer, a GaAs layer, an n-type AlGaInP current spreading layer, an n-type layer, a light-emitting layer, a p-type layer and a p-type GaP ohmic contact layer are sequentially grown on a GaAs substrate, wherein the n-type layer is an n-type AlInP confinement layer, and the p-type layer is a p-type AlInP confinement layer.

[0084] A GaInP layer and a GaAs layer are first grown on a GaAs substrate, and then other epitaxial structures are grown on the GaAs layer. The overall quality of the epitaxial layer obtained is good, and the subsequent transfer and preparation of the epitaxial layer are also facilitated.

[0085] It should be noted that all epitaxial structures grown on a substrate are collectively referred to as epitaxial layers, and in the embodiments provided in the present disclosure, the epitaxial wafer includes a sapphire substrate and an epitaxial layer on the sapphire substrate.

[0086] For ease of understanding, in the implementation provided by the present disclosure, the GaInP layer, the GaAs layer, the n-type AlGaInP current spreading layer, the n-type AlInP limiting layer, the light-emitting layer, the p-type AlInP limiting layer and the p-type GaP ohmic contact layer are used to obtain the growth conditions of the epitaxial layer deposited on the GaAs substrate, which can be as follows:

[0087] Exemplarily, the growth conditions of the GaInP layer include: growth temperature 650-670 degrees, thickness 150-300 nm, V / III 20-30, and growth rate 0.5-0.8 nm / s.

[0088] Optionally, the growth conditions of the GaAs buffer layer include: growth temperature 650-670 degrees, thickness 150-300 nm, V / III 20-30, and growth rate 0.5-0.8 nm / s.

[0089] Optionally, the growth conditions of the n-type AlGaInP current spreading layer include: growth temperature 670-680 degrees, thickness 3-3.5um, V / III 40-50, growth rate 1.2-1.7nm / s, carrier concentration 1-2e18.

[0090] Optionally, the growth conditions of the n-type AlInP confinement layer include: growth temperature 670-680 degrees, thickness 250-350 nm, V / III 40-50, growth rate 1.2-1.7 nm / s, and carrier concentration 1-2e18.

[0091] Optionally, the growth conditions of the AlGaInP well layer and the AlGaInP barrier layer in the light-emitting layer include: growth temperature 650-660 degrees, thickness 20-22nm, V / III 40-50, and growth rate 1-2nm / s, so as to obtain a light-emitting layer with better quality.

[0092] Optionally, the growth conditions of the p-type AlInP confinement layer include: growth temperature 670-680 degrees, thickness 350-450 nm, V / III 40-50, growth rate 1.2-1.7 nm / s, and carrier concentration 1-2e18.

[0093] Optionally, the growth conditions of the p-type GaP ohmic contact layer include: growth temperature 670-680 degrees, thickness 350-450nm, V / III 40-50, growth rate 1.2-1.7nm / s, and carrier concentration 1-2e18.

[0094] Exemplarily, the growth temperature of the p-type GaP ohmic contact layer is reduced as the growth time of the p-type GaP ohmic contact layer is prolonged until the p-type GaP ohmic contact layer is formed.

[0095] The growth temperature of the p-type GaP ohmic contact layer is reduced, and the surface quality of the p-type GaP ohmic contact layer will be slightly reduced. The surface of the p-type GaP ohmic contact layer will be naturally roughened, which can reduce total reflection.

[0096] S203: peeling off the epitaxial layer and the GaAs substrate and removing the GaInP layer and the GaAs layer in the epitaxial layer.

[0097] Optionally, the GaInP layer and GaAs layer in the epitaxial layer are removed after the glass epitaxial layer and the GaAs substrate, which can facilitate the subsequent transfer and processing of the epitaxial layer and prevent the GaInP layer and GaAs layer from affecting the light-emitting effect of the red light diode chip.

[0098] S204: growing a bonding layer on the sapphire substrate.

[0099] Optionally, the material of the bonding layer is silicon oxide, and the growth conditions of the bonding layer include: the growth temperature is 200 degrees, so that a bonding layer with better quality can be obtained.

[0100] Exemplarily, the bonding layer is grown in a mixed gas environment of laughing gas and ammonia, and the volume ratio of laughing gas to ammonia is 20: 1. A bonding layer of good quality can be obtained.

[0101] S205: transferring the epitaxial layer to the sapphire substrate, and the p-type GaP ohmic contact layer in the epitaxial layer is in direct contact with the bonding layer.

[0102] Step S205 may include: bonding the n-type AlGaInP current spreading layer to the transparent conductive layer on the sapphire substrate; and removing the transition substrate on the other side of the epitaxial layer, so as to achieve a good connection between the epitaxial layer and the sapphire substrate.

[0103] Optionally, the n-type AlGaInP current spreading layer is bonded to the bonding layer on the sapphire substrate by applying pressure, which can ensure a good connection between the n-type AlGaInP current spreading layer and the bonding layer on the sapphire substrate.

[0104] S206: forming a groove on the n-type AlGaInP current spreading layer extending to the p-type AlInP confinement layer.

[0105] Step S206 includes: coating a portion of the n-type AlGaInP current spreading layer with photoresist; after exposing and developing the photoresist, etching a groove in the portion of the n-type AlGaInP current spreading layer not covered by the photoresist, and the groove extends to the p-type AlInP confinement layer.

[0106] S207: forming a p-electrode on the n-type AlGaInP current spreading layer, and forming an n-electrode on the surface of the p-type AlInP confinement layer exposed by the groove.

[0107] It should be noted that the p-electrode only occupies a portion of the surface of the p-type GaP ohmic contact layer, and the n-electrode only occupies a portion of the exposed surface of the n-type AlInP confinement layer.

[0108] Optionally, both the p-electrode and the n-electrode can be obtained by evaporation.

[0109] S208: forming a passivation layer on the n-type AlGaInP current spreading layer.

[0110] Step S208 can refer to Figure 1 The step S105 shown in FIG. 1 is not described in detail here.

[0111] It should be noted that in the disclosed embodiment, Veeco K 465i or C4 or RB MOCVD (Metal Organic Chemical Vapor Deposition) equipment is used to realize the growth method of the red light diode. High-purity H2 (hydrogen) or high-purity N2 (nitrogen) or a mixture of high-purity H2 and high-purity N2 is used as a carrier gas, high-purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0112] For ease of understanding, here is provided Figure 5 , Figure 5 is a schematic diagram of the structure of another red light diode chip provided by an embodiment of the present disclosure, Figure 5 The red diode chip shown in the figure uses Figure 4 The red light diode chip preparation method shown in Figure 5 It can be seen that in another implementation provided by the present disclosure, the red light diode chip may include a sapphire substrate 1, an epitaxial layer 2, an n-electrode 3 and a p-electrode 4. The epitaxial layer 2 generally includes a bonding layer 21, a p-type GaP ohmic contact layer 26, a p-type layer 22, a light-emitting layer 23, an n-type layer 24, an n-AlGaInP current spreading layer 27 and a passivation layer 25 stacked on the sapphire substrate 1 in sequence.

[0113] The n-AlGaInP current spreading layer 27 has a groove S extending to the surface of the p-type layer 22, the passivation layer 25 covers the surface of the n-type layer 24, and the p-electrode 4 is located on the surface of the p-type layer 22 exposed by the groove S, and is fixed to the surface of the p-type layer 22 exposed by the groove S. The n-electrode 3 is located on the surface of the n-AlGaInP current spreading layer 27 away from the sapphire substrate 1, and is fixed to the surface of the n-AlGaInP current spreading layer 27 away from the sapphire substrate 1.

[0114] The passivation layer 25 covers the surfaces of the p-type layer 22 and the n-type layer 24 . The passivation layer 25 has a first through hole that is sleeved on the n-electrode 3 , and the passivation layer 25 has a second through hole that is sleeved on the p-electrode 4 .

[0115] It should be noted that Figure 2 The structure of the passivation layer 25 shown in FIG. Figure 1 and Figure 3 The structure of the passivation layer 25 shown in FIG. 1 is the same as that of the passivation layer 25 shown in FIG. 1 , and thus will not be described in detail here.

[0116] Exemplarily, the bonding layer 21 is located between the sapphire substrate 1 and the n-AlGaInP current spreading layer 27, and the material of the bonding layer 21 includes at least one of SiO2, ZnO, SiN, ITO, In2O3, SnO2, TiO2, ZrO2 and polyimide.

[0117] The addition of the bonding layer 21 can alleviate the lattice mismatch between the epitaxial structure and the sapphire substrate 1, and is conducive to the transfer and bonding of the epitaxial structure. It can also release heat to a certain extent, ensuring that the quality of the final red light diode chip is good. The bonding layer 21 is prepared by using at least one of the above materials, and a bonding layer 21 of good quality can be obtained, and a good connection with other materials can be achieved.

[0118] It should be noted that, when the red light diode chip does not include the n-AlGaInP current spreading layer 27 , the bonding layer 21 is located between the sapphire substrate 1 and the p-type layer 22 .

[0119] Optionally, the thickness of the bonding layer 21 is 2.8 um to 3.2 um.

[0120] When the thickness of the bonding layer 21 is within the above range, it can be applied to red light emitting diode chips of most thickness specifications, and the quality of the bonding layer 21 itself is relatively good.

[0121] Optionally, the thickness of the p-type GaP ohmic contact layer 26 is 500-1000 nm.

[0122] The thickness of the p-type ohmic contact layer 26 can meet the requirements for preparing the p-electrode 4 on the p-type ohmic contact layer 26, and the overall quality of the p-type ohmic contact layer 26 with a thickness within this range is good, which can ensure the stable preparation and connection of the p-electrode 4 and the luminous efficiency of the final red light emitting diode.

[0123] Optionally, the p-type layer 22 may be a p-type AlInP confinement layer, and the thickness of the p-type AlInP confinement layer is 200-300 nm. The quality of the obtained red light diode chip is good.

[0124] Optionally, the light emitting layer 23 is configured to include a plurality of AlGaInP well layers and AlGaInP barrier layers that are alternately grown in a periodic manner, and the Al composition in the AlGaInP well layers and the AlGaInP barrier layers is different.

[0125] For example, the overall thickness of the light emitting layer 23 may be 160-200 nm.

[0126] Optionally, the n-type layer 24 may be an n-type AlInP confinement layer, and the thickness of the n-type AlInP confinement layer is 200-300 nm. The quality of the obtained red light diode chip is good.

[0127] Optionally, the thickness of the n-type AlGaInP current spreading layer 27 is 3-3.5 um. The quality of the obtained red light diode chip is good.

[0128] For example, the material of the p-electrode 4 may include a Cr metal layer and an Au metal layer stacked in sequence, and the thicknesses of the Cr metal layer and the Au metal layer are 20-50 nm and 3000-4500 nm, respectively, which can ensure that the quality of the p-electrode 4 is good.

[0129] For example, the material of the n-electrode 3 is a supporting Au metal layer, an AuGeNi metal layer and a second Au metal layer stacked in sequence, and the thicknesses of the supporting Au metal layer, the AuGeNi metal layer and the second Au metal layer are 10-30 nm, 120-200 nm and 160-300 nm respectively, which can ensure that the quality of the n-electrode 3 is good.

[0130] The above description does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not used to limit the present disclosure. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure still falls within the scope of the technical solution of the present disclosure.

Claims

1. A method for preparing a red light diode chip with improved bonding quality, characterized in that: The method for preparing a red light diode chip with improved bonding quality comprises: Providing a GaAs substrate and a sapphire substrate; Growing an n-type layer, a light-emitting layer and a p-type layer in sequence on the GaAs substrate; bonding the p-type layer to the sapphire substrate; forming a groove on the n-type layer extending to a surface of the p-type layer; forming a passivation layer on a surface of the n-type layer and a surface of the p-type layer exposed by the groove; forming an n-electrode connected to a surface of the n-type layer and a p-electrode connected to the p-type layer respectively; The forming of the passivation layer comprises: Depositing a first silicon nitride sublayer on a surface of the n-type layer and a surface of the p-type layer exposed by the groove; Spin coating a liquid insulating glass solution on the first silicon nitride sub-layer; Solidifying the liquid insulating glass solution to a semi-solid state at 110 to 120 degrees; Solidifying the liquid insulating glass solution to a solid state under a second temperature condition to obtain an insulating glass sublayer, wherein the second temperature is 100 to 150 degrees higher than 150 degrees, and the ratio of the time for solidifying the liquid insulating glass solution to a semi-solid state under a condition of 110 to 120 degrees to the time for solidifying the liquid insulating glass solution to a solid state under the second temperature condition is 24 to 30; A second silicon nitride sub-layer is deposited on the insulating glass sub-layer.

2. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 1, characterized in that: The time for solidifying the liquid insulating glass solution to a semi-solid state at a temperature of 110 to 120 degrees is 12 to 15 hours.

3. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 1, characterized in that: The time for solidifying the liquid insulating glass solution to a solid state at the second temperature is 20 to 40 minutes.

4. The method for preparing a red light emitting diode chip with improved bonding quality according to any one of claims 1 to 3, characterized in that: The thickness of the passivation layer is 4 to 5 microns.

5. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 4, characterized in that: The thickness of the first silicon nitride sublayer is 1500-2500 angstroms, the thickness of the insulating glass sublayer is 3.5-4.5 microns, and the thickness of the second silicon nitride sublayer is 1500-2000 angstroms.

6. The method for preparing a red light emitting diode chip with improved bonding quality according to any one of claims 1 to 3, characterized in that: The method for preparing a red light diode chip with improved bonding quality further comprises: After depositing a first silicon nitride sublayer on the surface of the n-type layer and the surface of the p-type layer exposed by the groove, before spin coating a liquid insulating glass solution on the first silicon nitride sublayer, The first silicon nitride sub-layer is subjected to plasma roughening treatment.

7. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 6, characterized in that: The power of the plasma roughening treatment performed on the first silicon nitride sub-layer is 100-200W.

8. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 7, characterized in that: The duration of the plasma roughening treatment on the first silicon nitride sub-layer is 10 to 15 minutes.

9. The method for preparing a red light emitting diode chip with improved bonding quality according to claim 8, characterized in that: The temperature for performing plasma roughening treatment on the first silicon nitride sub-layer is 20 to 30 degrees Celsius.

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