Semiconductor structure
Patent Information
- Application Number
- CN202210535941.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-17
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2042-05-17
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Figure CN114927496B_ABST
Abstract
Description
Technical Field
[0001] This application relates to semiconductor technology, and more particularly to a semiconductor structure. Background Technology
[0002] Because capacitors have energy storage capabilities, circuit designers often need to add a large number of capacitors between various potentials in circuit design. Furthermore, by utilizing the charging and discharging characteristics of capacitors, the stability of the potentials above and below the capacitor can be enhanced.
[0003] However, depending on changes in actual conditions, there is a need to provide a capacitor structure that can be easily and flexibly adjusted. Summary of the Invention
[0004] This application provides a semiconductor structure and a capacitor structure that is easy to adjust flexibly.
[0005] In a first aspect, this application provides a semiconductor structure, including: a first wire and a second wire, and at least one first conductive layer located between the first wire and the second wire;
[0006] Multiple capacitor banks are provided, with the capacitor banks located on the first wire, the second wire and the first conductive layer respectively, and two capacitor banks are provided on each first conductive layer;
[0007] The capacitor bank includes at least one capacitor, and the capacitor includes a lower electrode layer, a capacitor dielectric layer and an upper electrode layer stacked from bottom to top. The lower electrode layer of the capacitor bank is electrically connected to the corresponding first wire, second wire and first conductive layer respectively.
[0008] A third wire and a fourth wire, wherein the third wire is disposed above the first wire and connected to the first wire through a via, and the fourth wire is disposed above the second wire and connected to the second wire through a via;
[0009] At least one capacitor plate is located on each of the upper electrode layers, in the direction from the first wire to the second wire, and one capacitor plate is electrically connected to the upper electrode layers of each two adjacent capacitor groups.
[0010] At least one second conductive layer, the second conductive layer being located between the third wire and the fourth wire, and the orthographic projection of the second conductive layer on the plane where the capacitor plates are located being located between adjacent capacitor plates.
[0011] In some examples, the first wire, the second wire, and the first conductive layer are located in the same layer.
[0012] In some examples, the third conductor, the fourth conductor, and the second conductive layer are located in the same layer.
[0013] In some examples, the orthographic projection of the second conductive layer onto the plane containing the first conductive layer lies on the first conductive layer.
[0014] In some examples, at least a portion of the second conductive layer is connected to the first conductive layer located beneath the second conductive layer via a via.
[0015] In some examples, the potential of the second conductive layer connected to the first conductive layer is between the potential of the third conductor and the potential of the fourth conductor.
[0016] In some examples, each second conductive layer connected to the first conductive layer is connected to a floating potential.
[0017] In some examples, the first conductive layer includes two first sub-conductive layers, and the second conductive layer includes two second sub-conductive layers, wherein the projection of each second sub-conductive layer onto the plane of the first conductive layer is located on one of the first sub-conductive layers.
[0018] In some examples, there is one first conductive layer and one second conductive layer, the two first sub-conductive layers of the first conductive layer are connected, and the second sub-conductive layer is connected to the first sub-conductive layer through vias.
[0019] In some examples, the potentials of the third and fourth conductors are the first potentials, the potentials of the two second sub-conductive layers are the second potentials, and the first potentials and the second potentials are different.
[0020] In some examples, there is one first conductive layer and one second conductive layer, the two first sub-conductive layers of the first conductive layer are insulated from each other, and the second sub-conductive layers are connected to the insulated first sub-conductive layers through vias.
[0021] In some examples, along the direction from the third conductor to the fourth conductor, the potential of the second sub-conductive layer is between the potential of the third conductor and the potential of the fourth conductor, and the potentials of the third conductor and the fourth conductor are different.
[0022] In some examples, the potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is the same as the potential of the third conductor.
[0023] In some examples, the potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is between the potential of the third conductor and the potential of the fourth conductor.
[0024] In some examples, there are multiple first conductive layers and multiple second conductive layers, and at least two of the first sub-conductive layers of the first conductive layer are insulated from each other, with the second sub-conductive layers connected to the insulated first sub-conductive layers via vias.
[0025] In some examples, along the direction from the third conductor to the fourth conductor, the potential of the second sub-conductive layer connected to the first sub-conductive layer gradually decreases.
[0026] The semiconductor structure provided in this application includes a first conductive wire, a second conductive wire, and at least one first conductive layer located between them; multiple capacitor groups are respectively located on the first conductive wire, the second conductive wire, and the first conductive layer, and two capacitor groups are disposed on each first conductive layer; each capacitor group includes at least one capacitor, and the capacitor includes a lower electrode layer, a capacitor dielectric layer, and an upper electrode layer stacked sequentially from bottom to top, with the lower electrode layer electrically connected to the corresponding first conductive wire, the second conductive wire, and the first conductive layer; at least one capacitor plate is located on each upper electrode layer, along the direction from the first conductive wire to the second conductive wire, and one capacitor plate is electrically connected to the upper electrode layers of every two adjacent capacitor groups; a third conductive wire and a fourth conductive wire, and a second conductive layer between them, wherein the third conductive wire is disposed above and connected to the first conductive wire, and the fourth conductive wire is disposed above and connected to the second conductive wire; the orthographic projection of the second conductive layer on the plane where the capacitor plates are located is located between adjacent capacitor plates. In this application, by reserving a second conductive layer, when the capacitance value needs to be adjusted, only a small amount of structure needs to be modified, without redesigning the entire structure, thereby realizing a capacitor structure that is easy to flexibly adjust. Attached Figure Description
[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0028] Figure 1 This is a model example diagram of a power supply capacitor in circuit design.
[0029] Figure 2 Here is a cross-sectional view and equivalent diagram of an example capacitor;
[0030] Figure 3 A cross-sectional example of a structure with multiple Nicap capacitors connected in series;
[0031] Figure 4 for Figure 3 Top view of the structure;
[0032] Figure 5a An example diagram of a semiconductor structure provided in one embodiment. Figure 5b for Figure 5a Top view;
[0033] Figure 6 Example diagram of a semiconductor structure provided in one embodiment;
[0034] Figure 7a An example diagram of a semiconductor structure provided in one embodiment. Figure 7b for Figure 7a Top view;
[0035] Figure 8a An example diagram of a semiconductor structure provided in one embodiment. Figure 8b for Figure 8a Top view;
[0036] Figure 9 This is an example diagram of the semiconductor structure before adjustment;
[0037] Figure 10a An example diagram of a semiconductor structure provided in one embodiment. Figure 10b for Figure 10a Top view;
[0038] Figure 11 for Figure 9 The structure shown is in a modified example diagram;
[0039] Figure 12 Example diagram of a semiconductor structure provided in one embodiment;
[0040] Figure 13 Example diagram of a semiconductor structure provided in one embodiment;
[0041] Figure 14a An example diagram of a semiconductor structure provided in one embodiment. Figure 14b for Figure 14a Top view;
[0042] Figure 15 This is an example of a potential adjustment method.
[0043] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0044] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0045] The terms "comprising" and "having" in this application are used to indicate an open-ended meaning of inclusion, and refer to the presence of additional elements / components / etc. besides those listed. The terms "first" and "second," etc., are used only as labels and are not intended to limit the number of objects. In this application, unless otherwise stated, directional terms such as "upper," "lower," "left," and "right" generally refer to the upper, lower, left, and right as shown in the accompanying drawings. "Inner" and "outer" refer to the inner and outer contours of the respective components. It is understood that the use of these relative directional terms in this specification is for convenience only; for example, according to the orientation of the example described in the drawings, if the device in the icon is flipped upside down, the component described as "upper" will become the component described as "lower." In the drawings, the shapes shown may be deformed due to manufacturing processes and / or tolerances. Therefore, exemplary embodiments of this application are not limited to the specific shapes shown in the drawings and may include shape changes caused during the manufacturing process. Furthermore, the different elements and areas in the drawings are only schematically shown, and therefore this application is not limited to the dimensions or distances shown in the drawings.
[0046] In circuit design, capacitors can be added between various potentials to enhance their stability. Because capacitors have energy storage capabilities, their charging and discharging characteristics can be used to enhance the stability of the capacitor between different potentials. As an example, Figure 1 Here is a model example diagram of a power supply capacitor in circuit design, such as... Figure 1 As shown, a capacitor is placed between two power sources, such as VDD and VSS. The power supply capacitor in the example diagram is a capacitor composed of multiple capacitors connected in series.
[0047] In practical applications, the capacitor connected in series can be a Nicap capacitor. For example, such as... Figure 2 As shown, Figure 2The diagram illustrates an example of a capacitor's cross-sectional structure and equivalent diagram. This capacitor structure includes two conductors M1 and two conductors M0, connected via vias CT. Each M0 has a capacitor bank 1, each including at least one capacitor 10 (three capacitors in the example). The lower electrode layer of each capacitor bank 1 is connected to its corresponding M0. The upper electrode layers of the capacitor banks 1 on both M0s are connected to a common top container plate (TCP), forming a capacitor CP as shown in the equivalent diagram. The two ends of the capacitor CP are M0. For example, when... Figure 2 When the two M0s in the diagram are connected to the two M1s respectively, and then connected to VDD and VSS, it is... Figure 1 The model of the power supply capacitor is shown.
[0048] It should be noted that the above is only one example, and capacitor structures can also be applied to applications including but not limited to power supplies, such as the stability of potentials other than power supplies. Furthermore, the number of capacitors connected in series is not limited to the situation shown in the diagram. For example, for two potentials with a large voltage difference, multiple Nicap capacitors can be connected in series to achieve a voltage divider effect. Figure 3 and Figure 4 As shown, Figure 3 This is a cross-sectional example of a structure with multiple Nicap capacitors connected in series. The figure illustrates the case of two Nicap capacitors connected in series. Figure 4 for Figure 3 The diagram shows a top view of the structure. In the diagram, the two Nicap capacitors are connected in series through the middle M0.
[0049] The inventors of this application discovered that capacitors can affect the response speed of things like power supply potential, so the capacitance value needs to be adjusted according to the actual requirements of the circuit. For example, Figure 3 and Figure 4 In the example, although multiple Nicap capacitors were connected in series to handle large voltage differences, the actual voltage difference might not reach the expected large difference in subsequent circuit design or application, resulting in a sacrifice of some capacitance value. Therefore, in practical applications, it is often necessary to adjust the capacitance value according to the actual situation, i.e., a capacitor that is easy to adjust flexibly is required.
[0050] The technical solutions of this application will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.
[0051] Figure 5a An example diagram of a semiconductor structure provided in one embodiment. Figure 5b for Figure 5aTop view, such as Figure 5a and Figure 5b As shown, the semiconductor structure includes:
[0052] A first conductive wire 11 and a second conductive wire 12, and at least one first conductive layer 13 located between the first conductive wire 11 and the second conductive wire 12;
[0053] Multiple capacitor groups 20 are located on the first wire 11, the second wire 12 and the first conductive layer 13 respectively, and two capacitor groups 20 are provided on each first conductive layer 13.
[0054] The capacitor bank 20 includes at least one capacitor 200. The capacitor 200 includes a lower electrode layer 21, a capacitor dielectric layer 22 and an upper electrode layer 23 stacked from bottom to top. The lower electrode layer 21 of the capacitor bank 20 is electrically connected to the corresponding first wire 11, second wire 12 and first conductive layer 13 respectively.
[0055] The third guide wire 31 and the fourth guide wire 32 are provided. The third guide wire 31 is located above the first guide wire 11 and is connected to the first guide wire 11 through a through-hole CT. The fourth guide wire 32 is located above the second guide wire 12 and is connected to the second guide wire 12 through a through-hole CT.
[0056] At least one capacitor plate 24 is located on each upper electrode layer 23, in the direction from the first wire 11 to the second wire 12, and one capacitor plate 24 is electrically connected to the upper electrode layers 23 of each two adjacent capacitor groups 20.
[0057] At least one second conductive layer 33 is located between the third conductor 31 and the fourth conductor 32, and the orthographic projection of the second conductive layer 33 on the plane where the capacitor plates are located is located between adjacent capacitor plates 24.
[0058] In practical applications, the aforementioned semiconductor structure may be located on a substrate, which may include a base, or include a base and a dielectric layer located on the upper surface of the base, with the substrate comprising a base and a dielectric layer as an example. The base may include, but is not limited to, a silicon base, such as monocrystalline silicon, polycrystalline silicon, or amorphous silicon or silicon-germanium (SiGe), or a mixed semiconductor structure, such as silicon carbide, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide or gallium antimonide, alloy semiconductors, or combinations thereof. The dielectric layer may include, but is not limited to, a silicon oxide layer.
[0059] In one example, the capacitor bank can be a Nicap capacitor. For instance, the upper and lower electrode layers of the capacitors in the capacitor bank can be conductive material layers.
[0060] In one example, the first wire, the second wire, and the first conductive layer are located in the same layer. By placing the first wire, the second wire, and the first conductive layer in the same wiring layer, the above structure can be formed simultaneously, thereby simplifying the structure fabrication process.
[0061] In one example, the third conductor, the fourth conductor, and the second conductive layer are located in the same layer. Similarly, by placing the third conductor, the fourth conductor, and the second conductive layer in the same wiring layer, the above structure can be formed simultaneously, thus simplifying the structure fabrication process.
[0062] The materials of the first conductive layer, the second conductive layer, the first pad layer, the third conductive layer, the fourth conductive layer, and the second conductive layer can be any conductive material, such as, but not limited to, copper, aluminum, titanium, or silver. It should be noted that the terms "conductive wire" and "conductive layer" mentioned in this article do not limit the specific shape or size of the structure. For example, "conductive wire" is not limited to a linear shape; it can be a strip-shaped wire or a sheet-shaped wire. The shape and size of each structure can be determined according to the needs of circuit and process design.
[0063] Specifically, in the semiconductor structure of this embodiment, one or more first conductive layers 13 are provided between the first conductive wire 11 and the second conductive wire 12. As an example, when there are multiple first conductive layers 13, these first conductive layers 13 are spaced apart. Two capacitor banks 20 are provided on each first conductive layer 13.
[0064] As an example, since the first conductive layer 13 is located between the first conductor 11 and the second conductor 12, only one capacitor bank 20 can be provided on the first conductor 11 and the second conductor 12, and every two adjacent capacitor banks 20 share a capacitor plate 24. Above the capacitor plate 24, a third conductive layer 31, a fourth conductor 32, and a second conductive layer 33 are provided, with the second conductive layer 33 located between the third conductor 31 and the fourth conductor 32. The third conductor 31 is located above the first conductor 11 and is connected to the first conductor 11 through a via, and the fourth conductor 32 is located above the second conductor 12 and is connected to the second conductor 12 through a via CT. As an example, the orthographic projection of the third conductor 31 on the plane where the first conductor 11 is located is on the first conductor 11, and the orthographic projection of the fourth conductor 32 on the plane where the second conductor 12 is located is on the second conductor 12.
[0065] Specifically, the orthographic projection of the second conductive layer 33 onto the plane where the capacitor plate 24 is located is between adjacent capacitor plates 24.
[0066] With a practical example: Based on the semiconductor structure provided in this embodiment, the capacitance value can still be adjusted after the basic structure in the substrate has been fabricated. For example, when it is necessary to adjust the capacitance value between two potentials, a second conductive layer can be selected from the reserved second conductive layers and connected to the underlying first conductive layer through a via. Then, a corresponding potential is applied to the second conductive layer connected to the first conductive layer, thereby adjusting the capacitance value between the potential of the second conductive layer and the potential of the third or fourth wire. The adjustment method will be exemplified in the embodiments described later.
[0067] In one example, the orthographic projection of the second conductive layer 33 onto the plane containing the first conductive layer 13 is located on the first conductive layer 13.
[0068] In this example, the second conductive layer 33 is positioned above the first conductive layer 13. When it is necessary to connect the second conductive layer to the first conductive layer, a via extending vertically along the depth direction can be fabricated to achieve the connection between the first and second conductive layers. This reduces the area occupied by the via and facilitates fabrication and design.
[0069] In practical applications, the second conductive layer that needs to be connected to the first conductive layer can be determined according to adjustment requirements.
[0070] In one example, such as Figure 6 As shown, Figure 6 This is an example diagram of a semiconductor structure provided in one embodiment. In this embodiment, at least a portion of the second conductive layer 33 is connected to the first conductive layer 13 located below the second conductive layer 33 via a via CT.
[0071] The term "at least part" includes one or more cases, while "multiple" refers to part or all of them.
[0072] In practical applications, during the early stages of circuit design, since the results of capacitor simulations are unpredictable, a second conductive layer is reserved to account for the capacitance value and various uncertainties. This serves two purposes: firstly, it can withstand a larger plate voltage, preventing insufficient voltage withstand capability once the simulation results are finalized; secondly, it allows the design team to flexibly adjust the capacitor value based on requirements after obtaining the simulation results.
[0073] It should be noted that, for cases where no adjustment is required, one approach is to not connect the reserved second conductive layer to the first conductive layer, and connect it later when the capacitance value needs to be adjusted. Another approach is to connect the second conductive layer to the first conductive layer and then connect the connected second conductive layer to a floating potential. Neither of these approaches affects the original capacitance value. As an example, based on the above embodiment, each second conductive layer 33 connected to the first conductive layer 13 is connected to a floating potential.
[0074] For situations requiring capacitor adjustment, the capacitor can be adjusted by setting a predetermined potential on the second conductive layer connected to the first conductive layer. In one example, based on the above embodiment, the potential of the second conductive layer 33 connected to the first conductive layer 13 is between the potential of the third wire 31 and the potential of the fourth wire 32.
[0075] The foregoing section introduced a semiconductor structure with a reserved second conductive layer to enable flexible adjustment of the capacitance. The following examples illustrate the adjustment methods in different scenarios.
[0076] Figure 7a An example diagram of a semiconductor structure provided in one embodiment. Figure 7b for Figure 7a A top view. (e.g.) Figure 7a and Figure 7b As shown, based on any of the aforementioned examples, the first conductive layer 13 includes two first sub-conductive layers 131, and the second conductive layer 33 includes two second sub-conductive layers 331. The projection of each second sub-conductive layer 331 on the plane where the first conductive layer 13 is located is respectively located on a first sub-conductive layer 131.
[0077] The number of the first conductive layer 11 and the second conductive layer 13 can be determined as needed. The semiconductor structure illustrated in the figure includes one first conductive layer 13. For example, there can be one first conductive layer 13, and similarly, there can also be one second conductive layer 33. Optionally, the second conductive layer 33 is disposed above the first conductive layer 13. Furthermore, there can be multiple first conductive layers 13, such as three, and similarly, there can also be three second conductive layers 33.
[0078] The above example illustrates the setting of the number of the first conductive layer and the second conductive layer. The number of the first sub-conductive layers within the first conductive layer, and the number of the second sub-conductive layers within the second conductive layer, can also be determined according to design requirements; for example, there can be two.
[0079] It should be noted that the shape and size of the first and second sub-conductive layers are not limited. Taking the first sub-conductive layer as an example, it can be a continuous strip-shaped conductive layer or a conductive layer with a perforated pattern. It can be designed and determined according to the integration design requirements and conduction needs. Furthermore, the two first sub-conductive layers can be fabricated using the same metal layer fabrication process. First, a single first conductive layer is fabricated. When the two first sub-conductive layers need to be connected, the first conductive layer is divided into two sub-conductive layers. The boundary line between the two first sub-conductive layers in the figure is only an example and does not represent an actual structure. When insulation between the two first conductive layers is required, the first conductive layer can be broken to form two insulating first sub-conductive layers as needed.
[0080] In one adjustment scenario, if instability such as electrical fluctuations is found between two potentials later in the circuit design process, the capacitance between these two potentials can be increased. These two potentials are distinct.
[0081] In one example, such as Figure 8a and Figure 8b As shown, Figure 8a An example diagram of a semiconductor structure provided in one embodiment. Figure 8b for Figure 8a The top view shows that there is one first conductive layer 13 and one second conductive layer 33. The two first sub-conductive layers 131 of the first conductive layer 13 are connected, and the second sub-conductive layer 331 is connected to the first conductive layer 131 through vias CT.
[0082] In this example, there is one first conductive layer and one second conductive layer. The first conductive layer 13 includes two first sub-conductive layers 131, and the second conductive layer 33 includes two second sub-conductive layers 331. Each second sub-conductive layer 331 is connected to one first sub-conductive layer 131. By applying corresponding potentials to the third wire 31, the fourth wire 32, and the second conductive layer 331, the capacitance value between the two potentials corresponding to the third wire 31 and the fourth wire 32 can be increased.
[0083] As an example, the potentials of the third and fourth conductors are the first potential, and the potentials of the two second sub-conductive layers are the second potential, and the first potential and the second potential are different. The following example uses potential A as the first potential and potential B as the second potential.
[0084] Combination Figure 8b and Figure 9 For example, suppose Figure 9 This is an example diagram of the semiconductor structure before adjustment. Accordingly, Figure 8b This indicates the adjusted structure. Specifically, an example is given of improving the stability of potentials A and B.
[0085] like Figure 9 As shown, before adjustment, to stabilize potentials A and B, the third conductor 31 of the semiconductor structure is at potential A, and the fourth conductor 32 is at potential B, so as to stabilize the two potentials through the capacitance between potentials A and B. It can be understood that before adjustment, the total capacitance between potentials A and B is composed of two capacitor banks connected in series, which refer to two capacitor banks sharing the same capacitor plate. Additionally, a second conductive layer 33 is reserved between the third conductor 31 and the fourth conductor 32. This second conductive layer 33 is not connected to the first conductive layer 13, or the second conductive layer 33 is connected to the first conductive layer 13 and its potential is a floating potential.
[0086] In practical applications, there are no restrictions on how the wire potential is set. For example, the third wire 31 can be connected to the module with output potential A through interconnect wiring, or the third wire 31 can be connected to a node with potential A through interconnect wiring.
[0087] like Figure 8b As shown, assuming that it is subsequently discovered that potentials A and B, despite the presence of capacitors, still exhibit instability issues, such as electrical fluctuations, the capacitance between potentials A and B can be increased by adjusting the capacitor value. A specific adjustment example is shown below. Figure 8b ,exist Figure 8b In this process, the reserved second conductive layer 33 is connected to the underlying first conductive layer via a via CT. Specifically, each second sub-conductive layer 331 of the second conductive layer 33 is connected to a first sub-conductive layer 131 of the first conductive layer 13 via a via CT. Along with the structural adjustment, the potentials of the third wire 31 and the fourth wire 32 are adjusted to one of potentials A and B, and the potentials of the two second sub-conductive layers 331 connected to the second conductive layer 33 of the first conductive layer 13 are adjusted to the other of potentials A and B.
[0088] The image is just an example, such as Figure 8b As shown, the potentials of the third conductor 31 and the fourth conductor 32 are adjusted to potential A, and the potentials of both second sub-conductive layers 331 are adjusted to potential B. It can be understood that the potentials of the third conductor 31 and the fourth conductor 32 can also be adjusted to potential B, and the potentials of both second sub-conductive layers 331 can be adjusted to potential A.
[0089] After the above adjustments, the total capacitance between potential A and potential B is formed by two capacitor banks connected in parallel. It can be seen that the capacitance value of the two capacitor banks connected in parallel is significantly higher than the capacitance value of the two capacitor banks connected in series before the adjustment, thereby increasing the capacitance between potential A and potential B and improving the stability of potential A and potential B. Furthermore, based on the scheme in this example, adjustments only require the fabrication of vias and the adjustment of metal lines. This scheme can even be applied after the design of the underlying main layer structure is completed, enabling flexible and convenient capacitance adjustment.
[0090] For cases where potentials A and B are unstable, another adjustment method can be adopted based on the semiconductor structure with a reserved second conductive layer.
[0091] Specifically, in another example, such as Figure 10a and 10b As shown, Figure 10a An example diagram of a semiconductor structure provided in one embodiment. Figure 10b for Figure 10aThe top view shows that there is one first conductive layer 13 and one second conductive layer 33. The two first sub-conductive layers 131 of the first conductive layer 13 are insulated from each other, and the second sub-conductive layers 331 are connected to the insulated first conductive layers 131 through vias CT.
[0092] In this example, there is one first conductive layer and one second conductive layer. The first conductive layer 13 includes two first sub-conductive layers 131, and the second conductive layer 33 includes two second sub-conductive layers 331. Each second sub-conductive layer 331 is connected to one first sub-conductive layer 131. The difference from the previous example is that the two first sub-conductive layers 131 in this example are insulated from each other. Based on this structure, by subsequently applying corresponding potentials to the third wire 31, the fourth wire 32, and the second conductive layer 331, the capacitance value between the two potentials corresponding to the third wire 31 and the fourth wire 32 can be increased.
[0093] As an example, the potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is the same as the potential of the third conductor.
[0094] Combination Figure 9 and Figure 11 For example, among them, Figure 9 This is an example image before adjustment. Figure 11 for Figure 9 The structure shown is in a modified example diagram. Specifically, the example still focuses on improving the stability of potentials A and B.
[0095] like Figure 9 As shown, similar to the previous example, before adjustment, in order to stabilize potentials A and B, the third wire 31 of the semiconductor structure is at potential A, and the fourth wire 32 is at potential B, so as to stabilize the two potentials through the capacitance between potentials A and B. It can be understood that before adjustment, the total capacitance between potentials A and B is composed of two capacitor banks connected in series.
[0096] If instability, such as electrical fluctuations, is subsequently found between potentials A and B, the capacitance between them can be increased. A specific adjustment example is shown below. Figure 11 Its structure is referenced Figure 10b The semiconductor structure shown includes a reserved second conductive layer 33, comprising two second sub-conductive layers 331, which are respectively connected to the underlying first sub-conductive layer 131 via vias CT. Specifically, each second sub-conductive layer 331 of the second conductive layer 33 is connected to a first sub-conductive layer 131 of the first conductive layer 13 via vias CT. In this example, the two first sub-conductive layers 131 are insulated from each other.
[0097] With structural adjustments, in Figure 10b Based on the structure shown, potential adjustments are made. Specifically, the potential of the third conductor 31 is adjusted to one of potentials A and B, the potential of the fourth conductor 32 is adjusted to the other of potentials A and B, and the potentials of the two second sub-conductive layers 331 are adjusted to potentials A and B, respectively. The potentials of the third conductor 31 and its adjacent second sub-conductive layer 331 are different, and the potentials of the fourth conductor 32 and its adjacent second sub-conductive layer 331 are also different.
[0098] For example, the adjusted result is as follows: Figure 11 As shown, the potential of the third conductor 31 is potential A, the potential of the fourth conductor 32 is potential B, the potential of the second sub-conductive layer 331 near the third conductor 31 is potential B, and the potential of the second sub-conductive layer 331 near the fourth conductor 32 is potential A.
[0099] The diagram is just an example. It can be understood that the potential of the third conductor 31 can be adjusted to potential B, the potential of the second sub-conductive layer 331 near the third conductor 31 can be adjusted to potential A, the potential of the fourth conductor 32 can be adjusted to potential A, and the potential of the second sub-conductive layer 331 near the fourth conductor 32 can be adjusted to potential B.
[0100] After the above adjustments, the total capacitance between potential A and potential B is formed by two capacitor banks connected in parallel, thereby increasing the capacitance between potential A and potential B compared to before the adjustment, and improving the stability of potential A and potential B. Furthermore, based on the scheme in this example, when making adjustments, only the via fabrication and metal wire adjustment are required, enabling flexible and convenient capacitance adjustment.
[0101] In another adjustment scenario, it might be discovered later in the circuit design that potential C, located between potentials A and B, is unstable, exhibiting phenomena such as electrical fluctuations. In such cases, it is necessary to improve the stability of potential C. Here, potentials A and B are different potentials.
[0102] In one example, it is possible to Figure 10a and Figure 10b Based on the semiconductor structure shown, potential adjustment is performed. Specifically, Figure 10b In the semiconductor structure shown, there is one first conductive layer 13 and one second conductive layer 33. The two first sub-conductive layers 131 of the first conductive layer 13 are insulated from each other, and the second sub-conductive layers 331 are connected to the insulated first sub-conductive layers 131 through vias CT.
[0103] As a method of potential adjustment, in Figure 10b Based on the structure shown, such as Figure 12 As shown, Figure 12 This is an example diagram of a semiconductor structure provided in one embodiment. Along the direction from the third conductor 31 to the fourth conductor 32, the potential of the second sub-conductive layer 331 is between the potential of the third conductor 31 and the potential of the fourth conductor 32, and the potentials of the third conductor 31 and the fourth conductor 32 are different.
[0104] Combination Figure 9 and Figure 12 For example, suppose Figure 9 Example image before adjustment. Correspondingly, Figure 12 This indicates the situation after adjustment. Specifically, let's take improving the stability of potential C, which is between potential A and potential B, as an example. For instance, potential A is 2 volts, potential B is 3 volts, and potential C is in between, for example, 2.6 volts.
[0105] like Figure 9 As shown, before adjustment, in order to stabilize potentials A and B, the third conductor 31 of the semiconductor structure is at potential A, and the fourth conductor 32 is at potential B, so as to stabilize the two potentials through the capacitance between potentials A and B. Two second sub-conductive layers 331 are reserved between the third conductor 31 and the fourth conductor 32.
[0106] like Figure 12 As shown, assuming that potential C, which lies between potential A and potential B, is subsequently found to be unstable, such as exhibiting electrical fluctuations, the stability of potential C can be improved through adjustments. A specific example of such adjustments is shown below. Figure 12 , Figure 12 First based on Figure 10b The structure shown is structurally adjusted by connecting the two reserved second sub-conductive layers 331 to the underlying insulating first sub-conductive layer 131 via vias CT. Specifically, each second sub-conductive layer 331 of the second conductive layer 33 is connected to one first sub-conductive layer 131 of the first conductive layer 13 via a via CT. Along with this structural adjustment, further... Figure 10b Based on the structure shown, the potentials of the two second sub-conductive layers 331 are both adjusted to potential C.
[0107] The diagram is just an example. It can be understood that the potentials of the third conductor 31 and the fourth conductor 32 can be interchanged, that is, the potential of the third conductor can be adjusted to potential B, the potential of the fourth conductor can be adjusted to potential A, and the potentials of the two second sub-conductive layers 331 can be adjusted to potential C.
[0108] After the above adjustments, the stability of potential C can be improved by charging and discharging the capacitor connected to potential C. Furthermore, based on the scheme in this example, adjustments only require the fabrication of vias and the adjustment of the metal lines, enabling flexible and convenient capacitor adjustment without altering the active region.
[0109] Still addressing the unstable potential C between potential A and potential B, as another method of potential adjustment, in Figure 10b Based on the structure shown, such as Figure 13 As shown, Figure 13 This is an example diagram of a semiconductor structure provided in one embodiment. The potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is between the potential of the third conductor and the potential of the fourth conductor.
[0110] Combination Figure 9 and Figure 13 For example, suppose Figure 9 Example image before adjustment. Correspondingly, Figure 13 This indicates the situation after the adjustment. Specifically, let's take improving the stability of potential C, which is between potential A and potential B, as an example.
[0111] like Figure 9 As shown, before adjustment, in order to stabilize potentials A and B, the third conductor 31 of the semiconductor structure is at potential A, and the fourth conductor 32 is at potential B, so as to stabilize the two potentials through the capacitance between potentials A and B. Two second sub-conductive layers 331 are reserved between the third conductor 31 and the fourth conductor 32.
[0112] like Figure 13 As shown, assuming that potential C, which lies between potential A and potential B, is subsequently found to be unstable, such as exhibiting electrical fluctuations, the stability of potential C can be improved through adjustments. A specific example of such adjustments is shown below. Figure 13 , Figure 13 First based on Figure 10b The structure shown is structurally adjusted by connecting the two reserved second sub-conductive layers 331 to the underlying insulating first sub-conductive layer 131 via vias CT. Specifically, each second sub-conductive layer 331 of the second conductive layer 33 is connected to one first sub-conductive layer 131 of the first conductive layer 13 via a via CT. Along with this structural adjustment, further... Figure 10b Based on the structure shown, the potential of the second sub-conductive layer 331 near the third conductor 31 is adjusted to the potential of the fourth conductor 32, i.e., potential B, and the potential of the second sub-conductive layer 331 near the fourth conductor 32 is adjusted to potential C.
[0113] The diagram is just an example. It can be understood that the potential of the second sub-conductive layer 331 near the third conductor 31 can be adjusted to potential C, and the potential of the second sub-conductive layer 331 near the fourth conductor 32 can be adjusted to the potential of the third conductor 31, i.e., potential A.
[0114] After the above adjustments, the stability of potential C can be improved by charging and discharging the capacitor connected to potential C. Furthermore, based on the scheme in this example, adjustments only require the fabrication of vias and the adjustment of the metal lines, enabling flexible and convenient capacitor adjustment without altering the active region.
[0115] The above approach combines stability optimization with a single potential between potential A and potential B. In one example, stability optimization can also be performed on multiple potentials between potential A and potential B.
[0116] As shown in Figure 14 and Figure 14b As shown, Figure 14a An example diagram of a semiconductor structure provided in one embodiment. Figure 14b for Figure 14a A top view. In Figure 7b For example, based on the first conductive layer including two first sub-conductive layers and the second conductive layer including two second sub-conductive layers, the number of first conductive layers 13 and second conductive layers 33 are multiple, and at least some of the two first sub-conductive layers 131 of the first conductive layer 13 are insulated from each other, and the second sub-conductive layers 331 are respectively connected to the insulated first sub-conductive layers 131 through vias CT.
[0117] In this example, there are multiple first conductive layers and multiple second conductive layers. Specifically, at least a portion of the first conductive layer 13 has two first sub-conductive layers 131 that are insulated from each other, and the corresponding second sub-conductive layer 331 is connected to the insulated first sub-conductive layer 131. The number of "at least a portion of the first conductive layers" can be determined as needed. For example, it can be determined based on the number of potentials required to improve stability. Suppose there are three unstable potentials between potential A and potential B; then three first conductive layers can be selected from the first conductive layers, and the first sub-conductive layers of these three first conductive layers can be adjusted to be insulated.
[0118] In practical applications, there are no restrictions on how the insulation between the first sub-conductive layers is set, such as through etching or other processes.
[0119] As an example of potential adjustment, in one example, the potential of the second sub-conductive layer connected to the first sub-conductive layer gradually decreases along the direction from the third conductor to the fourth conductor.
[0120] For example, such as Figure 15 As shown, Figure 15This is an example of a potential adjustment method. Suppose that multiple potentials between potential A and potential B, namely potentials C1, C2, and C3, are found to be unstable. Then, three first conductive layers 13 can be selected from the multiple first conductive layers 13. The first sub-conductive layers 131 of these three first conductive layers are insulated and connected to the corresponding second sub-conductive layers 331 via vias CT. The potentials of the second sub-conductive layers 331 corresponding to the three first conductive layers are adjusted in a gradually decreasing manner. It should be noted that the figure is only an example; in actual applications, the direction of potential change can be set according to the actual situation.
[0121] The semiconductor structure provided in the above embodiments includes a first conductive wire and a second conductive wire, and at least one first conductive layer located between them; multiple capacitor groups are respectively located on the first conductive wire, the second conductive wire, and the first conductive layer, and two capacitor groups are disposed on each first conductive layer; each capacitor group includes at least one capacitor, and the capacitor includes a lower electrode layer, a capacitor dielectric layer, and an upper electrode layer stacked sequentially from bottom to top, with the lower electrode layer electrically connected to the corresponding first conductive wire, the second conductive wire, and the first conductive layer; at least one capacitor plate is located on each upper electrode layer, along the direction from the first conductive wire to the second conductive wire, and one capacitor plate is electrically connected to the upper electrode layers of every two adjacent capacitor groups; a third conductive wire and a fourth conductive wire, and a second conductive layer between them, wherein the third conductive wire is disposed above and connected to the first conductive wire, and the fourth conductive wire is disposed above and connected to the second conductive wire; the orthographic projection of the second conductive layer on the plane where the capacitor plates are located is located between adjacent capacitor plates. In this application, by reserving a second conductive layer, when the capacitance value needs to be adjusted, only a small amount of structure needs to be modified, without redesigning the entire structure, thereby realizing a capacitor structure that is easy to adjust flexibly.
[0122] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0123] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A semiconductor structure, characterized in that, include: A first conductor and a second conductor, wherein at least one first conductive layer is located between the first conductor and the second conductor; Multiple capacitor banks are provided, with the capacitor banks located on the first wire, the second wire and the first conductive layer respectively, and two capacitor banks are provided on each first conductive layer; The capacitor bank includes at least one capacitor, and the capacitor includes a lower electrode layer, a capacitor dielectric layer and an upper electrode layer stacked from bottom to top. The lower electrode layer of the capacitor bank is electrically connected to the corresponding first wire, second wire and first conductive layer respectively. A third wire and a fourth wire, wherein the third wire is disposed above the first wire and connected to the first wire through a via, and the fourth wire is disposed above the second wire and connected to the second wire through a via; At least one capacitor plate is located on each of the upper electrode layers, in the direction from the first wire to the second wire, and one capacitor plate is electrically connected to the upper electrode layers of each two adjacent capacitor groups. At least one second conductive layer, the second conductive layer being located between the third wire and the fourth wire, and the orthographic projection of the second conductive layer on the plane where the capacitor plates are located being located between adjacent capacitor plates; The first conductive layer includes two first sub-conductive layers, and the second conductive layer includes two second sub-conductive layers. The projection of each second sub-conductive layer onto the plane of the first conductive layer is located on one of the first sub-conductive layers. The two first sub-conductive layers of the first conductive layer are connected, and the second sub-conductive layer is connected to the first sub-conductive layer through vias.
2. The semiconductor structure according to claim 1, characterized in that, The first conductor, the second conductor, and the first conductive layer are located in the same layer.
3. The semiconductor structure according to claim 1, characterized in that, The third conductor, the fourth conductor, and the second conductive layer are located in the same layer.
4. The semiconductor structure according to claim 1, characterized in that, The orthographic projection of the second conductive layer onto the plane containing the first conductive layer is located on the first conductive layer.
5. The semiconductor structure according to claim 1, characterized in that, At least a portion of the second conductive layer is connected to the first conductive layer located below the second conductive layer via a via.
6. The semiconductor structure according to claim 5, characterized in that, The potential of the second conductive layer, which is connected to the first conductive layer, is between the potential of the third conductor and the potential of the fourth conductor.
7. The semiconductor structure according to claim 5, characterized in that, Each second conductive layer connected to the first conductive layer is connected to a floating potential.
8. The semiconductor structure according to claim 1, characterized in that, The number of the first conductive layer and the number of the second conductive layer are each 1.
9. The semiconductor structure according to claim 8, characterized in that, The potentials of the third and fourth conductors are the first potentials, and the potentials of the two second sub-conductive layers are the second potentials, and the first potentials and the second potentials are different.
10. The semiconductor structure according to claim 1, characterized in that, The first conductive layer and the second conductive layer each have one unit. The two first sub-conductive layers of the first conductive layer are insulated from each other. The second sub-conductive layer is connected to the insulated first sub-conductive layer through a via.
11. The semiconductor structure according to claim 10, characterized in that, Along the direction from the third conductor to the fourth conductor, the potential of the second sub-conductive layer is between the potential of the third conductor and the potential of the fourth conductor, and the potentials of the third conductor and the fourth conductor are different.
12. The semiconductor structure according to claim 10, characterized in that, The potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is the same as the potential of the third conductor.
13. The semiconductor structure according to claim 10, characterized in that, The potential of the second sub-conductive layer near the third conductor is the same as the potential of the fourth conductor, and the potential of the second sub-conductive layer near the fourth conductor is between the potential of the third conductor and the potential of the fourth conductor.
14. The semiconductor structure according to claim 1, characterized in that, The number of the first conductive layer and the number of the second conductive layer are both multiple. At least two of the first sub-conductive layers of the first conductive layer are insulated from each other, and the second sub-conductive layer is connected to the insulated first sub-conductive layer through a via.
15. The semiconductor structure according to claim 14, characterized in that, Along the direction from the third conductor to the fourth conductor, the potential of the second sub-conductive layer, which is connected to the first sub-conductive layer, gradually decreases.
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