Micro LED display device and manufacturing method thereof

Abstract

A micro-LED display device is provided. The micro-LED display device includes a substrate, a supply voltage line on the substrate, and a micro-LED region positioned on the supply voltage line. At least a portion of the supply voltage line is positioned vertically below the micro-LED region.

Description

Technical Field

[0001] This disclosure relates to a micro LED display device with reduced voltage drop (IR drop) and a method for manufacturing the same. Background Technology

[0002] Electroluminescent display devices receive image signals and display images in a display area. Electroluminescent display devices can be implemented using, for example, miniature LEDs (micro-light-emitting diodes), organic light-emitting diodes (OLEDs), and quantum dot light-emitting diodes (QLEDs) as electroluminescent elements.

[0003] In micro LED display devices, voltage drop (IR drop) is an issue due to the so-called high current characteristics during operation, i.e., the large amount of current used in operation. Summary of the Invention

[0004] Technical Purpose

[0005] One or more embodiments of this disclosure provide a micro LED display device with a novel structure and a method for manufacturing the same, which can solve one or more technical problems in related technologies, including the problems described above (e.g., voltage drop (IR drop) problem).

[0006] One or more embodiments of this disclosure provide a micro LED display device with a novel structure suitable for high resolution and large area, and a method for manufacturing the same.

[0007] One or more embodiments of this disclosure are not limited to the technical benefits mentioned above, and other unmentioned benefits will be clearly understood by those skilled in the art through the following description.

[0008] Technical solution

[0009] A micro LED display device according to one embodiment of the present disclosure includes: a substrate; a power supply voltage line on the substrate; and a micro LED region disposed on the power supply voltage line, wherein at least a portion of the power supply voltage line is disposed directly below the micro LED region.

[0010] A method for manufacturing a micro LED display device according to embodiments of the present disclosure includes: a process of coating an insulating film on a substrate; a process of coating power supply voltage lines on a substrate; a process of forming a TFT array on the insulating film and the power supply voltage lines; and a process of forming a micro LED array on the TFT array.

[0011] Specific details of other implementation methods are included in the detailed embodiments and accompanying drawings.

[0012] Technical effect

[0013] The micro LED display device according to the embodiments of this disclosure can improve or maximize the area utilization within the pixel, and thus has the advantages of high resolution and large area.

[0014] The micro LED display device according to the embodiments of this disclosure can have the effect of increasing the degree of freedom in adjusting the resistance of the electrodes.

[0015] The micro LED display device according to the embodiments of this disclosure can have a small voltage drop (IR drop) and can be unaffected by the voltage drop (IR drop).

[0016] The effects of this disclosure are not limited to those described above, and many more effects are included in this disclosure. Attached Figure Description

[0017] Figure 1 This is a typical planar view of a micro LED display device.

[0018] Figure 2 This is a cross-sectional view of a typical micro LED display device.

[0019] Figure 3 This is a plan view of a micro LED display device according to one embodiment of the present disclosure.

[0020] Figure 4 This is a cross-sectional view of a micro LED display device according to one embodiment of the present disclosure.

[0021] Figure 5 This is a cross-sectional view illustrating a method for manufacturing a micro LED display device according to one embodiment of the present disclosure.

[0022] Figure 6 This is a flowchart illustrating a method for manufacturing a micro LED display device according to one embodiment of the present disclosure. Detailed Implementation

[0023] The advantages and features of this disclosure, and how to achieve them, will become clear from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below, but will be implemented in various different forms. These embodiments are provided only to complete this disclosure and to inform those skilled in the art of the scope of this disclosure.

[0024] The shapes, dimensions, ratios, scales (e.g., length, width, height, thickness, radius, diameter, area, etc.), angles, numbers, etc. of the elements disclosed in the accompanying drawings used to describe embodiments of this disclosure are examples, and this disclosure is not limited thereto. In this document, the same reference numerals refer to the same elements. Furthermore, in describing this disclosure, detailed descriptions of relevant known elements may be omitted where such descriptions would unnecessarily obscure the subject matter of this disclosure. As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that, when used in this specification, the terms “comprising,” “having,” and “consisting of” specify the presence of the stated features, integers, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof.

[0025] When interpreting numerical values, they are interpreted to include a range of error unless there is no separate explicit description of this range.

[0026] It should be understood that when a component or layer is referred to as being "connected to" or "coupled to" another component or layer, it may be directly connected to or coupled to the other component or layer, or there may be one or more intermediate components or layers. Additionally, it should be understood that when a component or layer is referred to as being "between two components or layers," it may be the only component or layer between the two components or layers, or there may be one or more intermediate components or layers.

[0027] Furthermore, it should be understood that when the first element or layer is referred to as existing "above" or "below" the second element or layer, the first element may be directly disposed above or below the second element, or may be indirectly disposed above or below the second element, wherein the third element or layer is disposed between the first element or layer and the second element or layer.

[0028] It should be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the spirit and scope of this disclosure, the first element, component, region, layer, or part described below may be referred to as the second element, component, region, layer, or part.

[0029] Throughout the public disclosure, similar reference numerals denote similar elements.

[0030] The dimensions and thicknesses of each component shown in the accompanying drawings are for ease of description. This disclosure is not necessarily limited to the dimensions and thicknesses of the components shown in the drawings, even though the dimensions and thicknesses of the components shown in the drawings represent the actual working implementation of this disclosure.

[0031] Features of the various embodiments of this disclosure can be combined in part or in whole with each other, and can be technically related to or operable on each other. Embodiments can be implemented independently of each other, or can be implemented together in an associated relationship.

[0032] In the following description, embodiments according to this disclosure will be described with reference to the accompanying drawings.

[0033] Figure 1 This is a typical planar view of a micro LED display device. Figure 2 This is a cross-sectional view of a typical micro LED display device.

[0034] First, refer to Figure 1 and Figure 2 This describes a typical micro LED display device.

[0035] like Figure 1 As shown, a micro LED display device may include multiple sub-pixels per pixel and may include electrodes for supplying power to each sub-pixel.

[0036] In addition, such as Figure 2 As shown, in a micro LED display device, the back side of the TFT array can be disposed on a substrate, and the metal lines for power supply can be disposed on the TFT array, and the micro LED pixels can be disposed on the metal lines.

[0037] The metal in a metal wire is not limited to metallic materials. In this disclosure, a metal wire refers to a conductor made of any material whose electrical properties (specifically, conductivity) can be classified as those of a metal. In non-limiting and specific examples, doped semiconductors and compounds such as silicides can be used as the metal in a metal wire.

[0038] Compared to other LED panels such as OLED panels, micro-LED panels have a so-called high-current characteristic, where the panel consumes a much larger amount of current during operation. In a non-limiting and specific example, a moving OLED panel consumes approximately nanoamps (nA) of operating current, while a micro-LED panel consumes approximately microamps (μA) of operating current.

[0039] The high current characteristics of micro-LED panels during operation make them susceptible to voltage drop (IR drop).

[0040] Specifically, even when each of the supply voltage (or applied voltage or Vdd) electrode lines and the substrate voltage (or ground voltage or Vss) electrode lines used to supply power to the micro LED pixels has a large area and a large thickness, and as... Figure 1 and Figure 2 When the subpixels are positioned closer to each pixel as shown, a voltage drop (IR drop) occurs as power from the supply voltage electrode lines is supplied along the substrate and subpixels, making it difficult to supply the same and uniform voltage to each subpixel. As a result, there is a problem of uneven voltage applied to subpixels within the same pixel.

[0041] Furthermore, when micro-LED pixels are combined to form a panel, the pixels in the panel may not receive a uniform voltage due to voltage drop (IR drop).

[0042] For example, when Figure 1 When a pixel has a width of approximately 800 μm (W1), the maximum permissible width of each of the power supply voltage electrode line and the substrate voltage electrode line is limited to approximately 200 μm (i.e., the width of the power supply voltage electrode line W2 and the width of the substrate voltage electrode line W3). Therefore, a micro-LED panel with the structure described above may not be able to truly achieve high resolution and large area due to the limitation on the width of each of the power supply voltage electrode line and the substrate voltage electrode line.

[0043] In another approach to address voltage drop (IR drop), the thickness of each of the supply voltage electrode line and the substrate voltage electrode line can be increased. However, this increase in thickness leads to increased process time and material costs in the deposition process and subsequent processes, thereby reducing productivity.

[0044] Figure 3 This is a plan view of a micro LED display device according to one embodiment of the present disclosure. Figure 4 This is a cross-sectional view of a micro LED display device according to one embodiment of the present disclosure. First, referring to... Figure 3 and Figure 4 The present disclosure will describe a micro LED display device 100 according to one embodiment of the present disclosure.

[0045] According to one embodiment of the present disclosure, a micro LED display device 100 may include: a substrate 110; an insulating film 121 and a power supply voltage electrode 122 on the substrate 110; a thin film transistor array 130 on the insulating film 121 and the power supply voltage electrode 122; and a thin film micro LED array 140 on the thin film transistor array 130.

[0046] In this configuration, the micro-LED array 140 can be configured to include a plurality of sub-pixels. Each sub-pixel can be configured to emit visible light of a specific wavelength based on an image signal supplied through the thin-film transistor array 130. Thus, the micro-LED display device 100 according to one embodiment of the present disclosure can display an image.

[0047] The substrate 110 can be a transparent substrate through which visible light passes. In this case, the light used to display the image can be displayed through the transparent substrate.

[0048] External light can pass through the transparent substrate. As a non-limiting and specific example, the transparent substrate can be configured to include at least glass or plastic. In another example, substrate 110 can be configured to have rigid or flexible properties. Therefore, external light can pass through the transparent substrate 110.

[0049] The insulating film 121 and the power supply voltage electrode 122 can be disposed on the substrate 110.

[0050] The power supply voltage electrode 122 can supply power to the micro-LED array 140, which will be described later. Therefore, the power supply voltage electrode 122 can be made of an electrometallic material with low resistance characteristics, such as one of copper (Cu), copper alloys, aluminum (Al), aluminum alloys (AlNd), molybdenum (Mo), and molybdenum-titanium (MoTi). However, this disclosure is not limited thereto.

[0051] An insulating film 121 may be disposed between adjacent supply voltage electrodes 122. The insulating film 121 may be made of organic or inorganic insulating materials. Furthermore, the insulating film 121 may have a stacked structure of layers made of organic insulating materials and layers made of inorganic insulating materials.

[0052] The insulating film 121 may comprise organic materials such as PMMA and polyimide, or materials such as silicon oxide (SiO2). x ) or silicon nitride (SiN) x Inorganic materials.

[0053] The thin-film transistor array 130 can be disposed on the insulating film 121 and the power supply voltage electrode 122.

[0054] In a non-limiting example, the thin-film transistor array 130 may include: a semiconductor layer; a first metal layer overlapping the semiconductor layer to provide a scan signal; a first insulating layer that electrically insulates the semiconductor layer and the first metal layer from each other; a second metal layer electrically connected to the semiconductor layer and electrically insulated from the first metal layer; and a second insulating layer that electrically insulates the first metal layer and the second metal layer from each other.

[0055] The semiconductor layer can be made of silicon, polycrystalline silicon, oxide semiconductors, etc. A portion of the semiconductor layer may be doped with impurities and therefore may be conductive. This conductive portion can be used as a source or drain. The portion of the semiconductor other than the conductive portion can be used as a channel. However, this disclosure is not limited to the material of the semiconductor layer.

[0056] The first metal layer can be used as part of a gate line, data line, or bridge. For example, a portion of the first metal layer can be configured to function as a gate line. For example, the first metal layer can be made of a metallic material with low resistance characteristics, such as aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), or molybdenum-titanium (MoTi). However, this disclosure is not limited thereto.

[0057] A first insulating layer may be disposed between the semiconductor layer and the first metal layer. The first insulating layer may be made of an inorganic insulating material. For example, the first insulating layer may include silicon oxide (SiO2). x ) or silicon nitride (SiN) x Contact holes can be formed in the first insulating layer to electrically connect the conductive material above the first insulating layer and the conductive material below the first insulating layer. For example, the first insulating layer can be implemented as a gate insulating film. However, this disclosure is not limited thereto.

[0058] The first insulating layer can be configured to allow visible light to pass through it. In this case, external light can pass through the first insulating layer.

[0059] The second metal layer can be used as part of a gate line, data line, or bridge. For example, a portion of the second metal layer can be configured to function as a data line. For example, the second metal layer can be made of a metallic material with low resistance characteristics, such as aluminum (Al), aluminum alloys, copper (Cu), copper alloys, molybdenum (Mo), or molybdenum-titanium (MoTi). However, this disclosure is not limited thereto.

[0060] A second insulating layer may be disposed between the first metal layer and the second metal layer. The second insulating layer may be made of an inorganic insulating material. For example, the second insulating layer may include silicon oxide (SiO2). x ) or silicon nitride (SiN) x Contact holes can be formed in the second insulating layer to electrically connect the conductive materials above and below the second insulating layer to each other. However, this disclosure is not limited thereto.

[0061] The second insulating layer can be configured to allow visible light to pass through it. In this case, external light can pass through the substrate 110, the first insulating layer, and the second insulating layer.

[0062] The micro LED array 140 can be disposed on the thin film transistor array 130.

[0063] According to one embodiment of the present disclosure, the micro-LED display device 100 has features in terms of the arrangement of the micro-LED array 140 that differ from those of conventional micro-LED display devices in which R, G, and B sub-pixels are simply and repeatedly arranged within a pixel.

[0064] Specifically, in one embodiment of the micro LED display device 100 according to this disclosure, four sub-pixels constitute one pixel. In this case, the four sub-pixels may include three sub-pixels corresponding to R, G, and B respectively, and one sub-pixel corresponding to any one of R, G, or B.

[0065] A pixel may include a micro-LED region 141 disposed in its central region and pixel circuit regions 142 disposed on each of the two opposite sides of the micro-LED region 141. In this case, four sub-pixels may be disposed in the micro-LED region 141 disposed in the central region of a pixel. A thin-film transistor array may be disposed below the pixel circuit regions 142 disposed on each of the two opposite sides of the micro-LED region 141.

[0066] For more specific reference Figure 3 and Figure 4 The four sub-pixels can be respectively located in the first quadrant 141-1 to the fourth quadrant 141-4 within the micro-LED region 141 located in the middle region of a pixel. In this regard, the position of each of the R, G, and B sub-pixels in each quadrant is unrestricted. However, for convenience in process or mask design, the positions of the sub-pixels in each pixel can be the same or can be repeated periodically across all pixels.

[0067] like Figure 4 As shown, the power supply voltage electrode 122 can be disposed directly below the microLED region 141 of the microLED display device 100 according to one embodiment of the present disclosure.

[0068] In this case, it is advantageous that the power supply voltage electrode 122 is positioned directly below the four sub-pixels in the micro-LED region 141, so that the four sub-pixels share the power supply voltage electrode 122 with each other. When the power supply voltage electrode 122 is positioned directly below the sub-pixels in this manner, the distance between the power supply voltage electrode 122 and the micro-LEDs disposed in the sub-pixels can be reduced or minimized. As a result, the voltage drop (IR drop; I: current, R: resistance) occurring between the power supply voltage electrode 122 and the micro-LEDs can be reduced or minimized, which may be beneficial for large-area implementation. Furthermore, the arrangement of the power supply voltage electrode 122 and the sub-pixels as described above can reduce or minimize the reduction in the size of the display area caused by the power supply voltage electrode 122 encroaching on the display area. This enables high resolution.

[0069] In particular, it is even more beneficial for the uniformity of micro-LED panels, such as... Figure 3 As shown in the plan view, the power supply voltage electrode in a pixel is located in the middle region of the area corresponding to the sub-pixel in that pixel. In this case, since the sub-pixels within a pixel that have the same positional relationship with the power supply voltage electrode uniformly share the power supply voltage electrode, the sub-pixels within the same pixel can receive uniform power supply voltage.

[0070] Furthermore, there are no particular restrictions on the width or thickness of the power supply voltage electrodes.

[0071] However, it is advantageous that the minimum width of the power supply voltage electrode is greater than the spacing between adjacent sub-pixels within the micro-LED region 141. Due to this spatial arrangement, the path along which the power supply voltage electrode applies voltage to each sub-pixel can be reduced, thereby reducing or minimizing the voltage drop (IR drop).

[0072] In non-restrictive and specific examples, based on Figure 3 The width W4 of the power supply voltage electrode 122 can be greater than the distance S between the sub-pixels in the first quadrant 141-1 and the sub-pixels in the second quadrant 141-2, or it can be greater than the distance S between the sub-pixels in the third quadrant 141-3 and the sub-pixels in the fourth quadrant 141-4.

[0073] In this regard, the maximum value of the width W4 of the power supply voltage electrode 122 can be smaller than the width W5 of the micro-LED region 141. Due to this spatial arrangement, the power supply voltage electrode 122 does not intrude into the pixel circuit region 142 adjacent to the micro-LED region 141.

[0074] Figure 5 This is a cross-sectional view illustrating a method for manufacturing a micro LED display device according to one embodiment of the present disclosure.

[0075] Figure 6 This is a flowchart illustrating a method for manufacturing a micro LED display device according to one embodiment of the present disclosure.

[0076] According to one embodiment of the present disclosure, a method for manufacturing a micro LED display device may first include a process S100 of coating an insulating film 121, which is an inorganic or organic film, onto a substrate 110.

[0077] In a non-limiting example, when the insulating film 121 comprises an inorganic film, it can be deposited on the substrate 110 using chemical vapor deposition (CVD). In another example, when the insulating film 121 is made of an organic material, it can be formed using an organic material coating method, such as printing or a coating machine. In this case, the insulating film 121 can be coated over the entire substrate 110 in a β-coating manner, and then patterned or coated only on the desired (or selected) area using a patterning mask.

[0078] Next, the coated or deposited insulating film 121 can be processed into a shape with a desired pattern via a patterning process S200. However, when the insulating film 121 is coated or deposited with a pattern different from that of the β film during the formation of the insulating film 121, the patterning process S200 can be omitted.

[0079] Next, a process S300 can be performed to coat power supply voltage lines between adjacent portions of the patterned insulating film 121 to form power supply voltage electrodes 122. In this case, the power supply voltage line coating process S300 can be performed via physical vapor deposition (PVD), chemical vapor deposition (CVD), or electroplating.

[0080] In one example, the insulating film formation process S100 and the power supply voltage line coating process S300 can be performed in an alternating order. In other words, firstly, patterned electrode lines can be formed via a metal deposition process and a patterning process, and an insulating film 121 can be formed between adjacent portions of the patterned electrodes.

[0081] Next, the substrate on which the insulating film 121 and the power supply voltage electrode 122 have been formed can be planarized through a planarization process S400.

[0082] The planarization process S400 refers to the process of preventing defects caused by substrate irregularities during the next process. In non-limiting and specific examples, the planarization process can be performed via a CMP (chemical mechanical polishing) process.

[0083] After the planarization process S400, the TFT thin film transistor array formation process S500 can be performed.

[0084] In non-limiting and specific examples, in order to form the thin-film transistor array 130 as described above, the TFT array formation process S500 may be configured to sequentially include a semiconductor layer formation process, a first metal layer formation process for forming a first metal layer overlapping with the semiconductor layer and providing a scan signal, a first insulating layer formation process for forming a first insulating layer for electrically insulating the semiconductor layer and the first metal layer from each other, a second metal layer formation process for forming a second metal layer electrically connected to the semiconductor layer and electrically insulating from the first metal layer, and a second insulating layer formation process for forming a second insulating layer for electrically insulating the first metal layer and the second metal layer from each other.

[0085] In another example, the thin-film transistor array formation process can be modified according to the shape or material of the thin-film transistor.

[0086] The micro-LED array formation process S600 can be performed to form micro-LEDs on the TFT array formed by the TFT array formation process S500.

[0087] The micro-LED array formation process S600 refers to the process of forming micro-LEDs, including sub-pixels, in the micro-LED region 141.

[0088] The micro-LED array forming process S600 can be formed using methods known in the art to which this disclosure pertains.

[0089] In non-limiting and specific examples, the micro-LED array formation process S600 can be performed by transferring micro-LEDs individually manufactured on a substrate on which TFTs have been formed by the TFT array formation process S500.

[0090] In this case, microLEDs are typically LEDs with dimensions ranging from 10 to 100 μm. After growing multiple thin films made of inorganic materials such as Al, Ga, N, P, As, and In on a sapphire or silicon substrate, the substrate is diced into separate pieces. This forms the microLEDs. Because microLEDs are formed with fine dimensions, they can be transferred to flexible substrates, such as glass or organic plastic substrates. Therefore, microLED display devices can be fabricated. Furthermore, unlike organic light-emitting diodes such as OLEDs, microLEDs are formed by coating or depositing inorganic materials, making their fabrication process relatively easy and yielding high output.

[0091] Furthermore, the micro-LED array formation process S600 can be implemented by directly fabricating micro-LEDs on a substrate on which TFTs have been formed by the TFT array formation process S500 via a coating or deposition process.

[0092] However, it is advantageous that the micro-LED layer in the micro-LED array formation process S600 has such Figure 3 The spatial arrangement described herein.

[0093] Specifically, in the micro-LED array formation process S600, micro-LEDs can be arranged only in the micro-LED region 141, and the power supply voltage electrode 122 can be located directly below the micro-LED region 141.

[0094] More specifically, it is advantageous that the power supply voltage electrode is positioned directly below the four sub-pixels in the micro-LED region 141, so that the four sub-pixels uniformly share the power supply voltage electrode 122 with each other. Due to this arrangement, the distance between the power supply voltage electrode 122 and the micro-LEDs disposed on different layers can be reduced or minimized, thereby reducing or minimizing the voltage drop (IR drop).

[0095] In this situation, it is even more beneficial, such as Figure 3 As shown in the plan view, the power supply voltage electrode in a pixel is located in the middle region of the area corresponding to the sub-pixel in that pixel. Due to this arrangement, the spacing between the sub-pixel and the power supply voltage electrode 122 within the same pixel can be equal, allowing a uniform power supply voltage to be applied to them.

[0096] Despite Figures 3 to 6 Although not shown, multiple gate lines and multiple data lines are arranged on the substrate 110, defining multiple pixel regions in the vertical and horizontal directions. In this case, the gate lines and data lines are connected to the micro-LED array 140, and gate pads and data pads connected to external components can be respectively disposed at the ends of the gate lines and data lines. Therefore, when an external signal is applied to the micro-LED array 140 through the gate lines and data lines, the micro-LED display device 100 can operate and emit light.

[0097] According to another embodiment of this disclosure, the power supply voltage electrode 122 can be used as a data line.

[0098] Due to the above electrode arrangement, although a separate power supply voltage electrode 122 is not formed, the existing data line can be used as the power supply voltage electrode 122 line. This has the advantages of shortening the process and increasing productivity.

[0099] The implementation of this disclosure can be described as follows.

[0100] A micro LED display device according to an embodiment of the present disclosure includes: a substrate; a power supply voltage line on the substrate; and a micro LED region disposed on the power supply voltage line, wherein at least a portion of the power supply voltage line is disposed directly below the micro LED region.

[0101] The power supply voltage line is divided into multiple sections, and the device also includes an insulation layer disposed between adjacent sections of the power supply voltage line.

[0102] The device also includes a TFT array positioned between the power supply voltage line and the micro-LED area.

[0103] Each pixel in the micro LED region comprises four sub-pixels, which are respectively located in the first to fourth quadrants.

[0104] The four sub-pixels include three sub-pixels corresponding to R, G, and B respectively, and the remaining sub-pixel corresponding to one of R, G, or B.

[0105] The spacing between the four sub-pixels and the power supply voltage lines is basically equal to that between each other.

[0106] The width of the power supply voltage line is greater than the spacing between adjacent sub-pixels in the sub-pixel.

[0107] The width of the power supply voltage line is smaller than the width of the micro LED area.

[0108] The pixel circuitry area is located on each of the two opposite sides of the micro-LED area within a single pixel.

[0109] A micro LED display device according to another embodiment of the present disclosure includes: a substrate; a power supply voltage line on the substrate; and a micro LED region disposed on the power supply voltage line, wherein at least a portion of the power supply voltage line is disposed directly below the micro LED region, and the power supply voltage line serves as a data line.

[0110] A method for manufacturing a micro LED display device according to embodiments of the present disclosure includes: a process of coating an insulating film on a substrate; a process of coating power supply voltage lines on a substrate; a process of forming a TFT array on the insulating film and the power supply voltage lines; and a process of forming a micro LED array on the TFT array.

[0111] The process of coating the power supply voltage lines onto the substrate is performed before the process of coating the insulating film onto the substrate.

[0112] The method also includes a planarization process between the process of coating power supply voltage lines on the substrate and the process of forming a TFT array on the insulating film and the power supply voltage lines.

[0113] The method also includes a patterning process following the process of coating an insulating film on a substrate or coating power supply voltage lines on a substrate.

[0114] Each pixel in the micro LED array comprises four sub-pixels, which are respectively located in the first to fourth quadrants.

[0115] The four sub-pixels include three sub-pixels corresponding to R, G, and B respectively, and the remaining sub-pixel corresponding to one of R, G, or B.

[0116] The spacing between the four sub-pixels and the power supply voltage lines is basically equal to that between each other.

[0117] The width of the power supply voltage line is greater than the spacing between adjacent sub-pixels in the sub-pixel.

[0118] Four sub-pixels constitute a micro-LED region in a single pixel, wherein the pixel circuit region is located on each of the two opposite sides of the micro-LED region.

[0119] Another embodiment of the present disclosure provides a method for manufacturing a micro LED display device, comprising: a process of coating an insulating film on a substrate; a process of coating power supply voltage lines on a substrate; a process of forming a TFT array on the insulating film and the power supply voltage lines; and a process of forming a micro LED array on the TFT array, wherein the power supply voltage lines are used as data lines.

[0120] The above description is merely an illustrative description of this disclosure. Those skilled in the art can make various modifications without departing from the technical concept of this disclosure. Therefore, the embodiments disclosed in this specification do not limit the scope of this disclosure. The scope of this disclosure should be interpreted in accordance with the appended claims, and features within the equivalent scope should be interpreted as included within the scope of this disclosure.

[0121] Reference number

[0122] 100: Electroluminescent display device

[0123] 110: Substrate

[0124] 120: Insulating film and power supply voltage electrode layer

[0125] 121: Insulating film

[0126] 122: Power supply voltage electrode

[0127] 130: Thin-film transistor array

[0128] 140: Miniature LED Array

[0129] 141: Miniature LED Area

[0130] 141-1: First Quadrant

[0131] 141-2: Second Quadrant

[0132] 141-3: Third Quadrant

[0133] 141-4: Fourth Quadrant

[0134] 142: Pixel circuit area

[0135] S100: The process of forming an insulating film

[0136] S200: Patterning Process

[0137] S300: The process of coating power supply lines

[0138] S400: Flattening process

[0139] S500: TFT array formation process

[0140] S600: Micro LED Array Formation Process

Claims

1. A miniature LED display device, comprising: Substrate; The power supply voltage line on the substrate; as well as The miniature LED area is located on the power supply voltage line. At least a portion of the power supply voltage line is located in the middle region directly below the micro LED region.

2. The micro LED display device according to claim 1, wherein, The power supply voltage line is divided into multiple parts. The device further includes an insulating layer disposed between adjacent portions of the power supply voltage line.

3. The micro LED display device according to claim 1, wherein, The device also includes a thin-film transistor (TFT) array disposed between the power supply voltage line and the micro-LED region.

4. The micro LED display device according to claim 1, wherein, Each pixel in the micro-LED region comprises four sub-pixels. The four sub-pixels are respectively located in the first to fourth quadrants.

5. The micro LED display device according to claim 4, wherein, The four sub-pixels include three sub-pixels corresponding to R, G, and B respectively, and the remaining sub-pixel corresponding to one of R, G, or B.

6. The micro LED display device according to claim 4, wherein, The spacing between the four sub-pixels and the power supply voltage line is equal to that between each other.

7. The micro LED display device according to claim 6, wherein, The width of the power supply voltage line is greater than the spacing between adjacent sub-pixels in the sub-pixel.

8. The micro LED display device according to claim 6, wherein, The width of the power supply voltage line is smaller than the width of the micro LED area.

9. The micro LED display device according to claim 4, wherein, The pixel circuitry region is located on each of the two opposite sides of the micro-LED region within a single pixel.

10. The micro LED display device according to claim 1, wherein, The power supply voltage line is used as a data line.

11. A method for manufacturing a miniature light-emitting diode (LED) display device, the method comprising: An insulating film is coated onto the substrate; Power supply voltage lines are coated on the substrate; A thin-film transistor (TFT) array is formed on the insulating film and the power supply voltage line; as well as A micro-LED array is formed on the TFT array. In particular, in the microLED array sub-pixels that constitute the microLED region in a single pixel, at least a portion of the power supply voltage line is disposed in the middle region directly below the microLED region.

12. The method according to claim 11, wherein, The coating of the power supply voltage lines onto the substrate is performed before the coating of the insulating film onto the substrate.

13. The method according to claim 11, wherein, The method further includes: planarizing the insulating film and the power supply voltage line, wherein the planarization of the insulating film and the power supply voltage line is located between coating the power supply voltage line on the substrate and forming the TFT array on the insulating film and the power supply voltage line.

14. The method according to claim 11 or 12, wherein, The method further includes: patterning the insulating film after coating the insulating film on the substrate or coating the power supply voltage line on the substrate.

15. The method according to claim 11, wherein, The micro-LED array comprises four sub-pixels per pixel. The four sub-pixels are respectively located in the first to fourth quadrants.

16. The method according to claim 15, wherein, The four sub-pixels include three sub-pixels corresponding to R, G, and B respectively, and the remaining sub-pixel corresponding to one of R, G, or B.

17. The method according to claim 15, wherein, The spacing between the four sub-pixels and the power supply voltage line is equal to that between each other.

18. The method according to claim 17, wherein, The width of the power supply voltage line is greater than the spacing between adjacent sub-pixels in the sub-pixel.

19. The method according to claim 15, wherein, The four sub-pixels constitute the micro-LED area within a single pixel. The pixel circuit area is located on each of the opposite sides of the micro-LED area.

20. The method according to claim 11, wherein, The power supply voltage line is used as a data line.

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