Input sensing panel and display device including the same

Abstract

An input sensing panel and a display device including the same are disclosed. The display device includes a display panel including a pixel providing light, and an input sensing panel sensing an external input, the input sensing panel including a first sensing insulating layer disposed on the display panel, a first conductive pattern disposed on the first sensing insulating layer, a second sensing insulating layer covering the first conductive pattern, a second conductive pattern disposed on the second sensing insulating layer, a piezoelectric pattern covering the second conductive pattern, a light shielding pattern covering the piezoelectric pattern and defining a transmission opening portion through which the light is transmitted, and a third sensing insulating layer covering the light shielding pattern.

Description

Technical Field

[0001] The present invention relates to a display device including an input sensing panel capable of adjusting the area of ​​the light-emitting region. Background Technology

[0002] The display device may include a display panel for displaying images and an input sensing panel for sensing external inputs. The input sensing panel may be integrally formed with the display panel through a continuous process. Alternatively, the input sensing panel may be formed separately from the display panel and then bonded to it. Summary of the Invention

[0003] The purpose of this invention is to provide a display device that can reduce the viewing angle by adjusting the area of ​​the light-emitting region, thereby improving privacy protection according to the user's needs.

[0004] A display device according to an embodiment of the present invention includes: a display panel including pixels that provide light; and an input sensing panel for sensing external input, the input sensing panel including: a first sensing insulating layer disposed on the display panel; a first conductive pattern disposed on the first sensing insulating layer; a second sensing insulating layer disposed on the first sensing insulating layer and covering the first conductive pattern; a second conductive pattern disposed on the second sensing insulating layer; a piezoelectric pattern covering the second conductive pattern; a light-shielding pattern covering the piezoelectric pattern and defining a transmission opening through which the light passes; and a third sensing insulating layer disposed on the second sensing insulating layer and covering the light-shielding pattern.

[0005] It is possible that the transmission opening has a first width in one direction in a first mode, and a second width in the same direction that is smaller than the first width in a second mode that receives a voltage different from that in the first mode.

[0006] The display panel may include: a substrate layer; a circuit element layer including transistors disposed on the substrate layer; a display element layer including a first electrode connected to the transistor, a second electrode disposed on the first electrode, a light-emitting layer disposed between the first electrode and the second electrode, and a pixel defining film defining a display opening exposing at least a portion of the first electrode; and an encapsulation layer covering the display element layer, wherein the first sensing insulating layer is directly disposed on the encapsulation layer.

[0007] It is possible that the piezoelectric pattern has a larger volume in the second mode than in the first mode.

[0008] Alternatively, the side of the light-shielding pattern may define the boundary of the light-emitting area, which has a narrower area in the second mode than in the first mode.

[0009] It is possible that, during the transition from the first mode to the second mode, the light-shielding pattern protrudes in the direction toward the light-emitting area, and the width of the light-shielding pattern protruding during the transition from the first mode to the second mode is more than 2 micrometers and less than 5 micrometers.

[0010] Alternatively, the light-blocking pattern may contain a light-absorbing material.

[0011] Alternatively, the display device may further include: a color filter layer disposed on the input sensing panel and overlapping the light-emitting area; and a window disposed on the color filter layer.

[0012] Alternatively, the input sensing panel may further include: a cover layer disposed on the third sensing insulating layer, the third sensing insulating layer defining a cover opening that exposes at least a portion of the second sensing insulating layer and overlaps with at least a portion of the light-emitting area, the cover layer contacting the second sensing insulating layer in the area overlapping with the cover opening.

[0013] Alternatively, the second conductive pattern may include multiple mesh lines.

[0014] A display device according to another embodiment of the present invention includes: a display panel including pixels that provide light; and an input sensing panel for sensing external input, the input sensing panel including: a plurality of sensing insulating layers; a plurality of conductive patterns disposed between the sensing insulating layers; a piezoelectric pattern covering at least a portion of the conductive patterns; and a light-shielding pattern covering the piezoelectric pattern and defining a transmission opening through which light passes, the transmission opening having a first width in a first mode in a first mode and having a second width in the same direction that is less than the first width in a second mode receiving a voltage different from the first mode.

[0015] The display panel may include: a substrate layer; a circuit element layer including transistors disposed on the substrate layer; a display element layer including a first electrode connected to the transistors, a second electrode disposed on the first electrode, a light-emitting layer disposed between the first electrode and the second electrode, and a pixel defining film defining a display opening exposing at least a portion of the first electrode; and an encapsulation layer covering the display element layer, wherein the sensing insulating layer adjacent to the display panel in the sensing insulating layer is directly disposed on the encapsulation layer.

[0016] It is possible that the piezoelectric pattern has a larger volume in the second mode than in the first mode.

[0017] Alternatively, the side of the light-shielding pattern may define the boundary of the light-emitting area, which has a narrower area in the second mode than in the first mode.

[0018] It is possible that, during the transition from the first mode to the second mode, the light-shielding pattern protrudes in the direction toward the light-emitting area, and the width of the light-shielding pattern protruding during the transition from the first mode to the second mode is more than 2 micrometers and less than 5 micrometers.

[0019] Alternatively, the display device may further include: a color filter layer disposed on the input sensing panel and overlapping the light-emitting area; and a window disposed on the color filter layer.

[0020] Alternatively, the input sensing panel may further include: a cover layer covering at least a portion of the sensing insulating layer, wherein the uppermost sensing insulating layer is configured in a trapezoidal shape in cross-section and defines a cover opening that overlaps with at least a portion of the light-emitting area.

[0021] An input sensing panel according to another embodiment of the present invention includes: a first sensing insulating layer; a first conductive pattern disposed on the first sensing insulating layer; a second sensing insulating layer disposed on the first sensing insulating layer and covering the first conductive pattern; a second conductive pattern disposed on the second sensing insulating layer; a piezoelectric pattern covering the second conductive pattern; a light-shielding pattern defining a transmission opening that exposes at least a portion of the second sensing insulating layer and covering the piezoelectric pattern; and a third sensing insulating layer disposed on the second sensing insulating layer and covering the light-shielding pattern.

[0022] It is possible that the transmission opening has a first width in one direction in a first mode, and a second width in the same direction that is smaller than the first width in a second mode that receives a voltage different from that in the first mode.

[0023] It is possible that the volume of the piezoelectric pattern changes when switching from the first mode to the second mode.

[0024] According to the present invention, the volume of the piezoelectric pattern and the light-blocking pattern included in the input sensing panel can be changed. In this case, the viewing angle of the electronic device can be reduced or increased. By reducing the viewing angle as needed to block the view of a third party viewing from the side, a display device with improved privacy protection can be provided. Attached Figure Description

[0025] Figure 1a This is a perspective view of a display device according to an embodiment of the present invention.

[0026] Figure 1b This is an exploded perspective view of a display device according to an embodiment of the present invention.

[0027] Figure 2a This is a cross-sectional view of a display module according to an embodiment of the present invention.

[0028] Figure 2b yes Figure 2a The image shows a magnified view of a portion of the display module.

[0029] Figure 3 This is a top view of a display panel according to an embodiment of the present invention.

[0030] Figure 4a This is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

[0031] Figure 4b This is a cross-sectional view of a pixel according to an embodiment of the present invention.

[0032] Figure 5a This is a top view of an input sensing panel according to an embodiment of the present invention.

[0033] Figure 5b It is Figure 5a The top view shown is an enlarged view of the PP' area.

[0034] Figure 5c It is shown Figure 5a The top view shows the configuration relationship between the luminescent area and conductive pattern in the QQ' area and the overlay layer.

[0035] Figure 6a It is along in the first mode Figure 5c A cross-sectional view of the display device taken from I-I'.

[0036] Figure 6b It is along the second mode Figure 5c A cross-sectional view of the display device taken from I-I'.

[0037] Figure 7a This is a cross-sectional view of the display device in the first mode.

[0038] Figure 7b This is a cross-sectional view of the display device in the second mode.

[0039] (Explanation of reference numerals in the attached diagram)

[0040] EA: Display device

[0041] DM: Display Module

[0042] DP: Display Panel

[0043] ISP: Input Sensing Panel

[0044] FL: Functional Layer

[0045] TIL1: First sensing insulating layer

[0046] TML1: First conductive pattern

[0047] TIL2: Second sensing insulating layer

[0048] TML2: Second conductive pattern

[0049] TIL3: Third Sensing Insulation Layer

[0050] PP: Piezoelectric pattern

[0051] BM: Light-blocking pattern Detailed Implementation

[0052] In this specification, when a constituent element (or region, layer, part, etc.) is referred to as being "on", "connected to", or "combined with" other constituent elements, it means that it can be directly configured / connected / combined with other constituent elements or that a third constituent element can be configured between them.

[0053] The same reference numerals refer to the same constituent elements. Furthermore, in the drawings, the thickness, scale, and dimensions of the constituent elements are enlarged for the effective illustration of the technical content. "And / or" encompasses all combinations of more than one that can define related structures.

[0054] The terms "first," "second," etc., can be used to describe various constituent elements, but the constituent elements cannot be limited by the terms. The terms are used only for the purpose of distinguishing one constituent element from others. For example, a first constituent element can be named a second constituent element without departing from the scope of the invention, and similarly, a second constituent element can be named a first constituent element. Unless explicitly stated differently in the context, singular expressions include plural expressions.

[0055] In addition, terms such as "below," "lower side," "above," and "upper side" are used to describe the relational relationships of the structures shown in the accompanying drawings. These terms are relative concepts and are explained based on the directions indicated in the accompanying drawings.

[0056] Unless otherwise defined, all terms used in this specification (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, terms such as those defined in commonly used dictionaries shall be interpreted as having the same dictionary meaning as they have in the context of the related art, and shall not be construed as having overly idealized or formalistic meanings unless expressly defined herein.

[0057] Terms such as “comprising” or “having” should be understood to specify the presence of the features, numbers, steps, actions, constituent elements, components, or combinations thereof described in the specification, without precluding the possibility of the presence or addition of one or more other features or numbers, steps, actions, constituent elements, components, or combinations thereof. Hereinafter, embodiments of the invention will be described with reference to the accompanying drawings.

[0058] Figure 1a This is a perspective view of a display device according to an embodiment of the present invention. Figure 1b This is an exploded perspective view of a display device according to an embodiment of the present invention.

[0059] Reference Figure 1a as well as Figure 1b The display device EA can be a device activated by an electrical signal. The display device EA can include various embodiments. For example, the display device EA can include a tablet computer, a laptop computer, a computer, a smart TV, etc. In this embodiment, the display device EA is exemplarily shown as a smartphone.

[0060] The display device EA can provide an image IM to a third direction DR3 via each display surface IS parallel to the first direction DR1 and the second direction DR2. The display surface IS displaying the image IM can correspond to the front surface of the display device EA. The image IM includes moving images and can also include still images. Figure 1a The image IM example shows a clock window and icons.

[0061] In this embodiment, the front (or top) and back (or bottom) of each structure are defined based on the direction of the displayed image IM. The front and back are opposite to each other on the third direction DR3, and the normal directions of the front and back can be parallel to the third direction DR3.

[0062] The distance between the front and back of the display device EA in the third direction DR3 can correspond to the thickness / height of the display device EA in the third direction DR3. On the other hand, the directions pointed to by the first to third directions DR1, DR2, DR3 are relative concepts and can be converted to other directions.

[0063] The front of the display device EA can be divided into a transmission area TA and a border area BZA. The transmission area TA can be the area where the image IM is displayed. The user views the image IM through the transmission area TA. In this embodiment, the transmission area TA is shown as a quadrilateral shape with rounded vertices. However, this is only an illustrative example, and the transmission area TA can have various shapes and is not limited to one embodiment.

[0064] The border region BZA is adjacent to the transmission region TA. The border region BZA may have a predetermined color. The border region BZA may surround the transmission region TA. Thus, the shape of the transmission region TA can be substantially defined by the border region BZA. However, as illustrated illustratively, the border region BZA may also be configured to be adjacent to only one side of the transmission region TA, or it may be omitted. The display device according to an embodiment of the present invention may include various embodiments, and is not limited to one particular embodiment.

[0065] The display device EA can sense external input TC applied from the outside. External input TC can include various forms of input provided from outside the display device EA. For example, external input TC certainly includes contact with a part of the user's body such as a hand, and can include external input applied when the user is close to or adjacent to the display device EA at a predetermined distance (e.g., hovering). In addition, it can have various forms such as force, pressure, light, etc., and is not limited to a certain embodiment. Figure 1a As an example of external input TC, the user's hand is shown.

[0066] Reference Figure 1b The display device EA may include a window component WM, a housing EDC, a display module DM, a main circuit board MF, and flexible circuit boards FF and TF. The display module DM may include a display panel DP and an input sensing panel ISP.

[0067] The window component WM is mounted on the display module DM. The window component WM protects the display module DM from external impacts and prevents foreign objects from penetrating.

[0068] The window component WM can be made of a transparent material capable of emitting images. For example, it can be made of glass, sapphire, plastic, etc. Although the window component WM is shown as a single layer, it is not limited to this and can include multiple layers. On the other hand, although not shown, the bezel area BZA of the aforementioned display device EA can be provided as an area of ​​the window component WM printed with a material substantially containing a predetermined color.

[0069] The housing EDC houses the display module DM. The housing EDC can be combined with the window component WM to define the appearance of the display device EA. The housing EDC protects the structure housed within by absorbing external impacts and preventing foreign matter / moisture from penetrating the display module DM. Alternatively, although not shown, the housing EDC can be provided in a form incorporating multiple housing components.

[0070] Figure 2a This is a cross-sectional view of a display module according to an embodiment of the present invention. Figure 2b yes Figure 2a The image shows a magnified view of a portion of the display module.

[0071] Reference Figure 2a as well as Figure 2b The display module DM according to the present invention includes a display panel DP and an input sensing panel ISP disposed on the display panel DP. The display module DM can display images according to electrical signals and send / receive information related to an external input TC.

[0072] The display module DM can be defined as an effective area AA and an ineffective area NAA. The effective area AA can be defined as the area that transmits the image provided from the display module DM, and the ineffective area NAA is the area surrounding the effective area AA. However, as illustrated illustratively, the ineffective area NAA can be defined in various shapes and is not limited to a particular embodiment. The effective area AA of the display module DM can correspond to the transmittance area TA.

[0073] The display panel (DP) consists of a substrate layer (SUB), a circuit element layer (CL), a display element layer (PE), and a packaging layer (TFE).

[0074] The substrate SUB can be a flexible substrate or a rigid substrate. The substrate SUB can be a substrate layer configured with structures included in the circuit element layer CL.

[0075] The circuit element layer CL is disposed on the substrate layer SUB. The circuit element layer CL may include multiple transistors, which include signal lines (not shown), control circuitry, and semiconductor layers.

[0076] The display element layer PE may include an organic light-emitting element and a pixel defining film. The encapsulation layer TFE seals the display element layer PE. According to an embodiment of the present invention, the encapsulation layer TFE may include at least one organic film and at least one inorganic film.

[0077] According to the present invention, the input sensing panel ISP is directly disposed on the display panel DP. In this specification, "structure B1 is directly disposed on structure A1" means that no additional adhesive component is disposed between structure A1 and structure B1. Structure B1 is formed on the substrate surface provided by structure A1 by a continuous process after structure A1 is formed.

[0078] like Figure 2b As shown, the encapsulation layer TFE according to the present invention may include a first encapsulation inorganic layer LIL, an organic layer OEL, and a second encapsulation inorganic layer UIL.

[0079] The first encapsulation inorganic layer (LIL) can cover the display element layer (PE). The first encapsulation inorganic layer (LIL) prevents external moisture or oxygen from penetrating into the organic light-emitting element. For example, the first encapsulation inorganic layer (LIL) can contain silicon nitride, silicon oxide, or a compound combining these. The first encapsulation inorganic layer (LIL) can be formed using a chemical vapor deposition process.

[0080] An organic layer (OEL) can be disposed on and connected to the first encapsulation inorganic layer (LIL). The organic layer (OEL) can provide a flat surface on the first encapsulation inorganic layer (LIL). Bending or particles present on the first encapsulation inorganic layer (LIL) are covered by the organic layer (OEL), thereby preventing the surface conditions of the first encapsulation inorganic layer (LIL) from affecting the structure formed on the organic layer (OEL). Furthermore, the organic layer (OEL) can alleviate stress between the contacting layers. The organic layer (OEL) can contain organic matter and can be formed using solution processes such as spin coating, slot coating, or inkjet printing.

[0081] The second encapsulation inorganic layer (UIL) is disposed on and covers the organic layer (OEL). Compared to being disposed on the first encapsulation inorganic layer (LIL), the second encapsulation inorganic layer (UIL) can be stably formed on a relatively flat surface. The second encapsulation inorganic layer (UIL) encapsulates moisture and other substances released from the organic layer (OEL) to prevent them from flowing into the exterior of the encapsulation layer (TFE). The second encapsulation inorganic layer (UIL) may contain silicon nitride, silicon oxide, or compounds combining these. The second encapsulation inorganic layer (UIL) can be formed using a chemical vapor deposition process.

[0082] The input sensing panel (ISP) is disposed on the TFE (Transformer Embedded Feather) layer. The ISP can be directly disposed on the TFE layer and formed with it through a continuous process. The ISP can sense external input using either self-capacitance or mutual capacitance methods. The conductive patterns included in the ISP can be configured and connected in various ways.

[0083] The input sensing panel (ISP) may include sensing insulating layers TIL1, TIL2, and TIL3, conductive patterns TML1 and TML2, and a functional layer FL. Sensing insulating layers TIL1, TIL2, and TIL3 may include a first sensing insulating layer TIL1, a second sensing insulating layer TIL2, and a third sensing insulating layer TIL3 containing either inorganic or organic matter. The functional layer FL may include piezoelectric patterns and light-shielding patterns.

[0084] According to the present invention, a first sensing insulating layer TIL1 can be directly disposed on a second encapsulation inorganic layer UIL in an encapsulation layer TFE. A first conductive pattern TML1 is disposed on the first sensing insulating layer TIL1. A second sensing insulating layer TIL2 can be disposed on the first sensing insulating layer TIL1 and cover the first conductive pattern TML1. A second conductive pattern TML2 is disposed on the second sensing insulating layer TIL2. A functional layer FL can be disposed on the second sensing insulating layer TIL2 and cover the second conductive pattern TML2. A third sensing insulating layer TIL3 can be disposed on the second sensing insulating layer TIL2 and cover the functional layer FL.

[0085] The functional layer FL can contain piezoelectric materials, and its volume changes by applying a voltage to the second conductive pattern TML2. Therefore, the viewing angle can be changed according to the user's purpose by adjusting the area of ​​the light-emitting region. Figure 5c , Figure 7a as well as Figure 7b The detailed explanation of the functional layer (FL) will be described later.

[0086] According to one embodiment, the conductive patterns TML1 and TML2 may comprise any of a single-layer metal structure and a transparent conductive material. For example, the metal may include molybdenum, silver, titanium, copper, aluminum, and alloys thereof.

[0087] Transparent conductive materials can include transparent conductive oxides such as ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), and ITZO (indium tin zinc oxide). In addition, transparent conductive materials can include conductive polymers such as PEDOT (poly(3,4-ethylenedioxythiophene), metal nanowires, and graphene.

[0088] Conductive layers TML1 and TML2 may include multilayer metal layers. The multilayer metal layers may have a three-layer structure, such as titanium / aluminum / titanium. The multilayer conductive layers TML1 and TML2 may include at least one metal layer and at least one transparent conductive layer.

[0089] Figure 3 This is a top view of a display panel according to an embodiment of the present invention. Figure 4a This is an equivalent circuit diagram of a pixel according to an embodiment of the present invention. Figure 4b This is a cross-sectional view of a pixel according to an embodiment of the present invention.

[0090] Reference Figure 3 The display panel DP may include a driving circuit GDC, signal lines SGL, and pixels PX. The display panel DP may also include pixel pad portions PDD disposed in the non-active area NAA, wherein the pixel pad portion PDD includes pixel pads D-PD connected to corresponding signal lines in the signal lines SGL. For clarity, a first flexible circuit board FF connected to the pixel pad portion PDD is shown in dashed lines.

[0091] Pixels (PX) are provided in multiples and configured within an effective area (AA). Each pixel (PX) includes an organic light-emitting element (OLED) and pixel driving circuitry connected thereto. The driving circuitry (GDC), signal line (SGL), pixel pad (PDD), and pixel driving circuitry may be included in... Figure 2a The circuit element layer CL is shown in the diagram.

[0092] The driving circuit GDC may include a gate driving circuit. The gate driving circuit generates a gate signal and outputs the gate signal sequentially to the gate line GL (described later). The gate driving circuit may also output other control signals to the pixel driving circuit.

[0093] The gate driving circuit may include multiple transistors formed using the same process as the driving circuit of the pixel PX (e.g., LTPS (Low Temperature Polycrystalline Silicon) or LTPO (Low Temperature Polycrystalline Oxide) process).

[0094] The signal line SGL includes gate line GL, data line DL, power line PL, and control signal line CSL. Each gate line in GL is connected to a corresponding pixel in pixel PX, and each data line in DL is connected to a corresponding pixel in pixel PX. The power line PL is connected to pixel PX. The control signal line CSL provides control signals to the gate drive circuit.

[0095] The pixel pad portion (PDD) is connected to the first flexible circuit board (FF), and its pixel pads (D-PD) are connected to pads (not shown) included in the first flexible circuit board (FF). Therefore, the display panel (DP) and the main circuit board (MF) can be connected through the first flexible circuit board (FF).

[0096] Pixel pads (D-PDs) can be provided by exposing a portion of the wiring configured in the circuit element layer (CL) from the insulating layer included in the circuit element layer (CL).

[0097] Pixel pads D-PD are connected to signal line SGL and to the corresponding pixel PX. Additionally, a driver circuit GDC can be connected to any of the pixel pads in the D-PD.

[0098] Reference Figure 4a , Figure 3 Pixel PX-1 (hereinafter referred to as pixel) of the pixel PX shown can be electrically connected to the signal wiring. The gate lines GLi, GLi-1, data line DL, first power supply line PL1, second power supply line PL2, initialization power supply line VIL, and light emission control line ECLi are illustrated illustratively. However, this is only an illustrative representation; according to an embodiment of the present invention, pixel PX-1 can also be additionally connected to various signal wirings, and a portion of the illustrated signal wirings can be omitted.

[0099] Pixel PX-1 may include an organic light-emitting element (OLED) and a pixel circuit CC. The pixel circuit CC may include transistors T1 to T7 and a capacitor CP. The pixel circuit CC can control the amount of current flowing through the organic light-emitting element OLED in response to a data signal.

[0100] An organic light-emitting element (OLED) can emit light at a predetermined brightness in response to the amount of current supplied from the pixel circuit CC. For this purpose, the level of the first power supply ELVDD can be set to be higher than the level of the second power supply ELVSS.

[0101] Each transistor T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In this specification, for convenience, either the input electrode or the output electrode may be referred to as the first electrode, and the other as the second electrode.

[0102] The first electrode of the first transistor T1 can be connected to the first power supply wiring PL1 via the fifth transistor T5. The first power supply wiring PL1 can be a wiring supplied with the first power supply ELVDD. The second electrode of the first transistor T1 is connected to the anode electrode of the organic light-emitting element OLED via the sixth transistor T6. In this specification, the first transistor T1 can be referred to as a driving transistor. The first transistor T1 can control the amount of current flowing through the organic light-emitting element OLED in accordance with the voltage applied to the control electrode of the first transistor T1.

[0103] The second transistor T2 is connected between the data line DL and the first electrode of the first transistor T1. Furthermore, the control electrode of the second transistor T2 is connected to the i-th gate line GLi. When the i-th scan signal is provided to the i-th gate line GLi, the second transistor T2 is turned on, electrically connecting the data line DL and the first electrode of the first transistor T1.

[0104] The third transistor T3 is connected between the second electrode and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is connected to the i-th gate line GLi. When the i-th scan signal is provided to the i-th gate line GLi, the third transistor T3 is turned on, electrically connecting the second electrode and the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 is turned on in diode mode.

[0105] The fourth transistor T4 is connected between node ND and the initialization power supply wiring VIL. Furthermore, the control electrode of the fourth transistor T4 is connected to the (i-1)th gate line GLi-1. Node ND can be the node that connects the control electrodes of the fourth transistor T4 and the first transistor T1. When the (i-1)th scan signal is provided to the (i-1)th gate line GLi-1, the fourth transistor T4 is turned on and provides the initialization voltage Vint to node ND.

[0106] The fifth transistor T5 is connected between the first power supply wiring PL1 and the first electrode of the first transistor T1. The sixth transistor T6 is connected between the second electrode of the first transistor T1 and the anode electrode of the organic light-emitting element OLED. The control electrodes of the fifth transistor T5 and the sixth transistor T6 are connected to the i-th light-emitting control wiring ECLi.

[0107] The seventh transistor T7 is connected between the initialization power line VIL and the anode electrode of the organic light-emitting element (OLED). Furthermore, the control electrode of the seventh transistor T7 is connected to the i-th gate line GLi. When the i-th scan signal is provided to the i-th gate line GLi, the seventh transistor T7 is turned on and provides the initialization voltage Vint to the anode electrode of the OLED.

[0108] The seventh transistor T7 can improve the black level performance of pixel PX-1. Specifically, when the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the OLED discharges. Then, when displaying black brightness, the OLED does not emit light due to the leakage current from the first transistor T1, thereby improving the black level performance.

[0109] Additionally, Figure 4a The diagram shows the control electrode of the seventh transistor T7 connected to the i-th gate line GLi, but the invention is not limited thereto. In another embodiment of the invention, the control electrode of the seventh transistor T7 may be connected to either the (i-1)-th gate line GLi-1 or the (i+1)-th gate line (not shown).

[0110] exist Figure 4a The diagram uses PMOS as a reference, but is not limited thereto. In another embodiment of the invention, the pixel circuit CC can be constructed from NMOS. In yet another embodiment of the invention, the pixel circuit CC can be constructed from a combination of NMOS and PMOS.

[0111] Capacitor CP is positioned between the first power supply wiring PL1 and node ND. Capacitor CP stores the voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on based on the voltage stored in capacitor CP, the amount of current flowing through the first transistor T1 can be determined.

[0112] The organic light-emitting element (OLED) can be electrically connected to the sixth transistor T6 and the second power supply wiring PL2. The OLED can receive a second power supply ELVSS through the second power supply wiring PL2. The OLED may include an emissive layer.

[0113] The organic light-emitting element (OLED) can emit light at a voltage corresponding to the difference between the signal transmitted through the sixth transistor T6 and the second power supply ELVSS received through the second power supply wiring PL2.

[0114] In this invention, the structure of pixel PX-1 is not limited to... Figure 4a The structure is shown in the figure. In another embodiment of the invention, the pixel PX-1 can be implemented in various forms for emitting light from the organic light-emitting element OLED.

[0115] Reference Figure 4b The display panel (DP) can include insulating layers, semiconductor patterns, conductive patterns, and signal lines. These layers can be formed using methods such as coating or vapor deposition. Subsequently, photolithography can be used to selectively pattern the insulating, semiconductor, and conductive layers. This method can form semiconductor patterns, conductive patterns, and signal lines within the circuit element layer (CL) and the display element layer (PE).

[0116] The substrate SUB may include a synthetic resin layer. The synthetic resin layer may contain a thermosetting resin. The substrate SUB may have a multilayer structure. For example, the substrate SUB may also have a three-layer structure consisting of a synthetic resin layer, an adhesive layer, and a synthetic resin layer. In particular, the synthetic resin layer may be a polyimide resin layer, and the material is not particularly limited. The synthetic resin layer may contain at least one of acrylic resins, methacrylic resins, polyisoprene, ethylene resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyamide resins, and perylene resins. Furthermore, the substrate SUB may include a glass substrate, a metal substrate, or an organic / inorganic composite substrate, etc.

[0117] At least one inorganic layer may be disposed on top of the substrate layer SUB. The inorganic layer may comprise at least one of alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed in multiple layers. The multiple inorganic layers may constitute a barrier layer and / or a buffer layer.

[0118] In this embodiment, the display panel DP is shown to include a buffer layer BFL. The buffer layer BFL can improve the adhesion between the substrate layer SUB and the semiconductor pattern included in the transistor. The substrate layer SUB can include a silicon oxide layer and a silicon oxynitride layer. The silicon oxide layer and the silicon oxynitride layer can be stacked alternately.

[0119] A semiconductor pattern is configured on the buffer layer BFL. The semiconductor pattern may contain polycrystalline silicon. However, it is not limited to this; the semiconductor pattern may also contain amorphous silicon or metal oxide.

[0120] Figure 4bThis only shows a partial semiconductor pattern; semiconductor patterns can also be configured in other areas of pixel PX on the plane. Semiconductor patterns can be distributed throughout the pixel and arranged according to specific rules. The electrical characteristics of semiconductor patterns differ depending on whether they are doped or not. Semiconductor patterns can include doped and undoped regions. Doped regions can be doped with N-type or P-type dopants. A P-type transistor includes a doped region doped with a P-type dopant.

[0121] The conductivity of doped regions is greater than that of undoped regions, essentially functioning as electrodes or signal lines. Undoped regions are essentially equivalent to the active region (or channel) of a transistor. In other words, one part of a semiconductor pattern can be the active region of a transistor, another part can be the source or drain of a transistor, and yet another part can be an additional electrode or signal line.

[0122] like Figure 4b As shown, the source S1, active region A1, and drain D1 of the first transistor T1 are formed by semiconductor patterns, and the source S6, active region A6, and drain D6 of the sixth transistor T6 are formed by semiconductor patterns. In cross-section, the source S1, S6 and the drain D1, D6 extend from the active regions A1, A6 in opposite directions to each other.

[0123] A first intermediate insulating layer 10 is disposed on the buffer layer BFL. The first intermediate insulating layer 10 overlaps with multiple pixels and covers the semiconductor pattern. The first intermediate insulating layer 10 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure.

[0124] The first intermediate insulating layer 10 may comprise at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. In this embodiment, the first intermediate insulating layer 10 may be a single layer of silicon oxide.

[0125] Not only the first intermediate insulating layer 10, but also the insulating layer of the circuit element layer CL (described later) can be an inorganic layer and / or an organic layer, and has a single-layer or multi-layer structure. The inorganic layer may contain at least one of the substances described above.

[0126] Gates G1 and G6 are disposed on the first intermediate insulating layer 10. Gate G1 may be part of a metal pattern. Gates G1 and G6 may overlap with active regions A1 and A6. In the process of doping semiconductor patterns, gates G1 and G6 are equivalent to a mask.

[0127] A second intermediate insulating layer 20 covering gates G1 and G6 is disposed on the first intermediate insulating layer 10. The second intermediate insulating layer 20 may overlap with the pixel. The second intermediate insulating layer 20 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. In this embodiment, the second intermediate insulating layer 20 may be a single-layer silicon oxide layer.

[0128] A first auxiliary electrode SD1 can be disposed on the second intermediate insulating layer 20. The first auxiliary electrode SD1 can be connected to the drain electrode D6 through a contact hole CNT-1 that passes through the first intermediate insulating layer 10 and the second intermediate insulating layer 20.

[0129] A first insulating layer 30 is disposed on the second intermediate insulating layer 20. The first insulating layer 30 may be an organic layer. The second auxiliary electrode SD2 can be connected to the first auxiliary electrode SD1 through a contact hole CNT-2 that penetrates the first insulating layer 30.

[0130] A second insulating layer 40 is disposed on the first insulating layer 30, covering the second additional electrode SD2. The second insulating layer 40 may be an organic layer. A first electrode EL1 is disposed on the second insulating layer 40. The first electrode EL1 is connected to the second additional electrode SD2 through a contact hole CNT-3 penetrating the second insulating layer 40. A display opening OP is defined in the pixel defining film PDL. The display opening OP of the pixel defining film PDL can expose at least a portion of the first electrode EL1.

[0131] The hole control layer (HCL) may include a hole transport layer and a hole injection layer. An emissive layer (EML) is disposed on the hole control layer (HCL). The emissive layer (EML) may be disposed in the region corresponding to the display opening (OP). That is, the emissive layer (EML) may be separately formed in each pixel.

[0132] An electronic control layer (ECL) is disposed on the emissive layer (EML). The ECL may include an electron transport layer and an electron injection layer. A hole control layer (HCL) and the ECL are co-formed on multiple pixels using an open mask. A second electrode (EL2) is disposed on the ECL. The second electrode (EL2) has a monolithic shape and is co-located on multiple pixels.

[0133] An encapsulation layer TFE is disposed on the second electrode EL2. The encapsulation layers TFE are disposed on multiple pixels. In this embodiment, the encapsulation layer TFE can directly cover the second electrode EL2. In one embodiment of the invention, a cover layer covering the second electrode EL2 can also be disposed between the encapsulation layer TFE and the second electrode EL2. In this case, the encapsulation layer TFE can directly cover the cover layer.

[0134] The TFE encapsulation layer is disposed on the organic light-emitting element (OLED) to encapsulate the OLED. On the other hand, although not shown, a capping layer covering the second electrode EL2 may also be disposed between the second electrode EL2 and the OLED. Figure 4b The TFE encapsulation layer shown can be used with Figure 2b This corresponds to the TFE encapsulation layer described in the text.

[0135] Refer again Figure 1b The main circuit board MF includes a base circuit board MP and driving components MC. The base circuit board MP is connected to the first flexible circuit board FF and electrically connected to the display panel DP, and the base circuit board MP is connected to the second flexible circuit board TF and electrically connected to the input sensing panel ISP. The base circuit board MP can be constructed from a flexible printed circuit board (FPCB).

[0136] The driving element MC may include a signal controller. The signal controller receives the input image signal and converts it into image data that conforms to pixel operation. Furthermore, the signal controller can receive various control signals, such as vertical synchronization signals, horizontal synchronization signals, master clock signals, and data enable signals, and output the corresponding signals for each of these signals. Additionally, the driving element MC may include a control unit that controls the input sensing panel (ISP), and is not limited to a single embodiment.

[0137] The first flexible circuit board FF is connected to one side of the display panel DP and electrically connects the display panel DP and the main circuit board MF. The first flexible circuit board FF includes a base film FB and a driver chip FC.

[0138] The base film (FB) can be flexible and include circuit wiring (not shown). Therefore, the base film (FB) can be provided in various forms to correspond to the purpose and shape of the display panel (DP).

[0139] The driver chip FC can be mounted on the base film FB in COF (Chip On Film) form. The driver chip FC may include driving elements for driving pixels, such as data driving circuitry. A first flexible circuit board FF according to an embodiment of the present invention is shown as one, but is not limited thereto; multiple such boards may be provided and connected to the display panel DP.

[0140] The second flexible circuit board FF is connected to one side of the input sensing panel ISP and electrically connects the input sensing panel ISP and the main circuit board MF. The second flexible circuit board TF may be flexible and include multiple circuit traces (not shown). The second flexible circuit board TF transmits the input sensing signals provided from the main circuit board MF to the input sensing panel ISP.

[0141] Figure 5a This is a top view of an input sensing panel according to an embodiment of the present invention. Figure 5b It is Figure 5a The image shows an enlarged top view of the PP' area. Figure 5c It is shown Figure 5aThe top view shows the configuration relationship between the luminescent area and conductive pattern in the QQ' area and the overlay layer.

[0142] Reference Figure 5a The input sensing panel ISP may include a first sensing electrode TE1, a second sensing electrode TE2, a first signal line SL1, a second signal line SL2, and a sensing pad section TDL including a sensing pad T-PD.

[0143] Furthermore, the input sensing panel ISP according to the present invention may include a functional layer FL surrounding at least a portion of the first sensing electrode TE1 and the second sensing electrode TE2. For ease of explanation, in Figure 5a and Figure 5b The functional layer FL will be omitted.

[0144] The first sensing electrode TE1 extends along the second direction DR2. Multiple first sensing electrodes TE1 may be configured and arranged along the first direction DR1. Each first sensing electrode TE1 includes a first sensing pattern SP1 arranged along the second direction DR2 and a first connecting pattern BP1 disposed between the first sensing patterns SP1.

[0145] The second sensing electrode TE2 can be configured to be insulated from the first sensing electrode TE1. The second sensing electrode TE2 extends along the first direction DR1. Multiple second sensing electrodes TE2 can be provided and arranged along the second direction DR2. The second sensing electrode TE2 includes a second sensing pattern SP2 arranged along the first direction DR1 and a second connecting pattern BP2 disposed between the second sensing patterns SP2.

[0146] The input sensing panel (ISP) senses the external input TC by sensing the change in mutual capacitance between the first sensing electrode TE1 and the second sensing electrode TE2 (see reference). Figure 1a Alternatively, the external input TC can be sensed by sensing the change in self-capacitance of the first sensing electrode TE1 and the second sensing electrode TE2. An input sensing panel ISP according to an embodiment of the present invention can sense the external input TC in various ways, and is not limited to a particular embodiment.

[0147] A first signal line SL1 is connected to a first sensing electrode TE1. The first signal line SL1 can be configured within the peripheral area NAA and not visible from the outside. A second signal line SL2 is connected to a second sensing electrode TE2. The second signal line SL2 can be configured within the peripheral area NAA and not visible from the outside.

[0148] On the other hand, in this embodiment, a first sensing electrode TE1 can be connected to two first signal lines. One end and the other end of the first sensing electrode TE1 can be connected to different first signal lines SL1 and to two first pads. Therefore, even though the first sensing electrode TE1 has a relatively longer length compared to the second sensing electrode TE2, an electrical signal can be uniformly applied to the entire area of ​​both the first and second sensing electrodes TE1 and TE2. Thus, the input sensing panel ISP is not constrained by shape and can provide a uniform external input sensing environment for the entire effective area AA.

[0149] However, as illustrated by example, the second sensing electrode TE2 can also be connected to two second signal lines, or the first sensing electrode TE1 and the second sensing electrode TE2 can each be connected to only one signal line. The input sensing panel ISP according to an embodiment of the present invention can be driven in various ways, and is not limited to a particular embodiment.

[0150] The sensing pad section TDL is part of the second flexible circuit board TF that is connected to the circuit. The sensing pad T-PD of the sensing pad section TDL is connected to the pad (not shown) included in the second flexible circuit board TF. Therefore, the input sensing panel ISP and the main circuit board MF can be connected through the second flexible circuit board TF.

[0151] Figure 5b The lieutenant general constitutes the sensing electrodes TE1 and TE2 (refer to...) Figure 5a A portion of each of the first sensing pattern SP1, the first connecting pattern BP1, the second sensing pattern SP2, and the second connecting pattern BP2 is shown in magnification.

[0152] The input sensing panel ISP according to the present invention may include mesh lines MSL1 and MSL2. The mesh lines MSL1 and MSL2 may be composed of a first mesh line MSL1 and a second mesh line MSL2. Specifically, the first mesh line MSL1 may extend along a fourth direction DR4, and the second mesh line MSL2 may intersect the first mesh line MSL1 and extend along a fifth direction DR5.

[0153] According to the present invention, Figure 2b The first conductive pattern TML1 described herein may be composed of the first connecting pattern BP1. Figure 2b The second conductive pattern TML2 described herein may be composed of a first sensing pattern SP1, a second sensing pattern SP2, and a second connection pattern BP2.

[0154] According to this embodiment, the first sensing pattern SP1, the second sensing pattern SP2, and the second connection pattern BP2 constituting the second conductive pattern TML2 may include mesh lines MSL1 and MSL2.

[0155] The first connection pattern BP1 can be disposed on the first sensing insulating layer TIL1 and covered by the second sensing insulating layer TIL2. The first sensing pattern SP1, the second sensing pattern SP2, and the second connection pattern BP2 can be disposed on the second sensing insulating layer TIL2 and covered by the third sensing insulating layer TIL3 (see reference). Figure 2b )cover.

[0156] It is possible that the contact hole B-CNT is defined in the second sensing insulating layer TIL2, and the first sensing pattern SP1 and the first connection pattern BP1 are connected through the contact hole B-CNT.

[0157] Figure 5c The diagram illustrates the relationship between the light-emitting regions PXA-R, PXA-G, PXA-B, the second conductive pattern TML2 included in the input sensing panel ISP, and the functional layer FL.

[0158] The functional layer FL can cover at least a portion of the mesh lines MSL1 and MSL2. Figure 5c The diagram shows that the functional layer FL covers all of the mesh lines MSL1 and MSL2, but it is not limited to this. The functional layer FL may cover only a part of the mesh lines MSL1 and MSL2.

[0159] The functional openings OP-FR, OP-FG, and OP-FB can be defined by the outer edge of the functional layer FL. The functional openings OP-FR, OP-FG, and OP-FB can be composed of a first functional opening OP-FR, a second functional opening OP-FG, and a third functional opening OP-FB.

[0160] According to the present invention, the light-emitting regions PXA-R, PXA-G, and PXA-B can correspond to the areas on the planes of the functional openings OP-FR, OP-FG, and OP-FB defined in the functional layer FL. Therefore, the light-emitting regions PXA-R, PXA-G, and PXA-B according to the present invention can be increased or decreased according to the volume change of the functional layer FL, as described later.

[0161] The non-emissive region NPXA can be adjacent to the emissive regions PXA-R, PXA-G, and PXA-B. The mesh lines MSL1 and MSL2 constituting the input sensing panel ISP can be arranged overlapping the non-emissive region NPXA. Therefore, even if the input sensing panel ISP is directly disposed on the display panel DP (see reference...), Figure 2a On the display panel (DP), interference with light generated from the DP can also be minimized. Therefore, a display device (EA) with improved color purity can be provided (see reference). Figure 1a ).

[0162] According to this embodiment, the light-emitting regions PXA-R, PXA-G, and PXA-B can be composed of a first light-emitting region PXA-R, a second light-emitting region PXA-G, and a third light-emitting region PXA-B. Each light-emitting region PXA-R, PXA-G, and PXA-B can provide light of a different color from the others.

[0163] According to the present invention, the functional layer FL may contain a piezoelectric material. Through the piezoelectric material, the volume of the functional layer FL can change as a voltage is applied to the mesh lines MSL1 and MSL2. At this time, as the area of ​​the functional openings OP-FR, OP-FG, and OP-FB changes, the area of ​​the light-emitting regions PXA-R, PXA-G, and PXA-B can also change. This will be described in detail later.

[0164] The functional openings OP-FR, OP-FG, and OP-FB can have different areas. For example, the third functional opening OP-FB can have a larger area than the first functional opening OP-FR and the second functional opening OP-FG. The first functional opening OP-FR can have a larger area than the second functional opening OP-FG.

[0165] The illustrations show that the areas of the functional openings OP-FR, OP-FG, and OP-FB are different from each other, but are not limited to this. The areas of the functional openings OP-FR, OP-FG, and OP-FB can be the same.

[0166] Figure 5c The display opening OP shown in the figure is... Figure 4b The corresponding display opening OP is shown in the figure. For ease of explanation, the areas of the functional openings OP-FR, OP-FG, and OP-FB are shown as larger than the area of ​​their corresponding display openings OP. However, the areas of the functional openings OP-FR, OP-FG, and OP-FB can be the same as the area of ​​their corresponding display openings OP. As the volume of the functional layer FL changes, the areas of the functional openings OP-FR, OP-FG, and OP-FB can be smaller than the area of ​​the display opening OP.

[0167] Figure 6a It is along in the first mode Figure 5c A cross-sectional view of the display device taken from I-I'. Figure 6b It is along the second mode Figure 5c A cross-sectional view of the display device taken from I-I'.

[0168] In this invention, the second conductive pattern TML2 can receive different voltages from each other. For example, the first signal line SL1 (refer to...) Figure 5a ) and second signal line SL2 (refer to Figure 5aDifferent voltages can be applied to the second conductive pattern TML2.

[0169] In this invention, the state in which a (+) voltage is applied to the second conductive pattern TML2 is defined as the first mode, and the state in which a (-) voltage is applied to the second conductive pattern TML2 is defined as the second mode.

[0170] According to this embodiment, a +5V voltage may be applied to the second conductive pattern TML2 in the first mode, and a -5V voltage may be applied in the second mode. However, it is not limited to this; a - voltage may be applied in the first mode, and a + voltage may be applied in the second mode. Alternatively, different values ​​of the same sign may be applied in each mode.

[0171] However, it is not limited to this. The second conductive pattern TML2 can be connected to a plurality of first signal lines or to a plurality of second signal lines to receive different voltages from each other, and is not limited to a particular embodiment.

[0172] Reference Figure 6a The display panel DP may include a substrate layer SUB, a circuit element layer CL, and a display element layer PE (see reference). Figure 2a Only the first electrodes EL1-R, EL1-G, EL1-B and the pixel delimiting film PDL in the structure of the display element layer PE are shown. For a detailed view of the structure of the display element layer PE, please refer to [reference needed]. Figure 4b .

[0173] The circuit element layer CL can be disposed on the substrate layer SUB. The first electrodes EL1-R, EL1-G, and EL1-B can be disposed on the circuit element layer CL. The display openings OP-R, OP-G, and OP-B are defined by the pixel defining film PDL. Figure 4b as well as Figure 5c The display opening OP described in the text can be connected with... Figure 6a At least one of the display openings OP-R, OP-G, and OP-B shown corresponds to the display opening shown.

[0174] The encapsulation layer TFE can be configured on the display element layer PE. The encapsulation layer TFE may include a first encapsulation inorganic layer LIL, an organic layer OEL, and a second encapsulation inorganic layer UIL.

[0175] The input sensing panel (ISP) can be directly configured on the TFE encapsulation layer. The input sensing panel (ISP) may include sensing insulating layers TIL1, TIL2, and TIL3, conductive patterns TML1 and TML2, piezoelectric pattern PP, and light-shielding pattern BM.

[0176] Alternatively, a first sensing insulating layer TIL1 may be disposed on the second encapsulation inorganic layer UIL of the encapsulation layer TFE, and a first conductive pattern TML1 may be disposed on the first sensing insulating layer TIL1. A second sensing insulating layer TIL2 may be disposed on the first sensing insulating layer TIL1 and cover the first conductive pattern TML1. A second conductive pattern TML2 may be disposed on the second sensing insulating layer TIL2.

[0177] The piezoelectric pattern PP can be disposed on the second sensing insulating layer TIL2. The piezoelectric pattern PP can cover the top TU and the side TS of the second conductive pattern TML2.

[0178] The piezoelectric pattern PP can be composed of single crystals, ceramics, thin films, etc. Single crystals can include at least one of quartz and lithium niobate (LiNbO3). Ceramics can include at least one of barium titanate (BaTiO3) and lead zirconate titanate (PZT). Thin films can include at least one of zinc oxide (ZnO), lead zirconate titanate (PZT), and aluminum nitride (AlN). However, it is not limited to these; any material whose volume changes with the applied voltage is acceptable.

[0179] The light-shielding pattern BM can be configured on the second sensing insulating layer TIL2. The light-shielding pattern BM can cover the top PU and the side PS of the piezoelectric pattern PP.

[0180] A light-blocking pattern BM can contain substances that can absorb light. The substances constituting the light-blocking pattern BM are not limited to any one type, as long as they can absorb light.

[0181] According to the present invention, the display device EA can provide a first-mode light-emitting region PXA-R1, PXA-G1, and PXA-B1 to the user in a first mode. In the first mode, the width between adjacent side surfaces BS in the light-shielding pattern BM is defined by first transmission openings OP-BR1, OP-BG1, and OP-BB1. The area of ​​the first-mode light-emitting region PXA-R1, PXA-G1, and PXA-B1 can be determined based on the area variation of the first transmission openings OP-BR1, OP-BG1, and OP-BB1.

[0182] For example, the first transmission openings OP-BR1, OP-BG1, and OP-BB1 may include the first-1 transmission opening OP-BR1, the first-2 transmission opening OP-BG1, and the first-3 transmission opening OP-BB1.

[0183] The area of ​​the first-1 luminescent region PXA-R1 corresponds to the area of ​​the first-1 transmission opening OP-BR1. The area of ​​the first-2 luminescent region PXA-G1 corresponds to the area of ​​the first-2 transmission opening OP-BG1. The area of ​​the first-3 luminescent region PXA-B1 corresponds to the area of ​​the first-3 transmission opening OP-BB1.

[0184] In cross-section, each of the first transmission openings OP-BR1, OP-BG1, and OP-BB1 may overlap with at least a portion of the corresponding display openings OP-R, OP-G, and OP-B.

[0185] according to Figure 6a The figure shows the curvature at the corners of the piezoelectric pattern PP and the light-shielding pattern BM in cross-section. However, it is not limited to this; the piezoelectric pattern PP and the light-shielding pattern BM can have various shapes in cross-section.

[0186] The third sensing insulating layer TIL3 can be disposed on the second sensing insulating layer TIL2 and cover the top BU and side BS of the light-shielding pattern BM. The third sensing insulating layer TIL3 can overlap with the second sensing insulating layer TIL2 in the area where it overlaps with the first transmission openings OP-BR1, OP-BG1, and OP-BB1.

[0187] Color filters CF-R, CF-G, and CF-B can be disposed on the third sensing insulating layer TIL3. The first color filter CF-R, the second color filter CF-G, and the third color filter CF-B can correspond to the first-1 light-emitting region PXA-R, the first-2 light-emitting region PXA-G, and the first-3 light-emitting region PXA-B, respectively.

[0188] Color filters CF-R, CF-G, and CF-B may contain a base resin and dyes and / or pigments dispersed in the base resin. The base resin, as the medium for dispersing the dyes and / or pigments, can generally be formed from various resin compositions that can be referred to as binders.

[0189] Color filters CF-R, CF-G, and CF-B can reduce the reflectivity of external light. The first color filter CF-R, the second color filter CF-G, and the third color filter CF-B each allow light within a specific wavelength range to pass through while absorbing light outside the corresponding wavelength range. Therefore, they can absorb most of the natural light and reflect only a portion.

[0190] A window component WM can be configured on color filters CF-R, CF-G, and CF-B. The window component WM can be bonded to color filters CF-R, CF-G, and CF-B via an adhesive layer AL.

[0191] The adhesive layer AL can be any of the following transparent adhesive layers: pressure-sensitive adhesive film (PSA), optically clear adhesive film (OCA), and optically clear resin (OCR).

[0192] However, the adhesive layer AL can contain conventional adhesives or adhesives, without particular limitation. Alternatively, the adhesive layer AL can be omitted.

[0193] In this invention, the volume of the piezoelectric pattern PP can change as a voltage is applied to the second conductive pattern TML2. As the volume of the piezoelectric pattern PP changes, the volume of the light-shielding pattern BM can change simultaneously with the volume of the piezoelectric pattern PP.

[0194] exist Figure 6b The description of the structure that changes with the volume of the piezoelectric pattern PP and the light-shielding pattern BM in the second mode will omit the details regarding the relationship between the two. Figure 6a Explanation of maintaining the same structure.

[0195] According to the present invention, when switching from the first mode to the second mode, the volume of the piezoelectric pattern PP and the light-shielding pattern BM can be increased simultaneously.

[0196] According to the present invention, the display device EA can provide the user with second-mode luminescent areas PXA-R2, PXA-G2, and PXA-B2 in a second mode. In the second mode, the width between adjacent side surfaces BS in the light-shielding pattern BM is defined by second transmission openings OP-BR2, OP-BG2, and OP-BB2.

[0197] As the area of ​​the second transmission openings OP-BR2, OP-BG2, and OP-BB2 decreases, the area of ​​the second mode luminescent regions PXA-R2, PXA-G2, and PXA-B2 can also be reduced.

[0198] According to the present invention, the width of each of the second transmission openings OP-BR2, OP-BG2, and OP-BB2 can be reduced compared to the width of the first transmission openings OP-BR1, OP-BG1, and OP-BB1.

[0199] For example, the width of the second-first transmission opening OP-BR2 can be smaller than the width of the first-first transmission opening OP-BR1. The width of the second-second transmission opening OP-BG2 can be smaller than the width of the first-second transmission opening OP-BG1. The width of the second-third transmission opening OP-BB2 can be smaller than the width of the first-third transmission opening OP-BB1.

[0200] When switching from the first mode to the second mode, the width of the light-shielding pattern BM can be increased by a protruding width W in the direction towards the second mode light-emitting areas PXA-R2, PXA-G2, and PXA-B2. In this embodiment, when switching from the first mode to the second mode with the boundaries of the display openings OP-R, OP-G, and OP-B as a reference, the protruding width W can be defined as the width of the light-shielding pattern BM protruding from the display openings OP-R, OP-G, and OP-B in the direction towards the second mode light-emitting areas PXA-R2, PXA-G2, and PXA-B2.

[0201] Therefore, the second-first luminescent region PXA-R2 can have a luminescent region with a reduced left and right protrusion width W compared to the first-first luminescent region PXA-R1. The second-second luminescent region PXA-G2 can have a luminescent region with a reduced left and right protrusion width W compared to the first-second luminescent region PXA-G1. The second-third luminescent region PXA-B2 can have a luminescent region with a reduced left and right protrusion width W compared to the first-third luminescent region PXA-B1.

[0202] In this invention, the protrusion width W can be 2 micrometers or more and 5 micrometers or less. When the protrusion width W is less than 2 micrometers, the effect of reducing the viewing angle may be insufficient. When the protrusion width W exceeds 5 micrometers, the non-light-emitting area NPXA may be visible to the user due to the reduced viewing angle.

[0203] The illustration shows that each second-mode emitting region PXA-R2, PXA-G2, PXA-B2 is reduced in width by the same amount, but is not limited thereto. When switching from the first mode to the second mode, each second-mode emitting region PXA-R2, PXA-G2, PXA-B2 may have a convex width W of a light-shielding pattern BM that is different from each other.

[0204] The light provided to the second mode emitting regions PXA-R2, PXA-G2, and PXA-B2 can be provided to the user with a narrower viewing angle than the light provided to the first mode emitting regions PXA-R1, PXA-G1, and PXA-B1.

[0205] According to the present invention, by increasing or decreasing the viewing angle as needed to block the view of a third party viewing from the side, a display device with improved privacy protection can be provided.

[0206] Figure 7a This is a cross-sectional view of the display device in the first mode. Figure 7b This is a cross-sectional view of the display device in the second mode. The following refers to the view with reference to Figures 1 to 12. Figure 6bStructures that are identical or similar to those described use the same or similar reference numerals, and repeated descriptions are omitted.

[0207] Reference Figure 7a The display device EA-A according to this embodiment may include a display panel DP, an input sensing panel ISP, an anti-reflective layer ARL, and a window component WM. The anti-reflective layer ARL may include a polarization layer POL and a phase delay layer PRL. Figure 7a as well as Figure 7b The display panel DP shown can be connected to Figure 4b The description corresponds to the DP display panel. Therefore, repeated descriptions are omitted.

[0208] The input sensing panel (ISP) can be configured on the display panel (DP). The input sensing panel (ISP) may include sensing insulating layers TIL1, TIL2, TIL3-A, conductive patterns TML1, TML2, and a cover layer HRF.

[0209] Alternatively, a first sensing insulating layer TIL1 may be disposed on the display panel DP, and a first conductive pattern TML1 may be disposed on the first sensing insulating layer TIL1. A second sensing insulating layer TIL2 may be disposed on the first sensing insulating layer TIL1 and cover the first conductive pattern TML1. A second conductive pattern TML2 may be disposed on the second sensing insulating layer TIL2.

[0210] The piezoelectric pattern PP can be disposed on the second sensing insulating layer TIL2 and cover the second conductive pattern TML2. The light-shielding pattern BM can be disposed on the second sensing insulating layer TIL2 and cover the piezoelectric pattern PP.

[0211] The third sensing insulating layer TIL3-A can be disposed on the second sensing insulating layer TIL2 and cover the light-shielding pattern BM. In this embodiment, the third sensing insulating layer TIL3-A can have a predetermined pattern.

[0212] For example, in cross-section, the third sensing insulating layer TIL3-A can cover the top and sides of the light-shielding pattern BM, and expose the second sensing insulating layer TIL2 in the area overlapping with the first light-emitting area PXA-1 in the second sensing insulating layer TIL2.

[0213] According to this embodiment, the third sensing insulating layer TIL3-A can have a trapezoidal shape in cross-section. Therefore, it can include an inclined surface IS that slopes from the second sensing insulating layer TIL2 toward the direction of light emission from the display panel DP.

[0214] In cross-section, the inclined surface IS is shown as a straight line, but is not limited to this. In cross-section, the inclined surface IS can be formed by a curve, and is not limited to a particular embodiment.

[0215] The third sensing insulating layer TIL3-A can define the first covering opening OP-H1. The width of the first covering opening OP-H1 can be defined as the minimum width between adjacent inclined surfaces IS.

[0216] During the transition from the first mode to the second mode, as the volume of the light-shielding pattern BM changes, the volume of the third sensing insulating layer TIL3-A can also change simultaneously. Consequently, the width of the first covering opening OP-H1 can change.

[0217] The cover layer HRF can be disposed on the second sensing insulating layer TIL2. The cover layer HRF can cover the top of the third sensing insulating layer TIL3-A and the inclined surface IS. The area in the second sensing insulating layer TIL2 that overlaps with the first cover opening OP-H1 can contact the cover layer HRF. The cover layer HRF can provide a planarization layer.

[0218] The capping layer HRF can be formed of a material having a relatively high refractive index compared to the insulating layer disposed below the capping layer HRF. In this embodiment, the refractive index of the capping layer HRF can be above 1.6 and below 1.8.

[0219] The anti-reflective layer (ARL) can be configured on the input sensing panel (ISP). The phase delay layer (PRL) can be configured on the overlay layer (HRF), and the polarization layer (POL) can be configured on the phase delay layer (PRL).

[0220] Although not shown, it may also include supports (not shown) disposed above and below the polarizing layer POL. The supports (not shown) can support the polarizing layer POL and prevent contamination and impact from the outside.

[0221] A phase retardation layer (PRL) can possess optical anisotropy, delaying a component of incident light. The PRL can alter the polarization state of light. For example, it can transform light passing through the PRL from linearly polarized to circularly polarized, or vice versa.

[0222] The phase retardation layer (PRL) may comprise one or more of polycarbonate (PC) resins, cyclic olefin polymer (COP) resins, propylene resins, and cellulose resins. However, the present invention does not particularly limit the material of the phase retardation layer (PRL), and the phase retardation layer (PRL) may comprise liquid crystal.

[0223] Although not shown, the polarizing layer POL has a transmission axis (not shown) and an absorption axis (not shown) that intersects the transmission axis (not shown). In this embodiment, the transmission axis (not shown) and the absorption axis (not shown) can be perpendicular.

[0224] Therefore, one component of the external light incident on the polarizing layer POL can be absorbed by the absorption axis (not shown) or reflected and cannot pass through the polarizing layer POL. The component of the external light incident on the polarizing layer POL that is perpendicular to this first component can pass through the polarizing layer POL. That is, the polarizing layer POL can polarize external light rays.

[0225] The polarizing layer (POL) can be formed from a polymer resin stretched in a specific direction. However, it is not limited to this; the polarizing layer (POL) can also be a wire grid polarizer.

[0226] As a result, external light incident on the polarization layer POL can be linearly polarized and incident on the phase retardation layer PRL, and then circularly polarized as it passes through the phase retardation layer PRL. The circularly polarized external light can be transmitted through the display module DM (see reference). Figure 2a Reflection can alter the polarization direction of external light.

[0227] The reflected light, with its polarization direction altered, can re-enter the phase retardation layer (PRL) and undergo a phase delay of one component through it. Thus, the polarization state of the reflected light can change from circular polarization to linear polarization. The linear polarization direction of the reflected light can be parallel to the absorption axis of the POL, and the linearly polarized reflected light can be absorbed by the POL.

[0228] Therefore, the anti-reflective component ARL can prevent external light incident on the display device EA-A from being reflected in the display module DM and seen by the user.

[0229] The window component WM can be mounted on the anti-reflective component ARL. The window component WM and the anti-reflective component ARL can be bonded together using the adhesive layer AL. However, the adhesive layer AL can be omitted.

[0230] exist Figure 7b The description of the structure that changes with the volume of the piezoelectric pattern PP and the light-shielding pattern BM in the second mode will omit the details regarding the relationship between the two. Figure 7a Explanation of maintaining the same structure.

[0231] According to the present invention, during the transition from the first mode to the second mode, as the overall volume of the light-shielding pattern BM increases, the overall volume of the third sensing insulating layer TIL3-A can also increase. Consequently, the width of the second covering opening OP-H2 can be narrower than the width of the first covering opening OP-H1.

[0232] In this invention, the area of ​​the second light-emitting region PXA-2 can be reduced compared to the area of ​​the first light-emitting region PXA-1. Therefore, the light supplied to the second light-emitting region PXA-2 can be provided to the user in a relatively narrow viewing angle in the second mode, as the light passes through a narrower light-emitting region than that supplied to the first light-emitting region PXA-1.

[0233] According to the present invention, a display device is provided that enhances privacy protection by blocking the view of a third party from the side by adjusting the viewing angle according to the user's needs.

[0234] The above description refers to preferred embodiments of the present invention. Those skilled in the art or those with ordinary knowledge in the art should understand that various modifications and alterations can be made to the present invention without departing from the concept and scope of the invention as set forth in the claims.

[0235] Therefore, the technical scope of this invention should not be limited by the details described in the specification, but should be determined by the claims.

Claims

1. A display device, characterized in that, include: Display panel, including pixels that provide light; as well as Input sensing panel, senses external input. The input sensing panel includes: A first sensing insulating layer is disposed on the display panel; A first conductive pattern is disposed on the first sensing insulating layer; A second sensing insulating layer is disposed on the first sensing insulating layer and covers the first conductive pattern; A second conductive pattern is disposed on the second sensing insulating layer; The piezoelectric pattern is in full contact with the top and sides of the second conductive pattern, and its volume changes with the voltage applied to the second conductive pattern. A light-shielding pattern, in full contact with the top and sides of the piezoelectric pattern, defines a transmission opening allowing light to pass through; and A third sensing insulating layer is disposed on the second sensing insulating layer and covers the light-shielding pattern. In a first mode, a first voltage is applied to the second conductive pattern, and in a second mode, a second voltage different from the first voltage is applied to the second conductive pattern.

2. The display device according to claim 1, characterized in that, The transmission opening has a first width in one direction in the first mode, and a second width in the same direction that is smaller than the first width in the second mode.

3. The display device according to claim 2, characterized in that, The display panel includes: basal layer; A circuit element layer, including transistors disposed on the substrate layer; The display element layer includes a first electrode connected to the transistor, a second electrode disposed on the first electrode, a light-emitting layer disposed between the first electrode and the second electrode, and a pixel defining film defining a display opening exposing at least a portion of the first electrode; and Encapsulation layer, covering the display element layer, The first sensing insulating layer is directly disposed on the encapsulation layer.

4. The display device according to claim 3, characterized in that, The piezoelectric pattern has a larger volume in the second mode than in the first mode.

5. The display device according to claim 3, characterized in that, The side of the light-shielding pattern defines the boundary of the light-emitting area. The luminescent region has a narrower area in the second mode than in the first mode.

6. The display device according to claim 5, characterized in that, During the transition from the first mode to the second mode, the light-shielding pattern protrudes in the direction toward the light-emitting area. The width of the bulging shading pattern in the shading pattern during the transition from the first mode to the second mode is more than 2 micrometers and less than 5 micrometers.

7. The display device according to claim 1, characterized in that, The light-blocking pattern contains light-absorbing material.

8. The display device according to claim 5, characterized in that, The display device further includes: A color filter layer is disposed on the input sensing panel and overlaps with the light-emitting area; and A window is configured on the color filter layer.

9. The display device according to claim 5, characterized in that, The input sensing panel further includes a cover layer disposed on the third sensing insulating layer. The third sensing insulating layer defines a covering opening that exposes at least a portion of the second sensing insulating layer and overlaps with at least a portion of the light-emitting area. The cover layer contacts the second sensing insulating layer in the area overlapping with the cover opening.

10. The display device according to claim 1, characterized in that, The second conductive pattern includes a plurality of mesh lines.

11. A display device, characterized in that, include: Display panel, including pixels that provide light; as well as Input sensing panel, senses external input. The input sensing panel includes: Multiple sensing insulating layers; Multiple conductive patterns are disposed between the sensing insulating layers; A piezoelectric pattern, in full contact with the top and side surfaces of at least one of the plurality of conductive patterns, and whose volume changes with the voltage applied to the at least one conductive pattern; and The light-blocking pattern makes full contact with the top and sides of the piezoelectric pattern, and defines a transmission opening that allows light to pass through. The transmission opening has a first width in one direction when receiving a first voltage, and has a second width in the same direction that is smaller than the first width when receiving a second voltage that is different from the first voltage.

12. The display device according to claim 11, characterized in that, The display panel includes: basal layer; A circuit element layer, including transistors disposed on the substrate layer; The display element layer includes a first electrode connected to the transistor, a second electrode disposed on the first electrode, a light-emitting layer disposed between the first electrode and the second electrode, and a pixel defining film defining a display opening exposing at least a portion of the first electrode; and Encapsulation layer, covering the display element layer, The sensing insulating layer, which is most adjacent to the display panel, is directly disposed on the encapsulation layer.

13. The display device according to claim 12, characterized in that, The piezoelectric pattern has a larger volume in the second mode than in the first mode.

14. The display device according to claim 13, characterized in that, The side of the light-shielding pattern defines the boundary of the light-emitting area. The luminescent region has a narrower area in the second mode than in the first mode.

15. The display device according to claim 14, characterized in that, During the transition from the first mode to the second mode, the light-shielding pattern protrudes in the direction toward the light-emitting area. The width of the bulging shading pattern in the shading pattern during the transition from the first mode to the second mode is more than 2 micrometers and less than 5 micrometers.

16. The display device according to claim 14, characterized in that, The display device further includes: A color filter layer is disposed on the input sensing panel and overlaps with the light-emitting area; and A window is configured on the color filter layer.

17. The display device according to claim 14, characterized in that, The input sensing panel further includes a cover layer covering at least a portion of the sensing insulating layer. The uppermost sensing insulating layer of the sensing insulating layer is configured in a trapezoidal shape in cross-section and defines a covering opening that overlaps with at least a portion of the light-emitting area.

18. An input sensing panel, characterized in that, include: First sensing insulating layer; A first conductive pattern is disposed on the first sensing insulating layer; A second sensing insulating layer is disposed on the first sensing insulating layer and covers the first conductive pattern; A second conductive pattern is disposed on the second sensing insulating layer; The piezoelectric pattern is in full contact with the top and sides of the second conductive pattern, and its volume changes with the voltage applied to the second conductive pattern. The light-shielding pattern defines a transmission opening that exposes at least a portion of the second sensing insulating layer and is in full contact with the top and side surfaces of the piezoelectric pattern. as well as A third sensing insulating layer is disposed on the second sensing insulating layer and covers the light-shielding pattern. In a first mode, a first voltage is applied to the second conductive pattern, and in a second mode, a second voltage different from the first voltage is applied to the second conductive pattern.

19. The input sensing panel according to claim 18, characterized in that, The transmission opening has a first width in one direction in the first mode, and a second width in the same direction that is smaller than the first width in the second mode.

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