Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device

Abstract

The present application provides a silicon carbide semiconductor device and a manufacturing method of a silicon carbide semiconductor device capable of improving yield in a silicon carbide semiconductor device provided with an AlSi electrode. An AlSi electrode composed of an aluminum alloy containing silicon is provided on a surface of a semiconductor substrate composed of silicon carbide by sputtering. Si nodules are precipitated in the AlSi electrode. In a portion of the AlSi electrode that becomes at least a bonding portion with a bonding wire, the Si nodules contain dendritic structures at an area ratio of 10% or more with respect to the total area of the Si nodules at the bonding portion. The height of the Si nodules in the AlSi electrode is 2 μm or less in either of the Si nodules of the dendritic structures and the prismatic structures. At the time of sputtering of the AlSi electrode, the temperature of the semiconductor substrate or the temperature of the periphery of the formation region of the AlSi electrode, or both of the temperatures, is set to 430°C or higher and 500°C or lower.

Description

Technical Field

[0001] This invention relates to silicon carbide semiconductor devices and methods for manufacturing silicon carbide semiconductor devices. Background Technology

[0002] Conventionally, aluminum (Al), which contains silicon (Si), has been used as the electrode material for the surface electrode on the front side of a semiconductor substrate. The surface electrode on the front side of the semiconductor substrate is formed by embedding it into a contact hole in the interlayer insulating film. Therefore, as a method to improve the embeddability of the surface electrode (hereinafter referred to as AlSi electrode) using aluminum containing silicon as the electrode material, reflow sputtering or similar methods have been proposed, in which the electrode is deposited (formed) by sputtering and then softened by heat treatment (reflow) to achieve embedding.

[0003] When silicon (Si) is used as a semiconductor material, if the semiconductor substrate is exposed to high temperatures in contact with an AlSi electrode, interdiffusion between silicon atoms in the semiconductor substrate and aluminum atoms in the AlSi electrode can easily occur. The aluminum atoms diffusing from the AlSi electrode into the semiconductor substrate alloy with the silicon atoms in the semiconductor substrate, forming protrusions (alloy spikes) that locally extend from the AlSi electrode into the semiconductor substrate. If these alloy spikes develop to the pn junction inside the semiconductor substrate, there is a concern that characteristic degradation may lead to device defects.

[0004] Silicon atoms diffusing from the semiconductor substrate into the AlSi electrode precipitate as silicon (Si) nodules near the interface between the AlSi electrode and the semiconductor substrate, resulting in increased resistance at the interface. It is known that by setting the temperature of the semiconductor substrate during AlSi electrode sputtering to a relatively low temperature (less than approximately 300°C), the interdiffusion between silicon atoms in the semiconductor substrate and aluminum atoms in the AlSi electrode can be suppressed, along with the development of alloy spikes and the precipitation of Si nodules.

[0005] Furthermore, in cases where the aspect ratio of the contact holes in the interlayer insulating film is large, a method is used to embed tungsten (W), which has a higher embeddability than aluminum, into the contact holes of the interlayer insulating film using chemical vapor deposition (CVD). By depositing AlSi electrodes on the tungsten plugs (W plugs) embedded in the contact holes of the interlayer insulating film, the AlSi electrodes do not directly contact the semiconductor substrate, thus suppressing the formation of alloy spikes.

[0006] On the other hand, when silicon carbide (SiC) is used as the semiconductor material, even if the temperature of the semiconductor substrate during AlSi electrode sputtering is set to above 300°C, alloy spikes are difficult to form. This is because, in addition to the low diffusion coefficient of silicon carbide itself (the binding energy between carbon and silicon atoms in silicon carbide is high), the mutual diffusion between silicon atoms in the semiconductor substrate and aluminum atoms in the AlSi electrode is suppressed by forming a silicide film between the semiconductor substrate and the AlSi electrode for ohmic contact with the semiconductor substrate.

[0007] A conventional method for manufacturing silicon semiconductor devices using silicon as the semiconductor material has been proposed that suppresses the precipitation of Si nodules by setting the temperature of the semiconductor substrate during sputtering of the AlSi electrode to a temperature close to or below the recrystallization temperature of the metal material of the AlSi electrode (for example, see Patent Document 1 below). In Patent Document 1, by setting the temperature of the semiconductor substrate during sputtering of the AlSi electrode to below 170°C, where silicon atoms diffusing into the AlSi electrode are unlikely to become granular, the precipitation of Si nodules in the AlSi electrode is approximately 0%.

[0008] Furthermore, as another conventional method for manufacturing silicon semiconductor devices, a method has been proposed in which AlSi electrodes are continuously deposited by sputtering at both a low temperature of 150°C and a high temperature of 350°C (for example, see Patent Document 2 below). In Patent Document 2 below, Si nodules in the AlSi electrode deposited at the low temperature are absorbed and grown by Si nodules in the AlSi electrode deposited at the high temperature. Therefore, Si nodules are precipitated at a depth in the middle of the total thickness of the AlSi electrode and separated from the underlying barrier metal.

[0009] Furthermore, in another conventional method for manufacturing silicon semiconductor devices, it has been reported that coarse silicon deposits (Si deposits) deposited in an AlSi electrode by sputtering are forcefully pressed against the semiconductor substrate when bonding wires are pressed onto the AlSi electrode, resulting in cracks extending from the location where the Si deposits are pressed to the semiconductor substrate (for example, see Non-Patent Document 1 below). Non-Patent Document 1 reports the potential for device damage and reduced yield due to cracks caused by the Si deposits.

[0010] Existing technical documents

[0011] Patent documents

[0012] Patent Document 1: Japanese Patent No. 3083301

[0013] Patent Document 2: Japanese Patent Application Publication No. 2000-164593

[0014] Non-patent literature

[0015] Non-Patent Document 1: Hirofumi Goto et al., High-Strength Aluminum Alloy Electrode Materials for Si-IGBTs, R&D Kobe Steel Technical Reports, Kobe Steel, September 2005, Vol. 65, No. 2, pp. 58-61 Summary of the Invention

[0016] Technical issues

[0017] As described above, when silicon carbide is used as the semiconductor material, the embedding performance of AlSi electrodes can be improved solely by sputtering without using methods such as W-type plug embedding based on CVD. However, the inventors have repeatedly conducted in-depth research and have clarified that if the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to 300°C or higher, the Si nodules precipitated in the AlSi electrode will grow in a prismatic shape and expand in the thickness direction of the AlSi electrode (the direction orthogonal to and away from the surface of the semiconductor substrate).

[0018] It is clarified that if the Si junctions in the AlSi electrode enlarge, damage caused by loads applied to the AlSi electrode and / or ultrasonic vibrations during the wire bonding process can be transmitted to the semiconductor substrate via the Si junctions in the AlSi electrode, resulting in cracks near the Si junctions that extend into the semiconductor substrate, or the bonding wires may peel off from the semiconductor substrate. Non-Patent Document 1 reported the problem of cracks in the semiconductor substrate due to these Si junctions, and this problem also occurs when silicon is used as the semiconductor material.

[0019] Furthermore, when Si nodules precipitate in the AlSi electrode, after patterning the AlSi electrode and leaving it at a predetermined location, it is necessary to remove the remaining Si nodules on the barrier metal using dry etching after removing the AlSi electrode using wet etching. However, in order to remove Si nodules by growing them in a prismatic shape in the thickness direction of the AlSi electrode using dry etching, which increases the height of the removed Si nodules, the dry etching time needs to be extended, which adversely affects the reliability of the barrier metal under the AlSi electrode.

[0020] In Patent Document 1, the semiconductor substrate temperature during AlSi electrode sputtering is as low as below 170°C, resulting in poor embedding of the AlSi electrode. In Patent Document 2, although AlSi electrodes are deposited by continuously performing sputtering at low and high temperatures, it is difficult to change the semiconductor substrate temperature during sputtering. Furthermore, the thickness of AlSi electrodes used in power devices is approximately 4μm to 6μm, making it difficult to achieve the desired effect even when using Patent Document 2 for AlSi electrode deposition.

[0021] In order to solve the problems of the prior art, the present invention aims to provide a silicon carbide semiconductor device and a method for manufacturing the silicon carbide semiconductor device that can improve the yield in a silicon carbide semiconductor device having AiSi electrodes.

[0022] Technical solution

[0023] To address the aforementioned problems and achieve the objectives of this invention, the silicon carbide semiconductor device of this invention has the following features: It comprises: a semiconductor substrate made of silicon carbide; and a surface electrode disposed on the surface of the semiconductor substrate and made of an aluminum alloy containing silicon. Silicon junctions are deposited within the surface electrode. In the portion of the surface electrode that forms at least a junction with a bonding wire, dendritic silicon junctions are present at an area ratio of 10% or more relative to the total area of ​​the silicon junctions at that junction.

[0024] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the height of the silicon junction inside the surface electrode is lower than the thickness of the surface electrode.

[0025] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the height of the silicon junction inside the surface electrode is lower than the thickness of the junction portion of the surface electrode, which is relatively thinned due to the bonding wire.

[0026] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the height of the silicon junction inside the surface electrode is less than 2 μm.

[0027] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the surface electrode contains silicon at a concentration of 0.5 wt% or more and 3 wt% or less relative to aluminum.

[0028] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the silicon carbide semiconductor device further comprises a barrier metal disposed between the semiconductor substrate and the surface electrode, which prevents impurity atoms from diffusing from the semiconductor substrate side to the surface electrode, or from diffusing from the surface electrode side to the semiconductor substrate, or both of these diffusions.

[0029] Furthermore, the silicon carbide semiconductor device of the present invention is characterized in that, in the above invention, the silicon carbide semiconductor device further comprises a silicide film disposed between the semiconductor substrate and the surface electrode, and in ohmic contact with the semiconductor substrate.

[0030] Furthermore, in order to solve the above-mentioned problems and achieve the objectives of the present invention, the method for manufacturing a silicon carbide semiconductor device of the present invention comprises a semiconductor substrate made of silicon carbide and a surface electrode made of an aluminum alloy containing silicon disposed on the surface of the semiconductor substrate, and has the following characteristics: It includes a deposition step in which the surface electrode made of an aluminum alloy containing silicon is deposited on the surface of the semiconductor substrate made of silicon carbide by sputtering. In the deposition step, the temperature of the semiconductor substrate or the temperature around the formation region of the surface electrode, or both, is set to 430°C or higher and 500°C or lower.

[0031] Furthermore, the method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above invention, during the deposition process, in the portion of the surface electrode that is at least at the junction with the bonding line, the area ratio of the dendritic silicon nodules in the silicon nodules precipitated inside the surface electrode is 10% or more relative to the total area of ​​the silicon nodules at the junction.

[0032] According to the above invention, the silicon junctions in the AlSi electrode (surface electrode) are not pressed against the semiconductor substrate by the bonding wires, thus suppressing the generation of cracks reaching the interior of the semiconductor substrate and / or the peeling of the bonding wires. Furthermore, according to the above invention, by setting the temperature of the semiconductor substrate during AlSi electrode sputtering or the temperature around the formation region of the AlSi electrode to 430°C or higher, the embeddability of the AlSi electrode can be improved.

[0033] Invention Effects

[0034] The silicon carbide semiconductor device and its manufacturing method according to the present invention can improve the yield in silicon carbide semiconductor devices having AiSi electrodes. Attached Figure Description

[0035] Figure 1This is a cross-sectional view showing the layout of the silicon carbide semiconductor device of the embodiment as viewed from the front side of the semiconductor substrate.

[0036] Figure 2 To show Figure 1 A cross-sectional view of the structure at the cutting line A-A'.

[0037] Figure 3 This diagram illustrates the relationship between the temperature of the semiconductor substrate and the crystal structure of the AlSi electrode during sputtering.

[0038] Figure 4 A characteristic graph is shown to illustrate the relationship between the temperature of the semiconductor substrate and the height of the Si junction in the AlSi electrode during sputtering of the AlSi electrode in Experimental Example 1.

[0039] Figure 5 To illustrate schematically, the view from the front side of the semiconductor substrate is shown. Figure 4 The top view of the state obtained from the Si nodules of samples A to D.

[0040] Figure 6 A graph showing the relationship between the temperature of the semiconductor substrate and the area ratio of Si nodules in the AlSi electrode during sputtering of the AlSi electrode in Experimental Example 1.

[0041] Figure 7 A cross-sectional view of the junction of the AlSi electrode and the bonding line in Experimental Example 2 is shown schematically.

[0042] Symbol Explanation

[0043] 1: Semiconductor substrate

[0044] 2: Interlayer insulating film

[0045] 3: Blocking metal

[0046] 4: AlSi electrode

[0047] 4a: Source electrode

[0048] 4b: Gate pad

[0049] 4c: The junction of the AlSi electrode

[0050] 5: Passivation film

[0051] 5a, 5b: Openings of the passivation film

[0052] 6: Silicide film

[0053] 7: Surface Electrode

[0054] 10: Silicon carbide semiconductor devices

[0055] 11: Bond wire

[0056] 11a: Joint of the bond wire

[0057] 12: Solder layer

[0058] 13: Install the substrate

[0059] 21: Active region

[0060] 22: Edge Terminal Area

[0061] t1, t2: Thickness of AlSi electrode Detailed Implementation

[0062] Hereinafter, preferred embodiments of the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device of the present invention will be described in detail with reference to the accompanying drawings. In this specification and the drawings, layers and regions prefixed with n or p respectively indicate that electrons or holes are the majority carriers. Furthermore, the + and - symbols marked with n or p respectively indicate that the impurity concentration is higher and lower than the impurity concentration in layers or regions not marked with + and -. It should be noted that in the following description of the embodiments and the accompanying drawings, the same symbols are used for the same components, and repeated descriptions are omitted.

[0063] (Implementation Method)

[0064] The structure of the silicon carbide semiconductor device according to the embodiment will be described. Figure 1 This is a cross-sectional view showing the layout of the silicon carbide semiconductor device according to an embodiment, viewed from the front side of a semiconductor substrate. Figure 1 The image shows the state of the silicon carbide semiconductor device 10 after installation. Figure 1 In the diagram, the openings 5a and 5b of the passivation film 5 are shown by dashed lines, while the solder layer 12 and the mounting substrate 13 are omitted. Figure 2 To show Figure 1 A cross-sectional view of the structure at the cutting line A-A'. Figure 2 The component structure (the various parts inside the semiconductor substrate 1) of the silicon carbide semiconductor device 10 shown in the figure is omitted.

[0065] Figure 1 , Figure 2 The silicon carbide semiconductor device 10 of the illustrated embodiment has a surface electrode (hereinafter referred to as an AlSi electrode) 4 on the main surface of a semiconductor substrate (semiconductor chip) 1 made of silicon carbide (SiC). The surface electrode material is an aluminum (Al) alloy containing silicon (Si). Figure 1 , Figure 2The diagram shows a vertical semiconductor device with an AlSi electrode 4 on the front side of a semiconductor substrate 1 as a silicon carbide semiconductor device 10. However, as long as at least one AlSi electrode 4 is provided on at least one main surface of the semiconductor substrate 1, other configurations can be modified in various ways.

[0066] The semiconductor substrate 1 can be a bulk substrate cut from a semiconductor ingot (semiconductor single crystal rod) and monolithically formed into a chip shape, or it can be an epitaxial substrate on which an epitaxial layer of a predetermined conductivity type has been grown. The semiconductor substrate 1 has an active region 21 and an edge termination region 22 surrounding the active region 21. The active region 21 is the region where a main current flows when the silicon carbide semiconductor device 10 is turned on. The active region 21 is located, for example, approximately at the center of the semiconductor substrate 1.

[0067] The edge termination region 22 is the area between the active region 21 and the end of the semiconductor substrate 1, and has the function of mitigating the electric field on the front side of the semiconductor substrate 1 to maintain withstand voltage. Withstand voltage refers to the limit voltage that will not cause malfunction and / or damage to the silicon carbide semiconductor device 10. Withstand voltage structures such as field limiting rings (FLRs) and / or junction termination extensions (JTEs) are disposed in the edge termination region 22 (not shown).

[0068] In the active region 21, one or more (two in this case) AlSi electrodes 4 are disposed on the front side of the semiconductor substrate 1. Figure 1 The diagram shows a case where the silicon carbide semiconductor device 10 of the embodiment is configured as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: a MOS-type field effect transistor having an insulated gate composed of a three-layer structure of metal-oxide-semiconductor), and is equipped with an AlSi electrode 4 that functions as a source electrode 4a and an AlSi electrode 4 that functions as a gate pad 4b.

[0069] The configuration of the AlSi electrode 4 will be described later. On the front side of the semiconductor substrate 1, a typical trench gate structure (not shown) is provided as an element structure of the silicon carbide semiconductor device 10. Reference numeral 2 refers to an interlayer insulating film or field insulating film, or a stacked insulating film thereof, selectively disposed on the front side of the semiconductor substrate 1. Here, it is designated as interlayer insulating film 2. A barrier metal 3 may be provided on the surface of the interlayer insulating film 2 and between the front side of the semiconductor substrate 1 exposed at the contact holes of the interlayer insulating film 2 and the AlSi electrode 4.

[0070] The barrier metal 3 prevents the diffusion of metal atoms toward the semiconductor substrate 1 and / or the interaction between adjacent portions sandwiched by the barrier metal 3. The barrier metal 3 suppresses the diffusion of aluminum atoms from the AlSi electrode 4 to the interlayer insulating film 2. The barrier metal 3 is, for example, a titanium (Ti) film or a titanium nitride (TiN) film, or a laminated metal film thereof. A silicide film 6 in ohmic contact with the semiconductor substrate 1 can be provided between the barrier metal 3 (or the AlSi electrode 4 if the barrier metal 3 is not provided) and the semiconductor substrate 1.

[0071] The source electrode 4a is electrically connected to the front side of the semiconductor substrate 1 through a barrier metal 3 and a silicide film 6, or solely through the silicide film 6, thereby connecting with the n exposed on the front side of the semiconductor substrate 1. + Type source pole region and p ++ The contact area is electrically connected. The source electrode 4a covers approximately the entire surface of the active region 21, excluding the area where the gate pad 4b is disposed. The portion of the source electrode 4a exposed at the opening 5a of the passivation film 5 (described later) functions as a source pad (electrode pad).

[0072] The gate pad (electrode pad) 4b is formed simultaneously with, for example, the source electrode 4a, and is disposed separately from the source electrode 4a on the same layer. The gate pad 4b is electrically connected to all gate electrodes (not shown) of the MOSFET via a gate channel (not shown) made of polysilicon (poly-Si). The gate channel is disposed in the edge termination region 22 and surrounds the active region 21. The gate pad 4b is exposed at the opening 5b of the passivation film 5.

[0073] The front side of the semiconductor substrate 1 is covered by a passivation film 5. Different AlSi electrodes 4 (source electrode 4a and gate pad 4b) are exposed at each opening 5a and 5b of the passivation film 5. The openings 5a and 5b of the passivation film 5 have a smaller surface area than the exposed AlSi electrodes 4. Different bonding lines 11 are bonded to the exposed AlSi electrodes 4 at each opening 5a and 5b of the passivation film 5 (the bonding line 11 of the gate pad 4b is not shown).

[0074] One end of the bonding wire 11 is bonded to the AlSi electrode 4, and the other end is bonded to the lead (not shown) of the lead frame (mounting substrate 13 described later). The bonding wire 11 is crimped to the AlSi electrode 4 by conventional wire bonding and is flattened at the junction 11a with the AlSi electrode 4. The AlSi electrode 4 is flattened by the bonding wire 11, and the remaining thickness t2 at the junction 4c with the bonding wire 11 is thinner than the thickness t1 of the rest of the AlSi electrode 4 (thickness during deposition or after patterning (processing)).

[0075] A surface electrode 7, functioning as a drain electrode, is provided across the entire back side of the semiconductor substrate 1. The silicon carbide semiconductor device 10 is mounted onto the front side of the mounting substrate 13 via the surface electrode 7, which is bonded to a die pad on the mounting substrate 13, which serves as a lead frame, via a solder layer 12. The mounting substrate 13 may be, for example, a DCB (Direct Copper Bond) substrate on which circuit patterns composed of conductive plates such as copper (Cu) foil are formed on both sides of a ceramic substrate.

[0076] Between the mounting substrate 13 of the semiconductor substrate 1 to which the bonding wire 11 is attached and the lead (not shown) to which the bonding wire 11 is attached, a thermosetting resin such as epoxy resin is provided to cover the semiconductor substrate 1 and the bonding wire 11. When a resin shell (not shown) is bonded to the periphery of the mounting substrate 13, an encapsulation material such as epoxy resin is filled between the resin shell and the mounting substrate 13 to cover the semiconductor substrate 1 and the bonding wire 11.

[0077] Next, the structure of AlSi electrode 4 will be explained. Figure 3 This diagram illustrates the relationship between the temperature of the semiconductor substrate and the crystal structure of the AlSi electrode during sputtering. The AlSi electrode 4 is deposited on the barrier metal 3 by sputtering at a high temperature, where the temperature of the semiconductor substrate 1 or the temperature around the formation region of the AlSi electrode 4, or both (hereinafter referred to as the temperature of the semiconductor substrate 1 or the temperature around the formation region of the AlSi electrode 4) is set to approximately 430°C or higher and lower than the melting point of the electrode material of the AlSi electrode 4.

[0078] The melting point (freezing point) of the electrode material of AlSi electrode 4 is the temperature of the liquidus point (crystallization point on the liquidus line) of the eutectic reaction based on the composition of the electrode material of AlSi electrode 4, for example, about 530°C. Therefore, by increasing the temperature of the semiconductor substrate 1 or the temperature around the formation region of AlSi electrode 4 during sputtering, the embedding property of AlSi electrode 4 is improved, and since sputtering at, for example, about 500°C or below will not make AlSi electrode 4 too soft (will not allow it to flow), the thickness t1 of AlSi electrode 4 can be maintained.

[0079] The upper limit of the thickness t1 of the AlSi electrode 4 is a thickness based on the stacking accuracy of the sputtering apparatus or the processing capability limit of the dry etching apparatus, for example, about 5 μm. Preferably, the thickness t1 of the AlSi electrode 4 is as thick as possible, and the thicker the AlSi electrode 4 is, the lower the conduction loss. By pressing the bonding wire 11 to the AlSi electrode 4 as described above, the remaining thickness t2 of the AlSi electrode 4 at the junction 4c with the bonding wire 11 is, for example, about 2.1 μm at its thinnest point (refer to...). Figure 7 ).

[0080] The AlSi electrode 4 contains silicon, for example, at a concentration of 0.5 wt% or more and 3 wt% or less relative to aluminum. By including silicon in the AlSi electrode 4, interdiffusion between silicon atoms in the semiconductor substrate 1 and aluminum atoms in the AlSi electrode 4 is suppressed, and the development of alloy spikes is also suppressed. The AlSi electrode 4 may also contain copper (Cu), at a concentration of 0.1 wt% or more and 5 wt% or less relative to aluminum. By including copper in the AlSi electrode 4, the strength of the AlSi electrode 4 is improved. More preferably, the copper content in the AlSi electrode 4 relative to aluminum may be 0.5 wt% or more and 2 wt% or less.

[0081] Furthermore, near the interface between the barrier metal 3 and the AlSi electrode 4, the AlSi electrode 4 contains silicon (Si) nodules substantially uniformly throughout its surface. These Si nodules are silicon precipitates (Si crystals) formed by grain growth using silicon atoms precipitated beyond the solid solution limit of silicon in the AlSi electrode 4 as nuclei. In at least the junction 4c with the bonding line 11, the AlSi electrode 4 contains dendritic Si nodules at an area ratio of at least 10% of the total area of ​​the Si nodules at that junction 4c.

[0082] As long as the AlSi electrode 4 contains dendritic Si nodules at the above-mentioned area ratio, it is possible to mix dendritic Si nodules and Si nodules other than dendritic structures in the AlSi electrode 4. Through in-depth research, the inventors have confirmed that in order to precipitate dendritic Si nodules at the above-mentioned area ratio in the AlSi electrode 4, it is sufficient to set the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 or the temperature around the formation region of the AlSi electrode 4 to 430°C or higher. Figure 3 (Si crystals surrounded by a rectangular frame 30).

[0083] Dendritic Si nodules are silicon (Si) crystals that grow in a dendritic pattern, resembling extending tree branches, in a direction approximately orthogonal to the thickness direction of the AlSi electrode 4 (orthogonal to the surface of the semiconductor substrate 1 and away from the surface of the semiconductor substrate 1). Other Si nodules, besides dendritic ones, are prismatic Si nodules that grow in a prismatic pattern in the thickness direction of the AlSi electrode 4. The area of ​​a Si nodule is the area (surface area) of its planar shape as viewed from the front side of the semiconductor substrate 1.

[0084] For example, when silicon is used as the semiconductor material, if the temperature of the semiconductor substrate during sputtering of the AlSi electrode is set to below 300°C as described above, then almost all the Si junctions in the AlSi electrode become prismatic structures (from...). Figure 3 (The Si crystals are surrounded by a rectangular frame 130). For example, when the temperature of the semiconductor substrate is below 400°C during the sputtering of the AlSi electrode, almost all the Si nodules in the AlSi electrode become prismatic structures. At this time, the height of the prismatic Si nodules reaches a maximum of about 5 μm in the thickness direction of the AlSi electrode 4.

[0085] On the other hand, if the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 or the temperature around the formation region of the AlSi electrode 4 exceeds 400°C, the precipitation morphology of the Si nodules in the AlSi electrode 4 changes from a prismatic structure to a dendritic structure. Moreover, by setting the temperature of the semiconductor substrate 1 during sputtering of the AlSi electrode 4 or the temperature around the formation region of the AlSi electrode 4 to 430°C or higher as in this embodiment, it is possible to precipitate the dendritic Si nodules in the AlSi electrode 4 at the aforementioned area ratio.

[0086] The higher the temperature of the semiconductor substrate 1 or the temperature around the formation region of the AlSi electrode 4 during sputtering, the greater the increase in the number (area ratio) of dendritic Si nodules in the AlSi electrode 4. The greater the increase in the number of dendritic Si nodules, the smaller the number of prismatic Si nodules in the AlSi electrode 4. In the sputtered AlSi electrode 4 (within the AlSi solid solution), the silicon concentration in the dendritic Si nodules is higher than the silicon concentration in the prismatic Si nodules.

[0087] The height of the Si nodules in AlSi electrode 4 (the height of AlSi electrode 4 in the thickness direction) is lower than the remaining thickness t2 of AlSi electrode 4 in both dendritic and prismatic structures, approximately below 2 μm (refer to...). Figures 4-6This is because the dendritic Si nodules only grow to a height of less than 1 μm. In addition, as mentioned above, during sputtering of AlSi electrode 4, the precipitation morphology of the Si nodules changes from a prismatic structure to a dendritic structure, and the prismatic Si nodules will not grow to more than 2 μm.

[0088] Next, the manufacturing method of the silicon carbide semiconductor device 10 according to the embodiment will be described. First, a semiconductor wafer made of silicon carbide is prepared. A predetermined element structure is formed on the front side of the region of the semiconductor wafer that becomes a semiconductor chip (semiconductor substrate 1) after dicing (cutting). For example, in the case where the silicon carbide semiconductor device 10 of the embodiment is an n-channel vertical MOSFET, the predetermined element structure is a p-type base region, n + Type source pole region, p ++ Type contact region, and insulated gate (MOS gate) structure composed of gate insulating film and gate electrode.

[0089] Next, by forming an interlayer insulating film 2 on the front side of the semiconductor wafer and selectively removing the interlayer insulating film 2, contact holes are formed at predetermined locations on the interlayer insulating film 2. Next, a silicide film 6 is formed that makes ohmic contact with the portion of the interlayer insulating film 2 exposed at the contact holes on the front side of the semiconductor wafer. Next, a barrier metal 3 is formed on the surfaces of the interlayer insulating film 2 and the silicide film 6. If the barrier metal 3 is a multilayer metal film, protection can be achieved by covering only the surface of the interlayer insulating film 2 with the metal film beneath the barrier metal 3 before forming the silicide film 6.

[0090] Next, a semiconductor wafer is placed on the stage of a conventional sputtering apparatus (not shown) with its back side facing the stage, and held on the stage by means of, for example, an electric static chuck. Then, by heating the chamber (processing furnace) of the sputtering apparatus or the stage using a heating unit such as a heater, the temperature of the semiconductor wafer or the temperature around the formation region of the AlSi electrode 4 is raised to 430°C or higher, and the AlSi electrode 4 is deposited on the barrier metal 3 by sputtering.

[0091] Next, the semiconductor wafer is removed from the sputtering stage and placed at room temperature (without heating or cooling) to cool down. Thus, the temperature of the semiconductor wafer during sputtering of the AlSi electrode 4, or the temperature around the formation region of the AlSi electrode 4, is set to 430°C or higher, and the semiconductor wafer is cooled to room temperature after sputtering, thereby forming an AlSi electrode 4 containing Si junctions with dendrite structures at the predetermined area ratio.

[0092] In addition, the height of the Si nodules in AlSi electrode 4 is approximately 2 μm or less in both dendritic and prismatic Si nodules. Next, AlSi electrode 4 is etched (patterned) using a conventional dry etching apparatus to leave it at a predetermined location. The AlSi electrode 4 remaining at the predetermined location after this patterning is equivalent to... Figure 1 The source electrode 4a and gate pad 4b are formed. Next, a device structure is formed on the back side of the semiconductor wafer, and a surface electrode 7 is formed on the back side of the semiconductor wafer.

[0093] Next, the semiconductor wafer is diced into individual chips (semiconductor substrate 1) to complete the process. Figure 1 , Figure 2 The silicon carbide semiconductor device 10 is described in this embodiment. Next, the surface electrode 7 of the semiconductor substrate 1 is bonded to the die pad of the mounting substrate 13, which serves as a lead frame, or to the wiring layer that serves as a lead, via a solder layer 12, thereby mounting the silicon carbide semiconductor device 10 onto the front side of the mounting substrate 13. Next, the bonding wire 11 is crimped and bonded to the AlSi electrode 4 of the semiconductor substrate 1 by a conventional wire bonding process.

[0094] At this point, the remaining thickness t2 of the AlSi electrode 4 at the junction 4c with the bonding wire 11 is thinner than the thickness t1 of the rest of the AlSi electrode 4, becoming, for example, about 2.1 μm. However, the bonding wire 11 does not peel off as in conventional methods. This is because, as described above, the AlSi electrode 4 contains dendritic Si nodules at the predetermined area ratio, and the height of the Si nodules in the AlSi electrode 4 is about 2 μm or less. Thus, the semiconductor package with the silicon carbide semiconductor device 10 mounted is completed.

[0095] (Experimental Example 1)

[0096] The relationship between the temperature of the semiconductor substrate 1 and the height of the Si junction during sputtering of AlSi electrode 4 was verified. Figure 4 A characteristic graph is shown to illustrate the relationship between the temperature of the semiconductor substrate and the height of the Si junction in the AlSi electrode during sputtering of the AlSi electrode in Experimental Example 1. Figure 5 To illustrate schematically, the view from the front side of the semiconductor substrate is shown. Figure 4 The top view of the state obtained from the Si nodules of samples A to D. Figure 6 A graph showing the relationship between the temperature of the semiconductor substrate and the area ratio of Si nodules in the AlSi electrode during sputtering of the AlSi electrode in Experimental Example 1.

[0097] Multiple samples (hereinafter referred to as Experimental Example 1) were prepared by sputtering AlSi electrodes to a thickness of 5 μm on a semiconductor substrate (semiconductor chip) made of silicon carbide through various temperature variations of the semiconductor substrate. Multiple samples were fabricated for each temperature of the semiconductor substrate during AlSi electrode sputtering. The AlSi electrodes of all samples were wet-etched to expose Si junctions, and the size and height of the Si junctions (the height of the AlSi electrode in the thickness direction) as observed from the front side of the semiconductor substrate were measured.

[0098] exist Figure 4 This illustrates the relationship between the temperature of the semiconductor substrate and the height of the Si junction in the AlSi electrode during sputtering of the AlSi electrode in Experimental Example 1. Figure 5 (a) to (d) schematically show the state of the Si nodules in the AlSi electrodes of samples A to D, observed from the front side of the semiconductor substrate using a scanning electron microscope (SEM), with the semiconductor substrate temperature during sputtering of the AlSi electrode of Experimental Example 1 set to 200°C, 350°C, 400°C, and 470°C.

[0099] exist Figure 6 The results are shown, obtained by calculating the area ratio of Si nodules in the AlSi electrode of Experimental Example 1. Figure 6 The figure shows the temperature of the semiconductor substrate during AlSi electrode sputtering (deposition), the precipitation morphology of Si nodules (prisms, dendrites), the area ratio and height of prism-structured Si nodules (in... Figure 6 The figures show the prism ratio and prism height, respectively, and the area ratio and height of the Si nodules in the dendritic structure (in...). Figure 6 The figures show the dendrite ratio and dendrite height, as well as the presence or absence of bond line debonding (occurred or not).

[0100] according to Figures 4-6 The results show that when the temperature of the semiconductor substrate is below 400°C during AlSi electrode sputtering, all Si nodules in the AlSi electrode become prismatic structures (composed of...). Figure 4 The portion enclosed by frame 41. Prism ratio 100%, see reference. Figure 5 (a) to (c)). Furthermore, it was confirmed that when the temperature of the semiconductor substrate during AlSi electrode sputtering is above 350°C and below 400°C, the bonding wires bonded to the AlSi electrode peel off. Figure 6 Bond wire stripping "occurred" at this point. It was confirmed that the maximum height of the Si nodules in the prism structure reached 5 μm (refer to...). Figure 5 (b) Figure 5 (c)).

[0101] It was confirmed that if the semiconductor substrate temperature exceeds 400°C during AlSi electrode sputtering, prismatic and dendritic Si nodules are mixed in the AlSi electrode. However, when the semiconductor substrate temperature is below 430°C during AlSi electrode sputtering, the bond lines bonded to the AlSi electrode peel off. It was confirmed that in this case, the area ratio (dendritic ratio) of the dendritic Si nodules in the AlSi electrode is less than 10%, and the height (prism height) of the prismatic Si nodules exceeds 2 μm (refer to...). Figure 6 ).

[0102] It was confirmed that when the semiconductor substrate temperature is below 300°C during AlSi electrode sputtering, all Si junctions in the AlSi electrode are prismatic structures, but the height of the prismatic Si junctions is less than 1 μm (refer to...). Figure 4 , Figure 5 (a), in Figure 6 (Not shown in the figure). It was confirmed that although the bonding wires bonded to the AlSi electrode did not peel off, the AlSi electrode could not be embedded into the contact hole by sputtering when the aspect ratio of the contact hole in the interlayer insulating film was large.

[0103] On the other hand, it was confirmed that when the temperature of the semiconductor substrate during AlSi electrode sputtering is above 430°C (by... Figure 4 The portion surrounded by frame 42, the bonding wires bonded to the AlSi electrode were not stripped. Figure 6 Bond wire stripping "did not occur". It was confirmed that the area ratio (dendritic ratio) and height (dendritic height) of the Si nodules in the dendritic structure in the AlSi electrode at this time were above 10% and below 1 μm, respectively, and the height (prism height) of the Si nodules in the prism structure was at most 2 μm.

[0104] Right now, Figure 6 The AlSi electrode of the sample in which the semiconductor substrate temperature is set to approximately 430°C or higher during sputtering is equivalent to AlSi electrode 4 in this embodiment. Figure 6 In this context, both prismatic structure (prismatic ratio) and dendritic structure (dendritic ratio) represent the ratio of the total area of ​​Si nodules to the area (surface area) of the entire surface of the AlSi electrode, as the area ratio of Si nodules. However, the same result can be obtained when the ratio of the area of ​​Si nodules is set to the area of ​​a portion of the AlSi electrode (e.g., the junction with the bonding wire).

[0105] Furthermore, it was confirmed that by setting the temperature of the semiconductor substrate during AlSi electrode sputtering to 430°C or higher, the AlSi electrode can be embedded into the contact hole even if the aspect ratio of the interlayer insulating film contact hole is large. Therefore, it was confirmed that by setting the temperature of the semiconductor substrate during AlSi electrode sputtering to 430°C or higher, the embedding performance of sputtered AlSi electrodes can be improved, and bond wire peeling can be prevented.

[0106] (Experimental Example 2)

[0107] The remaining thickness t2 at the junction 4c of AlSi electrode 4 and bonding line 11 was verified. Figure 7 A cross-sectional view of the junction of the AlSi electrode and the bonding wire in Experimental Example 2 is shown schematically. A sample (hereinafter referred to as Experimental Example 2) was prepared by depositing an AlSi electrode 4 with a thickness of 5 μm on a semiconductor substrate 1 by sputtering according to the silicon carbide semiconductor device manufacturing method of the above embodiment, and bonding the AlSi electrode 4 with a bonding wire 11 made of aluminum by wire bonding.

[0108] exist Figure 7 The diagram schematically shows the state of the AlSi electrode 4 (shaded area) of the sample, observed using SEM from a direction parallel to the front side of the semiconductor substrate 1, at the junction 4c with the bonding line 11. According to... Figure 7 The results show that the AlSi electrode 4 is flattened by the bonding wire 11, and the remaining thickness t2 at the junction 4c with the bonding wire 11 is thinned at the thinnest part to a thickness of about 2.1 μm, which is about half the thickness t1 of the other parts of the AlSi electrode 4 (thickness during deposition or after patterning (processing)).

[0109] As explained above, according to the embodiment, Si nodules are precipitated in the AlSi electrode, and in the portion of the AlSi electrode that forms at least the junction with the bonding wire, dendritic Si nodules are included at an area ratio of 10% or more relative to the total area of ​​the Si nodules in the portion forming the junction. Thus, the height of the Si nodules in the AlSi electrode is less than 2 μm, which is lower than the thickness of the portion of the AlSi electrode that is flattened and thinned by the bonding wire (the junction of the AlSi electrode with the bonding wire).

[0110] Therefore, the Si junctions in the AlSi electrode are not pressed against the semiconductor substrate by the bonding wires, thus suppressing the formation of cracks reaching the interior of the semiconductor substrate and / or the peeling of the bonding wires. This improves the yield. Furthermore, according to the embodiment, by setting the temperature of the semiconductor substrate during AlSi electrode sputtering or the temperature around the formation region of the AlSi electrode to 430°C or higher, the embedding properties of the AlSi electrode can be improved, thereby increasing the yield.

[0111] The present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

[0112] Industrial availability

[0113] As described above, the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device of the present invention are useful for power semiconductor devices used in power conversion devices and / or power supply devices for various industrial machinery.

Claims

1. A silicon carbide semiconductor device, characterized in that, have: Semiconductor substrate, which is made of silicon carbide; and A surface electrode, disposed on the surface of the semiconductor substrate, is made of an aluminum alloy containing silicon. Silicon nodules are deposited inside the surface electrode. The surface electrode, in the portion that forms at least a junction with the bonding line, contains dendritic silicon nodules at an area ratio of more than 10% relative to the total area of ​​the silicon nodules at the junction.

2. The silicon carbide semiconductor device according to claim 1, characterized in that, The height of the silicon nodules inside the surface electrode is lower than the thickness of the surface electrode.

3. The silicon carbide semiconductor device according to claim 2, characterized in that, The height of the silicon junction inside the surface electrode is lower than the thickness of the junction portion of the surface electrode, which is relatively thinned due to the bonding wires.

4. The silicon carbide semiconductor device according to any one of claims 1 to 3, characterized in that, The height of the silicon nodules inside the surface electrode is less than 2 μm.

5. The silicon carbide semiconductor device according to claim 4, characterized in that, The height of the silicon nodules in the dendritic structure inside the surface electrode is less than 1 μm.

6. The silicon carbide semiconductor device according to any one of claims 1 to 3, characterized in that, The surface electrode contains silicon at a concentration of 0.5 wt% to 3 wt% relative to aluminum.

7. The silicon carbide semiconductor device according to any one of claims 1 to 3, characterized in that, The silicon carbide semiconductor device further includes a barrier metal disposed between the semiconductor substrate and the surface electrode, which prevents impurity atoms from diffusing from the semiconductor substrate side to the surface electrode or from the surface electrode side to the semiconductor substrate, or both.

8. The silicon carbide semiconductor device according to any one of claims 1 to 3, characterized in that, The silicon carbide semiconductor device further includes a silicide film disposed between the semiconductor substrate and the surface electrode, and in ohmic contact with the semiconductor substrate.

9. A method for manufacturing a silicon carbide semiconductor device, characterized in that, The silicon carbide semiconductor device includes a semiconductor substrate made of silicon carbide and a surface electrode disposed on the surface of the semiconductor substrate and made of an aluminum alloy containing silicon. The method for manufacturing the silicon carbide semiconductor device includes a deposition step, wherein the deposition step involves sputtering a surface electrode made of an aluminum alloy containing silicon onto the surface of the semiconductor substrate made of silicon carbide. In the deposition process, the temperature of the semiconductor substrate or the temperature around the formation area of ​​the surface electrode, or both, is set to 430°C or higher and 500°C or lower. In the deposition process, in the portion of the surface electrode that is at least at the junction with the bonding line, the area ratio of the dendritic silicon nodules in the silicon nodules precipitated inside the surface electrode is 10% or more relative to the total area of ​​the silicon nodules at the junction.

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