Electronic device including monitoring circuit of ramp signal and operating method thereof

Abstract

An electronic device includes a slope generator configured to generate a slope signal for detecting data, the slope signal increasing or decreasing at a certain slope, a main circuit configured to perform at least one predefined function by detecting the data based on the slope signal, a monitoring circuit configured to output a verification signal indicating whether the slope signal is faulty, and a controller configured to control performance of the at least one predefined function based on the verification signal.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0025967, filed on February 25, 2021, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The exemplary embodiments of the present invention relate to an electronic device, and more specifically, to an electronic device including a monitoring circuit for a ramp signal and a method of operating the same. Background Technology

[0004] A ramp signal increases or decreases with a specific slope. Sensors can use ramp signals to acquire sensed signals from an object. For example, an image sensor can convert an electrical signal generated by a photosensitive element into a digital value by sampling the electrical signal based on the ramp signal.

[0005] Monitoring circuits can be used to detect abnormal operation of electronic components. For example, when an electronic component in a car malfunctions, it can pose a serious safety hazard to the user. Therefore, monitoring circuits can be used to detect abnormal operation of electronic components. Summary of the Invention

[0006] An exemplary embodiment of the present invention provides a monitoring circuit and its operation method for providing fault information to the system by detecting faults in functional units.

[0007] According to one aspect of the present invention, an electronic device is provided, comprising: a ramp generator configured to generate a ramp signal for detecting data, the ramp signal increasing or decreasing at a certain slope; a main circuit configured to perform at least one predefined function by detecting data based on the ramp signal; a monitoring circuit configured to output a verification signal indicating whether the ramp signal is faulty; and a controller configured to control the execution of at least one predefined function based on the verification signal.

[0008] According to one aspect of the present invention, an image sensor is provided, comprising: a pixel array including a plurality of pixels; a ramp generator configured to generate a ramp signal; a readout circuit configured to compare the ramp signal with pixel signals output from the pixel array and convert the pixel signals into digital pixel values; a controller configured to control the ramp generator and the readout circuit; and a monitoring circuit configured to measure the slope of the ramp signal and output whether the ramp generator is faulty to the controller.

[0009] According to one aspect of the present invention, an operating method for an electronic device is provided. The operating method includes: receiving a ramp signal; calculating the slope of the ramp signal; comparing the slope with at least one reference value; determining whether the ramp signal is faulty based on the comparison result; and stopping an operating mode based on the ramp signal when the ramp signal is faulty. Attached Figure Description

[0010] Exemplary embodiments of the present invention will be more clearly understood through the following detailed description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 This is a block diagram of an electronic device according to an example embodiment;

[0012] Figure 2 This is a block diagram of the monitoring circuit according to an example embodiment;

[0013] Figure 3 This is a detailed circuit diagram of the monitoring circuit according to an example embodiment;

[0014] Figures 4A to 4C This is a circuit diagram of an example ramp generator according to an example embodiment;

[0015] Figure 5 This is a circuit diagram of the discriminator according to an example embodiment;

[0016] Figure 6 This is a timing diagram illustrating the operation of an electronic device according to an example embodiment;

[0017] Figure 7 This is a timing diagram illustrating the operation of an electronic device according to an example embodiment;

[0018] Figures 8A to 8C This is a timing diagram illustrating the operation of an electronic device according to an example embodiment;

[0019] Figure 9 This is a block diagram of an imaging device according to an example embodiment;

[0020] Figure 10 This is a block diagram of an image sensor according to an example embodiment;

[0021] Figure 11 This is a block diagram of an electronic device including a multi-camera module using an image sensor, according to an example embodiment;

[0022] Figure 12 According to the example embodiment Figure 11 Detailed block diagram of the multi-camera module in the diagram;

[0023] Figure 13 This is a flowchart of an operation method of an electronic device according to an example embodiment;

[0024] Figure 14 This is a flowchart of an operation method of an electronic device according to an example embodiment;

[0025] Figure 15 This is a flowchart of the operation method of the monitoring circuit according to the example embodiment;

[0026] Figure 16 According to the example embodiment Figure 15 Detailed flowcharts of operations S35 and S37 in the process;

[0027] Figure 17 This is a block diagram of an electronic device according to an example embodiment;

[0028] Figure 18 This is a block diagram of an electronic device according to an example embodiment; and

[0029] Figure 19 This is a block diagram of a vehicle using ramp signals according to an example embodiment. Detailed Implementation

[0030] Embodiments of the inventive concept will now be described more fully with reference to the accompanying drawings. In the drawings, similar reference numerals may refer to similar elements.

[0031] It should be understood that the terms “first,” “second,” “third,” etc., are used herein to distinguish one element from another, and these elements are not limited by these terms. Therefore, in another example embodiment, the “first” element in the example embodiment may be described as the “second” element.

[0032] As used in this article, the singular forms “a,” “one,” and “the” also include the plural forms, unless the context clearly indicates otherwise.

[0033] Here, when two or more elements or values ​​are described as substantially the same or approximately equal to each other, it should be understood that the elements or values ​​are the same, equal to each other within measurement error, or, if the measurements are not equal, sufficiently close in value to each other as understood by one of ordinary skill in the art, functionally equal to each other. For example, the term “approximately” as used herein includes a specified value of a particular value and an average value within an acceptable range of deviations, determined by one of ordinary skill in the art considering the measurement in question and the errors associated with the measurement of the particular quantity (e.g., limitations of the measurement system). For example, “approximately” may refer to a range of one or more standard deviations as understood by one of ordinary skill in the art. Furthermore, it should be understood that while a parameter may be described herein as having a “approximately” specific value, according to the example embodiments, the parameter may be an exact specific value or an approximate specific value within measurement error, as understood by one of ordinary skill in the art. Other uses of these terms and similar terms to describe relationships between components should be interpreted in a similar form below.

[0034] Figure 1 This is a block diagram of an electronic device 10 according to an example embodiment. Electronic device 10 can refer to any device configured to perform a intended function using electrical energy, and can refer to an electrical system. For example, electronic device 10 may include a semiconductor chip manufactured by semiconductor processes, including a module of at least one semiconductor chip mounted on a board and a substrate, or at least two modules communicating with each other. Electronic device 10 may correspond to a stand-alone unit such as a mobile phone, or a component of an entire system such as a car. Figure 1 As shown, the electronic device 10 may include, for example, a controller 11, a ramp generator 13, a monitoring circuit 15, and a main circuit 17.

[0035] The controller 11 can control the general operation of the electronic device 10. For example, the controller 11 can output control signals to control the functional units of the electronic device 10, so that the functions designed for the electronic device 10 can be provided.

[0036] According to the example embodiment, the controller 11 can control the ramp generator 13. For example, the controller 11 can provide a control signal CTR to the ramp generator 13 to control the amplitude, duty cycle, application time, etc. of the signal generated by the ramp generator 13, so that the ramp signal RMP used by the electronic device 10 is suitable for the design purpose of each functional unit.

[0037] According to an example embodiment, the control signal CTR generated by the controller 11 may include a power signal, a preset signal, a reset signal, a monitoring signal, and / or a power-off signal. (Refer to...) Figure 3 and 6 This section describes the power signal PWR, preset signal PRST, reset signal RST, monitoring signal MNT, and power-off signal PD.

[0038] The controller 11 may include, for example, a central processing unit (CPU), an arithmetic logic unit (ALU) that performs arithmetic and logical operations, bit shifting, etc., a digital signal processor (DSP), a microprocessor, an application-specific integrated circuit (ASIC), control logic, etc. In some embodiments, the controller 11 may include a state machine containing multiple logic gates, or may include a processor and a memory storing instructions executed by the processor.

[0039] The ramp generator 13 can generate a ramp signal RMP that gradually increases or decreases with a specific slope. According to an example embodiment, the ramp generator 13 can generate a ramp signal RMP that responds to a control signal CTR with a specific slope, a specific ramp time, a specific ramp start voltage level, and / or a specific ramp end voltage level. The ramp generator 13 can have a complex structure, such as, for example, a digital-to-analog converter, or a more simplified structure, such as those referenced below. Figure 4A and 4B The structure described is used to generate the ramp signal RMP.

[0040] The ramp signal RMP gradually increases or decreases at a certain amplitude. An electronic device 10 that can provide the function of sensing an object or digitizing an analog signal can generate the ramp signal RMP, so that the signal or data of the sensing object can be sampled, and the sampled signal or analog data can be converted into digital information.

[0041] The ramp signal RMP may include a reset ramp period for resetting and a signal ramp period for signal sensing. For example, when the ramp signal RMP is used for correlated double sampling (CDS), the ramp signal RMP may have a reset ramp period and a signal ramp period in sequence.

[0042] A single ramp segment of the ramp signal RMP, or a sequence of a reset ramp segment and a signal ramp segment of the ramp signal RMP, can be processed as a single unit. According to an example embodiment, when the ramp signal RMP is used with a CDS, a ramp signal RMP with a single ramp segment or a ramp signal RMP sequentially having a reset ramp segment and a signal ramp segment can be used for sampling a single image frame. Sampling of the image frame can be performed line by line. For example, the electronic device 10 can use a ramp segment to sample the first line of the image frame, and then use another ramp segment to sample the second line of the image frame. Sampling of the image frame can be performed line by line from top to bottom, but is not limited to this.

[0043] The main circuit 17 can provide at least one function of the electronic device 10 or the main function of the electronic device 10. The main circuit 17 can output the function of the electronic device 10 to the outside of the electronic device 10 as an output signal OUT. For example, the main circuit 17 may include analog circuits, such as analog filters or amplifiers, digital circuits for processing digital signals, or circuits for processing mixed signals, such as analog-to-digital converters or digital-to-analog converters.

[0044] According to an example embodiment, the main circuit 17 can perform predefined functions by detecting data based on the ramp signal RMP. For example, the main circuit 17 may include a CDS circuit that performs CDS on the data based on the ramp signal RMP, or an analog-to-digital converter circuit that includes CDS functionality. Furthermore, the main circuit 17 can provide various functions using the ramp signal RMP, which gradually increases or decreases at a certain slope. According to an example embodiment, the main circuit 17 may have a tolerance range or a normal operating range (wherein the main circuit 17 operates normally even when the slope of the ramp signal RMP changes). The tolerance range may vary depending on the functionality of the main circuit 17.

[0045] Hereinafter, the main circuit 17 can be described as a circuit that provides the main functions of the electronic device 10 based on the ramp signal RMP generated by the ramp generator 13, but the embodiments are not limited thereto.

[0046] For example, due to defects occurring during the manufacturing process of electronic device 10, degradation due to aging of another functional unit such as the ramp signal RMP that provides signals to main circuit 17, or external shocks to electronic device 10, main circuit 17 may fail to perform its designed functions properly. When the signals provided to main circuit 17 (e.g., the ramp signal RMP) are abnormal, errors may occur in electronic device 10 and in the system including electronic device 10. For example, when electronic device 10 is included in a car and performs necessary driving functions (e.g., autonomous driving), errors in electronic device 10 can cause serious problems.

[0047] To manage functional errors in the main circuit 17 (or electronic device 10), international standards can be defined, and electronic device 10 can be designed to conform to international standards. For example, ISO 26262 is defined by the International Organization for Standardization (ISO) and can be named "Road vehicles - Functional safety".

[0048] ISO 26262 may specify various requirements for the general development process of the functional safety of electrical and / or electronic (E / E) systems installed in automobiles. For example, ISO 26262 may require E / E systems to meet the requirements of the Automotive Safety Integrity Level (ASIL). According to ASIL, hazardous events related to automobiles are assessed based on three hazardous effects, such as exposure, severity of injury, and controllability. ASIL is assessed by summing the scores assigned to each hazardous effect. In other words, to meet the ISO 26262 ASIL requirements, in the example embodiment, a monitoring circuit 15 that constantly monitors the main circuit 17 can be used.

[0049] Monitoring circuit 15 can monitor whether the signals supplied to main circuit 17 are normal. For example, Figure 1 As shown, the monitoring circuit 15 can monitor whether the ramp signal RMP output from the ramp generator 13 is operating within the normal range, and can generate a verification signal VFY as the monitoring result. For example, when the ramp signal RMP is not operating normally, the monitoring circuit 15 can generate a fault indication flag as the verification signal VFY. For example, when the ramp signal RMP is operating normally, the monitoring circuit 15 can generate a normal operation indication flag as the verification signal VFY.

[0050] The controller 11 can check the flag of the verification signal VFY and stop the operation mode based on the signal provided to the main circuit 17 because the signal provided to the main circuit 17 is faulty. According to an example embodiment, when the controller 11 receives a fault flag as the verification signal VFY, the controller 11 can identify that the ramp signal RMP is not operating within the normal range. Therefore, the controller 11 can stop the operation mode of the main circuit 17 based on the ramp signal RMP. For example, the electronic device 10 can provide an autonomous driving function, and the main circuit 17 can correspond to an image sensor that performs CDS based on the ramp signal RMP, or the readout circuit of the image sensor. The controller 11 can receive the verification signal VFY indicating that the ramp signal RMP is out of the normal range, thereby switching the autonomous driving mode to a manual driving mode, and accordingly ensuring the safety of the user of the electronic device 10.

[0051] In some embodiments, with Figure 1 Unlike the previous illustration, the verification signal VFY can be provided to the outside of the electronic device 10 rather than inside the electronic device 10. Therefore, when the electronic device 10 malfunctions, appropriate follow-up measures can be taken based on the verification signal VFY.

[0052] According to an example embodiment, monitoring circuit 15 may include a differential circuit. For example, monitoring circuit 15 can immediately monitor whether the ramp signal RMP is being provided to main circuit 17 within a normal range by performing time differential on the ramp signal RMP, wherein the ramp signal RMP gradually increases or decreases with a specific slope. (See reference...) Figure 2 and Figure 3 The implementation of the monitoring circuit 15, including the differential, is described below.

[0053] As described above, when electronic device 10 is applied to a vehicle and various signals are not provided within the normal range for the proper functioning of electronic device 10, serious safety issues may arise due to the characteristics of the vehicle. Therefore, it may be important to immediately detect abnormal operation of electronic components. According to an example embodiment, monitoring circuit 15 can accurately monitor another functional unit (e.g., ramp generator 13) that provides the functionality of electronic device 10, and accordingly, can increase the reliability of electronic device 10. According to an example embodiment, monitoring circuit 15 can immediately detect faults occurring in electronic device 10 and stop using the operating mode of the faulty functional unit, and therefore, can improve the safety of system users.

[0054] Figure 2 This is a block diagram of the monitoring circuit 100 according to an example embodiment. Redundant descriptions will be omitted below.

[0055] refer to Figure 2 and Figure 1 The monitoring circuit 100 may include a differential 110, a reference generator 130, an upper limit comparator 150, a lower limit comparator 170, and a discriminator 190.

[0056] Differential 110 can perform a differential operation on the ramp signal RMP based on the ramp signal RMP and the differential reference value REF_D, and generate a differential output DO as the result of the differential operation.

[0057] According to an example embodiment, differential converter 110 can differentially divide a ramp signal RMP based on time. For example, differential converter 110 can perform differential operation on the ramp signal RMP with respect to time, where RMP is a voltage (or current) signal that gradually increases or decreases with a specific slope. Differential converter 110 can generate a differential output DO by differentially dividing the ramp signal RMP, which has a downward or upward ramp with a specific slope, and the differential output DO includes the ramp value of the ramp signal RMP. The differential output DO can be provided to upper limit comparator 150 and lower limit comparator 170.

[0058] According to the example embodiment, reference generator 130 can provide differential reference value REF_D for differential operation to differential unit 110. For example, differential unit 110 can be implemented as an operational amplifier. In this case, differential unit 110 can receive the target signal to be differential (e.g., ramp signal RMP) and the reference value for differential operation through two input terminals. Although it has been described that differential unit 110 is implemented as an operational amplifier for ease of description, the example embodiment is not limited thereto, and differential unit 110 can provide functionality similar to any of various analog circuits, digital circuits, and combinations thereof.

[0059] In addition to the differential reference value REF_D, reference generator 130 can also generate an upper reference value REF_U and a lower reference value REF_L. According to an example embodiment, reference generator 130 can be based on data from... Figure 1 The control signal generated by the controller 11 in the middle is used for driving Figure 1 Various reference signals for the electronic device 10. For example, the reference generator 130 can generate voltage (or current) signals with specific amplitudes and clock signals that are toggled at specific intervals.

[0060] The upper reference value REF_U and the lower reference value REF_L can be predetermined. According to an example embodiment, the upper reference value REF_U and the lower reference value REF_L can be preset during the manufacture of the electronic device 10, or predefined by the user, or can be specific values ​​predetermined by referencing registers stored in memory. The reference generator 130 can generate reference signals corresponding to the upper reference value REF_U and the lower reference value REF_L. In other words, the reference generator 130 can generate reference signals with amplitudes substantially close to the upper reference value REF_U or the lower reference value REF_L, and provide the reference signals to other functional units (e.g., the upper limit comparator 150 and the lower limit comparator 170).

[0061] The upper limit comparator 150 compares the differential output DO with the upper reference value REF_U and generates a first comparison output CO1 as the comparison result. The lower limit comparator 170 compares the differential output DO with the lower reference value REF_L and generates a second comparison output CO2 as the comparison result. The first comparison output CO1 and the second comparison output CO2 can be provided to the discriminator 190.

[0062] According to the example embodiment, each of the upper limit comparator 150 and the lower limit comparator 170 can be implemented as an operational amplifier and can compare two signals provided through two input terminals. For example, the upper limit comparator 150 can subtract the amplitude of the differential output DO from the upper reference value REF_U and output the subtraction result as a first comparison output CO1, and the lower limit comparator 170 can subtract the lower limit reference value REF_L from the amplitude of the differential output DO. However, the embodiment is not limited to the above arithmetic operations.

[0063] Figure 1 The main circuit 17 or electronic components of the electronic device 10 may have tolerance ranges (or normal operating ranges) in which the main circuit 17 operates normally even when the slope of the ramp signal RMP changes. The tolerance ranges may vary depending on the functionality provided by the electronic components or the main circuit 17. For example, regarding the ramp signal RMP used by the main circuit 17, a recommended slope for optimal operation and a tolerance range for allowing the main circuit 17 to function normally even when the slope of the ramp signal RMP partially changes can be predetermined.

[0064] According to the example embodiment, the upper reference value REF_U may correspond to the upper limit of the tolerance range for the slope variation of the ramp signal RMP for the electronic component, and the lower reference value REF_L may correspond to the lower limit of the tolerance range for the slope variation of the ramp signal RMP for the electronic component. For example, in the example embodiment, the upper reference value REF_U may be substantially equal to twice the recommended slope of the ramp signal RMP, and the lower reference value REF_L may be substantially equal to half the recommended slope of the ramp signal RMP. However, these approximations (twice and half) are specified for ease of description, and the example embodiment is not limited to these approximations. For example, in the example embodiment, the upper reference value REF_U may be 1.5 times or 3 times the recommended slope for correct operation of the main circuit 17. The recommended slope of the ramp signal RMP may also be referred to herein as the normal slope of the ramp signal RMP.

[0065] Discriminator 190 can determine whether the ramp signal RMP is faulty based on a first comparison output CO1 and a second comparison output CO2 provided from the upper limit comparator 150 and the lower limit comparator 170, respectively. Here, the terms "discriminate" and "determine" are used interchangeably. According to an example embodiment, discriminator 190 can determine whether the ramp signal RMP exceeds the upper reference value REF_U based on the signal level of the first comparison output CO1, and determine whether the ramp signal RMP is below the lower reference value REF_L based on the signal level of the second comparison output CO2. For example, assuming the first comparison output CO1 is the result of subtracting the magnitude of the differential output DO from the upper reference value REF_U as described above, discriminator 190 can distinguish between normal operation within the normal range when the value of the first comparison output CO1 is negative (where the slope of the ramp signal RMP does not exceed the upper reference value REF_U) and faulty operation when the value of the first comparison output CO1 is negative (where the slope of the ramp signal RMP exceeds the upper reference value REF_U). Similarly, assuming the second comparison output CO2 is the result of subtracting the lower reference value REF_L from the amplitude of the differential output DO as described above, the discriminator 190 can distinguish between normal operation within the normal range when the value of the second comparison output CO2 is negative (where the slope of the ramp signal RMP is not lower than the lower reference value REF_L) and fault operation when the value of the second comparison output CO2 is positive (where the slope of the ramp signal RMP is lower than the lower reference value REF_L). Figure 3 and 5 Describe discriminator 190 in detail.

[0066] The discriminator 190 can generate a verification signal VFY as a result of distinguishing between normal operation and faulty operation. According to an example embodiment, the verification signal VFY can indicate the fault or normality of the ramp signal RMP. For example, when the ramp signal RMP is faulty, the verification signal VFY can include a fault flag, and when the ramp signal RMP is normal, the verification signal VFY can include a normal flag. According to an example embodiment, the verification signal VFY can be provided to the controller of the management electronics 10 (e.g., Figure 1 The controller 11 in the system enables the function of the electronic device 10 based on the ramp signal RMP to be maintained or stopped. For example, a verification signal VFY including a fault indicator can be provided to the electronic control unit (ECU), CPU, or drive controller of the autonomous vehicle to stop the vehicle's autonomous driving mode.

[0067] Figure 3 This is a detailed circuit diagram of the monitoring circuit 200 according to an example embodiment.

[0068] refer to Figure 3 and Figure 2The monitoring circuit 200 may include a differential circuit 210, a reference generator 230, an upper limit comparator 250, a lower limit comparator 270, and a discriminator 290. For ease of explanation, the reference generator will be omitted below. Figure 1 and 2 The given redundant description.

[0069] When the differential amplifier 210 is implemented by a combination of operational amplifiers, the differential amplifier 210 may include an amplifier AMP and a resistor R. D and capacitor C D The amplifier AMP can receive input signals through its positive and negative input terminals and can supply a power signal PWR to the body of the amplifier AMP. When the power signal PWR is turned on (e.g., when it transitions to logic high), the amplifier AMP begins to operate.

[0070] Capacitor C D and resistor R D It can be coupled to the negative input terminal of the amplifier AMP. According to an example embodiment, as... Figure 2 The ramp voltage V of the ramp signal RMP in the middle RAMP It can be applied to capacitor C D At the other end, and the output terminal of the amplifier AMP can be coupled to resistor R. D The other end.

[0071] The zeroth reference voltage V generated by reference generator 230 REF0 It can be applied to the positive input terminal of the amplifier AMP. Zero-th reference voltage V REF0 It can have with Figure 2 The voltage signal corresponding to the specific voltage level of the differential reference value REF_D in the data.

[0072] According to an example embodiment, a switch that is closed and opened by a preset signal PRST can be connected between the positive and negative input terminals of the amplifier AMP. For example, refer to... Figure 3 As an example of a switch, the source and drain terminals of the transistor TR can be connected to the positive and negative input terminals of the amplifier AMP, respectively, and a preset signal PRST can be applied to the gate terminal of the transistor TR.

[0073] When the preset signal PRST turns on the switch (e.g., transistor TR), the positive and negative input terminals of the amplifier AMP may be short-circuited, and the voltage applied to the amplifier AMP may be the same between the positive and negative input terminals. According to an example embodiment, the amplifier AMP, which can be implemented as an operational amplifier, can amplify the difference between the voltage applied through the positive input terminal and the voltage applied through the negative input terminal by gain amplifying the difference. When substantially the same voltage is applied to the positive and negative input terminals of the amplifier AMP, respectively, the transconductance of the amplifier AMP may be relatively very high, and correspondingly, this relates to the ramp voltage V. RAMP The transient state of the applied signal may stabilize relatively quickly. The rapid stabilization of the differential 210 upon the activation of the preset signal PRST can be termed the preset operation. The period during which the preset signal PRST is activated can be termed the preset time period. (Refer to...) Figure 6 Please describe the preset time period in detail.

[0074] Differential converter 210 can control the ramp voltage V RAMP The ramp voltage V received through the input terminal is calculated by differentiating the time. RAMP The slope is determined, and a differential output voltage V with a voltage level corresponding to the slope is generated. DO Differential output voltage V DO It can be provided to the upper limit comparator 250 and the lower limit comparator 270.

[0075] Reference generator 230 can generate the zeroth reference voltage V REF0 First reference voltage V REF1 Second reference voltage V REF2 According to the example embodiment, as described above, a zero reference voltage V can be provided to the amplifier AMP. REF0 It can provide a first reference voltage V to the upper limit comparator 250. REF1 It can also provide a second reference voltage V to the lower limit comparator 270. REF2 The power signal PWR can be provided to the reference generator 230 through one terminal of the reference generator 230.

[0076] Each of the upper limit comparator 250 and the lower limit comparator 270 can receive a differential output voltage V through its input terminal. DO It receives the first reference voltage V through another input terminal. REF1 Or the second reference voltage V REF2 For example, the upper limit comparator 250 can receive a first reference voltage V through its positive input terminal. REF1 It receives the differential output voltage V through its negative input terminal. DO The upper limit comparator 250 can be used for the first reference voltage V.REF1 and differential output voltage V DO Perform the subtraction and generate the first comparison output voltage V. CO1 As a result of subtraction, similarly, the lower limit comparator 270 can receive the second reference voltage V through its positive input terminal. REF2 It receives the differential output voltage V through its negative input terminal. DO The lower limit comparator 270 can measure the differential output voltage V. DO Second reference voltage V REF2 Perform the subtraction and generate the second comparison output voltage V. CO2 As a result of the subtraction, a power signal PWR can be provided to the body of each of the upper limit comparator 250 and the lower limit comparator 270. With the power signal PWR turned on (e.g., switched to logic high), the upper limit comparator 250 and the lower limit comparator 270 can begin operation.

[0077] When the power signal PWR is turned on (e.g., transitioning to logic high), the discriminator 290 can also begin operation. A reset signal RST can be applied to the discriminator 290 through its terminals. When the reset signal RST is turned on, the first comparison output voltage V can be... CO1 Second comparison output voltage V CO2 Execute the judgment.

[0078] The discriminator 290 can receive the first comparison output voltage V CO1 Second comparison output voltage V CO2 And determine the ramp voltage V RAMP Is there a fault? According to an example embodiment, the discriminator 290 can identify the first comparison output voltage V. CO1 Determine the ramp voltage V when it is greater than the reference value. RAMP Normal, and the first comparison output voltage V is marked. CO1 Determine the ramp voltage V when it is less than the reference value. RAMP Fault. Similarly, the discriminator 290 can identify the second comparison output voltage V. CO2 Determine the ramp voltage V when it is greater than the reference value. RAMP Normal, and the second comparison output voltage V is marked. CO2 Determine the ramp voltage V when it is less than the reference value. RAMP Fault. For example, the reference value can be 0, but it can vary depending on the usage environment, conditions, user settings, initial values, etc. of the electronic device 10.

[0079] The monitoring signal MNT can be applied to the discriminator 290 through its terminal. During the on-time of the monitoring signal MNT, the discriminator 290 can determine the output voltage V based on the first comparison output voltage. CO1 and / or the second comparison output voltage V CO2Output determines the ramp voltage V RAMP The result. For example, during the on-time period of the monitoring signal MNT, the discriminator 290 can determine the ramp voltage V. RAMP Whether it is normal or not, and generate and output a verification signal VFY as a confirmation result. The on-time period of the monitoring signal MNT can be called the monitoring period. (Refer to...) Figure 6 Please describe the monitoring period in detail.

[0080] According to an example embodiment, during monitoring, when the first comparison output voltage V CO1 Or the second comparison output voltage V CO2 When the value is less than the reference value, the discriminator 290 can determine the ramp voltage V. RAMP A fault is detected, and a verification signal VFY, including a fault flag, is generated. According to an example embodiment, when the first comparison output voltage V... CO1 Second comparison output voltage V CO2 When both are greater than the reference value, the discriminator 290 can determine the ramp voltage V. RAMP It is normal, and a verification signal VFY including the normal flag is generated.

[0081] Figures 4A to 4C This is a circuit diagram of an example ramp generator 13 according to an exemplary embodiment. Specifically, Figure 4A This shows the generation of a gradually increasing ramp voltage V. RAMP The ramp generator 13a, Figure 4B This shows the generation of a gradually decreasing ramp voltage V. RAMP The ramp generator 13b. Figure 4C This illustrates the generation of a gradually increasing or decreasing ramp voltage V. RAMP The ramp generator 13c. (Each...) Figure 4A , 4B The ramp generators 13a, 13b, and 13c of 4C can be Figure 1 The example implementation of ramp generator 13 is shown below. For ease of explanation, its redundant description is omitted below.

[0082] refer to Figure 4A The ramp generator 13a may include a current source CSa, a switch SWa, and a capacitor Ca. The current source CSa can be drawn from the positive power supply voltage V. DDA constant current is supplied to the first node N1a. Switch SWA and capacitor Ca can be connected in parallel between the first node N1a and the ground node. In some embodiments, switch SWA can be turned on or off according to a control signal CTRA, and may include a transistor controlled by the control signal CTRA. For example, switch SWA can be turned off in response to an activated control signal CTRA and turned on in response to a deactivated control signal CTRA. Therefore, in normal mode, the current supplied by the current source CSa can flow through switch SWA to the ground node, and the voltage of the first node N1a (e.g., the ramp voltage V) is constant. RAMP The potential can be approximately the same as the ground potential. The current supplied by the current source CSa can be supplied to the capacitor Ca, causing the capacitor Ca to be charged, and correspondingly, the ramp voltage V... RAMP The voltage can be gradually increased from ground potential. In test mode, the ramp voltage V... RAMP The slope may depend on the current supplied by the current source CSa and the capacitance of the capacitor Ca.

[0083] refer to Figure 4B The ramp generator 13b may include a current source CSb, a switch SWb, and a capacitor Cb. The current source CSb and capacitor Cb may be connected in parallel between the first node N1b and the ground node. The current source CSb may drain a constant current from the first node N1b to the ground node. The switch SWb may selectively switch the positive supply voltage V according to the control signal CTRb. DD The current is applied to the first node N1b. For example, switch SWb can be turned off in response to the activated control signal CTRb and turned on in response to the deactivated control signal CTRb. Therefore, in normal mode, current source CSb can draw current from the positive supply voltage V. DD Leakage current, and the voltage at the first node N1b (e.g., the ramp voltage V). RAMP It can be connected to a positive power supply voltage V. DD The relationships are largely the same. The current source CSb can draw leakage current from capacitor Cb. When capacitor Cb discharges, the ramp voltage V... RAMP It can be obtained from the positive power supply voltage V DD Gradually decrease. In test mode, the ramp voltage V... RAMP The slope may depend on the leakage current of the current source CSb and the capacitance of the capacitor Cb. The following assumes... Figure 4A Similar to the ramp generator 13a, the ramp generator generates a gradually increasing ramp voltage V. RAMP However, the embodiments are not limited to this, and the example embodiments can also be similarly applied to gradually decreasing ramp voltage V. RAMP .

[0084] Figure 4CThe ramp generator 13c may include a current source CSc, a switch SWc, and a resistor Rc. The current source CSc can draw voltage from the positive supply voltage V. DD A constant current is provided to either the first node N1c or the second node N2c. In some embodiments, the ramp generator 13c may include a transistor controlled by a control signal CTRc, and the transistor may be turned on or off by the control signal CTRc. The switch SWc may be coupled to a resistor Rc via the first node N1c, or directly connected to ground (e.g., a ground node) via the first node N1c, depending on the control signal CTRc. For example, the switch SWc may be connected to the resistor Rc in response to an activated control signal CTRc, and directly connected to ground in response to a deactivated control signal CTRc. The activated and deactivated control signals CTRc may be connected to components opposite each other, respectively.

[0085] The ramp generator 13c may include multiple current sources CSc and multiple switches SWc. In an example embodiment, when the switches SWc are sequentially activated, the current sources CSc may be connected to the resistor Rc, and the ramp generator 13c may generate a gradually increasing ramp voltage V. RAMP In the example embodiment, when switch SWc is sequentially deactivated, current source CSc can be connected to a ground node (e.g., ground), and ramp generator 13c can generate a gradually decreasing ramp voltage V. RAMP For example, in the case where the ramp generator 13c includes N current sources CSc and N switches SWc, when all N switches SWc are connected to the second node N2c, the ramp generator 13c can output a ramp voltage V of 0 volts (V). RAMP When one switch SWc is connected to the first node N1c and (N-1) switches SWc are connected to the second node N2c, the ramp generator 13c can output a ramp voltage V at the first level. RAMP Furthermore, when all N switches SWc are connected to the first node N1c, the ramp generator 13c can output a ramp voltage V at the Nth level (upward ramp). RAMP By reversing the order of the switch connections, a ramp voltage V with a downward slope can be generated. RAMP .

[0086] Figure 5 This is a circuit diagram of the discriminator 290 according to an example embodiment. Figure 5 The discriminator 290 is implemented using digital logic. Figure 3 An example of discriminator 290 is provided, and for ease of explanation, its redundant description is omitted unless it differs from the description given above.

[0087] The discriminator 290 can be implemented by combining logic gates, flip-flops, and / or at least one of logic gates and flip-flops. For example, the discriminator 290 may include a combination of a first gate 291, a second gate 292, a third gate 293, a fourth gate 294, a first flip-flop 295, a second flip-flop 296, and a fifth gate 297. For example, the first gate 291 and the fifth gate 297 may be OR gates, the second to fourth gates 292, 293, and 294 may be AND gates, and the first and second flip-flops 295 and 296 may be D flip-flops. However, the example embodiment is not limited thereto. For ease of description, it is assumed below that the discriminator 290 is implemented by the logic gates and flip-flops described above.

[0088] A reset signal RST and a power-off signal PD can be input to the input terminals of the first gate 291. The power-off signal PD is a power supply signal used to perform the desired function of the electronic system (e.g., electronic device 10) including the discriminator 290. When the ramp signal RMP sequentially includes a ramp period or a reset ramp period and a signal ramp period, the power supply signal PWR supplies power to each functional unit, thereby providing a specific function during the ramp period. Unlike the power supply signal PWR, which supplies power during a single ramp period, the power-off signal PD supplies power to the electronic system or each functional unit during electronic system operation to provide the desired function of the electronic system. The result of the logic operation of the first gate 291 can be provided to the first flip-flop 295 and the second flip-flop 296.

[0089] The monitoring signal MNT and the power signal PWR can be input to the input terminals of the second gate 292, respectively. The monitoring signal MNT enables the output of the determinant 290. The logic operation result of the second gate 292 can be jointly provided to the third and fourth gates 293 and 294.

[0090] The first reference value REF1 and the result of the logic operation of the second gate 292 can be input to the input terminals of the third gate 293, respectively. For example, the first reference value REF1 can correspond to... Figure 3 The first reference voltage V in REF1 Similarly, the second reference value REF2 and the result of the logic operation with the second gate 292 can be input to the input terminals of the fourth gate 294. For example, the second reference value REF2 can correspond to... Figure 3 The second reference voltage V in REF2 The result of the logical operation of the third gate 293 can be provided to the first flip-flop 295, and the result of the logical operation of the fourth gate 294 can be provided to the second flip-flop 296.

[0091] Each of the first flip-flop 295 and the second flip-flop 296 can be implemented by a D flip-flop, which is a delayed flip-flop and therefore includes an input terminal D, a reset terminal R, a clock terminal CLK, and an output terminal Q.

[0092] refer to Figure 5 Power supply voltage V DD The input terminal D of the first flip-flop 295 can be provided, the logic operation result of the first gate 291 can be provided to the reset terminal R of the first flip-flop 295, the logic operation result of the third gate 293 can be provided to the clock terminal CLK of the first flip-flop 295, and the logic operation result of the first flip-flop 295 can be output from its output terminal Q. Similarly, the power supply voltage V DD The input terminal D of the second flip-flop 296 can be provided, the logic operation result of the first gate 291 can be provided to the reset terminal R of the second flip-flop 296, the logic operation result of the fourth gate 294 can be provided to the clock terminal CLK of the second flip-flop 296, and the logic operation result of the second flip-flop 296 can be output from the output terminal Q of the second flip-flop 296.

[0093] The logic operation results of the first flip-flop 295 and the second flip-flop 296 can be input to the input terminals of the fifth gate 297, respectively. The fifth gate 297 can output a verification signal VFY as the logic operation result.

[0094] Figure 6 This is a timing diagram illustrating the operation of electronic device 10, according to an example embodiment. Figure 6 The timing diagram shows in detail Figure 3 The operation of the monitoring circuit 200 monitors the ramp signal RMP. The following will refer to... Figure 1 and 3 describe Figure 6 .

[0095] Monitoring circuit 200 can detect from Figure 1 The slope of the ramp signal RMP is provided by the ramp generator 13. The monitoring circuit 200 can determine whether the ramp signal RMP is normal or faulty based on internally generated reference values ​​(e.g., differential reference value REF_D, upper reference value REF_U, and lower reference value REF_L), generate a differential output DO and first and second comparison outputs CO1 and CO2 as internal signals, and generate and output a verification signal VFY as a determination result. For example, the verification signal VFY can be provided to the controller 11 of the electronic device 10, and the operating mode of the electronic device 10 can be stopped based on the ramp signal RMP. The monitoring circuit 200 can perform differential operation, start comparison operation, and / or output comparison result on the ramp signal RMP based on the power-off signal PD, power signal PWR, preset signal PRST, reset signal RST, and / or monitoring signal MNT provided from outside the monitoring circuit 200.

[0096] A ramp signal RMP can be implemented as a voltage (or current) signal. The ramp signal RMP can be maintained at a specific voltage level (e.g., a second ramp voltage V). RAMP2 It can gradually decrease or increase from a specific point in time, and when the target level is reached, it returns to a specific voltage level (e.g., the second ramp voltage V). RAMP2 ) or switch to another predetermined level (e.g., the first ramp voltage V) RAMP1 According to an example embodiment, a ramp signal RMP can be used in a CDS. In this case, the ramp signal RMP may include a reset ramp period (where sensing information is initialized) and a signal ramp period (where sensing information is generated by performing sampling). For example, a ramp signal RMP for a CDS may include two ramp periods per processing cycle. Although in Figure 6 The diagram shows that the ramp signal RMP includes a ramp period, but it can be interpreted as showing one of the reset ramp period and the signal ramp period of the ramp signal RMP used for CDS.

[0097] The power-off signal PD can supply power to each functional unit of the monitoring circuit 200. When the power-off signal PD is turned off, the electronic equipment 10, including the monitoring circuit 200, is... Figure 1 Operation can begin. When the power-off signal PD is activated, the electronic device 10, including the monitoring circuit 200, can begin operation. Figure 1 Operation can be stopped. In the example embodiment, it is assumed that the power-off signal PD is turned off so that the ramp signal RMP and the monitoring ramp signal RMP are provided by the monitoring circuit 200.

[0098] The power signal PWR can be turned on during a ramp period of the ramp signal RMP and serves as either a power signal or an operation signal, operating each element of the monitoring circuit 200 to monitor for faults in the ramp signal RMP. For example, the power signal PWR can be turned off at time t18, and the monitoring operation during a ramp period of the ramp signal RMP can be terminated. The power signal PWR can be requested to be turned on to monitor subsequent ramp periods of the ramp signal.

[0099] Since the power signal PWR is turned on at time t11, the ramp signal RMP can be generated from the first ramp voltage V. RAMP1 Switching to the second ramp voltage V RAMP2 However, this is only an example embodiment, and the voltage level of the ramp signal RMP may be the same before and after the power signal PWR is turned on.

[0100] Since the power signal PWR is turned on at time t11, it can supply power to the differential converter 210, the upper limit comparator 250, and the lower limit comparator 270, and can sequentially generate the differential output DO, the first comparator output CO1, and the second comparator output CO2. For example, when the ramp signal RMP is maintained at the second ramp voltage VRAMP2 At that time, the voltage variance of the ramp signal RMP can gradually decrease.

[0101] In some cases, the differential output DO may need to be within a normal range R0 defined by the first and second reference values ​​REF1 and REF2. To monitor the voltage level of the differential output DO according to this requirement, the monitoring circuit 200 can be designed to use a first reference voltage V included in the first range R1. REF1 The upper limit, including the second reference voltage V in the second range R2 REF2 As a lower limit. Therefore, the discriminator 290 can use the first reference voltage V of the identification monitoring circuit 200 as a lower limit. REF1 Whether in the first range R1 and the second reference voltage V of the monitoring circuit 200 REF2 Whether to determine if the ramp signal RMP is faulty in the second range R2.

[0102] The differential output DO can decrease from a value exceeding the first reference value REF1 to a value less than the first reference value REF1. At the point when the differential output DO crosses below the first reference value REF1, the voltage level of the first comparator output CO1 can transition from logic high to logic low. When the differential output DO exceeds the second reference value REF2, the second comparator output CO2 can remain at a logic low level since the power supply signal PWR was applied. In the example embodiment, each of the first reference value REF1 and the second reference value REF2 is described as a specific voltage level, but the first reference value REF1 and / or the second reference value REF2 can include a range of voltage levels. The first reference value REF1 may refer to a first range R1, and the second reference value REF2 may refer to a second range R2. Each of the first reference value REF1 and the second reference value REF2 may have a predetermined error tolerance (e.g., about 5%). For example, when the differential output DO passes through a voltage level approximately 1.05 times the first reference value REF1, the upper limit comparator 250 can turn on the first comparator output CO1.

[0103] At time point t12, the preset signal PRST can be activated. The preset signal PRST controls a switch (e.g., transistor TR) to turn on and off between the positive and negative input terminals of the differential 210. When the preset signal PRST activates the switch and the positive and negative input terminals of the differential 210 are short-circuited, the transconductance of the differential 210 may be relatively very high; therefore, due to the ramp voltage V... RAMP The transient maximum value of the differential output DO generated by the application of [condition] may stabilize relatively quickly. Figure 6In this process, the operation of the differential 210 to quickly and stably operate by activating the preset signal PRST can be referred to as the preset operation and the first time period PRD1 (from time point t12 to time point t13). During this period, the preset signal PRST is in the on state, which can be referred to as the preset time period. At time point t13, the preset signal PRST is converted to a logic low level (e.g., the off state).

[0104] Because during the first time period PRD1 between time point t12 and time point t13, the ramp signal RMP remains at the second ramp voltage V. RAMP2 The voltage variance of the ramp signal RMP with respect to time can gradually decrease, and the differential output DO can decrease from a value exceeding the second reference value REF2 to a value less than the second reference value REF2. At the point where the differential output DO crosses the second reference value REF2 and becomes less than the second reference value REF2, the voltage level of the second comparator output CO2 can change from logic low to logic high.

[0105] Since the ramp signal RMP remains constant during the first time interval PRD1 between time points t12 and t13, the transient state of the differential output DO can quickly stabilize and reach the zero reference value REF0, which serves as the steady state. The zero reference value REF0 corresponds to the value of the differential output when the voltage variance of the ramp signal RMP with respect to time is substantially close to 0. At time point t13, the reset signal RST can be activated. When the reset signal RST is activated, the discriminator 290 can begin generating the verification signal VFY. The verification signal VFY can be activated in response to the transition of the reset signal RST.

[0106] In the example embodiment, it is assumed that the logic high indicator ramp signal RMP of the verification signal VFY is "normal" and the logic low indicator ramp signal RMP of the verification signal VFY is faulty, but the opposite logic level can be used to determine whether the ramp signal RMP is normal. During the period between time point t13 and time point t14, the reset signal RST can be turned off.

[0107] At time point t14, the ramp signal RMP can begin to ramp. According to the example embodiment, the ramp signal RMP can gradually decrease from time point t14 to time point t17, but this is just an example. The embodiment does not exclude the possibility of the ramp signal RMP gradually increasing. According to the example embodiment, Figure 6 The ramp period of the ramp signal RMP can correspond to the reset ramp period or the signal ramp period.

[0108] Because the ramp signal RMP has a certain slope between time points t14 and t15, the differential output DO may gradually increase (in the transient state). According to the example embodiment, at the time point when the differential output DO passes the second reference value REF2 and is greater than the second reference value REF2, the voltage level of the second comparator output CO2 can transition from logic high to logic low. After the transition of the second comparator output CO2, the differential output DO can reach a certain level corresponding to the slope of the ramp signal RMP during the ramp period (in the steady state).

[0109] At time t15, the monitoring signal MNT can be turned on. Since the monitoring signal MNT is turned on at some point after the ramp signal RMP starts ramping, the differential output DO may not be in a transient state, but rather in a steady state.

[0110] According to the example embodiment, the discriminator 290 can output a verification signal VFY when the monitoring signal MNT is turned on. When the monitoring signal MNT is turned on, the discriminator 290 can determine whether the slope of the ramp signal RMP is within the normal range R0 based on the first comparison output CO1 and the second comparison output CO2, and output the verification signal VFY, which is the discriminator result (also called the determination result). The time period between the time point t15 and the time point t16 when the monitoring signal MNT is in the on state is called the second time period (or monitoring period) PRD2. Because the ramp signal RMP is in Figure 6 Within the normal range R0, the verification signal VFY can remain logic high even during the monitoring period. For example, a logic high verification signal VFY can indicate that the ramp signal RMP is normal.

[0111] In the example embodiment, the logic level of the verification signal VFY indicates whether the ramp signal RMP is normal, but the embodiment is not limited to this. There are various ways to indicate whether the ramp signal RMP is normal or faulty. For example, a normal flag or a fault flag can be generated and appended to the output signal.

[0112] At time t17, the ramp signal RMP ends, and the ramp signal RMP can return to its original voltage level (e.g., the first ramp voltage V). RAMP1 ) or switch to a specific level (e.g., the second ramp voltage V) RAMP2 ).

[0113] At time t18, the power signal PWR can be switched to logic low. When the power signal PWR is turned off, the power supply to each functional unit of the monitoring circuit 200 can be interrupted, and the operation of the differential 210, upper limit comparator 250, lower limit comparator 270, and discriminator 290 can be stopped. As the operation of the upper limit comparator 250 and the lower limit comparator 270 stops, the first comparison output CO1 and the second comparison output CO2 can be switched to logic high, which is preset to the initial state.

[0114] Figure 7 This is a timing diagram illustrating the operation of an electronic device 10 according to an example embodiment. Figure 7 It shows Figure 6 The timing diagram has been reconfigured, therefore, the reference has been omitted. Figure 6 The given redundant description. Figure 1 and 3 They will be mentioned together.

[0115] At time point t21, maintain the ramp voltage V RMP The ramp signal RMP can initiate a ramp. When the ramp signal RMP begins its downward ramp, the differential output DO may increase. During the time interval between time points t21 and t22, the differential output DO may cross with the second reference value REF2 and may be transient. The monitoring signal MNT can have a logic low initial value, and the verification signal VFY can have a logic high initial value.

[0116] At time t22, the differential output DO may reach a steady state. In the example embodiment, the differential output DO may reach a voltage level corresponding to the slope of the ramp signal RMP during the ramp period between time t21 and time t26. The value of the differential output DO in the steady state may be less than the first reference value REF1 and greater than the second reference value REF2.

[0117] At time point t23, the monitoring signal MNT can be turned on. When the monitoring signal MNT is turned on, a verification signal VFY can be generated and output. To calculate the slope of the ramp signal RMP while keeping the slope constant, the monitoring signal MNT can be turned on at a certain time after the ramp signal RMP begins to ramp. Since the differential output DO is less than the first reference value REF1 and greater than the second reference value REF2, the verification signal VFY can remain logic high. According to the example embodiment, Figure 1 The monitoring circuit 15 in the middle can provide an indication of the ramp signal RMP pair Figure 1 The controller 11 in the system is functioning normally.

[0118] At time t25, the monitoring signal MNT can be turned off. When the monitoring signal MNT is turned off, the output of the verification signal VFY can stop. In order to calculate the slope of the ramp signal RMP while keeping the slope of the ramp signal RMP constant, the monitoring signal MNT can be turned off before the ramp of the ramp signal RMP ends.

[0119] At time t25, the downslope of the ramp signal RMP can terminate. After time t26, the ramp signal RMP can be maintained at a specific level, and the differential output DO can be reduced to a voltage level corresponding to the state where the voltage variance of the ramp signal RMP with respect to time is almost zero.

[0120] Figures 8A to 8C This is a timing diagram illustrating the operation of an electronic device 10 according to an example embodiment. Figures 8A to 8C It shows Figure 6 Reconfiguration of the timing diagram.

[0121] In the example embodiment, the ramp signal RMP may not be generated correctly because, for example, in Figure 1 A malfunction occurred during the manufacturing process of the ramp generator 13; an electrical component installed on the ramp generator 13 malfunctioned; the electrical component deteriorated due to aging; or... Figure 1 The electronic device 10 is subjected to an external impact. Figures 8A to 8C An example is shown where a fault occurs in the ramp signal RMP due to any of the above-mentioned problems. Reference Figure 6 and 7 Redundant descriptions have been omitted.

[0122] refer to Figure 1 and 8A Maintaining the ramp voltage V RMP The ramp signal RMP can begin ramping at time point t31. However, the slope of the ramp signal RMP (solid line) can be less than... Figure 7 The slope of the ramp signal RMP (dashed line). In other words, the ramp of the ramp signal RMP may be abnormally slow. When the ramp signal RMP begins to ramp down during the time interval between time points t31 and t32, the differential output DO may increase (in the transient state).

[0123] At time t32, the differential output DO can reach a steady state. In the example embodiment, the differential output DO can reach a voltage level corresponding to the slope of the ramp signal RMP during the ramp period between time t31 and time t35. The value of the differential output DO in steady state may be less than both the first reference value REF1 and the second reference value REF2.

[0124] At time point t33, the monitoring signal MNT can be turned on. When the monitoring signal MNT is turned on, the verification signal VFY can be started and output. Figure 3 The discriminator 290 can not start the discrimination operation when the monitoring signal MNT is logic low, and can start generating the verification signal VFY when the monitoring signal MNT is logic high.

[0125] When the monitoring signal MNT transitions to logic high, the verification signal VFY may transition to logic low. The discriminator 290 may determine that the ramp signal RMP is abnormal (e.g., fault) after identifying that the differential output DO is less than the second reference value REF2, and change the voltage level of the verification signal VFY from logic high to logic low.

[0126] The verification signal VFY can be output to Figure 1 The monitoring circuit 15 is located outside the monitoring circuit 15. According to an example embodiment, the monitoring circuit 15 can send... Figure 1 The controller 11 provides information indicating a fault in the ramp signal RMP. According to an example embodiment, when the verification signal VFY is logic low, the controller 11 can halt the main circuit 17 based on the ramp signal RMP. Figure 1 The operation of (in the middle) or to notify the user of electronic device 10 of an operational anomaly based on the ramp signal RMP.

[0127] At time point t34, the monitoring signal MNT can be turned off. According to the example embodiment, even when the monitoring signal MNT is turned off, the output of the verification signal VFY can be maintained until the reset signal RST is turned on. Because the verification signal VFY is continuously output even after the monitoring signal MNT is turned off, information about whether the ramp signal RMP is faulty can be provided at any time.

[0128] At time t35, the downward slope of the ramp signal RMP may stop. After time t35, the ramp signal RMP can be maintained at a specific level, and the differential output DO can be reduced to a voltage level corresponding to a state where the voltage variance of the ramp signal RMP with respect to time is almost zero.

[0129] refer to Figure 1 and 8B Maintaining the ramp voltage V RMP The ramp signal RMP can begin to ramp at time point t41. However, the slope of the ramp signal RMP (solid line) can be greater than... Figure 7 The slope of the ramp signal RMP (dashed line). In other words, the ramp signal RMP may ramp up abnormally fast. When the ramp signal RMP begins to ramp down during the time interval between time points t41 and t42, the differential output DO may increase (in the transient state).

[0130] At time t42, the differential output DO may reach a steady state. In the example embodiment, the differential output DO may reach a voltage level corresponding to the slope of the ramp signal RMP during the ramp period between time t41 and time t45. The value of the differential output DO in the steady state may be greater than both the first reference value REF1 and the second reference value REF2.

[0131] At time t43, the monitoring signal MNT can be turned on. When the monitoring signal MNT is turned on, the verification signal VFY can be changed and output. When the monitoring signal MNT is logic low, the discriminator 290 may not start the discrimination operation, and when the monitoring signal MNT is logic high, the discriminator 290 can start generating the verification signal VFY. At a time substantially coinciding with the time when the monitoring signal MNT transitions to logic high, the discriminator 290 can identify that the differential output DO is greater than the first reference value REF1 and determine that the ramp signal RMP is abnormal (e.g., fault). In the example embodiment, the discriminator 290 can change the voltage level of the verification signal VFY from logic high to logic low.

[0132] The verification signal VFY can be output to the external monitoring circuit 15. According to an example embodiment, the monitoring circuit 15 can provide the controller 11 with information indicating a fault in the ramp signal RMP. According to an example embodiment, when the verification signal VFY is logic low, the controller 11 can stop the operation of the main circuit 17 based on the ramp signal RMP, or notify the user of the electronic device 10 of an operational anomaly based on the ramp signal RMP.

[0133] At time point t44, the monitoring signal MNT can be turned off. According to the example embodiment, even when the monitoring signal MNT is turned off, the output of the verification signal VFY can be maintained until the reset signal RST is turned on. Because the verification signal VFY is continuously output even after the monitoring signal MNT is turned off, information about whether the ramp signal RMP is faulty can be provided at any time.

[0134] At time t45, the downward ramp of the ramp signal RMP can stop. After time t45, the ramp signal RMP can be maintained at a specific level, and the differential output DO can be reduced to a voltage level corresponding to the state where the voltage variance of the ramp signal RMP with respect to time is almost zero.

[0135] refer to Figure 1 and 8C Maintaining the ramp voltage V RMP The ramp signal RMP can start ramping at time point t51. The slope of the ramp signal RMP (solid line) can be compared with... Figure 7The slope of the ramp signal RMP (dashed line) is basically the same. However, the ramp signal RMP may not decrease to the target level, and the ramp may stop abruptly. In other words, the ramp period of the ramp signal RMP may be unusually short. When the ramp signal RMP begins to ramp down during the period between time points t51 and t52, the differential output DO may increase (in the transient state).

[0136] At time point t52, the differential output DO can reach a steady state. In the example embodiment, the differential output DO can reach a voltage level corresponding to the slope of the ramp signal RMP during the ramp period between time points t51 and t54. The value of the differential output DO in the steady state can be less than the first reference value REF1 and greater than the second reference value REF2.

[0137] At time point t53, the monitoring signal MNT can be turned on. When the monitoring signal MNT is turned on, the discriminator 290 can begin verification and output a verification signal VFY. Since the differential output DO is within the normal range, the discriminator 290 can determine that the ramp signal RMP is normal. In the example embodiment, the discriminator 290 can maintain the voltage level of the verification signal VFY at logic high. According to the example embodiment, the monitoring circuit 15 can provide the controller 11 with information indicating that the ramp signal RMP is faulty.

[0138] At time t54, the ramp signal RMP may suddenly stop. For example, the ramp signal RMP may be abnormally provided when there is an external impact on the ramp generator 13 or when a fault occurs in the internal circuitry or components of the ramp generator 13. When the ramp signal RMP stops, the voltage of the ramp signal RMP may change with time, and the differential output DO may gradually decrease.

[0139] At time t55, the reduced differential output DO may cross with the second reference value REF2. When the differential output DO is less than the second reference value REF2, the discriminator 290 can change the verification signal VFY to logic low. At time t55, the monitoring signal MNT is still on, so the verification signal VFY can be output. According to the example embodiment, the ramp period with a specific slope for the ramp signal RMP can be appropriately determined based on the design of the components of the ramp generator 13, or pre-set during the manufacture or design of the ramp generator 13, between time points t53 and t56 (during which the monitoring signal MNT is on). Therefore, even if the ramp of the ramp signal RMP suddenly stops, the monitoring signal MNT can remain on during the predetermined ramp period. According to the example embodiment, in response to the logic low of the verification signal VFY, the controller 11 can stop the operation of the main circuit 17 based on the ramp signal RMP, or notify the user of the electronic device 10 of an operational anomaly based on the ramp signal RMP.

[0140] At time t56, the monitoring signal MNT can be turned off as the predetermined on-time period between time points t53 and t56 elapses. When the monitoring signal MNT is turned off, the output of the verification signal VFY can stop.

[0141] Figure 9 This is a block diagram of an imaging device 20 according to an example embodiment. The imaging device 20 may be a reference... Figure 1 An example of the described electronic device 10.

[0142] Imaging device 20 can be mounted on electronic devices that have the function of sensing images or light. For example, imaging device 20 can be mounted on electronic devices such as cameras, smartphones, wearable devices, Internet of Things (IoT) devices, home appliances, desktop personal computers (PCs), personal digital assistants (PDAs), portable multimedia players (PMPs), navigation devices, drones, and advanced driver assistance systems (ADAS). Imaging device 20 can also be mounted on electronic devices used as components in, for example, vehicles, furniture, manufacturing facilities, doors, or various measuring equipment.

[0143] Imaging device 20 may include imaging unit 430, image sensor 450, and processor 470. Imaging device 20 may have autofocus function (hereinafter referred to as AF function).

[0144] The operation of the imaging device 20 can be controlled by the processor 470. The processor 470 can provide control signals for the operation of each of the lens driver 433, the aperture driver 435, and the controller 451.

[0145] Imaging unit 430 receives light and may include lens 431, lens driver 433, aperture 437, and aperture driver 435. Lens 431 may include multiple lenses.

[0146] The lens driver 433 can exchange information about focus detection with the processor 470 and can control the position of the lens 431 according to control signals from the processor 470. The lens driver 433 can control the position of the lens 431 by moving the lens 431. For example, the lens driver 433 can move the lens 431 away from or toward the object 405, thereby controlling the distance between the lens 431 and the object 405. Depending on the position of the lens 431, the object 405 can be focused or defocused.

[0147] Image sensor 450 converts incident light into an image signal. Image sensor 450 may include pixel array 453, controller 451, signal processor 455, and monitoring circuit 457. When the light signal reaches the light-receiving surface of pixel array 453, the light signal that has passed through lens 431 and aperture 437 can form an image of object 405. Figure 2 Monitoring circuit 100 or Figure 3 The monitoring circuit 200 can be used as Figure 9 The monitoring circuit 457 in the middle is omitted, therefore its redundant description is omitted.

[0148] Pixel array 453 may include a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that converts optical signals into electrical signals. The sensitivity of pixel array 453 may be controlled by controller 451. Pixel array 453 may include a plurality of pixels arranged in a matrix. Each pixel may include a microlens and at least two photoelectric conversion elements arranged parallel to each other below the microlens. Each pixel may include at least one first photoelectric conversion element and at least one second photoelectric conversion element arranged parallel to each other. Pixels may output a first image signal generated by the first photoelectric conversion element or a second image signal generated by the second photoelectric conversion element. Pixels may output a combined image signal generated by the first and second photoelectric conversion elements.

[0149] The signal processor 455 can generate a phase detection signal pair for phase difference calculation based on a first image signal and a second image signal output from at least two pixels in different adjacent rows and columns of the pixel array 453. In the case of defocus, the phase of the first image signal may differ from the phase of the second image signal. For example, the intensity of the first image signal may differ from the intensity of the second image signal. In the case of focus, the phase of the first image signal may be the same as the phase of the second image signal.

[0150] The signal processor 455 can generate multiple phase detection signal pairs based on multiple first image signals and multiple second image signals output from the pixel array 453. The phase detection signal pairs generated from the phase detection signal pairs, or the first and second images, can be provided to the processor 470 as autofocus data.

[0151] Processor 470 may receive image data from image sensor 450. The image data may include images in frames and / or autofocus data. Processor 470 may use the autofocus data to perform phase difference calculations for AF functionality. In an example embodiment, processor 470 may perform phase difference calculations based on multiple phase detection signal pairs included in the autofocus data. For example, processor 470 may generate a first image based on multiple first phase detection signals in a phase detection signal pair, and generate a second image based on multiple second phase detection signals in a phase detection signal pair, and may calculate the phase difference between the first image and the second image.

[0152] By calculating the phase difference, the processor 470 can obtain the position of the focus (where the intensities of the two phase detection signals included in the phase detection signal pair are the same as each other (e.g., the phase of the first image is the same as the phase of the second image)), the direction of the focus, and / or the distance between the object 405 and the image sensor 450.

[0153] The processor 470 can generate a control signal for controlling the lens driver 433 to move the lens 431 based on the phase difference calculation result, and can output the control signal to the lens driver 433.

[0154] Figure 10 This is a block diagram of an image sensor 500 according to an example embodiment. Figure 10 The image sensor 500 can be Figure 9 Example of an image sensor 450.

[0155] refer to Figure 9 and 10 The image sensor 500 may include a controller 510, a row decoder 520, a readout circuit 530, a pixel array 540, a ramp generator 550, and a monitoring circuit 560. In an example embodiment, the image sensor 500 may also include a clock signal generator, a signal processor, a column decoder, and / or a memory. Figure 2 Monitoring circuit 100 or Figure 3 The monitoring circuit 200 can be used as Figure 10 The monitoring circuit 560 in the middle is omitted, therefore its redundant description is omitted.

[0156] The controller 510 can provide control signals for timing control of the row decoder 520, the readout circuit 530, and the ramp generator 550. For example, the controller 510 can provide a row control signal CTR_X to the row decoder 520, and the row decoder 520 can allow sensing of the pixel array 540 row by row through row lines RLs based on the row control signal CTR_X. For example, the controller 510 can provide a column control signal CTR_Y to the readout circuit 530, and the readout circuit 530 can receive sensing signals from the pixel array 540 through column lines CLs based on the column control signal CTR_Y. For example, the controller 510 can provide a ramp control signal CTR_R to the ramp generator 550, and the ramp generator 550 can generate a ramp signal RMP for the operation of the readout circuit 530 based on the ramp control signal CTR_R.

[0157] According to an example embodiment, the controller 510 may receive a verification signal VFY from the monitoring circuit 560 and sense abnormal operation of the ramp signal RMP generated by the ramp generator 550. The controller 510 may determine whether the operation exceeds the normal range of the ramp signal RMP or whether there is a malfunction in the ramp generator 550, thereby stopping the operation of the readout circuit 530 based on the ramp signal RMP operation. For example, the CDS or counting operation of the readout circuit 530 may be stopped, and correspondingly, the output of the image data IDAT generated by the readout circuit 530 may also be stopped.

[0158] The controller 510 can be implemented as a processing circuit, such as a hardware component including logic circuitry, or implemented through a combination of hardware and software, such as a processor running software that performs compression. For example, the controller 510 may include a CPU, an ALU that performs arithmetic and logic operations, a bit shifter, etc., a DSP included in the image sensor 500, a microprocessor, an ASIC, control logic, etc., but is not limited thereto, as described above.

[0159] Under the control of controller 510 (e.g., row control signal CTR_X), row decoder 520 can generate control signals for driving pixel array 540 and drive multiple pixels of pixel array 540 row by row through row lines RLs. Each row line RLs can extend in the row direction and can be connected to pixels arranged in a row.

[0160] In an example embodiment, the row decoder 520 can control multiple pixels of the pixel array 540 to sense incident light simultaneously or row by row. The row decoder 520 can control the pixel array 540 to select pixels row by row and output the reset voltage and sense voltage generated by the selected pixels (e.g., pixels in a row) through multiple column lines CLs.

[0161] Pixel array 540 may include multiple pixels in a matrix and row lines RLs and column lines CLs connected to the pixels. For example, each of the row lines RLs may send control signals from row decoder 520 to multiple transistors included in each pixel, and each of the column lines CLs may send pixel signals from the pixels of each row of pixel array 540 to readout circuitry 530. Each column line CLs may extend in the column direction and may connect a column of pixels to readout circuitry 530.

[0162] According to an example embodiment, each pixel may include at least one photoelectric conversion element (or photosensitive device) and a transistor. The photoelectric conversion element senses light and converts it into photocharge. For example, the photoelectric conversion element may include a photosensitive device such as an inorganic photodiode, organic photodiode, perovskite photodiode, phototransistor, photogate, or pinned photodiode, which comprises organic or inorganic materials. In the example embodiment, each pixel may include multiple photoelectric conversion elements. The transistor may transfer the charge stored in the photoelectric conversion element, reset the photoelectric conversion element to a power supply voltage, or convert the charge into an electrical signal.

[0163] Multiple pixels may include red pixels, green pixels, and blue pixels. A red pixel may generate an image signal (or charge) corresponding to a red signal in response to wavelengths in the red range of the visible spectrum. A green pixel may generate an image signal (or charge) corresponding to a green color signal in response to wavelengths in the green range of the visible spectrum. A blue pixel may generate an image signal (or charge) corresponding to a blue signal in response to wavelengths in the blue range of the visible spectrum. However, embodiments are not limited to this, and pixels may also include white pixels. For example, pixels may include cyan pixels, yellow pixels, magenta pixels, or white pixels.

[0164] Microlenses and color filters can be stacked above each pixel. Multiple color filters of a pixel can form a color filter array. A color filter can filter light of a specific color, such as wavelengths within a specific color range, incident on the microlens. The color sensed by the pixel can be determined based on the color filter of the pixel. However, embodiments are not limited to this. According to one embodiment, light corresponding to wavelengths within a color range can be converted into an electrical signal based on the level (e.g., voltage level) of an electrical signal applied to the photoelectric conversion element of the pixel; therefore, the color sensed by the pixel can be determined based on the level of the electrical signal applied to the photoelectric conversion element.

[0165] The readout circuit 530 can receive pixel signals from the pixel array 540 via column lines CLs and output image data IDAT as a result of processing the pixel signals. The readout circuit 530 may include a CDS circuit 531, an analog-to-digital converter (ADC) circuit 533, and a buffer 535.

[0166] CDS circuit 531 may include multiple comparators that compare pixel signals received from pixel array 540 via column lines CLs with ramp signals RMP received from ramp generator 550. Each comparator compares the pixel signal with the buffered ramp signal RMP and outputs the comparison result as either logic low or logic high. In an example embodiment, when the level of ramp signal RMP is the same as the level of the pixel signal, the comparator may output a comparison signal that transitions from a first level (e.g., logic high) to a second level (e.g., logic low). The level transition time of the comparison signal can be determined based on the level of the pixel signal.

[0167] Multiple pixel signals output from multiple pixels may vary due to inherent pixel characteristics (e.g., fixed-mode noise (FPN)) and / or due to differences in the logic characteristics (e.g., transistors that output charge stored in the photoelectric conversion elements of the pixel) of each pixel outputting the pixel signal. To compensate for the variations in the multiple pixel signals output through column lines CLs, a process is performed to obtain a reset voltage (or reset component) and a sense voltage (or sense component) for each pixel signal, and to extract the difference between the reset voltage and the sense voltage (e.g., voltage difference) as the effective signal component. This process is called CDS. A comparator can use the CDS to output a comparison result (e.g., a comparison output). Therefore, CDS circuit 531 can use CDS to generate a comparison result.

[0168] The ADC circuit 533 can convert the comparison result of the CDS circuit 531 into digital data and generate and output pixel values ​​corresponding to a plurality of pixels in rows. The ADC circuit 533 may include a plurality of counters. Each counter may be connected to a respective output of the comparator. Each counter can count the comparison result output from the comparator. The counter can count the comparison result output from the comparator as logic high or logic low based on a reset transition period of a sensed reset signal and a counting clock signal in an image transition period of a sensed signal, and can output digital data (e.g., pixel value) based on the counting result. The counter may include latching circuitry and operating circuitry. The latching circuitry can latch the level transition time of the comparison signal from the comparator as a code value received as the counting clock signal. The latching circuitry can latch a code value corresponding to the reset signal, such as a reset value, and a code value corresponding to the image signal, such as an image signal value. The operating circuitry can perform operations on the reset value and the image signal value to generate an image signal value with a reset level having pixels removed from it. The counter can output the image signal value with the reset level as a pixel value. However, the embodiments are not limited thereto. The counter may include operating circuitry and an incrementing counter that increases the count value based on a counting clock signal, or it may include an increment / decrement counter or a bit inversion counter.

[0169] Buffer 535 can store pixel values ​​output from ADC circuit 533. Buffer 535 can store digital data (e.g., pixel values) for each row. In an example embodiment, buffer 535 can temporarily store digital data output from a counter, then amplify and output the digital data. In other words, buffer 535 can include an output buffer. Buffer 535 can temporarily store digital data output from multiple counters and sequentially or selectively output the digital data to a sense amplifier. The sense amplifier amplifies and outputs the digital data. Buffer 535 can output amplified image data IDAT based on the column control signal CTR_Y of the column decoder, which selects columns under the control of controller 510.

[0170] Buffer 535 may include, for example, static random access memory (SRAM), latches, flip-flops, or combinations thereof, but is not limited thereto. In an example embodiment, buffer 535 may be included as a memory in ADC circuitry 533.

[0171] The ramp generator 550 can generate a ramp signal RMP that gradually increases or decreases with a specific slope and provides the ramp signal RMP to the readout circuit 530.

[0172] The monitoring circuit 560 can calculate the slope of the ramp signal RMP and determine whether the ramp signal RMP is normal based on whether the slope is within the normal range. The determination result of the ramp signal RMP can be provided to the controller 510 as a verification signal VFY. According to the example embodiment, when the verification signal VFY indicates a fault in the ramp signal RMP, the controller 510 can output a column control signal CTR_Y, causing the buffer 535 to limit the output of the image data IDAT, and can also limit the operation of the readout circuit 530 based on the ramp signal RMP, and stop various operation modes based on the image data IDAT.

[0173] Figure 11 This is a block diagram of an electronic device including a multi-camera module using an image sensor, according to an example embodiment. Figure 12 According to the example embodiment Figure 11 Detailed block diagram of the multi-camera module.

[0174] refer to Figure 11 The electronic device 1000 may include a camera module group 1100, an application processor 1200, a power management integrated circuit (PMIC) 1300, and an external memory 1400.

[0175] Camera module group 1100 may include multiple camera modules 1100a, 1100b, and 1100c. Although Figure 11The illustration shows three camera modules 1100a, 1100b, and 1100c, but the embodiments are not limited thereto. For example, in some embodiments, camera module group 1100 may be modified to include only two camera modules or camera module group 1100 may be modified to include "n" camera modules, where "n" is a natural number of at least 4.

[0176] The following will refer to Figure 12 This describes the detailed configuration of camera module 1100b. The following description can also be applied to other camera modules 1100a and 1100c.

[0177] refer to Figure 12 The camera module 1100b may include a prism 1105, an optical path folding element (OPFE) 1110, an actuator 1130, an image sensing device 1140, and a storage device 1150.

[0178] The prism 1105 may include a reflective surface 1107 formed of a light-reflecting material and may change the path of light L incident from the outside.

[0179] In some embodiments, prism 1105 can change the path of light L incident along the first direction X to a second direction Y that intersects (e.g., is perpendicular to) the first direction X. Prism 1105 can rotate the reflective surface 1107 of the light-reflecting material about its central axis 1106 along direction A, or rotate the central axis 1106 along direction B, such that the path of light L incident along the first direction X is changed to a second direction Y perpendicular to the first direction X. In this case, OPFE 1110 can move in a third direction Z perpendicular to the first direction X and the second direction Y.

[0180] In some embodiments, the maximum rotation angle of the prism 1105 in the A direction may be less than or equal to about 15 degrees in the positive (+) A direction and greater than about 15 degrees in the negative (-) A direction, but the embodiments are not limited thereto.

[0181] In some embodiments, prism 1105 may be moved by an angle of about 20 degrees along the positive B or negative B direction, or within the range of about 10 degrees to about 20 degrees, or within the range of about 15 degrees to about 20 degrees. The angle by which prism 1105 is moved along the positive B direction may be the same as or similar to the angle by which prism 1105 is moved in the negative B direction, within a difference of about 1 degree.

[0182] In some embodiments, the prism 1105 may move the reflective surface 1107 of the light-reflecting material in a third direction Z parallel to the extension direction of the central axis 1106.

[0183] OPFE 1110 may include, for example, "m" optical lenses, where "m" is a natural number. The "m" lenses can be moved along the second direction Y and change the optical zoom ratio of camera module 1100b. For example, when the default optical zoom ratio of camera module 1100b is Z, the optical zoom ratio of camera module 1100b can be changed to 3Z, 5Z, or greater by moving the "m" optical lenses included in OPFE 1110.

[0184] Actuator 1130 can move OPFE 1110 or optical lens to a specific position. For example, actuator 1130 can adjust the position of optical lens such that image sensor 1142 is positioned at the focal length of optical lens for accurate sensing.

[0185] Image sensing device 1140 may include image sensor 1142, control logic 1144, and memory 1146. Image sensor 1142 can sense an image of an object using light provided through an optical lens.

[0186] According to an example embodiment, image sensor 1142 may include monitoring circuitry 1143. Figure 12 The image sensor 1142 in the middle can be with Figure 10 The image sensor in it is basically the same as the 500, and Figure 12 The monitoring circuit 1143 in the middle can be connected with Figure 2 The monitoring circuit 100 or Figure 3 The monitoring circuit 200 is basically the same. Therefore, unless it differs from the description given above, its redundant description is omitted.

[0187] Control logic 1144 can control the general operation of camera module 1100b. For example, control logic 1144 can control the operation of camera module 1100b according to control signals provided via control signal line CSLb.

[0188] The memory 1146 may store information for the operation of the camera module 1100b, such as calibration data 1147. Calibration data 1147 may include information for the camera module 1100b to generate image data using light L provided from an external source. For example, calibration data 1147 may include information about the aforementioned rotation, information about the focal length, information about the optical axis, etc. When the camera module 1100b is implemented as a multi-state camera where the focal length varies with the position of the optical lens, calibration data 1147 may include the focal length value (or state) for each position of the optical lens and information about autofocus.

[0189] Storage 1150 may store image data sensed by image sensor 1142. Storage 1150 may be provided externally to image sensing device 1140 and may form a stack with the sensor chip of image sensing device 1140. In some embodiments, storage 1150 may include electrically erasable programmable read-only memory (EEPROM), but embodiments are not limited thereto.

[0190] refer to Figure 11 and 12 In some embodiments, each of camera modules 1100a, 1100b, and 1100c may include an actuator 1130. Therefore, camera modules 1100a, 1100b, and 1100c may include calibration data 1147, which may be the same or different in camera modules 1100a, 1100b, and 1100c depending on the operation of the actuator 1130 included in each of the camera modules 1100a, 1100b, and 1100c.

[0191] In some embodiments, one of camera modules 1100a, 1100b, and 1100c (e.g., camera module 1100b) may be a folding lens type including prism 1105 and OPFE 1110, while other camera modules (e.g., camera modules 1100a and 1100c) may be a vertical type excluding prism 1105 and OPFE 1110. However, the embodiments are not limited thereto.

[0192] In some embodiments, one of camera modules 1100a, 1100b, and 1100c (e.g., camera module 1100c) may include a vertical depth camera that uses infrared (IR) to extract depth information. In this case, application processor 1200 can generate a three-dimensional (3D) depth image by merging image data provided from the depth camera with image data provided from another camera module (e.g., camera module 1100a or 1100b).

[0193] In some embodiments, at least two camera modules (e.g., 1100a and 1100b) of camera modules 1100a, 1100b, and 1100c may have different fields of view. In this case, the two camera modules (e.g., 1100a and 1100b) of camera modules 1100a, 1100b, and 1100c may each have different optical lenses, but the embodiments are not limited thereto.

[0194] In some embodiments, camera modules 1100a, 1100b, and 1100c may have different fields of view from each other. In this case, camera modules 1100a, 1100b, and 1100c may each have different optical lenses, but the embodiments are not limited thereto.

[0195] In some embodiments, camera modules 1100a, 1100b, and 1100c may be physically separated from each other. In other words, the sensing area of ​​image sensor 1142 is not divided and used by camera modules 1100a, 1100b, and 1100c, but image sensor 1142 may be independently included in each of camera modules 1100a, 1100b, and 1100c.

[0196] Back Figure 11 The application processor 1200 may include an image processing unit 1210, a memory controller 1220, and internal memory 1230. The application processor 1200 may be implemented separately from the camera modules 1100a, 1100b, and 1100c. For example, the application processor 1200 and the camera modules 1100a, 1100b, and 1100c may be implemented in different semiconductor chips.

[0197] The image processing unit 1210 may include a plurality of sub-image processors 1212a, 1212b and 1212c, an image generator 1214 and a camera module controller 1216.

[0198] The image processing unit 1210 may include as many sub-image processors 1212a, 1212b and 1212c as camera modules 1100a, 1100b and 1100c.

[0199] Image data generated from each of camera modules 1100a, 1100b, and 1100c can be provided to a corresponding sub-image processor 1212a, 1212b, and 1212c via a corresponding one of the mutually separated image signal lines ISLa, ISLb, and ISLc. For example, image data generated from camera module 1100a can be provided to sub-image processor 1212a via image signal line ISLa, image data generated from camera module 1100b can be provided to sub-image processor 1212b via image signal line ISLb, and image data generated from camera module 1100c can be provided to sub-image processor 1212c via image signal line ISLc. Such image data transmission can be performed using, for example, a Camera Serial Interface (CSI) based on a Mobile Industrial Processor Interface (MIPI), but the embodiments are not limited thereto.

[0200] In some embodiments, a single sub-image processor may be provided for multiple camera modules. For example, with Figure 11 Unlike other sub-image processors, sub-image processors 1212a and 1212c can be integrated into a single sub-image processor instead of being separated, and image data provided from camera module 1100a or camera module 1100c can be selected by a selection element (e.g., a multiplexer) and then provided to the integrated sub-image processor.

[0201] Image data provided to each of the sub-image processors 1212a, 1212b, and 1212c can be provided to the image generator 1214. The image generator 1214 can generate an output image using the image data provided from each of the sub-image processors 1212a, 1212b, and 1212c, based on image generation information or pattern signals.

[0202] For example, image generator 1214 can generate an output image by merging partial image data generated from camera modules 1100a, 1100b, and 1100c, which have different fields of view, based on image generation information or a pattern signal. Alternatively, image generator 1214 can generate an output image by selecting one of the image data segments generated from camera modules 1100a, 1100b, and 1100c, which have different fields of view, based on image generation information or a pattern signal.

[0203] In some embodiments, image generation information may include a zoom signal or a zoom factor. In some embodiments, the mode signal may be based on a user-selected mode.

[0204] When the image generation information includes a zoom signal or zoom factor and camera modules 1100a, 1100b, and 1100c have different fields of view, image generator 1214 can perform different operations based on different types of zoom signals. For example, when the zoom signal is a first signal, image generator 1214 can merge image data output from camera module 1100a with image data output from camera module 1100c, and can generate an output image using the merged image signal and image data output from camera module 1100b that was not used during the merging process. When the zoom signal is a second signal different from the first signal, image generator 1214 can generate an output image by selecting one of the image data segments output from camera modules 1100a, 1100b, and 1100c respectively, instead of performing the merging. However, embodiments are not limited to this, and the method of processing image data can be changed as necessary.

[0205] In some embodiments, the image generator 1214 may receive multiple image data segments with different exposure times from at least one of the sub-image processors 1212a, 1212b and 1212c, and perform high dynamic range (HDR) processing on these image data segments to generate merged image data with increased dynamic range.

[0206] The camera module controller 1216 can provide control signals to each of the camera modules 1100a, 1100b, and 1100c. The control signals generated by the camera module controller 1216 can be provided to a corresponding one of the camera modules 1100a, 1100b, and 1100c via a corresponding one of the separate control signal lines CSLa, CSLb, and CSLc.

[0207] Based on a mode signal or an image generation signal including a zoom signal, one of camera modules 1100a, 1100b, and 1100c (e.g., camera module 1100b) can be designated as the master camera, and other camera modules (e.g., 1100a and 1100c) can be designated as slave cameras. This designation information can be included in control signals and provided to each of camera modules 1100a, 1100b, and 1100c via a corresponding one of the separate control signal lines CSLa, CSLb, and CSLc.

[0208] The camera module can be configured as either master or slave based on the zoom factor or operating mode signal. For example, when the field of view of camera module 1100a is larger than that of camera module 1100b and the zoom factor indicates a low zoom rate, camera module 1100b can operate as the master camera module, and camera module 1100a can operate as the slave camera module. Conversely, when the zoom factor indicates a high zoom rate, camera module 1100a can operate as the master module, and camera module 1100b can operate as the slave module.

[0209] In some embodiments, the control signals provided from the camera module controller 1216 to each of the camera modules 1100a, 1100b, and 1100c may include a synchronization enable signal. For example, when camera module 1100b is the main camera and camera module 1100a is the slave camera, the camera module controller 1216 may send a synchronization enable signal to camera module 1100b. Camera module 1100b, equipped with the synchronization enable signal, may generate a synchronization signal based on the synchronization enable signal and provide the synchronization signal to camera modules 1100a and 1100c via the synchronization signal line SSL. Camera modules 1100a, 1100b, and 1100c may synchronize with the synchronization signal and may send image data to the application processor 1200.

[0210] In some embodiments, control signals provided from camera module controller 1216 to each of camera modules 1100a, 1100b, and 1100c may include mode information based on mode signals. Camera modules 1100a, 1100b, and 1100c may operate in a first operating mode or a second operating mode related to sensing speed based on the mode information.

[0211] In the first operating mode, camera modules 1100a, 1100b, and 1100c can generate image signals at a first speed (e.g., at a first frame rate), encode the image signals at a second speed higher than the first speed (e.g., at a second frame rate higher than the first frame rate), and send the encoded image signals to application processor 1200. In an example embodiment, the second speed can be up to 30 times the first speed.

[0212] Application processor 1200 can store received image signals (e.g., encoded image signals) in internal memory 1230 or external memory 1400 outside of application processor 1200. Subsequently, application processor 1200 can read the encoded image signals from internal memory 1230 or external memory 1400, decode the encoded image signals, and display image data generated based on the decoded image signals. For example, one of the sub-image processors 1212a, 1212b, and 1212c of image processing unit 1210 can perform decoding and can also perform image processing on the decoded image signals.

[0213] In the second operating mode, camera modules 1100a, 1100b, and 1100c can generate image signals at a third speed lower than the first speed (e.g., at a third frame rate lower than the first frame rate) and send the image signals to application processor 1200. The image signals provided to application processor 1200 may not have been encoded yet. Application processor 1200 can perform image processing on the image signals or store the image signals in internal memory 1230 or external memory 1400.

[0214] PMIC 1300 can supply power, such as power supply voltage, to each camera module 1100a, 1100b, and 1100c. For example, under the control of application processor 1200, PMIC 1300 can supply a first power to camera module 1100a via power signal line PSLa, a second power to camera module 1100b via power signal line PSLb, and a third power to camera module 1100c via power signal line PSLc.

[0215] The PMIC 1300, in response to a power control signal PCON from the application processor 1200, generates power corresponding to each of the camera modules 1100a, 1100b, and 1100c and adjusts the power supply level. The power control signal PCON may include a power adjustment signal for each operating mode of the camera modules 1100a, 1100b, and 1100c. For example, the operating mode may include a low-power mode. In this case, the power control signal PCON may include information about the camera module to be operated in low-power mode and the power supply level to be set. Power supplies of the same or different levels may be provided to the camera modules 1100a, 1100b, and 1100c respectively. The power supply level can be changed dynamically.

[0216] Figure 13 This is a flowchart of an operation method of an electronic device according to an example embodiment. Figure 1 and 3 Will be with the following Figure 13 Let's refer to each other's experiences.

[0217] The electronic device can enable the monitoring circuit during operation S11. For example, Figure 1 Electronic device 10 can enable Figure 1 The monitoring circuit 15 is included. The monitoring circuit can be enabled by a power supply. For example, when power is supplied... Figure 3 When the power signal PWR of the monitoring circuit 200 is turned on, each component of the monitoring circuit 200 can be enabled.

[0218] The electronic device can preset the differential in operation S13. For example, the electronic device 10 can preset the differential by turning on the preset signal PRST provided to the differential 210. Figure 3 Differential converter 210 in the middle. As differential converter 210 is preset, Figure 3 The transconductance of the amplifier AMP can be increased, and the transient of the differential 210 can be stabilized quickly.

[0219] The electronic device can reset the discriminator during operation S15. For example, the electronic device 10 can reset it by activating the reset signal RST provided to the discriminator 290. Figure 3 The discriminator 290 is used in the first comparison output voltage V when the discriminator 290 is reset. CO1 and / or the second comparison output voltage V CO2 Perform the discrimination operation.

[0220] The electronic device can monitor the ramp signal during operation S17. For example, the electronic device 10 can be used for calculation. Figure 3 The ramp voltage V in RAMP The slope result is used to generate the differential output voltage V. DO And determine the differential output voltage V DOIt is at the first reference voltage V REF1 Within the range of the second reference voltage V REF2 Within the range. Electronic devices can generate a monitoring signal MNT to output the results of monitoring the ramp signal.

[0221] The electronic device can generate a verification signal during operation S19. For example, the electronic device can output a verification signal VFY during the on-time of the monitoring signal MNT. The verification signal VFY can be provided to the controller. For example, Figure 1 The controller 11 can identify whether the ramp signal RMP is faulty based on the logic level of the ramp signal RMP. When the ramp signal RMP is faulty, the controller 11 can stop the operation of the electronic device based on the ramp signal RMP, or notify the user of the fault of the ramp signal RMP.

[0222] Figure 14 This is a flowchart of an operation method of an electronic device according to an example embodiment. Figure 14 The flowchart describes various signals. Figure 13 The operation. Figure 1 and 3 will with Figure 14 Let's refer to each other's experiences.

[0223] The power signal PWR can be turned on during operation S21. When the power signal PWR is turned on, it can be used to... Figure 3 Each component of the monitoring circuit 200 is powered.

[0224] The preset signal PRST can be turned on during operation S23. In the example embodiment, when the preset signal PRST transitions to logic high, Figure 3 The input terminals of the differential 210 may be short-circuited. Because... Figure 3 The input voltages of the amplifiers AMP in the circuit are essentially the same, thus the transconductance of the amplifiers AMP can be increased, and the transients of the amplifiers AMP can be stabilized quickly. According to the example embodiment, a preset signal PRST can be turned on after the power signal PWR is turned on.

[0225] The reset signal RST can be activated in operation S25. In the example embodiment, when the reset signal RST transitions to logic high, Figure 3 The discriminator 290 in the middle can compare the first comparison output voltage V CO1 and / or the second comparison output voltage V CO2 Perform the discrimination operation. According to the example embodiment, the reset signal RST can be turned on after the preset signal PRST is turned on, but the embodiment is not limited to this. For example, in some example embodiments, the reset signal RST can be turned on before the preset signal PRST is turned on.

[0226] The monitoring signal MNT can be turned on during operation S27. In the example embodiment, when the monitoring signal MNT is turned on, a comparison output voltage V can be output to determine the first comparison output voltage. CO1 and / or the second comparison output voltage V CO2 The result corresponds to the verification signal VFY. According to an example embodiment, the on-time period of the monitoring signal MNT can be predetermined. According to an example embodiment, the monitoring signal MNT can be turned on after the reset signal RST is turned on.

[0227] Figure 15 This is a flowchart of the operation method of the monitoring circuit according to an example embodiment. Figure 15 The flowchart describes the functionality. Figure 13 The operation. Figure 1 and 3 will with Figure 15 Let's refer to each other's experiences.

[0228] In operation S31, the monitoring circuit can receive a ramp signal. According to an example embodiment, Figure 1 The monitoring circuit 15 in the middle can be detected from Figure 1 The ramp generator 13 in the middle receives the ramp signal RMP.

[0229] In operation S33, the monitoring circuit can monitor the slope of the ramp signal. According to the example embodiment, Figure 2 The monitoring circuit 200 can calculate Figure 3 The ramp voltage V in RAMP The slope is calculated, and the result is output as the differential output voltage V. DO .

[0230] In operation S35, the monitoring circuit can determine whether the slope range is within the normal range. According to the example embodiment, the monitoring circuit 200 can compare the voltage level corresponding to the calculated slope with a first reference voltage V. REF1 Second reference voltage V REF2 Each of them is compared. For example, monitoring circuit 200 can determine the differential output voltage V. DO It is at the first reference voltage V REF1 Within the range of the second reference voltage V REF2 Within the range. For example. Figure 3 The discriminator 290 in the middle can identify the first comparison output voltage V CO1 and / or the second comparison output voltage V CO2 Is it positive or negative?

[0231] In operation S37, the monitoring circuit can generate a flag. According to an example embodiment, the monitoring circuit 200 can generate a flag indicating whether the ramp signal RMP is normal or faulty, as an example of the verification signal VFY.

[0232] Figure 16 According to the example embodiment Figure 15 Detailed flowcharts of operations S35 and S37.

[0233] After operation S33, it can be determined in operation S310 whether the slope of the ramp signal is greater than the first reference value REF1. If the slope is not greater than the first reference value REF1 (in the case of no), operation S330 is executed. If the slope is greater than the first reference value REF1 (in the case of yes), operation S370 is executed.

[0234] In operation S330, it can be determined whether the slope of the ramp signal is less than the second reference value REF2. If the slope is not less than the second reference value REF2 (in the case of no), operation S350 is executed. If the slope is less than the second reference value REF2 (in the case of yes), operation S370 is executed.

[0235] A normal flag can be generated in operation S350. In the example embodiment, since the slope of the ramp signal RMP is less than the first reference value REF1 and greater than the second reference value REF2, Figure 3 The discriminator 290 in the middle can generate a normal flag indicating that the ramp signal RMP is normal.

[0236] A fault flag can be generated in operation S370. In the example embodiment, because the slope of the ramp signal RMP is greater than the first reference value REF1 or less than the second reference value REF2, Figure 3 The discriminator 290 in the middle can generate a fault flag indicating that the ramp signal RMP is faulty.

[0237] Figure 17 This is a block diagram of an electronic device 30 according to an example embodiment. (See reference) Figure 17 The electronic device 30 may include a processor 31, a memory 32, a storage device 33, an image sensor 34, an input / output (I / O) device 35, and a power supply 36, which can communicate with each other via a bus. Figure 10 The image sensor 500 can be applied to Figure 17 The image sensor 34 is used in the image sensor, therefore its redundant description is omitted.

[0238] Processor 31 can perform specific calculations or tasks required to operate electronic device 30. Memory 32 and storage device 33 can store data required to operate electronic device 30. For example, processor 31 may include a microprocessor, CPU, or application processor (AP). Memory 32 may include volatile memory and / or non-volatile memory. Storage device 33 may include, for example, a solid-state drive (SSD), hard disk drive (HDD), or CD-ROM.

[0239] Input / output device 35 may include, for example, input units (such as a keyboard, keypad, or mouse) and output units (such as a printer or monitor). Power supply 36 provides the operating voltage required to operate electronic device 30.

[0240] Figure 18 This is a block diagram of an electronic device 40 according to an example embodiment.

[0241] refer to Figure 18 Electronic device 40 may include image sensor 41, image signal processor (ISP) 42, access point (AP) 43, display device 44, working memory 45, storage device 46, user interface 47, and wireless transceiver 48. Figure 10 The image sensor 500 can be used as Figure 17 The image sensor 41 in the image sensor is in operation, therefore its redundant description is omitted.

[0242] Image sensor 41 can generate image data, such as raw image data, based on received light signals and provide binary data to ISP 42. ISP 42 can perform image processing on image data IDAT, which is digital data about the image, to change the data format (e.g., change the Bayer pattern to YUV or RGB format) or image processing, such as denoising, brightness adjustment, and / or sharpness adjustment, to enhance image quality. In an example embodiment, ISP 42 can perform preprocessing, such as, for example, white balance, denoising, demosaicing, lens tinting, gamma correction, edge detection, sharpness enhancement, noise reduction, gain tuning, waveform shaping, interpolation, edge enhancement, or pixel combination, to eliminate distortion in image data IDAT and improve algorithm performance. Since image data IDAT is preprocessed by ISP 42, the post-processing speed of image data IDAT can be improved. In an example embodiment, ISP 42 can be provided externally to image sensor 41 to improve space efficiency or internally to image sensor 41 to improve processing speed. For ease of description, ISP 42 is provided separately from AP 43, but the embodiment is not limited thereto. For example, in an example embodiment, the ISP 42 may be configured as an element of the AP 43 instead of being configured as separate hardware or a combination of hardware and software.

[0243] AP 43 can be provided as a system-on-a-chip (SoC), which typically controls the operation of electronic device 40 and runs applications, operating systems, etc. AP 43 can control the operation of ISP 42 and can provide the converted image data generated by ISP 42 to display device 44, or store the converted image data in storage device 46.

[0244] Working memory 45 may store programs and / or data processed or executed by AP 43. Storage device 46 may include non-volatile memory, such as, for example, NAND flash memory or resistive memory. For example, storage device 46 may be provided as a memory card, such as a multimedia card (MMC), embedded MMC (eMMC), secure digital card (SD), or micro SD card. Storage device 46 may store data and / or programs related to the execution algorithms controlling the image processing operations of ISP 42. When performing image processing operations, data and / or programs may be loaded into working memory 45. For example, working memory 45 or storage device 46 may include, but is not limited to, read-only memory (ROM), flash memory, phase-change random access memory (RAM) (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), ferroelectric RAM (FRAM), etc., as non-volatile memory, and static RAM (SRAM), dynamic RAM (DRAM), etc., as volatile memory.

[0245] User interface 47 may include various devices, such as, for example, a keyboard, keypad, touchpad, fingerprint sensor, and microphone, which can receive user input. User interface 47 can receive user input and provide signals corresponding to the user input to AP 43. Wireless transceiver 48 may include modem 48_1, transceiver 48_2, and antenna 48_3.

[0246] Figure 19 This is a block diagram of a vehicle 50 using a ramp signal RMP according to an example embodiment.

[0247] Figure 19 Vehicle 50 can be Figure 1 An example implementation of the electronic device 10. Alternatively, an electronic system including the electronic device 10 can be used to drive the vehicle 50.

[0248] According to the example embodiment, vehicle 50 can support an autonomous driving mode. The aforementioned electronic device 10 can be used to support the autonomous driving mode. Hereinafter, vehicle 50 may use a ramp signal RMP to sense objects or perform sampling, or provide various electronic functions based on the ramp signal RMP. It can be understood that the descriptions given above regarding the electronic device, image sensor, and monitoring circuitry apply to... Figure 19 50 vehicles.

[0249] refer to Figure 19The vehicle 50 using ramp signal RMP may include an image sensor 51, a user interface 52, a light detection and ranging (LIDAR) sensor 53, a radio detection and ranging (RADAR) sensor 54, a neural processing unit (NPU) 55, a CPU 56, and an ECU 57. The ECU 57 can receive steering angle and speed information from the steering wheel 58 and the engine 59. In an example embodiment, the vehicle 50 may also include a communication module, an I / O module, a safety module, a power control unit, and various other control units.

[0250] According to an example embodiment, vehicle 50 can detect objects using information about the external environment obtained through sensors (e.g., image sensor 51, LIDAR sensor 53, and / or RADAR sensor 54). To detect objects, the sensors (e.g., image sensor 51, LIDAR sensor 53, and RADAR sensor 54) can capture the object, measure the distance to the object, and provide the distance to a processor (e.g., CPU 56, NPU 55, and ECU 57). For object detection, image sensor 51, LIDAR sensor 53, and RADAR sensor 54 can use a ramp signal (RMP). The ramp signal (RMP) provides a signal that gradually increases or decreases in amplitude, allowing the signal or data of the sensed object to be sampled, and the sampled signal or data in analog form can be converted into digital information. In addition to the sensors described above, time-of-flight (ToF) sensors, ultrasonic sensors, infrared sensors, magnetic sensors, position sensors (e.g., Global Positioning System (GPS)), accelerometers, atmospheric pressure sensors, temperature / humidity sensors, proximity sensors, and / or gyroscope sensors can also be used. Those skilled in the art can intuitively infer the function of each sensor from its name; therefore, a detailed description will be omitted.

[0251] Image sensor 51 can sense images or light and includes a complementary metal-oxide-semiconductor (CMOS) image sensor. Image sensor 51 can provide images or visual information about an object. For example, image sensor 51 can be attached to the front of vehicle 50 and capture driving images or measure the distance to an object in front of vehicle 50. The location where image sensor 51 is attached is not limited to the above-described locations and can be various locations to achieve the desired goal of acquiring information about the object.

[0252] Image sensor 51 can capture the surrounding environment of vehicle 50. Vehicle 50 may include at least two image sensors to capture the surrounding environment in all 360-degree directions. In an example embodiment, image sensor 51 may include a wide-angle lens. In an example embodiment, vehicle 50 may include four image sensors at its front, rear, left, and right sides, but the embodiment is not limited thereto. A single image sensor can be used to capture the surrounding environment of vehicle 50. Image sensor 51 can continuously capture the surrounding environment of vehicle 50 and continuously provide information about the surrounding environment to vehicle 50.

[0253] Images sensed by image sensor 51 can be processed by CPU 56 and / or NPU 55. CPU 56 can detect objects by processing the sensed images using a motion-based method, and NPU 55 can detect objects by processing the sensed images using a shape-based method. Image sensor 51 can be attached to the front of vehicle 50 and sense the external environment at the front of vehicle 50, but is not limited thereto. Image sensor 51 can be attached to various sides of vehicle 50.

[0254] User interface 52 may include various electronic and mechanical devices, such as a dashboard on the driver's seat or front passenger seat, a display showing driving information, a navigation device, and an air conditioning system.

[0255] LIDAR sensor 53 can emit laser pulses, receive laser pulses reflected from an object, and measure the distance to the object. LIDAR sensor 53 may include, for example, a laser, a scanner, a receiver, and a positioning system. For the laser, light with a wavelength range from about 600 nanometers (nm) to about 1000 nanometers may be used according to example embodiments, but the example embodiments are not limited to this. For example, in some example embodiments, the wavelength range of the light may vary depending on the laser used. The scanner can quickly acquire information about the environment by scanning the sensed environment. Different types of scanners using multiple mirrors may exist. The receiver can receive laser pulses reflected from an object and detect and amplify photons in the laser pulses. The positioning system can identify the position coordinates and orientation of the device including the receiver to achieve a three-dimensional image. LIDAR sensor 53 and RADAR sensor 54 can be distinguished from each other by their effective measurement range.

[0256] RADAR sensor 54 can emit electromagnetic waves, receive electromagnetic waves reflected from an object, measure the distance to or identify the object, and measure the object's position and speed of movement. RADAR sensor 54 may include a transmitter and a receiver. The transmitter can generate and output electromagnetic waves, and the receiver can receive the waves reflected from the object and process the signals. Transmission and reception can be performed via a single antenna in RADAR sensor 54, but embodiments are not limited thereto. The frequency band of the electromagnetic waves emitted by RADAR sensor 54 may correspond to radio waves or microwaves, but may vary depending on the intended use of RADAR sensor 54. In an example embodiment, LIDAR sensor 53 and RADAR sensor 54 may be attached to vehicle 50 to help determine the positional relationship between vehicle 50 and an object of interest. RADAR sensor 54 can be categorized as a long-range RADAR sensor and a short-range RADAR sensor.

[0257] The NPU 55 can receive input data, perform operations using an artificial neural network, and provide output data based on the operation results. The NPU 55 may include a processor optimized for simultaneous matrix operations, capable of processing multiple operations in real time, learning from accumulated data, and deriving optimal values. The NPU 55 can be optimized for simultaneous matrix operations, thus processing multiple operations in real time, and can learn from accumulated data, deriving local maxima from current driving parameters.

[0258] In an example embodiment, the NPU 55 may include a dedicated processor for executing deep learning algorithms. For example, the NPU 55 can perform operations based on various types of networks, such as convolutional neural networks (CNNs), region-with-convolutional-neural networks (R-CNNs), region proposal networks (RPNs), recurrent neural networks (RNNs), fully convolutional networks, long short-term memory (LSTM) networks, and classification networks. However, the embodiments are not limited to this. Various operations that simulate human neural networks can be implemented.

[0259] The NPU 55 can receive driving images from the image sensor 51 and perform shape-based object detection based on the driving images. The NPU 55 can extract features from multiple objects and learn on its own based on accumulated data to identify objects in the driving images. For example, the NPU 55 can extract objects such as vehicles, pedestrians, traffic lights, and road lines based on features determined using accumulated data as learning material, which are decision criteria during driving.

[0260] CPU 56 typically controls the operation of vehicle 50. CPU 56 may include a single-core processor or a multi-core processor. CPU 56 can process or execute programs and / or data stored in memory. For example, CPU 56 can control the functions of NPU 55 and ECU 57 by executing programs stored in memory.

[0261] The CPU 56 can obtain the steering angle and speed of the vehicle 50 from the ECU 57. The steering angle can be determined by the user's operation of the steering wheel 58 and processed by the ECU 57 that controls the operation of the steering control equipment, and then provided to the CPU 56. The speed of the vehicle 50 can be measured based on at least one selected from the driver's pedal (e.g., accelerator operation), the engine speed 59, and the wheel speed measured by the wheel sensors, and can be processed by the ECU 57 that controls the speed of the vehicle 50 and then provided to the CPU 56.

[0262] CPU 56 determines the positional relationship between vehicle 50 and adjacent vehicles and issues commands to maintain the revolutions per minute (RPM) of the cruise control engine 59 to maintain a certain distance from adjacent vehicles according to a preset driving plan. To perform evasive steering when the distance between vehicle 50 and adjacent vehicles is less than or equal to a threshold distance, or in the event of an approaching object, CPU 56 can issue commands to change the steering angle by adjusting the steering wheel 58 to the left or right. Although in Figure 19 The diagram shows the steering wheel 58 and engine 59 in relation to steering angle and vehicle speed, but the embodiment is not limited thereto. Steering angle and vehicle speed can be determined via various components of vehicle 50.

[0263] The CPU 56 can detect objects in a driving image using a motion-based method. In this method, the amount of motion of the object over time is detected, and relative motion is determined. The driving image can be acquired continuously frame-by-frame by the image sensor 51. For example, frames can be captured at a rate of 60 frames per second (fps), and accordingly, the CPU 56 can detect motion within the frames, acquired at 1 / 60th of a second intervals over time. The motion-based method may include optical flow indicating the distribution of the motion vectors of the objects.

[0264] In addition to the image sensor 51, the CPU 56 can also use the distance to objects obtained from the LIDAR sensor 53 and the RADAR sensor 54 to help stabilize the driving state of the vehicle 50. The CPU 56 can also issue commands to control the internal / external state of the vehicle 50 based on the driver's operations on the user interface 52.

[0265] An ECU 57 may be provided to fully or partially control the operation of the vehicle 50. The ECU 57 may control the operation of the internal combustion engine, the operation of at least one electric motor, and the operation of the vehicle 50 via a Controller Area Network (CAN) multiplexed bus, based on the semi-automatic transmission (SAGB) or automatic transmission (AGB) and other parameters of the vehicle 50 involved in driver control.

[0266] ECU 57 can electronically control, for example, the engine 59 of vehicle 50, the actuators of the steering control device, the transmission control system, the anti-lock braking system, the airbag control system, etc., and provide vehicle 50 with vehicle speed based on the rotational speed of engine 59 or wheel speed measured by wheel sensors, and provide vehicle 50 with steering angle from the steering control device.

[0267] According to an example embodiment, ECU 57 can control the state of steering wheel 58 and engine 59 based on commands issued by CPU 56 and NPU 55. In the example embodiment, ECU 57 can decelerate or accelerate vehicle 50 according to commands issued by CPU 56 and NPU 55, and provide signals to engine 59 to reduce or increase engine speed for deceleration or acceleration. According to a preset driving plan, when the distance to an adjacent vehicle is less than or equal to a threshold distance, or in the presence of an approaching vehicle, ECU 57 can also change the steering wheel 58 to the left or right for evasive maneuvering.

[0268] According to the example embodiment, CPU 56 or ECU 57 can identify a fault in the ramp signal RMP and exit the autonomous driving mode of vehicle 50. For example, when vehicle 50 is driving in autonomous driving mode based on image sensor 51, CPU 56 or ECU 57 can identify a fault in the ramp signal RMP and immediately switch the autonomous driving mode to manual driving mode, thus improving user safety. For example, vehicle 50 can identify a fault in the ramp signal RMP and stop driving assistance functions based on the ramp signal RMP, thus ensuring driver safety.

[0269] ECU 57 and Figure 19 The CPU 56 is provided separately, but is not limited to this. Vehicle control functions of the ECU 57 can be included within the CPU 56. In this case, the CPU 56 can include at least two cores. Although the ECU 57 and... Figure 19 The CPU 56 is separated from the CPU 56, but the embodiments are not limited to this. For example, in an example embodiment, the ECU 57 may be located inside the CPU 56.

[0270] In example embodiments, such as Figure 19As shown, vehicle 50 may also include a communication module. The communication module can send data to or receive data from outside vehicle 50. For example, the communication module can communicate with external objects outside vehicle 50. In this case, the communication module can communicate using vehicle-to-everything (V2X). For example, the communication module can perform communication using vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P), and vehicle-to-mobile device (V2N). However, the embodiments are not limited to this. The communication module can use various known communication methods to send and receive data. For example, the communication module can use third-generation (3G), fourth-generation (4G) (e.g., Long Term Evolution (LTE)), fifth-generation (5G), Wi-Fi, Bluetooth, Bluetooth Low Energy (BLE), Zigbee, Near Field Communication (NFC), ultrasonic communication, etc., and may include both short-range and long-range communication.

[0271] As is customary in the field of this invention, exemplary embodiments are described and illustrated in the accompanying drawings according to functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuitry formed using semiconductor-based or other manufacturing techniques, such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc. In the case of blocks, units, and / or modules implemented by microprocessors or similar devices, they can be programmed using software (e.g., microcode) to perform the various functions discussed herein, and may optionally be driven by firmware and / or software. Alternatively, each block, unit, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware to perform some functions and processors (e.g., one or more programmable microprocessors and associated circuitry) to perform other functions.

[0272] Although the inventive concept has been shown and described in detail with reference to embodiments thereof, it will be understood that various changes to the form and details of the inventive concept may be made without departing from the spirit and scope of the inventive concept, as defined in the following claims.

Claims

1. An electronic device, comprising: A ramp generator is configured to generate a ramp signal for detecting data, the ramp signal increasing or decreasing with a specific slope. The main circuit is configured to perform at least one predefined function by detecting the data based on the ramp signal; The monitoring circuit is configured to output a verification signal indicating whether the ramp signal is faulty; as well as The controller is configured to control the execution of the at least one predefined function based on the verification signal. The monitoring circuit includes: A reference generator is configured to generate at least one reference value; A differential is configured to calculate the slope of the ramp signal based on the ramp signal and a zeroth reference value provided from the reference generator; A first comparator is configured to generate a first comparison result by comparing the slope with a first reference value; A second comparator is configured to generate a second comparison result by comparing the slope with a second reference value; and The discriminator is configured to determine whether the ramp signal is faulty based on the first comparison result and the second comparison result.

2. The electronic device according to claim 1, wherein, The first comparator, the second comparator, the differential, and the discriminator receive power signals. The differential also receives a preset signal, and The discriminator also receives reset signals and monitoring signals.

3. The electronic device according to claim 2, wherein, The discriminator is also configured to perform operations on the first comparison result and the second comparison result based on the reset signal.

4. The electronic device according to claim 3, wherein, The discriminator is further configured to output an operation value based on the monitoring signal, the operation value corresponding to the result of performing the operation on the first comparison result and the second comparison result.

5. The electronic device according to claim 2, wherein, The ramp signal includes a reset ramp period corresponding to the reset operation and a signal ramp period corresponding to the signal sensing operation, and The power signal is turned on during one of the reset ramp period and the signal ramp period.

6. The electronic device according to claim 2, wherein, The differential is also configured to control its transconductance based on the preset signal.

7. The electronic device according to claim 2, wherein, The preset signal is switched to the first logic level after the power signal is turned on. The reset signal is switched to the first logic level after the preset signal is switched to the second logic level, and The monitoring signal is activated after the reset signal transitions to the second logic level.

8. The electronic device according to claim 1, wherein, The differential includes two input terminals and a first transistor. The first transistor is configured to connect the two input terminals to each other.

9. The electronic device according to claim 8, wherein, The first transistor increases the transconductance of the differential by connecting the two input terminals to each other.

10. The electronic device according to claim 1, wherein, The first reference value corresponds to the normal upper limit of the ramp signal, and The second reference value corresponds to the normal lower limit of the ramp signal.

11. The electronic device according to claim 10, wherein, The first reference value is equal to twice the normal slope of the ramp signal.

12. The electronic device according to claim 10, wherein, The second reference value is equal to half of the normal slope of the ramp signal.

13. The electronic device according to claim 1, wherein, The differential is also configured to discriminate the ramp signal with respect to time.

14. The electronic device according to claim 1, wherein, The main circuit includes an analog-to-digital converter circuit.

15. The electronic device according to claim 1, wherein, The at least one predefined function includes the vehicle's autonomous driving mode.

16. An image sensor, comprising: A pixel array, comprising multiple pixels; A ramp generator is configured to generate ramp signals. The readout circuit is configured to compare the ramp signal with a pixel signal output from the pixel array and convert the pixel signal into a digital pixel value; The controller is configured to control the ramp generator and the readout circuit; as well as A monitoring circuit is configured to measure the slope of the ramp signal and output a signal to the controller indicating whether the ramp generator is faulty. The monitoring circuit includes: A reference generator is configured to generate at least one reference value; A differential is configured to calculate the slope of the ramp signal; At least one comparator is configured to generate a comparison result by comparing the slope of the ramp signal with the at least one reference value; and The discriminator is configured to determine whether the ramp signal is faulty based on the comparison result of the at least one comparator.

17. The image sensor according to claim 16, wherein, The differential includes two input terminals and a first transistor. The first transistor is configured to connect the two input terminals to each other.

18. A method of operating an electronic device as described in any one of claims 1 to 15, the method comprising: Receive ramp signals; Calculate the slope of the ramp signal; A comparison result is generated by comparing the slope of the ramp signal with at least one reference value; Based on the comparison results, determine whether the ramp signal is faulty; as well as The operation mode stops in response to a fault in the ramp signal, the operation mode being based on the ramp signal.

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