Laser projection system and control method

Abstract

This application discloses a laser projection system and control method, belonging to the field of laser projection technology. The method includes adding an AND gate logic circuit to the laser projection system. As long as both the motherboard and the display board determine that they meet the optical engine startup conditions, both inputs of the AND gate logic circuit detect a high-level signal. Thus, the output of the AND gate logic circuit can output a high-level signal to power the optical engine, thereby enabling the optical engine to start during the power-on process. Compared to determining the optical engine startup conditions on the motherboard through USB protocol interaction, the laser projection system provided in this application reduces the steps required to start the optical engine, thereby improving the startup speed of the laser projection system.

Description

Technical Field

[0001] This application relates to the field of laser projection technology, and in particular to a laser projection system and control method. Background Technology

[0002] A laser projection system comprises a motherboard, a display board, an optical engine, and a projection screen. The motherboard sends image signals to the display board, which in turn controls the optical engine to project the image signals onto the projection screen. Among these, controlling the laser projection system to complete the power-on process is currently a hot research topic.

[0003] Figure 1 and Figure 2 A power-on process for a laser projection system in related technologies is provided. For example... Figure 1 and Figure 2 As shown, the motherboard and display board communicate based on the USB (Universal Serial Bus) protocol. When the motherboard detects a power-on command, it controls the power supply to power the display board to start it. After starting, if the display board determines that it meets the conditions for optical engine startup (i.e., the conditions for laser activation), it sends a first notification message to the motherboard via the USB protocol, indicating that the display board currently meets the conditions for optical engine startup. After receiving the first notification message from the display board, the motherboard determines whether both it and the display board meet the conditions for optical engine startup. If the motherboard determines that both it and the display board meet the conditions for optical engine startup, it sends a second notification message to the display board via the USB protocol, indicating that both the motherboard and the display board currently meet the conditions for optical engine startup. After receiving the second notification message, the display board controls the power board to power the optical engine via a laser activation signal to start the laser in the optical engine, thereby completing the power-on process of the laser projection system.

[0004] The aforementioned laser projection system has a cumbersome startup process, which increases the time required to start the optical engine, resulting in a slow startup speed. Summary of the Invention

[0005] This application provides a laser projection system and a control method that can improve the startup speed of the laser projection system. The technical solution is as follows:

[0006] On one hand, a laser projection system is provided, the laser projection system including a motherboard, a display board, AND gate logic circuits, and an optical engine:

[0007] The first end of the motherboard is connected to the first input end of the AND gate logic circuit, the first end of the display panel is connected to the second input end of the AND gate logic circuit, and the output end of the AND gate logic circuit is connected to the first end of the optical engine.

[0008] The motherboard is used to: upon receiving a power-on command, if it detects that it currently meets the conditions for starting the optical engine, control the first terminal of the motherboard to output a high-level signal;

[0009] The display panel is used to: if it detects that it has the conditions to start the optical engine, control the first end of the display panel to output a high-level signal;

[0010] The AND gate logic circuit is used to: if both the first input terminal and the second input terminal of the AND gate logic circuit receive a high-level signal, control the output terminal of the AND gate logic circuit to output a high-level signal to supply power to the optical engine.

[0011] Optionally, the display panel includes a digital light processing (DLP) system circuit, the first terminal of which is connected to the second input terminal of the AND gate logic circuit, and the DLP system circuit is used to: control the first terminal of the DLP system circuit to output a high-level signal if it detects that it currently has the conditions to start the optical engine;

[0012] The AND gate logic circuit is integrated on the display panel.

[0013] Optionally, the motherboard includes a SOC circuit, the first terminal of which is connected to the first input terminal of the AND gate logic circuit, and the SOC circuit is used to: control the first terminal of the SOC to output a high-level signal if it detects that it currently has the conditions to start the optical engine;

[0014] The AND gate logic circuit is integrated on the motherboard.

[0015] Optionally, the AND gate logic circuit is further configured to: if either the first input terminal or the second input terminal of the AND gate logic circuit receives a low-level signal, control the output terminal of the AND gate logic circuit to output a low-level signal to stop supplying power to the optical engine.

[0016] Optionally, the display panel is further configured to: control the first end of the display panel to output a low-level signal if a fault is detected in the laser projection system.

[0017] Optionally, the motherboard is further configured to: control the first terminal of the motherboard to output a low-level signal if a fault is detected in the laser projection system.

[0018] Optionally, the laser projection system further includes a power supply board;

[0019] The output terminal of the AND gate logic circuit is connected to the first input terminal of the power board, and the first output terminal of the power board is connected to the first terminal of the optical engine.

[0020] The power board is used to supply power to the optical engine through the first output terminal of the power board when a high-level signal is detected at the first input terminal of the power board.

[0021] Optionally, the motherboard further includes a second terminal, the display panel further includes a second terminal, and the second terminal of the motherboard is connected to the second terminal of the display panel;

[0022] The second end of the motherboard and the second end of the display board are Universal Serial Bus (USB) interfaces.

[0023] On the other hand, a control method for a laser projection system is provided, wherein the laser projection system is any of the laser projection systems provided above; the method includes:

[0024] After receiving the power-on command, if the motherboard detects that it has the conditions to start the optical engine, it controls the first terminal of the motherboard to output a high-level signal.

[0025] If the display panel detects that it has the conditions to start the optical engine, it controls the first end of the display panel to output a high-level signal.

[0026] If the AND gate logic circuit detects that both its first and second input terminals have received high-level signals, it controls the output terminal of the AND gate logic circuit to output a high-level signal to power the optical engine.

[0027] Optionally, the display panel includes a digital light processing (DLP) system circuit, the first terminal of which is connected to the second input terminal of the AND gate logic circuit, and the DLP system circuit is used to: control the first terminal of the DLP system circuit to output a high-level signal if it detects that it currently has the conditions to start the optical engine;

[0028] The AND gate logic circuit is integrated on the display panel.

[0029] Optionally, the motherboard includes a SOC circuit, the first terminal of which is connected to the first input terminal of the AND gate logic circuit, and the SOC circuit is used to: control the first terminal of the SOC to output a high-level signal if it detects that it currently has the conditions to start the optical engine;

[0030] The AND gate logic circuit is integrated on the motherboard.

[0031] Optionally, the method further includes:

[0032] If either the first or second input of the AND gate logic circuit receives a low-level signal, the output of the AND gate logic circuit is controlled to output a low-level signal to stop powering the optical engine.

[0033] Optionally, the method further includes:

[0034] If the display panel detects a fault in the laser projection system, it controls the first terminal of the display panel to output a low-level signal.

[0035] Optionally, the method further includes:

[0036] If the motherboard detects a fault in the laser projection system, it controls the first terminal of the motherboard to output a low-level signal.

[0037] Optionally, the laser projection system further includes a power supply board;

[0038] The output terminal of the AND gate logic circuit is connected to the first input terminal of the power board, and the first output terminal of the power board is connected to the first terminal of the optical engine.

[0039] The AND gate logic circuit controls the output terminal of the AND gate logic circuit to output a high-level signal to activate the optical engine, including:

[0040] When the power board detects a high-level signal received at its first input terminal, it supplies power to the optical engine through its first output terminal.

[0041] Optionally, the motherboard further includes a second terminal, the display panel further includes a second terminal, and the second terminal of the motherboard is connected to the second terminal of the display panel;

[0042] The second end of the motherboard and the second end of the display board are Universal Serial Bus (USB) interfaces.

[0043] The beneficial effects of the technical solutions provided in this application include at least the following:

[0044] In this embodiment, an AND gate logic circuit is added to the laser projection system. As long as both the motherboard and the display board determine that they meet the optical engine startup conditions, both inputs of the AND gate logic circuit detect a high-level signal. Therefore, the output of the AND gate logic circuit can output a high-level signal to power the optical engine, thereby enabling the optical engine to start during the power-on process. Compared to determining the optical engine startup conditions on the motherboard through USB protocol interaction, the laser projection system provided in this embodiment reduces the steps required to start the optical engine, thus improving the startup speed of the laser projection system. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 A power-on process for a laser projection system in a related art is provided;

[0047] Figure 2 Provided and Figure 1 The power-on process of a laser projection system in consistent related technologies;

[0048] Figure 3 This is a schematic diagram of the structure of a laser projection system provided in an embodiment of this application;

[0049] Figure 4 This is a schematic diagram of another laser projection system provided in an embodiment of this application;

[0050] Figure 5 This is a schematic diagram of the structure of an optical engine provided in an embodiment of this application;

[0051] Figure 6 This is a schematic diagram of another laser projection system provided in an embodiment of this application;

[0052] Figure 7 This is a schematic diagram illustrating the working process of an AND gate logic circuit provided in an embodiment of this application;

[0053] Figure 8 This is a schematic diagram of another laser projection system provided in an embodiment of this application;

[0054] Figure 9 This is a flowchart of a control method for a laser projection system provided in an embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0056] Before providing a detailed description of the embodiments of this application, let us first introduce the application scenarios of the embodiments of this application.

[0057] A laser projection system, also known as a laser TV, typically consists of two parts: a projection screen and a laser projector. The laser projector projects images onto the screen, enabling functions such as video playback.

[0058] A laser projection host consists of multiple components such as a motherboard, display board, and optical engine. The interaction of these components enables the projection of images onto a projection screen. The way these components interact often affects the operating efficiency of the laser projection system, such as boot speed and fault response speed (i.e., error response speed).

[0059] Based on this, the present application provides a laser projection system and control method that can improve the startup speed and fault response speed of the laser projection system.

[0060] Figure 3 This is a schematic diagram of the structure of a laser projection system provided in an embodiment of this application. Figure 3 As shown, the laser projection system 00 includes a motherboard 10, a display board 20, an AND gate logic circuit 30, and an optical engine 40.

[0061] In this embodiment, the first terminal of the motherboard 10 is connected to the first input terminal of the AND gate logic circuit 30, the first terminal of the display panel 20 is connected to the second input terminal of the AND gate logic circuit 30, and the output terminal of the AND gate logic circuit is connected to the first terminal of the optical engine 40. That is, the laser projection system provided in this application adds an AND gate logic circuit 30 between the motherboard 10 and the display panel 20.

[0062] The motherboard 10 is used to: upon receiving a power-on command, if it detects that it meets the conditions for activating the optical engine, control its first terminal to output a high-level signal. The display board 20 is used to: if it detects that it meets the conditions for activating the optical engine, control its first terminal to output a high-level signal. The AND gate logic circuit 30 is used to: if both its first and second input terminals receive high-level signals, control its output terminal to output a high-level signal to supply power to the optical engine 40.

[0063] The AND gate logic circuit 30 includes two input terminals (a first input terminal and a second input terminal) and one output terminal. The function of the AND gate logic circuit 30 is as follows: the output terminal of the AND gate logic circuit 30 will only output a high-level signal if both input terminals receive a high-level signal; conversely, the output terminal of the AND gate logic circuit 30 will output a low-level signal if either input terminal receives a low-level signal.

[0064] Based on this, as long as both the motherboard 10 and the display board 20 determine that they meet the conditions for starting the optical engine, both inputs of the AND gate logic circuit 30 will detect a high-level signal. Thus, the output of the AND gate logic circuit 30 can output a high-level signal to power the optical engine 40, thereby enabling the optical engine 40 to start during the power-on process. Compared to determining the optical engine start-up conditions on the motherboard 10 via USB protocol interaction, the laser projection system 00 provided in this embodiment reduces the steps required to start the optical engine 40, thereby improving the power-on speed of the laser projection system 00.

[0065] It should be noted that, in this embodiment, starting the optical engine specifically refers to turning on the light source (also known as the laser) in the optical engine. Therefore, supplying power to the optical engine 40 specifically refers to powering on the light source. Detailed information about the light source will be provided later and will not be elaborated upon here.

[0066] In this embodiment, the signals received at the input terminal and output at the output terminal of the AND gate logic circuit 30 can, for example, be GPIO (General Purpose Input Output) signals. In this scenario, the first terminal of the motherboard 10, the first terminal of the display board 20, and the two input terminals and one output terminal of the AND gate logic circuit can all be referred to as GPIO interfaces.

[0067] GPIO signals are flexible, software-controlled digital signals. GPIO signals have two states: low (represented by 0) and high (represented by 1). Based on this, data can be exchanged with hardware through the GPIO interface, or hardware operation can be controlled, or the hardware's operating status signals can be read.

[0068] Based on the function of GPIO signals, in this embodiment of the application, the execution logic of the motherboard 10, the display board 20 and the optical engine 40 can be pre-configured to realize the function of the laser projection system provided in this embodiment of the application.

[0069] Specifically, the following configurations are pre-configured: Upon receiving a power-on command, if the motherboard 10 detects that it meets the conditions for starting the optical engine, it controls its first terminal to output a high-level GPIO signal, which is then input to the first input terminal of the AND gate logic circuit 30. Similarly, if the display board 20 detects that it meets the conditions for starting the optical engine, it controls its first terminal to output a high-level GPIO signal, which is also input to the first input terminal of the AND gate logic circuit 30. Finally, when the optical engine 40 receives the high-level GPIO signal output by the AND gate logic circuit 30, it starts the optical engine. After these configurations, the laser projection system can implement the power-on process provided in this embodiment, thereby improving the power-on speed.

[0070] For ease of subsequent explanation, the internal structure of the motherboard 10, display board 20 and optical engine 40 will be explained here.

[0071] (1) Motherboard

[0072] like Figure 4 As shown, in some embodiments, the motherboard 10 includes a SOC (system on chip) circuit 101. The SOC circuit 101 is used to receive a video stream, parse and decode the video stream to obtain decoded video data and audio data, and send the video data to the display board 20 so that the display board 20 drives the optical engine 40 to display the video data, and send the audio data to the speaker so that the speaker plays the audio data.

[0073] For example, the SOC circuit 101 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The SOC circuit 101 may be implemented using at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), or PLA (Programmable Logic Array). The SOC circuit 101 may also include a main processor and a coprocessor. The main processor, also known as the CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state.

[0074] like Figure 4 As shown, in some other embodiments, the motherboard 10 may also include a power amplifier module 102, which is used to drive devices such as speakers.

[0075] like Figure 4 As shown, in some other embodiments, the motherboard 10 may further include a first storage module 103 for storing data processed by the SOC circuit 101. For example, the first storage module 103 may include one or more computer-readable storage media, which may be non-transitory. The first storage module 103 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices.

[0076] The non-transitory computer-readable storage medium in the first storage module 103 can be used to store at least one instruction, which is executed by the SOC circuit 101 to implement the function of the motherboard 10 in this embodiment.

[0077] (2) Display panel and optical engine

[0078] like Figure 4 As shown, in some embodiments, the display panel 20 may include a DLP (digital light processing) system circuit 201. The DLP system circuit 201 is used to digitize video data and control the optical engine 40 to display images based on the digitized video data.

[0079] For example, the DLP system circuit 201 includes a DMD (digital micromirror device) chip, which works by controlling the direction of light reflection using numerous micromirrors.

[0080] Specifically, such as Figure 5 As shown, the optical engine 40 includes hardware such as a light source, lens, color wheel, and projection lens. Light emitted from the light source passes through the lens and color wheel and then illuminates the micromirrors of the DMD chip in the DLP system circuit 201. When the micromirrors are in the "on" position, they reflect the light to the projection lens, which then projects the light onto the projection screen to form an image. Specifically, activating the optical engine means turning on the light source (powering on the light source); therefore, the high-level signal output by the AND gate logic circuit can also be called the lamp-on signal. Alternatively, the light source can be, for example, a laser; in this case, the high-level signal output by the AND gate logic circuit can also be called the laser-on signal.

[0081] In addition, such as Figure 4 As shown, the display panel 20 may also include a drive circuit 202, which may, for example, be a drive circuit for driving a fan inside the host unit.

[0082] In addition, such as Figure 4 As shown, the display panel 20 may further include a second storage module 203, which is used to store data processed by the DLP system circuit 201. Details regarding the second storage module 203 can be found in the details of the first storage module 103, and will not be repeated here.

[0083] It should be noted that the internal structures of the motherboard 10, display board 20 and optical engine 40 described above are for illustrative purposes only, and the embodiments of this application do not limit the internal structures of the motherboard 10, display board 20 and optical engine 40.

[0084] Based on the above description of the internal structure of the motherboard and display board, in order to achieve product integration, the gate logic circuit 30 can be integrated on the display board 20 or the motherboard 10.

[0085] In some embodiments, such as Figure 6 As shown, the AND gate logic circuit 30 is integrated on the display panel 20. At this time, the display panel 20 includes a DLP system circuit 201. The first terminal of the DLP system circuit 201 is connected to the second input terminal of the AND gate logic circuit 30. The DLP system circuit 201 is used to control the first terminal of the DLP system circuit 201 to output a high-level signal if it detects that it has the conditions to start the optical engine.

[0086] Thus, when implementing the laser projection system provided in this application embodiment, only an AND gate logic circuit needs to be added to the display board, which is easy to implement. Moreover, both the AND gate logic circuit 30 and the DLP system circuit 201 are used to control the optical engine 40, and deploying them on a single board is more conducive to subsequent maintenance of the laser projection system.

[0087] In a scenario where the AND gate logic circuit 30 is integrated into the display panel 20, the working principle of the AND gate logic circuit 30 is illustrated below. Figure 7 As shown. In Figure 7 As shown, the motherboard inputs a signal to the AND gate logic circuit that indicates whether the motherboard has the conditions to turn on the LEDs (i.e., whether the motherboard has the conditions to start the optical engine). For example, when the motherboard has the conditions to turn on the LEDs, the signal is a high-level signal, and when the motherboard does not have the conditions to turn on the LEDs, the signal is a low-level signal.

[0088] like Figure 7 As shown, the display panel inputs a signal to the AND gate logic circuit that indicates whether the display panel has the conditions to turn on the lights (that is, whether the display panel has the conditions to start the optical engine). For example, when the display panel has the conditions to turn on the lights, the signal is a high-level signal, and when the display panel does not have the conditions to turn on the lights, the signal is a low-level signal.

[0089] When the AND gate logic circuit detects that both inputs have received a high-level signal, it outputs a laser-lighting signal through the display panel to activate the laser in the optical engine. This laser-lighting signal can be, for example, a high-level signal.

[0090] In other embodiments, such as Figure 8 As shown, the AND gate logic circuit 30 is integrated on the motherboard 10. At this time, the motherboard 10 includes a system-on-chip (SOC) circuit 101. The first terminal of the SOC circuit 101 is connected to the first input terminal of the AND gate logic circuit. The SOC circuit is used to control the first terminal of the SOC to output a high-level signal if it detects that it has the conditions to start the optical engine.

[0091] Thus, when implementing the laser projection system provided in this application embodiment, only an AND gate logic circuit needs to be added to the motherboard, and this operation is also easy to implement.

[0092] Alternatively, in some other embodiments, the AND gate logic circuit 30 may also be integrated on other chips of the laser projector host, or the AND gate logic circuit 30 may be a chip independent of other chips in the laser projector host. This application does not limit this.

[0093] Furthermore, in this embodiment, the optical engine is activated by controlling the power supply to the optical engine 40. Based on this, in some embodiments, such as... Figure 3 , Figure 4 , Figure 6 and Figure 8 As shown, the laser projection system 00 also includes a power supply board 50. In this case, the connection between the output of the AND gate logic circuit 30 and the first terminal of the optical engine 40 is implemented as follows: the output of the AND gate logic circuit 30 is connected to the first input of the power supply board 50, and the first output of the power supply board 50 is connected to the first terminal of the optical engine 40. The power supply board 50 is used to supply power to the optical engine through its first output when a high-level signal is detected at its first input.

[0094] That is, when the power board 50 detects that the AND gate logic circuit 30 outputs a high-level signal, it supplies power to the optical engine to start the optical engine.

[0095] The power board 50 supplies power to the optical engine 40 through the first output terminal, which can be understood as supplying power to the light source (i.e., the laser) in the optical engine 40.

[0096] In addition, such as Figure 3 , Figure 4 , Figure 6 and Figure 8 As shown, the power board 50 also includes a second output terminal, which is connected to the third terminal of the motherboard 10 to supply power to the motherboard 10. That is, the power board 50 is also used to supply power to the motherboard 10.

[0097] In addition, such as Figure 3 , Figure 4 , Figure 6 and Figure 8 As shown, the power board 50 also includes a third output terminal, which is connected to the third terminal of the display panel 20 to supply power to the display panel 20. That is, the power board 50 is also used to supply power to the display panel 20.

[0098] It should be noted that, in order to reduce power consumption, after the power board 50 is powered on, the power board 50 can only supply power to the motherboard 10. After the motherboard 10 detects the power-on command, it will then control the power board 50 to supply power to the display board 20.

[0099] Furthermore, in this embodiment, after detecting the power-on command, the motherboard 10 can determine whether it currently meets the conditions for starting the optical engine. Whether the motherboard 10 meets the conditions for starting the optical engine can be understood as whether the motherboard 10 is ready to send decoded video data to the display board 20. Specifically, the motherboard 10 can determine whether it has cached relevant video data of the image displayed on the projection screen after power-on. If it has cached relevant video data, it can determine that it meets the conditions for starting the optical engine.

[0100] The power-on command can be triggered by the user through a preset operation, such as clicking the power button on the remote control.

[0101] Furthermore, in this embodiment, whether the display panel 20 meets the conditions for starting the optical engine can be understood as whether the display panel 20 is ready to project video data onto the projection screen through the optical engine 40. Specifically, the display panel 20 can determine whether the color wheel in the optical engine 50 is ready, such as whether the color wheel is powered on.

[0102] In addition, such as Figure 4 , Figure 6 and Figure 8 As shown in the embodiment of this application, the motherboard 10 may further include a second end, and the display board 20 may further include a second end, and the second end of the motherboard 10 is connected to the second end of the display board 20. The second end of the motherboard 10 and the second end of the display board 20 are USB interfaces.

[0103] In other words, the motherboard 10 and the display board 20 can also communicate via the USB protocol to facilitate the transfer of other information between them, such as video data to be displayed.

[0104] Specifically, such as Figure 4 , Figure 6 and Figure 8 As shown, the second terminal of the motherboard 10 can be the second terminal of the SOC circuit 101, and the second terminal of the display board 20 can be the second terminal of the DLP system circuit 201. In this case, the SOC circuit 101 and the DLP system circuit 201 can also communicate via the USB protocol to facilitate the transfer of other information between them, such as video data to be displayed.

[0105] Optionally, the second end of the motherboard 10 and the second end of the display board 20 may also be interfaces based on other data transmission protocols, such as other types of bus interfaces. This application embodiment does not limit this.

[0106] In addition, such as Figure 4 , Figure 6 and Figure 8 As shown in this embodiment, the display panel 20 further includes a fourth terminal, and the optical engine 40 further includes a second terminal, with the fourth terminal of the display panel 20 connected to the second terminal of the optical engine 40. The fourth terminal of the display panel 20 and the second terminal of the optical engine 40 are HSSI (high-speed serial interface).

[0107] That is, the motherboard 10 and the optical engine 40 can also communicate via the HSSI protocol so that the display board 20 can transmit some control information to components such as the color wheel in the optical engine 40.

[0108] It should be noted that, Figure 3 , Figure 4 , Figure 6 and Figure 8 The structure of the laser projection system shown is for illustrative purposes only and does not constitute a limitation on the structure of the laser projection system provided in the embodiments of this application.

[0109] based on Figure 3 , Figure 4 , Figure 6 and Figure 8 The laser projection system shown can shorten the time required to light up the light source (i.e., the laser) during startup, thereby improving startup speed. Optionally, based on Figure 3 , Figure 4 , Figure 6 and Figure 8 The laser projection system shown can also shorten the time it takes for the light source (i.e., the laser) to shut down after the display panel 20 reports an error, thereby reducing the power consumption of the laser projection system. This also improves the fault response speed (or error response speed).

[0110] Based on this, if either the first input terminal or the second input terminal of the AND gate logic circuit 30 receives a low-level signal, the output terminal of the AND gate logic circuit 30 is controlled to output a low-level signal to stop powering the optical engine, thereby turning off the light source in the optical engine 40 so that the light source no longer projects light onto the DMD in the display panel, thus reducing power consumption.

[0111] The motherboard 10 and the display board 20 can be preset to control the corresponding first-end output low-level signal in which scenarios to turn off the optical engine.

[0112] In some embodiments, the display panel 20 is also configured to: control the first terminal of the display panel 20 to output a low-level signal if a fault is detected in the laser projection system.

[0113] Thus, when the display board 20 detects a fault in the laser projection system, it can directly stop supplying power to the light source through the AND gate logic circuit 30 without reporting an error to the main board 10, thereby turning off the light source and improving the response speed of the laser projection system after an error is reported.

[0114] In addition, the display panel 20 can detect a variety of faults in the laser projection system. For example, it may detect a fault in the color wheel or lens in the optical engine 40, or it may detect that the DLP system circuitry cannot communicate with the motherboard.

[0115] Optionally, in other embodiments, the motherboard 10 is also configured to: control the first terminal of the motherboard 10 to output a low-level signal if a fault is detected in the laser projection system.

[0116] Thus, when the motherboard 10 detects a fault in the laser projection system, it can directly stop supplying power to the light source through the AND gate logic circuit 30 to shut down the light source, thereby improving the response speed of the laser projection system after an error is reported.

[0117] In addition, the motherboard 10 may detect a fault in the laser projection system under various circumstances. For example, it may detect a fault in a module on the motherboard, or it may detect that the SOC circuit cannot communicate with the display board 20.

[0118] It should be noted that the scenario in which the first terminal of the motherboard 10 and the display board 20 outputs a low-level signal is used for illustrative purposes. When applying the laser projection system provided in this application embodiment, the trigger signal for the first terminal of the motherboard 10 and the display board 20 to output a low-level signal can be set according to requirements, so as to stop powering the optical engine 40 in a specific scenario.

[0119] In summary, the embodiments of this application provide a solution that can solve the problem of slow boot speed caused by USB communication between the motherboard and the display board. At the same time, it can also optimize the error response process to make the error response more timely and ensure that the laser TV can play a more effective protective role when it malfunctions.

[0120] In addition, this application also provides a control method for a laser projection system, wherein the laser projection system is any of the laser projection systems described above. Figure 9 As shown, the method includes the following steps.

[0121] Step 901: After receiving the power-on command, if the motherboard detects that it has the conditions to start the optical engine, it controls the first terminal of the motherboard to output a high-level signal.

[0122] Step 902: If the display panel detects that it has the conditions to start the optical engine, it controls the first end of the display panel to output a high-level signal.

[0123] Step 903: If the AND gate logic circuit detects that both its first and second input terminals have received high-level signals, it controls the output terminal of the AND gate logic circuit to output a high-level signal to power the optical engine.

[0124] Optionally, in this method, if either the first input terminal or the second input terminal of the AND gate logic circuit receives a low-level signal, the output terminal of the AND gate logic circuit is controlled to output a low-level signal to stop powering the optical engine.

[0125] Optionally, if the display panel detects a fault in the laser projection system, it controls the first terminal of the display panel to output a low-level signal.

[0126] Optionally, if the motherboard detects a fault in the laser projection system, it controls the first terminal of the motherboard to output a low-level signal.

[0127] Figure 9 The detailed implementation methods and corresponding technical effects of each step in the embodiments can be found in the foregoing embodiments on the laser projection system, and will not be described in detail here.

[0128] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0129] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present application should be included within the protection scope of the present application.

Claims

1. A laser projection system, characterized in that, The laser projection system includes a motherboard, a display board, AND gate logic circuits, and an optical engine. The first end of the motherboard is connected to the first input end of the AND gate logic circuit, the first end of the display panel is connected to the second input end of the AND gate logic circuit, and the output end of the AND gate logic circuit is connected to the first end of the optical engine; the motherboard also includes a second end, the display panel also includes a second end, and the second end of the motherboard is connected to the second end of the display panel; the second end of the motherboard and the second end of the display panel are Universal Serial Bus (USB) interfaces; The motherboard is used to: upon receiving a power-on command, if it detects that it currently meets the conditions for starting the optical engine, control the first terminal of the motherboard to output a high-level signal; wherein the motherboard is used to: determine whether it has cached relevant video data of the image displayed on the projection screen after power-on, and if it has cached relevant video data, determine that it meets the conditions for starting the optical engine. The display panel is used to: if it detects that it has the conditions to start the optical engine, control the first end of the display panel to output a high-level signal; wherein the display panel is used to: determine whether the color wheel in the optical engine is ready; if the color wheel in the optical engine is ready, determine that it has the conditions to start the optical engine; whether the color wheel is ready includes: whether the color wheel is powered on. The AND gate logic circuit is used to: if both the first input terminal and the second input terminal of the AND gate logic circuit receive a high-level signal, control the output terminal of the AND gate logic circuit to output a high-level signal to supply power to the optical engine; During the power-on process, the display panel no longer sends a first notification message to the motherboard via the USB protocol to indicate that the display panel has met the conditions for starting the optical engine, and the motherboard no longer sends a second notification message to the display panel via the USB protocol to indicate that both the motherboard and the display panel have met the conditions for starting the optical engine.

2. The laser projection system as described in claim 1, characterized in that, The display panel includes a digital light processing (DLP) system circuit. The first terminal of the DLP system circuit is connected to the second input terminal of the AND gate logic circuit. The DLP system circuit is used to: control the first terminal of the DLP system circuit to output a high-level signal if it detects that it has the conditions to start the optical engine. The AND gate logic circuit is integrated on the display panel.

3. The laser projection system as described in claim 1, characterized in that, The motherboard includes a system-on-a-chip (SOC) circuit. The first terminal of the SOC circuit is connected to the first input terminal of the AND gate logic circuit. The SOC circuit is used to: control the first terminal of the SOC to output a high-level signal if it detects that it has the conditions to start the optical engine. The AND gate logic circuit is integrated on the motherboard.

4. The laser projection system as described in claim 1, characterized in that, The AND gate logic circuit is further configured to: if either the first input terminal or the second input terminal of the AND gate logic circuit receives a low-level signal, control the output terminal of the AND gate logic circuit to output a low-level signal to stop supplying power to the optical engine.

5. The laser projection system as described in claim 4, characterized in that, The display panel is also used to: control the first end of the display panel to output a low-level signal if a fault is detected in the laser projection system.

6. The laser projection system as described in claim 4, characterized in that, The motherboard is also used to: control the first terminal of the motherboard to output a low-level signal if a fault is detected in the laser projection system.

7. The laser projection system as described in claim 1, characterized in that, The laser projection system also includes a power supply board; The output terminal of the AND gate logic circuit is connected to the first input terminal of the power board, and the first output terminal of the power board is connected to the first terminal of the optical engine. The power board is used to supply power to the optical engine through the first output terminal of the power board when a high-level signal is detected at the first input terminal of the power board.

8. A control method for a laser projection system, characterized in that, The laser projection system is the laser projection system according to any one of claims 1-7; the method includes: After receiving the power-on command, if the motherboard detects that it meets the conditions for starting the optical engine, it controls the first terminal of the motherboard to output a high-level signal; wherein the motherboard is used to: determine whether it has cached the relevant video data of the image to be displayed on the projection screen after power-on; if it has cached the relevant video data, it determines that it meets the conditions for starting the optical engine. If the display panel detects that it has the conditions to start the optical engine, it controls the first end of the display panel to output a high-level signal; wherein the display panel is used to: determine whether the color wheel in the optical engine is ready; if the color wheel in the optical engine is ready, it determines that it has the conditions to start the optical engine. Whether the color wheel is ready includes: whether the color wheel is powered on. If the AND gate logic circuit detects that both its first and second input terminals have received high-level signals, it controls the output terminal of the AND gate logic circuit to output a high-level signal to power the optical engine. During the power-on process, the display panel no longer sends a first notification message to the motherboard via the USB protocol to indicate that the display panel has met the conditions for starting the optical engine, and the motherboard no longer sends a second notification message to the display panel via the USB protocol to indicate that both the motherboard and the display panel have met the conditions for starting the optical engine.

9. The method as described in claim 8, characterized in that, The method further includes: If either the first or second input of the AND gate logic circuit receives a low-level signal, the output of the AND gate logic circuit is controlled to output a low-level signal to stop powering the optical engine.

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