Method of patterning

Abstract

A method of patterning. The method can include providing a layer on a substrate, the layer having a plurality of holes, and directing a plurality of ions along a trajectory to elongate the plurality of holes in a first direction, the first direction extending within a substrate plane bounded by a front surface of the substrate. The invention can provide the ability to reduce the number of masks used to produce a pattern of features, where the features can be separated by a distance that is less than a threshold separation that can be achieved by a single mask.

Description

[0001] This application is a divisional application of Chinese patent application No. 201680048977.8, entitled "Method for Patterning a Substrate", which was filed on June 2, 2016. Technical Field

[0002] The embodiments of the present invention relate to transistor fabrication technology, and more specifically, to a method for patterning a substrate. Background Technology

[0003] As semiconductor devices continue to scale down to smaller sizes, the ability to pattern features becomes increasingly difficult to achieve. One challenge includes the ability to obtain features of a target size for a given technology generation. Another challenge is the ability to obtain the correct shape and packing density of the patterned features, and the ability to correctly cover structures patterned in previous processing operations.

[0004] In another instance, overlay error represents a challenge in extending lithography to advanced nodes. While multi-patterning has been used to address the reduction in feature linewidth and pitch, overlay has become an increasingly significant challenge. One reason is that as feature linewidth / space decreases, the overlay requirement becomes smaller. A second reason is the emergence of multiple overlay issues between the cut mask on the substrate and other features, arising from the use of multiple cut masks.

[0005] Considering these and other factors, the improvements of this invention can be useful. Summary of the Invention

[0006] This summary is provided to introduce, in a simplified form, a series of concepts further elaborated in the detailed description. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help define the scope of the claimed subject matter.

[0007] In one example, a method of patterning a substrate may include: providing a surface feature on the substrate, the surface feature having a first dimension along a first direction in a plane of the substrate and a second dimension along a second direction in a plane of the substrate, wherein the second direction is perpendicular to the first direction; and, in the presence of a reactive atmosphere containing a reactive substance, guiding a first ion in a first exposure to the surface feature at a non-zero incident angle relative to a perpendicular line to the plane of the substrate along the first direction; wherein the first exposure etches the surface feature along the first direction, wherein after the guiding, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction that is different from the first dimension.

[0008] In another embodiment, a method of patterning a substrate may include: providing a layer having at least one hole on the substrate; and, in the presence of a reactive atmosphere containing a reactive substance, guiding a first ion in a first exposure to the layer at a non-zero incident angle relative to a plane of the substrate along a first direction; wherein the first exposure utilizes the first ion and the reactive atmosphere to increase the first hole size of the hole along the first direction, without increasing the second hole size of the hole along a second direction perpendicular to the first direction.

[0009] In another embodiment, a method for patterning a substrate may include: determining a critical spacing between adjacent mask features for a photolithography process; providing a layer on the substrate; forming a first set of holes using a first photolithography mask, wherein the spacing between adjacent features of the first photolithography mask is not less than the critical spacing; and, in the presence of a reactive atmosphere containing a reactive substance, guiding first ions in a first exposure to the layer at a non-zero incident angle along a first direction perpendicular to a plane of the substrate, wherein after the first exposure, at least two holes of the first set of holes are characterized by a first final hole spacing along the first direction, the first final hole spacing being less than the critical spacing. Attached Figure Description

[0010] Figure 1A A side view of the processing apparatus structure according to various embodiments of the present invention is shown.

[0011] Figure 1B Shown in accordance with Figure 1A The side view of the device structure after processing is shown in the scenario.

[0012] Figure 1C Show Figure 1A A top-down view of the scene shown.

[0013] Figure 1D Show Figure 1B A top-down view of the scene shown.

[0014] Figure 2A A side view of the processing apparatus structure according to various embodiments of the present invention is shown.

[0015] Figure 2B Explanation based on Figure 2A The side view of the device structure after processing is shown in the scenario.

[0016] Figure 2C Show Figure 2A A top-down view of the scene shown.

[0017] Figure 2D Show Figure 2B A top-down view of the scene shown.

[0018] Figures 3A to 3D This describes another example of one-dimensional reactive ion etching according to other embodiments of the present invention.

[0019] Figure 4A and Figure 4B This describes another example of one-dimensional reactive ion etching according to other embodiments of the present invention.

[0020] Figures 5A to 5B Another embodiment in which a hole array can be generated using one-dimensional reactive ion etching is shown.

[0021] Figure 6 This describes contact structures formed using one-dimensional reactive ion etching according to other embodiments of the present invention.

[0022] Figure 7A and Figure 7B This illustrates yet another embodiment of the invention in which a one-dimensional reactive ion etching is applied to a memory structure.

[0023] Figure 8A Explain the arrangement of the target devices as shown in the plan view. Figure 8B The mask arrangement of the three masks is shown. Figure 8C An exemplary mask arrangement using two masks is shown, while Figure 8D Showing self Figure 8C An exemplary trench arrangement derived from the mask arrangement shown.

[0024] Figure 9A The diagram shows a top view of the line array before processing.

[0025] Figure 9B Show Figure 9A The line array shown is a top plan view after one-dimensional reactive ion etching according to one embodiment.

[0026] Figure 9C Show Figure 9AThe line array shown is a top plan view after one-dimensional reactive ion etching according to another embodiment.

[0027] Figure 10 An exemplary process flow is shown.

[0028] [Symbol Explanation]

[0029] 100, 200, 300, 400, 600: Device structure

[0030] 102, 302, 402: First floor

[0031] 104, 304, 404: Second layer

[0032] 106, 306, 406: Third floor

[0033] 108, 308, 408: Fourth Floor

[0034] 110, 310, 410: Hole

[0035] 112, 204, 908, 910: Ions

[0036] 114, 116, 206, 208, 210: Sidewalls

[0037] 118: Substrate plane

[0038] 120: Perpendicular line

[0039] 122: Reactive substances

[0040] 124: Top surface

[0041] 126: Surface

[0042] 130: Extraction plate

[0043] 132: Extracting the opening

[0044] 134: Plasma

[0045] 150, 902: Substrate

[0046] 202: Column

[0047] 412, 720: Direction

[0048] 502: Target Shape

[0049] 504: Mask Feature

[0050] 506: Final Shape

[0051] 508: End portion

[0052] 510: Proximity mask

[0053] 520: Patterned layer

[0054] 522: Trench

[0055] 602: Source / Drain Region

[0056] 604, 606: Contact through holes

[0057] 702: Memory Array

[0058] 704: Storage Node Contact

[0059] 706: Bit line contact

[0060] 708: Word Line

[0061] 710: Bit Line

[0062] 712: Initial contact hole

[0063] 714: Contact Hole

[0064] 716: Active Zone

[0065] 800: Device Arrangement

[0066] 820: Mask Arrangement

[0067] 830: Groove arrangement

[0068] 904: Lines

[0069] 906, 916, 926: Array

[0070] 1000: Exemplary process flow

[0071] 1002, 1004: Steps

[0072] D1, D2, D3, D4: Width

[0073] P0, P1, P2, P3, P4: Positions

[0074] S1, S2: Interval

[0075] S4: Distance

[0076] S5, S6: Spacing

[0077] S T : Limitation interval

[0078] X, Y, Z: Direction axes

[0079] θ, φ: angles Detailed Implementation

[0080] Embodiments of the invention will now be described more fully below with reference to the accompanying drawings, in which certain embodiments are illustrated. The subject matter of the invention can be implemented in many different forms and should not be considered as limited to the embodiments described herein. These embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the subject matter to those skilled in the art. Throughout the drawings, like numbers refer to like elements.

[0081] This invention provides novel techniques for patterning substrates, and more specifically, novel techniques for etching features disposed on a substrate, such as surface features. As used herein, the term "substrate" can refer to entities such as semiconductor wafers, insulating wafers, ceramics, and any layers or structures disposed thereon. Thus, surface features, layers, a series of layers, or other entities can be considered as disposed on a substrate, which can represent, for example, a combination of structures such as silicon wafers, oxide layers, etc.

[0082] In various embodiments, the surface features can be used to pattern layers disposed beneath the surface features. Examples of surface features include holes formed within the layer, such as through-holes or trenches. In other instances, surface features may be pillars, line structures (lines), or other features extending over a substrate. The term "hole" may refer to a structure extending through the entire layer, such as a through-hole. The term "hole" may also refer to a structure such as a depression or recess formed within the layer that does not extend through the entire thickness of the layer. Furthermore, the term "layer" as used herein may refer to a continuous layer, a semi-continuous layer having a blanket region and independent feature regions, or a group of independent features generally made of the same material and disposed on a common layer or substrate.

[0083] In various embodiments, multiple techniques are provided to modify the one or more surface features after they have been formed by photolithography. Such post-lithography processing overcomes the shortcomings of known photolithography techniques, particularly at the nanoscale, such as for features with minimum dimensions in the range of 2 nm to 100 nm.

[0084] According to various embodiments, ions are guided to the layer along a first direction or a target direction. The target direction of the ions can be designed to guide the ions to a given surface feature to etch that given surface without etching other surfaces.

[0085] Figure 1A A side view of a processing apparatus structure 100 according to various embodiments of the present invention is shown. Figure 1C Show Figure 1AThe diagram shows a top plan view of the scenario. Device structure 100 may include a first layer 102, a second layer 104, a third layer 106, and a fourth layer 108. These layers may be disposed on a substrate 150. The fourth layer 108 may include a hole 110, wherein the hole 110 may extend through the entire fourth layer 108. The hole 110 may be formed in the fourth layer 108 using known photolithography techniques. The hole 110 may be used to pattern at least one additional layer (e.g., the first layer 102, the second layer 104, or the third layer 106) disposed beneath the fourth layer 108. Examples of the fourth layer 108 include photoresist, an antireflective coating layer (ARC), silicon nitride, silicon oxide, silicon, or other layers. Examples of the third layer 106, the second layer 104, or the first layer 102 include an antireflective coating layer (ARC), silicon nitride, silicon oxide, silicon, carbon, photoresist, or TiN. The embodiments described are not limited to this context. Specifically, the ARC layer or coating may contain one or more of the following: carbon, silicon, nitrogen, hydrogen, and oxygen.

[0086] To pattern the underlying layer, the hole 110 can be provided with suitable dimensions, including a first dimension along a first direction (e.g., along the Y-axis of the Cartesian coordinate system shown). The hole 110 may also have a second dimension along a second direction (e.g., along the X-axis). In some cases, it may be advantageous to selectively increase the size of the hole 110 along the first direction but not along a second direction perpendicular to the first direction. Figure 1A and Figure 1C In the example shown, the hole 110 may have a rectangular shape in the XY plane, which represents a plane parallel to the substrate plane 118.

[0087] Figure 1A and Figure 1C An exemplary method for increasing the first hole size of hole 110 along a direction parallel to the Y-axis is described. Specifically, as Figure 1C As shown, ions 112 are guided to the fourth layer 108 along a first direction (i.e., along a direction parallel to the Y-axis). Figure 1A As shown, ions 112 are also guided along trajectories forming a non-zero incident angle (shown as angle θ) relative to the substrate plane 118. These trajectories allow ions 112 to collide with sidewalls 114 without colliding with sidewalls 116, which may extend parallel to the YZ plane. In this way, the material of sidewalls 114 can be etched without etching the material of sidewalls 116.

[0088] Figure 1B Shown in accordance with Figure 1A The side view of the scene processing device structure 100 shown. Figure 1D Show Figure 1BThe diagram shows a top view of the scenario. As shown, hole 110 has a third hole size along a first direction (parallel to the Y-axis) that is larger than the first hole size, while the second hole size along a second direction (parallel to the X-axis) remains unchanged. Therefore, the size of hole 110 can be selectively extended only along the Y-axis and not along the X-axis.

[0089] According to various embodiments, under conditions of a reactive atmosphere containing a reactive substance (shown as reactive substance 122), ions 112 can be guided to the fourth layer 108 as indicated by the black dots. Ions 112 and reactive substance 122 can be provided by suitable equipment capable of providing the reactive substance and the ion beam. Examples of such equipment include plasma-based devices having an extraction system that extracts ions through an extraction aperture and guides the ions to the substrate. Figure 1A An example of an extraction plate 130 is described, which includes an extraction opening 132 for extracting ions 112 from plasma 134 and guiding the ions 112 to a fourth layer 108. The angle of incidence of the ions 112 relative to the vertical 120 can be controlled by controlling known parameters of the plasma system, including plasma power, gas pressure, opening size, and displacement between different portions of the extraction plate. In some instances, ions can be extracted along trajectories parallel to each other or deviating from each other by + / - 5 degrees. This allows the ions 112 to be guided as a parallel ion beam along the target direction.

[0090] Figure 1C A variation of the extraction plate 130 is described, wherein the extraction opening 132 extends along a second direction parallel to the X-axis, meaning that the dimension of the extraction opening 132 along the X-axis is greater than the dimension of the extraction opening 132 along the Y-axis. In some instances, the dimension of the extraction opening 132 along the X-axis may be greater than 100 mm, while the dimension of the extraction opening 132 along the Y-axis may be less than 30 mm. The embodiments described are not limited to this context. Ions 112 can correspondingly form a ribbon beam having high uniformity along the X-axis, wherein the trajectories of ions 112 have high degree of alignment along the Y-axis as shown in the figure. In other words, ions 112 can form a ribbon beam having a minor axis parallel to a first direction (Y-axis) and a major axis parallel to a second direction (X-axis), wherein the second direction is perpendicular to the first direction.

[0091] Additionally, reactive substance 122 may be provided in the form of a neutral substance, ions, free radicals, or a combination of neutral substances, ions, and free radicals. Ion 112 may itself be an inert ion or may contain reactive substance. The combination of ion 112 and reactive substance 122 may comprise a known recipe for performing reactive ion etching on materials, including silicon oxide layers, silicon nitride layers, silicon layers, carbon layers, and other material systems. The embodiments described are not limited to this context.

[0092] When ions 112 are used in conjunction with reactive material 122 (which is designed to promote reactive ion etching), this configuration enables a novel "one-dimensional reactive ion etching" process in which reactive ion etching can be confined to target features on the substrate surface without affecting other features. One-dimensional reactive ion etching can differ from conventional reactive ion etching, in which the guided ions can etch material along a vertical direction and along more than one direction in a plane of the substrate perpendicular to the vertical direction. For example, in conventional reactive ion etching (ashing) of via structures formed within a layer, the diameter of the via structure can be increased non-selectively along the X and Y directions.

[0093] exist Figure 1A and Figure 1C In the illustrated example, etching can be performed on a surface of a selected material in which reactive substance 122 and ions 112 are present. Specifically, at least some of the reactive substances 122 may be neutral substances, which can pass through extraction openings 132 without specific directionality and can impact various surfaces of the fourth layer 108 and the third layer 106 within the openings 110. As described above, and according to various embodiments, ions 112 may be confined to impacting sidewalls 114, the top surface 124 of the fourth layer 108, and the surface 126 of the third layer 106. Regarding surface 126, ions 112 and reactive substance 122 may be designed to selectively etch the material of the fourth layer 108 relative to the material of the third layer 106, meaning that the etching rate of the fourth layer 108 is different from the etching rate of the third layer 106. In one specific example, the fourth layer 108 may be silicon oxide and the third layer 106 may be silicon nitride. Therefore, although ions 112 and reactive substance 122 can impact surface 126, however... Figures 1A to 1D In the scenario shown, etching of the third layer 106 may occur almost or not at all within the hole 110. Therefore, in situations such as Figure 1A and Figure 1CFollowing the first exposure to ions 112, layer 108 can exhibit an elongated aperture 110 along the Y-axis, wherein the thickness of the fourth layer 108 is also reduced. In some embodiments, the fourth layer 108 can be completely removed in subsequent processing. Therefore, the thickness loss of the fourth layer 108 during the exposure to ions 112 is acceptable, to the extent that sufficient thickness is maintained to pattern underlying layers such as the third layer 106 in subsequent processing. Furthermore, since the material of the fourth layer 108 is removed by a reactive ion etching process, the material of the fourth layer 108 can remain volatile once etched and can not be redeposited on other surfaces of the device structure 100 (e.g., in other areas of the aperture 110).

[0094] Figure 2A A side view of a processing apparatus structure 200 according to various embodiments of the present invention is shown. Figure 2C Show Figure 2A The diagram shows a top plan view of the scenario. The device structure 200 may include a first layer 102, a second layer 104, a third layer 106, and a pillar structure (shown as pillar 202) disposed on the third layer 106. Although a single pillar structure is shown, in various embodiments, multiple pillar structures similar to pillar 202 may be provided on the third layer 106. Pillar 202 may be disposed within an additional layer containing a blanket-covered area disposed on the third layer 106. These layers may also be disposed on a substrate 150. Pillar 202 can be used to pattern one or more layers (e.g., the first layer 102, the second layer 104, or the third layer 106) disposed below the fourth layer 108. This can be achieved by forming lower features disposed in the first layer 102, the second layer 104, or the third layer 106 by etching pillar 202 perpendicularly along vertical line 120.

[0095] Since pillar 202 can be used to define one or more device structures in the underlying layer having similar dimensions to pillar 202, precise control over the dimensions of pillar 202 is beneficial. In various embodiments, the dimensions of pillar 202 along the X, Y, and Z axes can be approximately a few nanometers or tens of nanometers. In some cases, pillar 202 can be formed using known photolithography processes. After the photolithography process is completed, the relative dimensions of pillar 202 in the XY plane can be as follows: Figure 2B As shown, the dimension along the Y-axis is larger than the dimension along the X-axis. As shown, column 202 has a rectangular, non-square shape in the XY plane. When the target shape of column 202 is square, according to an embodiment of the present invention, it can be as follows... Figure 2A and Figure 2C The diagram shows how ions 204 are guided to column 202. See above for reference. Figure 1A and Figure 1CThe generally described method provides ions 204, whose trajectories can be parallel to the Y-axis and can form a non-zero angle of incidence relative to the perpendicular 120 (as shown by angle θ). This ensures that sidewall 206 is etched while sidewall 208 remains unetched. In this way, the size of pillar 202 can be selectively reduced along the Y-axis, while the size of pillar 202 along the X-axis remains unchanged. Figure 2D In the illustrated example, exposure of ions 204 results in a square shape for pillars 202 in the XY plane. Furthermore, since ions 204 are provided in the presence of reactive substance 122, they can selectively etch pillars 202, either without etching the third layer 106 or at a much lower etching rate than that of pillars 202. In other embodiments, a line array is formed on a substrate, wherein the width of the lines along their shorter direction is greater than the target line width. The line array can undergo one-dimensional reactive ion etching, in which ions are guided toward the lines in a direction perpendicular to their longer direction. This selectively reduces the line width along the shorter direction without reducing the line length, thereby achieving a close tip-to-tip spacing between adjacent lines while producing the target line width.

[0096] Figures 3A to 3D This describes another example of one-dimensional reactive ion etching according to other embodiments of the present invention. Figure 3A A side view showing the initial state of the device structure 300 according to various embodiments of the present invention. Figure 3B Show Figure 3A A top-down view of the scene shown. Figure 3C The device structure 300 is shown in reference above. Figures 1A to 2D A side view of the final state after processing with ions, which is generally described. Figure 3D Show Figure 3C A top-down plan view of the scene shown. Figures 3A to 3B In the initial state shown, the device structure 300 includes a substrate 150, a first layer 302, a second layer 304, a third layer 306, and a fourth layer 308. A pair of holes, shown as apertures 310, are provided within the fourth layer 308. The apertures 310 can be configured as through-holes extending through the entire fourth layer 308. The apertures 310 can have a circular shape in the XY plane as shown. Figure 3B and Figure 3D As shown, after processing with ions (not shown in the figure for clarity), the size of the hole 310 can be selectively increased along the Y-axis but not along the X-axis.

[0097] Figure 4A and Figure 4BThis describes another example of one-dimensional reactive ion etching according to other embodiments of the present invention. Figure 4A The apparatus structure 400 shown in various embodiments of the present invention undergoes the process described above. Figures 1A to 2D A side view of the final state after the one-dimensional reactive ion etching described. Figure 4B Show Figure 4A The diagram shows a top plan view of the scenario. Device structure 400 includes a substrate 150, a first layer 402, a second layer 404, a third layer 406, and a fourth layer 408. A pair of holes, shown as vias 410, are provided within the fourth layer 408. The vias 410 can be configured as through-holes extending through the entire fourth layer 408. For reference, the initial state of the vias 410 can be, for example, in... Figure 3A and Figure 3B The diagram shows a circular shape in the XY plane. In this embodiment, unlike previous embodiments, ions (not shown) can be guided along a direction 412 forming a non-zero angle (shown as angle φ) relative to the Y-axis and X-axis. In one example, this angle can be 45 degrees, so that the aperture 410 presents an elliptical shape with a major axis oriented at 45 degrees relative to the X-axis or Y-axis. Using this method, the aperture array arranged along the XY grid can be lengthened in any direction forming the target angle relative to the X-axis or Y-axis. According to different embodiments, this can be achieved by rotating the substrate about the Z-axis until the angle φ is formed.

[0098] In various embodiments, including Figures 1A to 4B In the variations of the above embodiments shown, where the substrate may include multiple layers, one-dimensional reactive ion etching can be performed within any layer. For example, referring back to... Figure 2A and Figure 2B One objective could be to transfer the shape of pillar 202 into substrate 150. Therefore, as... Figure 2A As shown, a known vertical reactive ion etching process can be performed starting from column 202, instead of performing one-dimensional reactive ion etching on column 202. In this known vertical reactive ion etching process, ions are guided along the Z-axis to... Figure 2A The shape and size of the column 202 shown are transferred to the third layer 106. Subsequently, the column 202 formed in the third layer 106... Figure 2A The pillars 202 shown can undergo one-dimensional reactive ion etching to create a structure with [missing information] within the third layer 106. Figure 2B The pillar 202 shown is a pillar of the shape and size. This pillar, located within the third layer 106, can then be transferred to the second layer 104, the first layer 102, and finally to the substrate 150 via vertical reactive ion etching. Alternatively, from... Figure 2AStarting with the structure shown, the third layer 106 and the second layer 104 can undergo vertical reactive ion etching to form a pillar structure in the second layer 104. The pillar structure in the second layer 104 can then undergo one-dimensional reactive ion etching to form a structure with... Figure 2B The pillars 202 shown are of the shape and size of pillars. Subsequently, further vertical reactive ion etching can be performed to transfer the pillars of the second layer 104 into the first layer 102 and the substrate 150; and so on.

[0099] Similarly, in embodiments where one-dimensional reactive ion etching is used to create elongated holes, the elongated holes can be formed in any given layer of the stack, while vertical etching is used to form a lower hole having the shape and size of the elongated holes in a layer below the elongated holes.

[0100] In other embodiments of the invention, one-dimensional reactive ion etching can be performed using a pair of ion beams guided parallel to a common axis (e.g., the Y-axis). The pair of ion beams can be mirrored with respect to the XZ plane so that the ion beams collide with opposite surfaces of the surface feature. For example, a known plasma device can be used to etch the surface feature, wherein the plasma device provides two parallel elongated openings in which ions are extracted from the plasma at incident angles of +θ and -θ relative to the vertical 120°. Return to Figure 2C and Figure 2D Ions can be guided along the Y-axis from the left side of the figure to collide with sidewalls 210 and 206. In this way, pillars 202 can be etched from different sides. In other embodiments, a similar procedure can be used to etch opposite sides of the hole.

[0101] Figures 5A to 5B This illustration shows another embodiment in which a hole array with a target size can be generated using one-dimensional reactive ion etching. One known problem with photolithography is the ability to generate a target shape within a layer based on the mask shape. Proximity correction is often used to generate a mask with a shape different from the target shape within the layer. Figure 5A The upper left portion shows the target shape 502, in which the rectangle is transferred to the layer on the substrate. Figure 5A The upper left portion also shows the use of a proximity-corrected mask feature (mask feature 504) to generate the target shape 502. Mask feature 504 includes an end portion 508 in which a bone shape is generated. Furthermore, the width D2 of mask feature 504 is greater than the width D1 of the target shape. This difference in size and shape between mask feature 504 and target shape 502 can be attributed to known optical effects. Figure 5AThe upper left portion also shows the final shape 506 generated by mask feature 504, where the final shape 506 approximates the target shape 502. In one instance, the final shape 506 may be a patterned shape of a trench using mask feature 504. As shown, the width of the final shape 506 may be D1 and may be smaller than the width D2 of mask feature 504.

[0102] For reference, in known processing methods, problems can arise when attempting to generate a feature array in which the feature arrays will be closely spaced using a proximity correction mask. For example, since width D1 exceeds width D2, the minimum spacing between adjacent features patterned by the proximity mask features is approximately 2 × (D2 - D1) when the proximity mask features 504 are placed adjacent to each other. Figure 5A This issue is further explained in the upper right part. Figure 5A In the upper right portion, a proximity mask 510 comprising a two-dimensional array of mask features 504 is shown. Two columns of mask features 504 are shown, wherein the mask features 504 in the left column are arranged end-to-end adjacent to the corresponding mask features (also shown as mask features 504) in the right column. Figure 5A The lower right portion illustrates a patterned layer 520 with multiple trenches, wherein the patterned layer is formed using a proximity mask 510. As shown, two columns of trenches 522 can be formed with a width D1 as discussed above. Since D1 is less than D2, columns in the same row (along the Y-axis) are separated from adjacent columns by an interval S1 equal to approximately 2 × (D2 - D1), where it is assumed that the mask features 504 of the proximity mask 510 are in contact with each other.

[0103] In some applications, the spacing of trench 522 (e.g.) Figure 5A (As shown in the lower right part) may exceed design rules or references Figure 5B The target spacing discussed is (e.g., spacing S2). Known processing methods do not provide a suitable solution to this problem. According to an embodiment of the invention, one-dimensional reactive ion etching can be used to selectively widen the trench 522 along the Y-axis without widening it along the X-axis. Figure 5B This indicates that the patterned layer 520 passes through... Figure 5A The lower right portion shows an example of the final structure produced by applying the one-dimensional reactive ion etching detailed above to the patterned layer 520. As shown, the trench 522 now has a width D3 greater than D1 and is used to create a spacing S2 smaller than the spacing S1 between adjacent trenches. Using the above method, embodiments of the invention provide a denser packing of surface features such as trenches along a given direction without excessively widening the trenches in the vertical direction.

[0104] In various other embodiments, the length of the trench can be symmetrically extended by providing ions guided to opposite ends of the trench, or the length of the trench can be extended along only one end or the other by providing ions guided only to selected ends of the trench. This also applies to other types of vias. In the case of symmetrically elongating the via, a first ion exposure can be provided by an ion beam guided to a substrate, such as a wafer, to etch a first end of the trench. The wafer can then be rotated 180 degrees for a second exposure with the ion beam, in which a second end of the trench is etched, while the ion beam maintains the same incident angle (e.g., angle θ) between exposures. Alternatively, a pair of ions mirror-shaped around the XZ plane can be provided in a single exposure so that the ion beam collides with opposite ends of the trench.

[0105] Figure 6 This describes contact structures formed using one-dimensional reactive ion etching according to other embodiments of the present invention. Figure 6 The diagram shows a top plan view of device structure 600. Device structure 600 can represent the source / drain (S / D) contact structure of a transistor. Figure 6 In the example shown, the source / drain region 602 has a narrow shape that extends along the Y-axis. Figure 6 An array of contact vias, shown as contact vias 604, is also illustrated, wherein contact vias 604 may include metal contacts for contacting source / drain regions 602. According to an embodiment of the invention, contact vias 606 initially formed in a patterned layer (not shown) may initially have a circular shape. The diameter of the initial contact via with a circular shape may be limited by the width D4 of the source / drain region 602. For this reason, the circular contacts formed using contact vias 606 may have contact areas insufficient to generate low contact resistance to the source / drain region 602. Contact vias 606 can be transformed into contact vias 604 by increasing the size of the contact vias along the Y-axis using one-dimensional reactive ion etching. As shown, contact vias 604 may be elliptical in shape and have a larger total area than contact vias 606. Furthermore, since etching is performed by guiding ions parallel to the Y-axis, contact vias 604 do not extend beyond the source / drain region 602 along the X-axis.

[0106] Figure 7A and Figure 7B This illustrates yet another embodiment of the invention in which one-dimensional reactive ion etching can be used to improve contacts in a memory structure. Figure 7AThe diagram shows a plan view of a memory array 702, which includes horizontally arranged word lines 708 and vertically arranged bit lines 710. The memory array also includes bit line contacts 706 and memory node contacts 704. In the memory array 702, active regions 716 extend along a direction forming a non-zero angle with respect to either the vertical or horizontal direction. Figure 7B An enlarged view of the two active regions 716 is shown. Since contacts such as storage node contacts 704 can be formed by patterning layers using a different mask than the mask used to define the active regions 716, the overlap and placement of storage node contacts 704 may need to be taken into account. Figure 7B The diagram shows the outline of the shape of an initial contact hole 712 formed by known photolithographic patterning. The size of the initial contact hole can be selectively increased by performing a one-dimensional reactive ion etching according to embodiments of the invention. For example, ions (not shown) can be provided along direction 720 to increase the size of the initial contact hole 712, thereby creating an elongated contact hole shown as contact hole 714. Contact hole 714 can increase the area of ​​the storage node contact 704 and increase the overlap with the active region 716 without increasing the size of the initial contact hole 712 in the direction perpendicular to direction 720. This ensures that a given contact hole does not overlap with an adjacent active region. Therefore, the one-dimensional reactive ion etching performed on the initial contact hole 712 can produce a lower contact resistance due to the increased area and correct any misalignment between the initial contact hole 712 and the active region 716.

[0107] In other embodiments, one-dimensional reactive ion etching can be used to reduce process complexity, including reducing the number of masks used to generate a given set of device structures. For reference, in known fabrication methods, particularly those patterning small, closely packed structures with dimensions and spacing of about tens of nanometers or less, generating a given set of device structures in a given layer may require the use of multiple masks. This is because the target spacing between features can be smaller than the spacing achievable by exposing a single mask. When features are spaced smaller than a given spacing on a given mask, the features may not be properly imaged within a given resist layer. Therefore, mask design rules can specify the critical spacing S of mask features. T This allows for the proper definition of target features within layers such as photoresist. For example, for a mask that produces a compact array of local interconnect features, the critical spacing of a given photolithography tool and a given resist layer could be 10 nm. Once the critical spacing is specified or determined, a given mask used to pattern the layers can include layers spaced at least S TMultiple mask features with a distance of S. When it is desired to generate a group of device features in a substrate at a given layer level, and the target spacing of at least some of the device features is less than S. T At the same time, a complete group of device features can be generated by exposing a layer to multiple masks, wherein features generated by a first mask can be interleaved with features generated by a second mask, while the spacing between features in a given mask is not less than S. T In traditional manufacturing, the disadvantage of this method is that it increases cost and complexity because multiple masks can be used to generate device features within a given layer.

[0108] Figure 8A The diagram illustrates a target device arrangement, shown as device arrangement 800. In some instances, device arrangement 800 may represent a local interconnect pattern formed on a given layer of an integrated circuit device. As shown, device arrangement 800 comprises a rectangular (or "line") array, wherein the size of the lines and the distance between adjacent lines may vary. As further shown, the distance between adjacent lines may be less than S. T (As shown by the distance S4 between two adjacent lines). Therefore, due to the proximity of the adjacent lines, it is difficult to use a single mask to generate the device arrangement 800. Figure 8B This illustrates an initial approach to addressing this problem by patterning different groups of lines using three different masks, wherein these different groups of lines together constitute a line group in device arrangement 800. The three different masks are shown as mask 1, mask 2, and mask 3. Mask 1 may have, for example, spaced apart from each other by at least S. T Five lines of equal spacing. These lines may be spaced apart from each other by more than S along both the X and Y axes. T The distance between them. Mask 2 may have three lines, and mask 3 may also have three lines, wherein the lines are also spaced apart from each other by a distance greater than or equal to S within a given mask. T Line patterns with different masks are displaced relative to each other to produce an arrangement 800. Therefore, lines from one mask can be positioned to be spaced less than S from lines formed by another mask. T The spacing is due to the fact that the lines are formed in different masks.

[0109] According to an embodiment of the invention, the number of masks used to generate the device arrangement 800 can be reduced by utilizing one-dimensional reactive ion etching. Now turning to... Figure 8CThe diagram illustrates a mask arrangement 820. Mask arrangement 820 comprises a line pattern formed by two different masks—mask 4 and mask 5. The different lines from the two different masks can be used to generate a device arrangement 800 in such a way that, as shown by the arrows, the lines in mask arrangement 820 are spaced apart from each other, wherein the tip-to-tip distance between adjacent lines within a given mask along the direction of the arrows is at least S. T The lines of mask 5 can be scattered between the lines of mask 4 to provide sufficient spacing between adjacent lines within a given mask, perpendicular to the arrow direction. Therefore, a trench pattern with the same shape, size, and spacing as the lines of mask arrangement 820 can be produced using conventional photolithography techniques with mask arrangement 820. This trench pattern can be produced using only two masks—mask 4 and mask 5. To produce a trench pattern matching device arrangement 800, the trench pattern represented by mask arrangement 820 can undergo ion-to-device path... Figure 8C The arrow shown indicates a one-dimensional reactive ion etching process guided by the direction of the ion.

[0110] Figure 8D An exemplary trench arrangement, designated as trench arrangement 830, is shown, wherein the trenches having an initial structure of mask arrangement 820 have been etched to increase their size along the direction of the arrow. In this way, the final tip-to-tip spacing between adjacent lines can be less than S. T The trench arrangement 830 can be considered to match the device arrangement 800. Furthermore, since etching does not occur in the direction perpendicular to the arrows, the width of the trenches in the direction perpendicular to the arrows can be maintained. Therefore, the number of masks used to generate the device arrangement 800 can be reduced by utilizing the ability of one-dimensional reactive ion etching to reduce the tip-to-tip spacing of adjacent features. In addition to reducing process complexity, reducing the number of masks also helps avoid overlay problems between different mask layers. For a given overlay error for each mask, since the overlay error accumulates additively among different masks, reducing the number of masks used to generate a given pattern reduces the total overlay error.

[0111] In other embodiments, the number of masks used to generate a given arrangement having a given layer order may be reduced from two masks to one mask, or from four masks to three masks. These embodiments are not limited to this context. More generally, embodiments of the invention include a method of forming a first set of holes using a first photolithographic mask with a first photolithographic exposure, wherein at least two holes in the first set of holes are characterized by a final hole spacing along a first direction, the final hole spacing being smaller than a threshold spacing of features patterned in a first layer using the first photolithographic exposure. As described above, this can be achieved by utilizing, for example, the above references... Figures 8A to 8DThe detailed one-dimensional reactive ion etching process etches the holes to reduce the final hole spacing to below a critical interval. Alternatively, in other embodiments, a method may involve employing a second photomask in addition to a first photomask to define a second set of holes in the first layer using second photolithographic exposure, wherein the first set of holes is interspersed among the second set of holes. The second set of holes may be characterized by a second final hole spacing, which is smaller than a critical interval of features patterned in the first layer using the second photolithographic exposure.

[0112] In other embodiments, one-dimensional reactive ion etching can be applied to an array of features, such as lines, mesas, or pillars, extending above another layer. In some instances, one-dimensional reactive ion etching can be applied in one direction or in a pair of directions. When applied in a pair of directions, the ions are guided along two opposing directions while remaining parallel to an axis (e.g., the Y-axis in the above embodiment). In specific embodiments, one-dimensional reactive ion etching can be applied to change the length of lines, such as the length of lines in a line array. This can facilitate adjusting the tip-to-tip spacing between adjacent lines in the array. Figure 9A This shows a top plan view of the line array before processing. In this example, an array 906 of lines 904 is arranged on a substrate 902. Array 906 can be arranged as follows: Figure 2A The pillar 202, as shown, extends along the Z-axis above the layer of substrate 902. Array 906 is a two-dimensional array in which lines 904 have adjacent lines along the X-axis and adjacent lines along the Y-axis. Lines 904 have a relatively large dimension along the Y-axis and can be considered to extend along the Y-axis. Lines 904 can be characterized by a tip-to-tip pitch shown as spacing S5. Array 906 can be formed by a photolithography process as described above. Spacing S5 may be different from the target tip-to-tip pitch indicated as S6. To adjust the tip-to-tip pitch, ions can be guided in a one-dimensional reactive ion etching according to an embodiment of the invention as described above. In one example, ions can be guided along two trajectories opposite each other about the Y-axis, wherein the ion trajectories are parallel to the Y-axis. The ion trajectories may be relative to the vertical line 120 (see Figure 2A A non-zero incident angle is formed so that the ions strike the ends of the line.

[0113] Figure 9B Show Figure 9AThe diagram shows a top view of the line array after one-dimensional reactive ion etching according to one embodiment. In this example, ions 908 are guided along a first set of tracks parallel to the Y-axis, as indicated by a right-pointing arrow, while ions 910 are guided along a second set of tracks parallel to the Y-axis and opposite to the first set of tracks, as indicated by a left-pointing arrow. As shown, the tip-to-tip spacing of line 904 has been increased to a spacing S6 representing the target tip-to-tip spacing. Since ions 910 and 908 are guided to line 904 along opposing tracks, the opposing tips of line 904 can be etched equivalently. Figure 9A As shown, the left column line 904 initially has a right tip at position P0, while the right column line 904 initially has a left tip at position P1. According to... Figure 9B After etching the scenario shown, the lines 904 in the left column have a right tip at position P2, which is shifted to the left along the Y-axis relative to P0, while the lines 904 in the right column have a left tip at position P3, which is shifted to the right along the Y-axis relative to P1. In this way, an array 916 of lines 904 is generated, wherein the tip-to-tip spacing between adjacent lines along the Y-axis is adjusted symmetrically relative to array 906.

[0114] Figure 9C Show Figure 9A The diagram shows a top view of the line array after one-dimensional reactive ion etching according to another embodiment. In this example, only ions 910 are guided along a second set of trajectories parallel to the Y-axis. As shown, the tip-to-tip spacing of line 904 has also been increased to a spacing S6 representing the target tip-to-tip spacing. Since only ions 910 are guided to the right tip of line 904, only the right tip of line 904 is etched, while the left tip of line 904 remains unetched. According to... Figure 9C After etching the scenario shown, the lines 904 in the left column have a right tip at position P4, which is shifted to the left along the Y-axis relative to P0, while the lines 904 in the right column have a left tip at position P1, which remains unchanged relative to the original position of the left tip of the right column lines 904. In this way, an array 926 of lines 904 is generated, wherein the tip-to-tip spacing along the Y-axis between adjacent lines is adjusted symmetrically with respect to array 906. Figure 9C The latter scenario shown can be applied to situations where the average position of the entire feature group needs to be moved while adjusting the spacing between individual features.

[0115] Figure 10An exemplary process flow 1000 is illustrated. In step 1002, a surface feature is provided on a substrate, wherein the surface feature has a first dimension along a first direction and a second dimension along a second direction perpendicular to the first direction. The surface feature may be, for example, a line, pillar, mesa, hole, or other feature. In step 1004, a first ion in a first exposure is guided to the surface feature along the first direction at a non-zero incident angle relative to a plane of the substrate. The guidance of the first ion is performed under conditions of a reactive atmosphere containing a reactive substance, wherein after the guidance, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction that is different from the first dimension.

[0116] Regarding the definition of features within a substrate, embodiments of the present invention offer various advantages over conventional processing. One advantage lies in the ability to perform one-dimensional trimming of surface features, where a second dimension of the surface feature is perpendicular to the first dimension. For example, the width of a line can be reduced without reducing its length. Another advantage is the ability to reduce the spacing between adjacent features to a level lower than that achievable through known photolithography processes. An example of this capability is reducing the tip-to-tip spacing between adjacent trenches (e.g., contact trenches). Yet another advantage is the ability to reduce the number of masks used to generate feature patterns, wherein the features can be separated by a smaller distance than the threshold spacing achievable by a single mask. Such a reduction in the number of masks has a more favorable effect on reducing coverage errors when printing feature patterns.

[0117] The scope of this invention is not limited to the specific embodiments set forth herein. In fact, various other embodiments of the invention and modifications thereof, besides those described herein, will become apparent to those skilled in the art from the foregoing description and accompanying drawings. Therefore, such other embodiments and modifications are intended to fall within the scope of this invention. Furthermore, while the invention has been set forth herein in a specific context and for a specific purpose, those skilled in the art will recognize that its applicability is not limited thereto, and that the invention can be advantageously practiced in any number of environments for any number of purposes. Therefore, the claims stated above are to be interpreted in light of the full breadth and scope of the invention as described herein.

Claims

1. A patterning method, comprising: A layer is provided on a substrate, the layer having a plurality of pores, wherein the plurality of pores have an initial spacing distance along a first direction before guiding ions; as well as Guided ion etching is performed to etch the plurality of holes along the first direction relative to a second direction perpendicular to the first direction, such that the entire thickness of the layer is etched in a direction perpendicular to the substrate plane. The guided ion etching includes guiding the ions along a trajectory forming a non-zero incident angle relative to the first direction to elongate the plurality of holes along the first direction, the first direction extending within a substrate plane defined by the front surface of the substrate, and The plurality of pores have a final spacing distance along the first direction after guiding the ions, the final spacing distance being smaller than the initial spacing distance.

2. The method according to claim 1, wherein the initial interval distance is 10 nanometers and the final interval distance is less than 10 nanometers.

3. The method according to claim 1, wherein the plurality of holes comprises a plurality of trenches.

4. The method according to claim 1, wherein the plurality of holes comprises a plurality of through holes.

5. The method of claim 1, wherein the ions are provided by a ribbon bundle guided from an ion source at a non-orthogonal angle relative to the substrate plane along the trajectory.

6. The method of claim 1, wherein the initial spacing distance of the plurality of holes is generated by a first photolithography process prior to guiding the ions.

7. The method of claim 6, wherein the final spacing distance is applied to the plurality of holes without the need for additional photolithography.

8. The method of claim 1, wherein the first hole size of the plurality of holes is increased along the first direction by selectively etching the sidewalls of the plurality of holes along the first direction relative to the second direction, the second direction being located in the plane of the substrate and extending perpendicular to the first direction.

9. The method of claim 8, wherein a plurality of the ions are provided in a first exposure, wherein the first exposure further includes directing a second plurality of ions to a second sidewall opposite to the first sidewall, wherein the first exposure selectively etches the second sidewall along a third direction opposite to the first direction.

10. The method of claim 9, wherein the positions of the plurality of holes are not shifted by the first exposure.

11. The method of claim 1, wherein the plurality of pores are circular before guiding the ions and elongated after guiding the ions.

12. The method of claim 1, wherein the plurality of said ions are provided in a reactive atmosphere containing a reactive substance.

13. The method of claim 1, wherein the plurality of ions bombard a second layer beneath a first layer within the plurality of holes, wherein the first ions selectively etch the plurality of holes within the first layer relative to the second layer.

14. The method of claim 13, wherein after the guided ion etching is performed, etching is performed to transfer a plurality of holes into the second layer, wherein the etching occurs in a direction perpendicular to the plane of the substrate.

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