Display panel, display device, and method for manufacturing display panel

Abstract

The embodiments of the present application disclose a display panel, a display device, and a method for manufacturing a display panel. The display panel includes a base substrate, a light shielding layer, a buffer layer, a thin film transistor layer, and an anode layer arranged in sequence, the thin film transistor layer is electrically connected to the light shielding layer, the thin film transistor layer includes a control area and a pixel area, a first opening is provided at a position of the thin film transistor layer corresponding to the pixel area, and the anode layer is at least partially located at the bottom of the first opening and located on the side of the buffer layer away from the base substrate, and the anode layer is electrically connected to the light shielding layer. The present application uses the base substrate and the buffer layer together as a planarization layer. Since the surface roughness of the buffer layer itself is small and the flatness is good, by at least partially disposing the anode layer in the first opening and on the side of the buffer layer away from the base substrate, it is helpful to improve the flatness of the part of the anode layer, thereby facilitating the improvement of the thickness uniformity of the subsequent film layer produced on the part of the anode layer, thereby improving the display uniformity of the display panel.

Description

Technical Field

[0001] The present application relates to the field of display, and in particular to a display panel, a display device and a method for manufacturing a display panel. Background Art

[0002] In the manufacturing process of existing display panels, a planarization layer is usually formed on an array substrate to planarize the surface of the array substrate, and then an anode layer and a light-emitting layer are formed on the planarization layer. However, the surface roughness of the planarization layer itself in the prior art is relatively large, so that the flatness of the anode layer deposited on the surface is relatively poor, thereby affecting the thickness uniformity of the light-emitting layer, and ultimately causing uneven display of the entire display panel. Summary of the invention

[0003] The embodiments of the present application provide a display panel, a display device and a method for manufacturing a display panel, which can solve the problem of uneven display caused by poor flatness of the anode layer of the existing display panel.

[0004] An embodiment of the present application provides a display panel, including:

[0005] substrate substrate;

[0006] A light shielding layer is provided on the base substrate;

[0007] A buffer layer is arranged on a side of the light shielding layer away from the base substrate;

[0008] A thin film transistor layer is arranged on a side of the buffer layer away from the base substrate, and the thin film transistor layer is electrically connected to the light shielding layer; the thin film transistor layer includes a control area and a pixel area, and the thin film transistor layer has a first opening at a position corresponding to the pixel area;

[0009] An anode layer is at least partially located at the bottom of the first opening, the anode layer is located on a side of the buffer layer away from the base substrate, and the anode layer is electrically connected to the light shielding layer.

[0010] Optionally, in some embodiments of the present application, the first opening exposes a portion of the buffer layer, and the anode layer is disposed on the buffer layer exposed by the first opening.

[0011] Optionally, in some embodiments of the present application, the thin film transistor layer includes an active layer, a first insulating layer, a gate layer, a second insulating layer and a source and drain layer arranged in sequence along a direction away from the buffer layer; the first opening exposes a portion of the active layer, and the anode layer is arranged on the active layer exposed by the first opening.

[0012] Optionally, in some embodiments of the present application, a second opening is opened on the buffer layer, the second opening exposes a portion of the light-shielding layer, a third opening is opened on the active layer exposed by the first opening at a position corresponding to the second opening, and the anode layer is electrically connected to the light-shielding layer through the second opening and the third opening.

[0013] Optionally, in some embodiments of the present application, the display panel includes a passivation layer, which is arranged on the source and drain layer, and a fourth opening is opened on the passivation layer at a position corresponding to the first opening, and the anode layer extends along the side walls of the first opening and the fourth opening to the side of the passivation layer away from the base substrate; the source and drain layer includes a source electrode, which is electrically connected to the light-shielding layer, and a fifth opening is opened on the passivation layer at a position corresponding to the source electrode, and the anode layer is electrically connected to the source electrode through the fifth opening.

[0014] Optionally, in some embodiments of the present application, the display panel further includes a pixel definition layer and a light-emitting layer, the pixel definition layer is located on the side of the thin film transistor layer facing away from the base substrate, a pixel opening is provided on the pixel definition layer at a position corresponding to the pixel area, and the pixel opening exposes a portion of the anode layer; the light-emitting layer is located on the anode layer exposed by the pixel opening.

[0015] Optionally, in some embodiments of the present application, the material of the buffer layer includes one or more of silicon nitride, silicon oxide and silicon oxynitride; the thickness of the buffer layer is greater than or equal to 50 nm and less than or equal to 10000 nm.

[0016] Correspondingly, an embodiment of the present application further provides a display device, which includes the display panel described in any one of the above items.

[0017] Accordingly, an embodiment of the present application further provides a method for manufacturing a display panel, the method comprising:

[0018] Providing a substrate;

[0019] forming a light shielding layer on the base substrate;

[0020] forming a buffer layer on a side of the light shielding layer away from the base substrate;

[0021] A thin film transistor layer is formed on a side of the buffer layer away from the base substrate, the thin film transistor layer includes a control area and a pixel area, and a first opening is formed on the thin film transistor layer at a position corresponding to the pixel area; the thin film transistor layer is electrically connected to the light shielding layer;

[0022] An anode layer is formed on a side of the buffer layer away from the base substrate, so that the anode layer is at least partially located at the bottom of the first opening, and the anode layer is electrically connected to the light shielding layer.

[0023] Optionally, in some embodiments of the present application, a thin film transistor layer is formed on a side of the buffer layer away from the base substrate, the thin film transistor layer includes a control area and a pixel area, and a first opening is formed at a position of the thin film transistor layer corresponding to the pixel area, including:

[0024] An active layer, a first insulating layer, a gate layer, a second insulating layer and a source-drain electrode layer are sequentially formed on the buffer layer to form a thin film transistor layer; the thin film transistor layer includes a control area and a pixel area;

[0025] A first opening is formed on the second insulating layer at a position corresponding to the pixel area, so that the first opening exposes a portion of the active layer.

[0026] In the embodiment of the present application, the display panel includes a base substrate, a light shielding layer, a buffer layer, a thin film transistor layer and an anode layer arranged in sequence, wherein the thin film transistor layer is electrically connected to the light shielding layer, the thin film transistor layer includes a control area and a pixel area, a first opening is provided at a position of the thin film transistor layer corresponding to the pixel area, and the anode layer is at least partially located at the bottom of the first opening, and the anode layer is located on the side of the buffer layer away from the base substrate, and the anode layer is electrically connected to the light shielding layer. The present application uses the base substrate and the buffer layer together as a planarization layer. Since the surface roughness of the buffer layer itself is small and the flatness is good, by at least partially disposing the anode layer at the bottom of the first opening and on the side of the buffer layer away from the base substrate, it is helpful to improve the flatness of the part of the anode layer, thereby facilitating improving the thickness uniformity of the subsequent film layer made on the part of the anode layer, thereby improving the display uniformity of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0029] Figure 2 is a schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0030] Figure 3 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present application.

[0031] Figure 4 is a structural schematic diagram of a display device provided in an embodiment of the present application;

[0032] Figure 5 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0033] Figure 6 The embodiment of this application provides Figure 5 A schematic diagram of the structure of step S400;

[0034] Figure 7 The embodiment of this application provides Figure 5 Schematic diagram of the structure of step S500.

[0035] Description of reference numerals:

[0036] DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words such as "upper" and "lower" used generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device.

[0038] The embodiments of the present application provide a display panel, a display device and a method for manufacturing a display panel. The following are detailed descriptions of each. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.

[0039] First, an embodiment of the present application provides a display panel, such as Figures 1 to 3 As shown, the display panel 100 includes a base substrate 110, which serves as a supporting structure of the display panel 100 and is used to support other functional structural layers disposed on the base substrate 110 to ensure the overall structural stability of the display panel 100. The base substrate 110 may be a glass substrate or a substrate of other material types, which is not limited here.

[0040] The display panel 100 includes a light shielding layer 120, which is disposed on the base substrate 110. The light shielding layer 120 is used to shield the external ambient light to prevent the external ambient light from directly irradiating other functional structural layers on the base substrate 110, thereby affecting the normal use of the display panel 100. The light shielding layer 120 can be patterned according to the design requirements of other functional structural layers on the base substrate 110 to meet the light shielding requirements of different display panel 100 structures.

[0041] The display panel 100 includes a buffer layer 130, which is arranged on the side of the light-shielding layer 120 away from the base substrate 110. The buffer layer 130 is used to isolate the light-shielding layer 120 from other functional structural layers on the base substrate 110 to avoid mutual interference between the light-shielding layer 120 and the other functional structural layers. In addition, since the base substrate 110 contains a variety of impurity ions, the setting of the buffer layer 130 can also prevent the impurity ions in the base substrate 110 from entering other functional structural layers, thereby affecting the display effect of the display panel 100.

[0042] The display panel 100 includes a thin film transistor layer 140, which is disposed on a side of the buffer layer 130 away from the base substrate 110, and is electrically connected to the light shielding layer 120. The thin film transistor layer 140 is used as a functional structural layer of the display panel 100 to control the light emission mode of the light-emitting pixels in the display panel 100, so as to regulate the display mode of the display panel 100. By electrically connecting the thin film transistor layer 140 to the light shielding layer 120, it is helpful to design the connection mode between other film layers and the thin film transistor layer 140, and at the same time, the signal input on the thin film transistor layer 140 can be regulated by the wiring design on the light shielding layer 120.

[0043] The thin film transistor layer 140 includes a control area 141 and a pixel area 142. The control area 141 is provided with a thin film transistor for connecting with other functional structural layers, such as light-emitting pixels, to control the light-emitting mode of the light-emitting pixels, thereby realizing the regulation of the display mode of the display panel 100. The pixel area 142 is used for the production of light-emitting pixels. By adjusting the design of the positions of the control area 141 and the pixel area 142, the structural design requirements of different display panels 100 can be met.

[0044] The display panel 100 further includes an anode layer 160, which is at least partially located at the bottom of the first opening 1421 and located on the side of the buffer layer 130 away from the base substrate 110. The base substrate 110 and the buffer layer 130 can be used together as a planarization layer. Compared with a traditional planarization layer, the surface roughness of the buffer layer 130 itself is small and the flatness is good. By at least partially disposing the anode layer 160 at the bottom of the first opening 1421 and located on the side of the buffer layer 130 away from the base substrate 110, it is helpful to improve the flatness of the part of the anode layer 160, thereby facilitating the improvement of the thickness uniformity of the subsequent film layers formed on the part of the anode layer 160, thereby improving the display uniformity of the display panel 100.

[0045] In addition, this structural design can omit the production of a planarization layer, thereby saving a photomask and simplifying the production process of the display panel 100; at the same time, the reduction of the planarization layer can also reduce the overall thickness of the display panel 100, which is beneficial to the lightweight design of the display panel 100.

[0046] Among them, the anode layer 160 is electrically connected to the light-shielding layer 120, and the light-shielding layer 120 is electrically connected to the thin-film transistor layer 140, that is, the anode layer 160 is electrically connected to the thin-film transistor layer 140. By controlling the conduction and disconnection of the thin-film transistor in the thin-film transistor layer 140, the conduction and disconnection of the signal on the anode layer 160 can be controlled, thereby realizing the regulation of the light-emitting mode of the light-emitting pixels in the pixel area 142.

[0047] In the embodiment of the present application, the display panel 100 includes a base substrate 110, a light shielding layer 120, a buffer layer 130, a thin film transistor layer 140 and an anode layer 160 which are arranged in sequence, wherein the thin film transistor layer 140 is electrically connected to the light shielding layer 120, the thin film transistor layer 140 includes a control area 141 and a pixel area 142, a first opening 1421 is opened at a position of the thin film transistor layer 140 corresponding to the pixel area 142, the anode layer 160 is at least partially located at the bottom of the first opening 1421, and the anode layer 160 is located on a side of the buffer layer 130 away from the base substrate 110, and the anode layer 160 is electrically connected to the light shielding layer 120. In the present application, the base substrate 110 and the buffer layer 130 are used together as a planarization layer. Since the surface roughness of the buffer layer 130 itself is small and the flatness is good, by disposing the anode layer 160 at least partially at the bottom of the first opening 1421 and on the side of the buffer layer 130 away from the base substrate 110, it helps to improve the flatness of the portion of the anode layer 160, which is beneficial to improve the thickness uniformity of subsequent film layers produced on the portion of the anode layer 160, thereby improving the display uniformity of the display panel 100.

[0048] Optional, such as Figure 2As shown, the first opening 1421 on the thin film transistor layer 140 exposes part of the buffer layer 130, that is, the first opening 1421 runs through the thickness direction of the thin film transistor layer 140, and the anode layer 160 is directly disposed on the buffer layer 130 exposed by the first opening 1421. At this time, the base substrate 110 and the buffer layer 130 can be used together as a planarization layer, and compared with the traditional planarization layer, the surface roughness of the buffer layer 130 itself is small and the flatness is good. The anode layer 160 is directly disposed on the buffer layer 130, which helps to improve the flatness of the bottom of the anode layer 160, thereby improving the flatness of the surface of the anode layer 160, which is beneficial to the production of subsequent film layers on the anode layer 160, so as to improve the overall display uniformity of the display panel 100.

[0049] Optionally, the thin film transistor layer 140 includes an active layer 143, a first insulating layer 144, a gate layer 145, a second insulating layer 146 and a source-drain electrode layer 147 which are sequentially arranged in a direction away from the buffer layer 130. During the manufacturing process of the display panel 100, each film layer in the thin film transistor layer 140 is patterned according to the design requirements of the display panel 100, wherein the control area 141 includes the patterned active layer 143, the first insulating layer 144, the gate layer 145, the second insulating layer 146 and the source-drain electrode layer 147 to form a corresponding thin film transistor; the pixel area 142 does not include metal layers such as the gate layer 145 and the source-drain electrode layer 147, and by opening a first opening 1421 at a position of the thin film transistor layer 140 corresponding to the pixel area 142, and arranging the anode layer 160 in the first opening 1421, while improving the flatness of the bottom of the anode layer 160, mutual interference between the anode layer 160 and the thin film transistors in the thin film transistor layer 140 can be avoided.

[0050] In some embodiments, Figure 1 As shown, the first opening 1421 exposes a portion of the active layer 143, that is, the pixel area 142 only includes the patterned active layer 143, and the anode layer 160 is arranged on the active layer 143 exposed by the first opening 1421. This structural design enables the active layer 143 to isolate the buffer layer 130, avoiding affecting the surface of the buffer layer 130 in the process of forming the first opening 1421 by etching, so as to ensure the flatness of the surface of the buffer layer 130, thereby further improving the flatness of the surface of the anode layer 160, which is beneficial to the production of subsequent film layers on the anode layer 160, and improving the overall display uniformity of the display panel 100.

[0051] In other embodiments, the first opening 1421 exposes a portion of the first insulating layer 144, that is, the pixel area 142 includes a patterned first insulating layer 144, and the anode layer 160 is arranged on the first insulating layer 144 exposed by the first opening 1421. This structural design allows the base substrate 110, the buffer layer 130 and the first insulating layer 144 to together form a planarization layer, which can improve the flatness of the bottom of the anode layer 160 and reduce the depth of the first opening 1421, which is helpful for the subsequent production of the packaging structure and avoids the packaging structure from breaking at the side wall of the first opening 1421, thereby improving the packaging effect of the display panel 100.

[0052] In some other embodiments, the first opening 1421 is formed on the second insulating layer 146, and a portion of the second insulating layer 146 is still retained at the bottom of the first opening 1421, that is, the pixel area 142 includes a patterned second insulating layer 146, and the anode layer 160 is arranged on the second insulating layer 146 at the bottom of the first opening 1421. This structural design allows the base substrate 110, the buffer layer 130 and the second insulating layer 146 to together form a planarization layer, which can further reduce the depth of the first opening 1421 while improving the flatness of the bottom of the anode layer 160, thereby facilitating the subsequent production of the packaging structure and improving the packaging effect of the display panel 100.

[0053] It should be noted that the buffer layer 130, the first insulating layer 144 and the second insulating layer 146 in the embodiment of the present application are all made of inorganic materials. Compared with the organic materials of the traditional planarization layer, the surface roughness of the inorganic material itself is small and the flatness is good. Therefore, when the anode layer 160 is set on the corresponding film layer, the flatness of the bottom of the anode layer 160 can be improved, thereby improving the flatness of the surface of the anode layer 160, which is beneficial to the production of subsequent film layers on the anode layer 160, so as to improve the overall display uniformity of the display panel 100.

[0054] Optional, such as Figure 1 and Figure 6As shown, when the anode layer 160 is disposed on the active layer 143 exposed by the first opening 1421, a second opening 131 is provided on the buffer layer 130, and the second opening 131 exposes a portion of the light shielding layer 120, so as to facilitate the connection between the subsequent film layer and the light shielding layer 120. A third opening 1431 is provided on the active layer 143 exposed by the first opening 1421 at a position corresponding to the second opening 131, and the anode layer 160 is electrically connected to the light shielding layer 120 through the second opening 131 and the third opening 1431. This structural design enables the anode layer 160 to be completely located on the active layer 143 exposed by the first opening 1421 without the need for a climbing design, which helps to ensure the structural stability of the anode layer 160, and the anode layer 160 can be electrically connected to the light shielding layer 120 by only digging holes in the active layer 143 and the buffer layer 130, thereby achieving electrical connection with the thin film transistor of the control area 141.

[0055] In some embodiments, Figure 3 and Figure 7 As shown, the display panel 100 includes a passivation layer 150, which is disposed on the source-drain electrode layer 147 to separate the source-drain electrode layer 147 from subsequent film layers. A fourth opening 151 is provided on the passivation layer 150 at a position corresponding to the first opening 1421, and the fourth opening 151 is connected to the first opening 1421, and the anode layer 160 extends along the sidewalls of the first opening 1421 and the fourth opening 151 to the side of the passivation layer 150 away from the base substrate 110. The source-drain electrode layer 147 includes a source electrode, and the source electrode is electrically connected to the light shielding layer 120, and a fifth opening 152 is provided on the passivation layer 150 at a position corresponding to the source electrode, and the anode layer 160 is electrically connected to the source electrode through the fifth opening 152.

[0056] This structural design enables the anode layer 160 to be directly electrically connected to the source in the thin film transistor. Compared with being electrically connected to the source through the light shielding layer 120 , it can reduce the contact resistance between the anode layer 160 and the thin film transistor, thereby helping to improve the display effect of the display panel 100 .

[0057] It should be noted that when the bottom of the first opening 1421 is the first insulating layer 144 or the second insulating layer 146, the anode layer 160 is extended along the side walls of the first opening 1421 and the fourth opening 151 to the side of the passivation layer 150 away from the base substrate 110, and is electrically connected to the source electrode through the fifth opening 152 on the passivation layer 150. Compared with directly electrically connecting to the light-shielding layer 120, the depth of the opening used for electrical connection can be reduced, thereby helping to improve the structural stability of the anode layer 160.

[0058] Among them, the specific structure, setting position and electrical connection method of the anode layer 160 with the shading layer 120 can be adjusted accordingly according to actual design and usage requirements. It is only necessary to ensure the flatness and structural stability of the surface of the anode layer 160, and no special restrictions are made here.

[0059] Optional, such as Figures 1 to 3 As shown, the display panel 100 further includes a pixel definition layer 170 and a light emitting layer 180. The pixel definition layer 170 is located on the side of the thin film transistor layer 140 away from the base substrate 110. A pixel opening 171 is provided on the pixel definition layer 170 at a position corresponding to the pixel area 142. The pixel opening 171 exposes a portion of the anode layer 160 to define the area where the light emitting pixel is located. The light emitting layer 180 is located on the anode layer 160 exposed by the pixel opening 171. By inputting a control signal on the anode layer 160, the light emitting mode of the light emitting layer 180 can be regulated.

[0060] When the pixel opening 171 is formed on the pixel definition layer 170, the pixel opening 171 only exposes a portion of the anode layer 160 located at the bottom of the first opening 1421, that is, the pixel definition layer 170 covers the sidewalls of the first opening 1421 and the fourth opening 151, so that the light-emitting layer 180 is only in contact with a portion of the anode layer 160 located at the bottom of the first opening 1421. Since the surface flatness of the anode layer 160 in the embodiment of the present application is good, the thickness uniformity of the light-emitting layer 180 is good, which helps to improve the problem of uneven display of the display panel 100.

[0061] In some embodiments, the sidewalls of the pixel opening 171 opened on the pixel definition layer 170 are stepped, and the pixel opening 171 gradually expands in a direction away from the base substrate 110; in addition, the material used for the pixel definition layer 170 is hydrophobic, so that when the light-emitting layer 180 is formed on the anode layer 160 by inkjet printing, even if there is a certain deviation in the position of the printing nozzle, the printing ink can flow into the fourth opening 151 along the sidewalls of the pixel opening 171, thereby ensuring the overall thickness uniformity of the light-emitting layer 180 and improving the display effect of the display panel 100.

[0062] Optionally, the material of the buffer layer 130 includes one or more of silicon nitride, silicon oxide and silicon oxynitride. The buffer layer 130 is made of this type of inorganic material. While ensuring that the surface roughness of the buffer layer 130 itself is small and the flatness is high, it can prevent impurity ions in the base substrate 110 from entering the active layer 143 or the anode layer 160, thereby preventing the impurity ions in the base substrate 110 from affecting the display effect of the display panel 100.

[0063] It should be noted that the buffer layer 130 in the embodiment of the present application can be a single-layer or multi-layer structure, wherein, when the buffer layer 130 is designed as a multi-layer structure, the material of each layer of the structure can be different, so as to further prevent the impurity ions in the base substrate 110 from entering the active layer 143 or the anode layer 160, thereby improving the stability of the overall structure of the display panel 100.

[0064] Optionally, the thickness of the buffer layer 130 is greater than or equal to 50 nm and less than or equal to 10000 nm. If the thickness of the buffer layer 130 is too small, it may not be able to effectively play a planarization role and isolate the impurity ions in the base substrate 110; if the thickness of the buffer layer 130 is too large, the overall thickness of the display panel 100 will be too large, which is not conducive to the lightweight design of the display panel 100.

[0065] In the actual manufacturing process, the thickness of the buffer layer 130 can be set to 50nm, 100nm, 500nm, 1000nm, 5000nm or 10000nm, etc., which can not only ensure the planarization effect of the buffer layer 130 and the isolation effect of the impurity ions in the base substrate 110, but also prevent the overall thickness of the display panel 100 from being too large. The specific value of the thickness of the buffer layer 130 can be adjusted accordingly according to the actual situation, and no special limitation is made here.

[0066] Secondly, an embodiment of the present application also provides a display device, which includes a display panel. The specific structure of the display panel refers to the above embodiment. Since the display device adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be repeated here one by one.

[0067] like Figure 4 As shown, the display device 10 includes a display panel 100, a control circuit 200 and a housing 300. The housing 300 is connected to the display panel 100 to support and fix the display panel 100, and the control circuit 200 is disposed in the housing 300, and the control circuit 200 is electrically connected to the display panel 100 to control the display panel 100 to display a picture.

[0068] The display panel 100 can be fixed to the housing 300 to form a whole with the housing 300, and the display panel 100 and the housing 300 form a closed space for accommodating the control circuit 200. The control circuit 200 can be the main board of the display device 10, and at the same time, the control circuit 200 can also be integrated with one or more functional components such as a battery, an antenna structure, a microphone, a speaker, an earphone interface, a universal serial bus interface, a camera, a distance sensor, an ambient light sensor, and a processor, so that the display device 10 can be adapted to various application fields.

[0069] It should be noted that the display device 10 is not limited to the above content, and it may also include other devices, such as a camera, an antenna structure, a fingerprint unlocking module, etc., to expand its scope of use, which is not limited here.

[0070] The display device 10 in the embodiment of the present application has a wide range of applications, including televisions, computers, mobile phones, flexible displays and lighting such as foldable and rollable display screens, and wearable devices such as smart bracelets and smart watches, all of which are within the scope of the application field of the display device 10 in the embodiment of the present application.

[0071] Finally, the present application also provides a method for manufacturing a display panel, which can be used to manufacture the display panel 100 in the above embodiment. Figure 5 As shown, the manufacturing method of the display panel mainly includes the following steps:

[0072] S100 , providing a base substrate 110 .

[0073] When manufacturing the display panel 100, it is first necessary to provide a base substrate 110 and clean the base substrate 110 so as to facilitate the manufacturing of other functional structural layers on the base substrate 110. The base substrate 110 serves as a supporting structure of the display panel 100 and is used to support other functional structural layers disposed on the base substrate 110 to ensure the overall structural stability of the display panel 100. The base substrate 110 may be a glass substrate or a substrate of other material types, which is not limited here.

[0074] S200 , forming a light shielding layer 120 on the base substrate 110 .

[0075] After the base substrate 110 is prepared, a light shielding layer 120 is deposited on the base substrate 110. The light shielding layer 120 is used to shield the external ambient light to prevent the external ambient light from directly irradiating other functional structural layers on the base substrate 110, thereby affecting the normal use of the display panel 100. The light shielding layer 120 can be patterned according to the design requirements of other functional structural layers on the base substrate 110 to meet the light shielding requirements of different display panel 100 structures.

[0076] S300 , forming a buffer layer 130 on a side of the light shielding layer 120 away from the base substrate 110 .

[0077] After a light-shielding layer 120 is deposited on the base substrate 110, a buffer layer 130 is deposited on the side of the light-shielding layer 120 facing away from the base substrate 110. The buffer layer 130 is used to isolate the light-shielding layer 120 from other functional structural layers on the base substrate 110 to avoid mutual interference between the light-shielding layer 120 and the other functional structural layers. In addition, since the base substrate 110 contains a variety of impurity ions, the setting of the buffer layer 130 can also prevent the impurity ions in the base substrate 110 from entering other functional structural layers, thereby affecting the display effect of the display panel 100.

[0078] S400, forming a thin film transistor layer 140 on the side of the buffer layer 130 away from the base substrate 110, the thin film transistor layer 140 includes a control area 141 and a pixel area 142, and a first opening 1421 is formed on the thin film transistor layer 140 at a position corresponding to the pixel area 142; the thin film transistor layer 140 is electrically connected to the light shielding layer 120.

[0079] like Figure 6 As shown, after the buffer layer 130 is manufactured, a thin film transistor layer 140 is formed on the side of the buffer layer 130 away from the base substrate 110, and the thin film transistor layer 140 is electrically connected to the light shielding layer 120. The thin film transistor layer 140 is used as a functional structural layer of the display panel 100 to control the light emission mode of the light-emitting pixels in the display panel 100, so as to regulate the display mode of the display panel 100. By electrically connecting the thin film transistor layer 140 to the light shielding layer 120, it is helpful to design the connection mode between other film layers and the thin film transistor layer 140, and at the same time, the signal input on the thin film transistor layer 140 can be regulated by the wiring design on the light shielding layer 120.

[0080] The thin film transistor layer 140 includes a control area 141 and a pixel area 142. The control area 141 is provided with a thin film transistor for connecting with other functional structural layers, such as light-emitting pixels, to control the light-emitting mode of the light-emitting pixels, thereby realizing the regulation of the display mode of the display panel 100. The pixel area 142 is used for the production of light-emitting pixels. By adjusting the design of the positions of the control area 141 and the pixel area 142, the structural design requirements of different display panels 100 can be met.

[0081] S500 , forming an anode layer 160 on a side of the buffer layer 130 away from the base substrate 110 , so that the anode layer 160 is at least partially located at the bottom of the first opening 1421 , and the anode layer 160 is electrically connected to the light shielding layer 120 .

[0082] like Figure 7As shown, after the thin film transistor layer 140 is fabricated, an anode layer 160 is deposited, so that the anode layer 160 is at least partially located at the bottom of the first opening 1421, and the anode layer 160 is located on the side of the buffer layer 130 away from the base substrate 110. The base substrate 110 and the buffer layer 130 can be used together as a planarization layer. Compared with a traditional planarization layer, the surface roughness of the buffer layer 130 itself is small and the flatness is good. By disposing the anode layer 160 at least partially at the bottom of the first opening 1421 and on the side of the buffer layer 130 away from the base substrate 110, it is helpful to improve the flatness of the part of the anode layer 160, thereby facilitating the improvement of the thickness uniformity of the subsequent film layers fabricated on the part of the anode layer 160, and further improving the display uniformity of the display panel 100.

[0083] In addition, this structural design can omit the production of a planarization layer, thereby saving a photomask and simplifying the production process of the display panel 100; at the same time, the reduction of the planarization layer can also reduce the overall thickness of the display panel 100, which is beneficial to the lightweight design of the display panel 100.

[0084] Among them, the anode layer 160 is electrically connected to the light-shielding layer 120, and the light-shielding layer 120 is electrically connected to the thin-film transistor layer 140, that is, the anode layer 160 is electrically connected to the thin-film transistor layer 140. By controlling the conduction and disconnection of the thin-film transistor in the thin-film transistor layer 140, the conduction and disconnection of the signal on the anode layer 160 can be controlled, thereby realizing the regulation of the light-emitting mode of the light-emitting pixels in the pixel area 142.

[0085] Optionally, in step S400 of the embodiment of the present application, when forming the thin film transistor layer 140, the steps mainly include the following:

[0086] First, an active layer 143, a first insulating layer 144, a gate layer 145, a second insulating layer 146 and a source-drain layer 147 are sequentially formed on the buffer layer 130 to form a thin film transistor layer 140, and the thin film transistor layer 140 includes a control area 141 and a pixel area 142; then, a first opening 1421 is formed on the second insulating layer 146 at a position corresponding to the pixel area 142, so that the first opening 1421 exposes a portion of the active layer 143.

[0087] During the manufacturing process of the display panel 100, each film layer in the thin film transistor layer 140 is patterned according to the design requirements of the display panel 100, wherein the control area 141 includes a patterned active layer 143, a first insulating layer 144, a gate layer 145, a second insulating layer 146 and a source-drain layer 147 at the same time to form a corresponding thin film transistor. In the embodiment of the present application, a first opening 1421 is formed on the second insulating layer 146 at a position corresponding to the pixel area 142, so that the first opening 1421 exposes a portion of the active layer 143, that is, the pixel area 142 only includes the patterned active layer 143. At this time, when the anode layer 160 is deposited in the first opening 1421 to form the anode layer 160, the anode layer 160 is located on the active layer 143 exposed by the first opening 1421.

[0088] This structural design enables the active layer 143 to isolate the buffer layer 130, avoiding affecting the surface of the buffer layer 130 during the process of forming the first opening 1421 by etching, so as to ensure the flatness of the surface of the buffer layer 130, thereby further improving the flatness of the surface of the anode layer 160, facilitating the production of subsequent film layers on the anode layer 160, and improving the overall display uniformity of the display panel 100.

[0089] Correspondingly, when the buffer layer 130 is formed by deposition on the side of the light shielding layer 120 away from the base substrate 110, a second opening 131 is opened on the buffer layer 130, so that the second opening 131 exposes a portion of the light shielding layer 120, so as to facilitate the connection between the subsequent film layer and the light shielding layer 120. When the active layer 143 is formed by deposition on the buffer layer 130, a third opening 1431 is opened at a position corresponding to the second opening 131 on the active layer 143 exposed by the first opening 1421, so that the anode layer 160 can be electrically connected to the light shielding layer 120 through the second opening 131 and the third opening 1431.

[0090] This structural design allows the anode layer 160 to be entirely located on the active layer 143 exposed by the first opening 1421 without the need for a slope design, which helps to ensure the structural stability of the anode layer 160. The anode layer 160 can be electrically connected to the light-shielding layer 120 simply by digging holes in the active layer 143 and the buffer layer 130, thereby achieving electrical connection with the thin-film transistor in the control area 141.

[0091] In some embodiments, when the first opening 1421 is formed on the second insulating layer 146 at a position corresponding to the pixel area 142, the first opening 1421 exposes a portion of the first insulating layer 144, that is, the pixel area 142 includes a patterned first insulating layer 144. At this time, when the anode layer 160 is deposited in the first opening 1421, the anode layer 160 is located on the first insulating layer 144 exposed by the first opening 1421. This structural design allows the base substrate 110, the buffer layer 130 and the first insulating layer 144 to together form a planarization layer, which can improve the flatness of the bottom of the anode layer 160 and reduce the depth of the first opening 1421, which is helpful for the subsequent production of the packaging structure and avoids the packaging structure from breaking at the side wall of the first opening 1421, thereby improving the packaging effect of the display panel 100.

[0092] In other embodiments, when the first opening 1421 is formed on the second insulating layer 146 at a position corresponding to the pixel area 142, a portion of the second insulating layer 146 is still retained at the bottom of the first opening 1421, that is, the pixel area 142 includes a patterned second insulating layer 146. At this time, when the anode layer 160 is deposited in the first opening 1421, the anode layer 160 is located on the second insulating layer 146 at the bottom of the first opening 1421. This structural design allows the base substrate 110, the buffer layer 130 and the second insulating layer 146 to together form a planarization layer, which can further reduce the depth of the first opening 1421 while improving the flatness of the bottom of the anode layer 160, thereby facilitating the subsequent production of a packaging structure and improving the packaging effect of the display panel 100.

[0093] Optionally, after the thin film transistor layer 140 is fabricated, a passivation layer 150 is further formed, and the passivation layer 150 is deposited on the side of the source and drain electrode layer 147 facing away from the base substrate 110 to separate the source and drain electrode layer 147 from subsequent film layers. By etching the passivation layer 150, a fourth opening 151 is formed on the passivation layer 150 at a position corresponding to the first opening 1421, and the fourth opening 151 is connected to the first opening 1421.

[0094] At this time, when the anode layer 160 is deposited in the first opening 1421, the anode layer 160 can be extended along the sidewalls of the first opening 1421 and the fourth opening 151 to the side of the passivation layer 150 away from the base substrate 110. A fifth opening 152 is provided on the passivation layer 150 corresponding to the source electrode in the source-drain electrode layer 147, and the anode layer 160 is electrically connected to the source electrode through the fifth opening 152. This structural design enables the anode layer 160 to be directly electrically connected to the source electrode in the thin film transistor, which can reduce the contact resistance between the anode layer 160 and the thin film transistor compared to being electrically connected to the source electrode through the light shielding layer 120, thereby helping to improve the display effect of the display panel 100.

[0095] It should be noted that the specific structure, setting position and electrical connection method of the anode layer 160 with the light shielding layer 120 can be adjusted accordingly according to actual design and usage requirements. It is only necessary to ensure the flatness and structural stability of the surface of the anode layer 160. No special restrictions are made here.

[0096] Optionally, the manufacturing method of the display panel 100 in the embodiment of the present application also includes the manufacturing of a pixel definition layer 170 and a light-emitting layer 180, specifically including: first forming a pixel definition layer 170 on the side of the thin film transistor layer 140 away from the base substrate 110, and forming a pixel opening 171 at a position corresponding to the pixel area 142 on the pixel definition layer 170, so that the pixel opening 171 exposes a portion of the anode layer 160; and then printing a layer of the light-emitting layer 180 on the anode layer 160 exposed by the pixel opening 171.

[0097] When the pixel opening 171 is formed on the pixel definition layer 170, the pixel opening 171 only exposes a portion of the anode layer 160 located at the bottom of the first opening 1421, that is, the pixel definition layer 170 covers the sidewalls of the first opening 1421 and the fourth opening 151, so that the light-emitting layer 180 is only in contact with a portion of the anode layer 160 located at the bottom of the first opening 1421. Since the surface flatness of the anode layer 160 in the embodiment of the present application is good, the thickness uniformity of the light-emitting layer 180 is good, which helps to improve the problem of uneven display of the display panel 100.

[0098] In some embodiments, the sidewalls of the pixel opening 171 opened on the pixel definition layer 170 are stepped, and the pixel opening 171 gradually expands in a direction away from the base substrate 110; in addition, the material used for the pixel definition layer 170 is hydrophobic, so that when the light-emitting layer 180 is formed on the anode layer 160 by inkjet printing, even if there is a certain deviation in the position of the printing nozzle, the printing ink can flow into the fourth opening 151 along the sidewalls of the pixel opening 171, thereby ensuring the overall thickness uniformity of the light-emitting layer 180 and improving the display effect of the display panel 100.

[0099] The above is a detailed introduction to a display panel, a display device and a method for manufacturing a display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, characterized in that: include: substrate substrate; A light shielding layer is provided on the base substrate; A buffer layer is arranged on a side of the light shielding layer away from the base substrate; a thin film transistor layer, arranged on a side of the buffer layer away from the base substrate, the thin film transistor layer comprising an active layer, a first insulating layer, a gate layer, a second insulating layer and a source-drain electrode layer arranged in sequence in a direction away from the buffer layer, the thin film transistor layer being electrically connected to the light shielding layer; the thin film transistor layer comprising a control area and a pixel area, the thin film transistor layer having a first opening at a position corresponding to the pixel area, the first opening being formed on the second insulating layer, and a portion of the second insulating layer still remaining at the bottom of the first opening; an anode layer, at least partially located at the bottom of the first opening, the anode layer being located at a side of the buffer layer away from the substrate, the anode layer being arranged on the second insulating layer at the bottom of the first opening, and the anode layer being electrically connected to the light shielding layer; The display panel also includes a pixel definition layer and a light-emitting layer, wherein the pixel definition layer is located on the side of the thin film transistor layer away from the substrate, and a pixel opening is provided on the pixel definition layer at a position corresponding to the pixel area, and the pixel opening exposes a portion of the anode layer; the light-emitting layer is located on the anode layer exposed by the pixel opening, and the side walls of the pixel opening provided on the pixel definition layer are stepped, and the pixel opening gradually expands in a direction away from the substrate.

2. The display panel according to claim 1, characterized in that: A second opening is provided on the buffer layer, the second opening exposes part of the light shielding layer, a third opening is provided on the active layer exposed by the first opening at a position corresponding to the second opening, and the anode layer is electrically connected to the light shielding layer through the second opening and the third opening.

3. The display panel according to claim 2, characterized in that: The display panel includes a passivation layer, which is arranged on the source and drain layer, and a fourth opening is opened on the passivation layer at a position corresponding to the first opening, and the anode layer extends along the side walls of the first opening and the fourth opening to the side of the passivation layer away from the base substrate; the source and drain layer includes a source electrode, which is electrically connected to the light shielding layer, and a fifth opening is opened on the passivation layer at a position corresponding to the source electrode, and the anode layer is electrically connected to the source electrode through the fifth opening.

4. The display panel according to any one of claims 1 to 3, characterized in that: The material of the buffer layer includes one or more of silicon nitride, silicon oxide and silicon oxynitride; the thickness of the buffer layer is greater than or equal to 50 nm and less than or equal to 10000 nm.

5. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 4.

6. A method for manufacturing a display panel, used for preparing the display panel according to any one of claims 1 to 4, characterized in that: The manufacturing method of the display panel includes: Providing a substrate; forming a light shielding layer on the base substrate; forming a buffer layer on a side of the light shielding layer away from the base substrate; A thin film transistor layer is formed on a side of the buffer layer away from the base substrate, the thin film transistor layer includes a control area and a pixel area, and a first opening is formed on the thin film transistor layer at a position corresponding to the pixel area; the thin film transistor layer is electrically connected to the light shielding layer; An anode layer is formed on a side of the buffer layer away from the base substrate, so that the anode layer is at least partially located at the bottom of the first opening, and the anode layer is electrically connected to the light shielding layer.

7. The method for manufacturing a display panel according to claim 6, characterized in that: The step of forming a thin film transistor layer on a side of the buffer layer away from the base substrate, wherein the thin film transistor layer includes a control area and a pixel area, and forming a first opening at a position of the thin film transistor layer corresponding to the pixel area, comprises: An active layer, a first insulating layer, a gate layer, a second insulating layer and a source-drain electrode layer are sequentially formed on the buffer layer to form a thin film transistor layer; the thin film transistor layer includes a control area and a pixel area; A first opening is formed on the second insulating layer at a position corresponding to the pixel area, so that the first opening exposes a portion of the active layer.

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