Carbon nanotube device with self-aligned source-drain field plate structure and method of fabricating the same
By using a self-aligned source-drain field plate structure and dielectric sidewall design, the problem of drain leakage in carbon nanotube devices under strong electric fields was solved, achieving non-destructive fabrication and improved electrical performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- PEKING UNIV
- Filing Date
- 2022-03-17
- Publication Date
- 2026-07-14
AI Technical Summary
Carbon nanotube devices are prone to quantum tunneling under strong electric fields, resulting in severe reverse leakage current at the drain. Traditional plasma etching processes damage the surface of carbon nanotubes, necessitating the development of non-destructive fabrication processes to suppress gate-induced drain leakage.
A self-aligned source-drain field plate structure is adopted. By forming specific removal regions in the source-drain contact layer and conductive layer, combined with the design of self-aligned dielectric sidewalls and gate dielectric layer, a source-drain field plate structure that is wider at the top and narrower at the bottom is formed, which enhances the reverse leakage current suppression effect of carbon nanotube devices.
It effectively reduces the peak electric field at the source/drain contact and carbon nanotube interface, suppresses off-state leakage current, improves the electrical performance and process controllability of the device, and avoids physical damage.
Smart Images
Figure CN115000300B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a carbon nanotube device with a self-aligned source-drain field plate structure and a method for fabricating the same. Background Technology
[0002] Semiconductor-type carbon nanotubes have a series of advantages such as high carrier mobility, extremely low intrinsic capacitance, ultra-high thermal conductivity, and easy three-dimensional heterogeneous integration, making them an ideal channel material for building next-generation high-speed, low-power CMOS technology.
[0003] However, carbon nanotube materials have low effective carrier mass and narrow bandgap (the bandgap of a 1.3 nm diameter semiconductor carbon nanotube is only 0.5–0.6 eV). Under the strong electric field applied to the gate, the carriers in the carbon nanotube channel are prone to quantum tunneling, resulting in a severe reverse leakage current at the drain of the carbon nanotube device. Therefore, a novel device structure is needed to suppress gate-induced drain leakage (GIDL effect) and further reduce the static power consumption of carbon-based CMOS technology.
[0004] Traditional silicon-based planar CMOS technology typically uses plasma etching to fabricate gate electrodes. Plasma etching inevitably forms a damage layer on the surface of the silicon channel. Silicon-based CMOS processes can eliminate the impact of these damages on device performance through wet etching and high-temperature annealing.
[0005] However, carbon nanotubes are typically only 1-2 nanometers in diameter, and plasma etching can cause irreparable physical damage to the surface of carbon nanotubes. Therefore, it is necessary to develop a non-destructive fabrication process suitable for carbon-based CMOS devices. Summary of the Invention
[0006] To address at least one of the aforementioned technical problems, this disclosure provides a carbon nanotube device with a self-aligned source-drain field plate structure and a method for its fabrication.
[0007] According to one aspect of this disclosure, a carbon nanotube device is provided, comprising:
[0008] First dielectric layer;
[0009] A carbon nanotube active layer is disposed on the first dielectric layer to serve as the channel layer of the carbon nanotube device.
[0010] A source / drain contact layer is disposed on the carbon nanotube active layer;
[0011] A source / drain conductive layer is disposed on the source / drain contact layer;
[0012] A second dielectric layer is disposed on the source / drain conductive layer;
[0013] The source / drain contact layer has a contact layer removal region, and the source / drain conductive layer has a conductive layer removal region. The contact layer removal region is located below the conductive layer removal region, and the size of the contact layer removal region is larger than the size of the conductive layer removal region, so that the source / drain conductive layer and the source / drain contact layer form a source / drain field plate structure.
[0014] According to at least one embodiment of the carbon nanotube device of the present disclosure, the contact layer removal region divides the source / drain contact layer into a first contact layer region and a second contact layer region, the conductive layer removal region divides the source / drain conductive layer into a first conductive layer region and a second conductive layer region, a source terminal lead-out electrode is disposed on the first conductive layer region, and a drain terminal lead-out electrode is disposed on the second conductive layer region.
[0015] A carbon nanotube device according to at least one embodiment of the present disclosure further includes a gate metal electrode and a gate dielectric layer, wherein a dielectric layer removal region is formed in the second dielectric layer, and the gate metal electrode passes through the dielectric layer removal region and the conductive layer removal region into the contact layer removal region, such that the lower end of the gate metal electrode is located in the contact layer removal region, and the gate dielectric layer is disposed between the gate metal electrode and the carbon nanotube active layer, between the gate metal electrode and the source / drain contact layer, between the gate metal electrode and the source / drain conductive layer, and between the gate metal electrode and the second dielectric layer.
[0016] A carbon nanotube device according to at least one embodiment of the present disclosure further includes a self-aligned dielectric sidewall disposed within the dielectric layer removal region and the conductive layer removal region, and disposed between the inner sidewall of the gate dielectric layer and the second dielectric layer and between the inner sidewall of the gate dielectric layer and the source / drain conductive layer, so as to electrically isolate the gate metal electrode from the source lead-out electrode and the drain lead-out electrode.
[0017] According to at least one embodiment of the carbon nanotube device of this disclosure, the dielectric layer removal region and the conductive layer removal region have the same size.
[0018] According to at least one embodiment of the carbon nanotube device of the present disclosure, the gate metal electrode has a T-shaped cross-section, and the upper end of the gate metal electrode has a larger dimension than its lower end to form a gate field plate.
[0019] According to at least one embodiment of the carbon nanotube device of the present disclosure, the gate dielectric layer is filled within the contact layer removal region to enhance the suppression effect of the source-drain field plate structure on reverse leakage current of the carbon nanotube device.
[0020] According to at least one embodiment of the carbon nanotube device of the present disclosure, the gate dielectric layer extends outward from the contact layer removal region via the outer wall surface of the self-aligned dielectric sidewall, extends to the upper surface of the second dielectric layer, and covers the upper surface of the second dielectric layer.
[0021] A carbon nanotube device according to at least one embodiment of the present disclosure further includes: a substrate layer, wherein the first dielectric layer is disposed on the substrate layer.
[0022] According to at least one embodiment of the carbon nanotube device disclosed herein, the active layer of the carbon nanotubes is a semiconductor carbon nanotube, and its arrangement is either a randomly arranged carbon nanotube network or a directionally arranged carbon nanotube array.
[0023] According to at least one embodiment of the carbon nanotube device of the present disclosure, the lower end of the source electrode contacts the upper end surface of the first region of the conductive layer of the source-drain conductive layer and is led out through the second dielectric layer and the gate dielectric layer; the lower end of the drain electrode contacts the upper end surface of the second region of the conductive layer of the source-drain conductive layer and is led out through the second dielectric layer and the gate dielectric layer.
[0024] In a carbon nanotube device according to at least one embodiment of the present disclosure, the source / drain contact layer serves as an etch barrier layer for the source / drain conductive layer.
[0025] According to at least one embodiment of the carbon nanotube device of the present disclosure, the source / drain contact layer is connected to the active layer of the carbon nanotube. For N-type carbon nanotube devices, a metal or alloy with a work function less than 4.5 electron volts is used as the material of the N-type source / drain contact layer, and for P-type carbon nanotube devices, a metal or alloy with a work function greater than 4.5 electron volts is used as the material of the P-type source / drain contact layer.
[0026] According to at least one embodiment of the carbon nanotube device of this disclosure, the thickness of the self-aligned dielectric sidewall is preferably from 1 nanometer to 200 nanometers.
[0027] According to at least one embodiment of the carbon nanotube device of the present disclosure, the material composition of the self-aligned dielectric sidewall is a metal oxide, a metal nitride, silicon oxide, silicon nitride, or a combination thereof.
[0028] According to at least one embodiment of the carbon nanotube device of the present disclosure, the equivalent oxide layer thickness of the gate dielectric layer is preferably less than or equal to 10 nanometers.
[0029] According to another aspect of this disclosure, a method for fabricating a carbon nanotube device is provided, for fabricating a carbon nanotube device according to any embodiment of this disclosure, the method comprising:
[0030] A first dielectric layer is deposited on the substrate;
[0031] A carbon nanotube active layer is deposited on the first dielectric layer;
[0032] A source / drain contact layer and a source / drain conductive layer are sequentially deposited on the carbon nanotube active layer;
[0033] A second dielectric layer is deposited on the source / drain conductive layer;
[0034] The second dielectric layer and the source / drain conductive layer are etched to form a gate trench structure;
[0035] A sidewall medium is deposited within the grid structure, and the sidewall medium is etched to form a self-aligned medium sidewall.
[0036] The source / drain contact layer is etched using a selective wet etching process to form a lateral downcut structure, such that the size of the contact layer removal area of the source / drain contact layer is larger than the size of the conductive layer removal area of the source / drain conductive layer.
[0037] A gate dielectric layer is grown using atomic layer deposition, such that the gate dielectric layer extends outward from the contact layer removal region through the outer wall of the self-aligned dielectric sidewall, extends to the upper surface of the second dielectric layer and covers the upper surface of the second dielectric layer.
[0038] Based on the aforementioned gate trench structure, a gate metal electrode is deposited and etched to form.
[0039] The preparation method according to at least one embodiment of the present disclosure further includes:
[0040] Source contact holes and drain contact holes are respectively etched on both sides of the gate metal electrode;
[0041] Based on the source contact hole and the drain contact hole, source lead-out electrode and drain lead-out electrode are deposited and etched respectively. Attached Figure Description
[0042] The accompanying drawings illustrate exemplary embodiments of the present disclosure and, together with the description thereof, serve to explain the principles of the present disclosure. These drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification.
[0043] Figure 1 This is a schematic cross-sectional view of a carbon nanotube device according to one embodiment of the present disclosure.
[0044] Figure 2 This is a cross-sectional structural schematic diagram of one state of the fabrication process of a carbon nanotube device according to one embodiment of this disclosure.
[0045] Figure 3This is a cross-sectional structural schematic diagram of another state in the fabrication process of a carbon nanotube device according to one embodiment of this disclosure.
[0046] Figure 4 This is a cross-sectional structural schematic diagram of another state in the fabrication process of a carbon nanotube device according to one embodiment of this disclosure.
[0047] Figure 5 This is a cross-sectional structural schematic diagram of another state in the fabrication process of a carbon nanotube device according to one embodiment of this disclosure.
[0048] Figure 6 This is a schematic flowchart of a method for fabricating a carbon nanotube device according to one embodiment of the present disclosure.
[0049] Figure 7 This is a schematic flowchart of a method for fabricating a carbon nanotube device according to another embodiment of this disclosure.
[0050] Explanation of reference numerals in the attached figures
[0051] 100 carbon nanotube devices
[0052] 101 Substrate
[0053] 102 First Dielectric Layer
[0054] 103 Carbon nanotube active layer
[0055] 104 Source / Drain Contact Layer
[0056] 105 Source / Drain Conductive Layer
[0057] 106 Second Dielectric Layer
[0058] 108 Source terminal lead-out electrode
[0059] 109 Drain terminal lead-out electrode
[0060] 110 Gate metal electrode
[0061] 111 Gate dielectric layer
[0062] 112 Self-aligned media sidewall
[0063] 1041 Contact layer removal area
[0064] 1051 Conductive layer removal area
[0065] 1061 Dielectric layer removal area
[0066] 1101 Gate electrode extension. Detailed Implementation
[0067] The present disclosure will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the disclosure. Furthermore, it should be noted that, for ease of description, only the parts relevant to the present disclosure are shown in the accompanying drawings.
[0068] It should be noted that, where there is no conflict, the embodiments and features described in this disclosure can be combined with each other. The technical solutions of this disclosure will now be described in detail with reference to the accompanying drawings and embodiments.
[0069] Unless otherwise stated, the exemplary implementations / embodiments shown are to be understood as providing exemplary features of various details that provide ways in which the technical concepts of this disclosure can be implemented in practice. Therefore, unless otherwise stated, the features of various implementations / embodiments may be additionally combined, separated, interchanged and / or rearranged without departing from the technical concepts of this disclosure.
[0070] The use of crosshairs and / or shading in the accompanying drawings is generally used to clarify the boundaries between adjacent components. Thus, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for the specific material, material properties, dimensions, proportions, commonalities between the illustrated components, or any other characteristics, properties, etc., of the components. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of components may be exaggerated for clarity and / or descriptive purposes. When exemplary embodiments can be implemented differently, a specific process sequence may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Furthermore, the same reference numerals denote the same components.
[0071] When a component is referred to as being "on" or "above" another component, "connected to," or "joined to" another component, the component may be directly on, directly connected to, or directly joined to the other component, or there may be intermediate components. However, when a component is referred to as being "directly on" another component, "directly connected to," or "directly joined to" another component, there are no intermediate components. Therefore, the term "connection" can refer to a physical connection, an electrical connection, etc., and may or may not have intermediate components.
[0072] For descriptive purposes, this disclosure may use spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side (e.g., in a “sidewall”)” to describe the relationship between one component and another component as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, the spatial relative terms are also intended to encompass different orientations of the device during use, operation, and / or manufacture. For example, if the device in the drawings is flipped, a component described as “below” or “under” another component or feature would subsequently be positioned “above” said other component or feature. Thus, the exemplary term “below” can encompass both “above” and “below” orientations. Furthermore, the device may be otherwise positioned (e.g., rotated 90 degrees or in other orientations), thus interpreting the spatial relative descriptive terms used herein accordingly.
[0073] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “the” are intended to include the plural forms as well. Furthermore, when the terms “comprising” and / or “including” and variations thereof are used in this specification, it indicates the presence of the stated features, integrals, steps, operations, parts, components, and / or groups thereof, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, parts, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than as terms of degree, thus explaining the inherent biases in measurements, calculated values, and / or provided values that would be recognized by one of ordinary skill in the art.
[0074] The following text combines Figures 1 to 7 The carbon nanotube devices and their fabrication methods disclosed herein are described in detail.
[0075] Figure 1 This is a schematic cross-sectional view of a carbon nanotube device 100 according to one embodiment of the present disclosure.
[0076] refer to Figure 1 The carbon nanotube device 100 disclosed herein includes:
[0077] First dielectric layer 102;
[0078] Carbon nanotube active layer 103 is disposed on the first dielectric layer 102 to serve as the channel layer of carbon nanotube device 100.
[0079] Source / drain contact layer 104 is disposed on the carbon nanotube active layer 103.
[0080] Source / drain conductive layer 105 is disposed on the source / drain contact layer 104.
[0081] The second dielectric layer 106 is disposed on the source / drain conductive layer 105;
[0082] In this process, a contact layer removal region 1041 is formed in the source / drain contact layer 104, and a conductive layer removal region 1051 is formed in the source / drain conductive layer 105. The contact layer removal region 1041 is located below the conductive layer removal region 1051, and the size of the contact layer removal region 1041 is larger than the size of the conductive layer removal region 1051, so that the source / drain conductive layer 105 and the source / drain contact layer 104 form a source / drain field plate structure.
[0083] The carbon nanotube device 100 disclosed herein forms a contact layer removal region 1041 in the source-drain contact layer 104 and a conductive layer removal region 1051 in the source-drain conductive layer 105, and sets the size of the contact layer removal region 1041 to be larger than the size of the conductive layer removal region 1051, so that the source-drain conductive layer 105 and the source-drain contact layer 104 form a source-drain field plate structure that is wider at the top and narrower at the bottom, thereby reducing the peak electric field at the interface between the source-drain contact and the carbon nanotube, and thus suppressing the off-state leakage current of the drain electrode.
[0084] The conductive layer removal region 1051 described above can be formed by etching the source and drain conductive layer 105. After forming the conductive layer removal region 1051, the contact layer removal region 1041 described above can be formed by selective wet etching.
[0085] The first dielectric layer 102 and the second dielectric layer 106 of the carbon nanotube device 100 disclosed herein can be made of any insulating medium, and their material composition includes, but is not limited to, one or any combination of silicon oxide, carbon-doped silicon oxide, aluminum oxide, aluminum nitride, silicon nitride, boron nitride, polyimide, and BCB resin. Any selection / adjustment of the material or material composition of the first dielectric layer 102 and the second dielectric layer 106 by those skilled in the art falls within the protection scope of this disclosure.
[0086] The active layer 103 of the carbon nanotubes disclosed herein is preferably a semiconductor carbon nanotube, and its arrangement includes, but is not limited to, a randomly arranged carbon nanotube network or a directionally arranged carbon nanotube array.
[0087] Figure 1 The diagram shows an array of oriented carbon nanotubes as the active layer 103 of the carbon nanotubes in this disclosure.
[0088] Based on the technical solutions disclosed herein, any selection or adjustment of the arrangement of the active layer 103 of carbon nanotubes by those skilled in the art falls within the protection scope of this disclosure.
[0089] According to a preferred embodiment of the carbon nanotube device 100 of this disclosure, the contact layer removal region 1041 of the source / drain contact layer 104 divides the source / drain contact layer 104 into a first contact layer region. Figure 1 The left side region) and the second region of the contact layer ( Figure 1 The right-hand region of the source / drain conductive layer 105), the conductive layer removal region 1051 of the source / drain conductive layer 105 divides the source / drain conductive layer 105 into a first conductive layer region (in the right-hand region). Figure 1 The left region of the middle) and the second region of the conductive layer ( Figure 1 (the right-hand area in the middle).
[0090] A source electrode 108 is disposed on the first region of the conductive layer, and a drain electrode 109 is disposed on the second region of the conductive layer.
[0091] refer to Figure 1 The first region of the contact layer ( Figure 1 The left-hand region in the middle) is located in the first region of the conductive layer ( Figure 1 Below the left-hand area, the second contact layer area ( Figure 1 The right-hand region in the middle) is located in the second region of the conductive layer ( Figure 1 Below the right side of the area.
[0092] like Figure 1 As shown, the carbon nanotube device 100 of the above embodiments preferably further includes a gate metal electrode 110 and a gate dielectric layer 111.
[0093] The material composition of the gate metal electrode 110 of the carbon nanotube device 100 disclosed herein includes, but is not limited to, one or any combination of titanium, palladium, platinum, gold, nickel, aluminum, tungsten, molybdenum, copper, titanium nitride, tantalum nitride, tungsten nitride, aluminum nitride, and heavily doped polycrystalline silicon.
[0094] In this invention, the equivalent oxide layer thickness of the gate dielectric layer 111 of the carbon nanotube device 100 is preferably less than or equal to 10 nanometers.
[0095] The material composition of the gate dielectric layer 111 includes, but is not limited to, one or any combination of hafnium oxide, aluminum oxide, yttrium oxide, scandium oxide, lanthanum oxide, zirconium oxide, silicon oxide, titanium oxide, tantalum oxide, beryllium oxide, aluminum nitride, silicon nitride, boron nitride, and carbon nitride.
[0096] Based on the technical solutions disclosed herein, those skilled in the art can select / adjust the material composition of the gate dielectric layer and the gate metal electrode, all of which fall within the protection scope of this disclosure.
[0097] refer to Figure 1 and Figure 3In the carbon nanotube device 100 of this disclosure, the second dielectric layer 106 forms a dielectric layer removal region 1061, and the gate metal electrode 110 passes through the dielectric layer removal region 1061 and the conductive layer removal region 1051 to enter the contact layer removal region 1041, so that the lower end of the gate metal electrode 110 is located in the contact layer removal region 1041.
[0098] A gate dielectric layer 111 is disposed between the gate metal electrode 110 and the carbon nanotube active layer 103, between the gate metal electrode 110 and the source / drain contact layer 104, between the gate metal electrode 110 and the source / drain conductive layer 105, and between the gate metal electrode 110 and the second dielectric layer 106.
[0099] refer to Figure 1 Preferably, the lower end of the gate metal electrode 110 of this disclosure is in contact with the upper surface of the carbon nanotube active layer 103 via the gate dielectric layer 111. The gate dielectric layer 111 fills the contact layer removal region 1041 described above.
[0100] Preferably, the carbon nanotube device 100 of the above embodiments further includes a self-aligned dielectric sidewall 112. The self-aligned dielectric sidewall 112 is disposed within the dielectric layer removal region 1061 and the conductive layer removal region 1051, and is disposed between the inner sidewall of the gate dielectric layer 111 and the second dielectric layer 106 and between the gate dielectric layer 111 and the inner sidewall of the source-drain conductive layer 105, so as to electrically isolate the gate metal electrode 110 from the source lead-out electrode 108 and the drain lead-out electrode 109.
[0101] The material composition of the source electrode 108 and the drain electrode 109 disclosed herein includes, but is not limited to, one or any combination of titanium, tungsten, copper, aluminum, molybdenum, titanium nitride, and tantalum nitride.
[0102] The self-aligned dielectric sidewall 112 of this disclosure electrically isolates the source / drain conductive layer 105 from the gate metal electrode 110, and the self-aligned dielectric sidewall 112 is formed on the inner sidewall of the second dielectric layer 106 and the source / drain conductive layer 105.
[0103] The carbon nanotube device disclosed herein electrically isolates the source / drain metal electrodes 108 and 109 from the gate metal electrode 110 by employing a self-aligned dielectric sidewall 112. By using the self-aligned dielectric sidewall 112 to define the metal gate, a smaller gate length can be obtained by increasing the thickness of the dielectric sidewall, thus overcoming the limitations of photolithography precision, thereby increasing the on-state current of the carbon nanotube device 100.
[0104] Preferably, the thickness of the self-aligned medium sidewall 112 is between 1 nanometer and 200 nanometers.
[0105] Preferably, the material composition of the self-aligned medium sidewall 112 is a metal oxide, a metal nitride, silicon oxide, silicon nitride, or a combination thereof.
[0106] Preferably, the material composition of the self-aligned medium sidewall 112 includes, but is not limited to, one or any combination of silicon oxide, aluminum oxide, hafnium oxide, aluminum nitride, and silicon nitride.
[0107] Furthermore, the source / drain contact layer 104 disclosed herein can serve as a plasma etching barrier layer (as an etching barrier layer for the source / drain conductive layer 105), and has a high etching selectivity (preferably greater than 5). Damage introduced during the etching process can be removed during subsequent wet etching, effectively avoiding physical damage to the carbon nanotube channel and improving the controllability of the process.
[0108] For the carbon nanotube device 100 of the above embodiments, preferably, refer to Figure 1 and Figure 3 The dielectric layer removal region 1061 and the conductive layer removal region 1051 have the same size.
[0109] A dielectric layer removal region 1061 can be formed in the second dielectric layer 106. After the conductive layer removal region 1051 is formed in the source-drain conductive layer 105, a self-aligned dielectric sidewall 112 is formed on the inner sidewall of the second dielectric layer 106 and the inner sidewall of the source-drain conductive layer 105.
[0110] According to a preferred embodiment of this disclosure, reference is made to Figure 1 The carbon nanotube device 100 disclosed herein has a T-shaped cross-section of the gate metal electrode 110, and the upper end of the gate metal electrode 110 is larger than the lower end to form a gate field plate.
[0111] According to a preferred embodiment of this disclosure, reference is made to... Figure 1 The lower end of the gate metal electrode 110 of the carbon nanotube device 100 disclosed herein has a gate electrode extension 1101. The gate electrode extension 1101 is disposed within the contact layer removal region 1041 and is wrapped by the gate dielectric layer 111 to increase the area affected by the gate electric field applied by the gate metal electrode 110 to the carbon nanotube active layer 103.
[0112] refer to Figure 1 By forming a gate electrode extension 1101 at the lower end of the gate metal electrode 110, the gate electric field applied by the gate metal electrode 110 of the carbon nanotube device 100 of this disclosure to the carbon nanotube active layer 103 covers as much as possible the exposed portion of the carbon nanotube active layer 103 through the contact layer removal region 1041.
[0113] Figure 4 This is a cross-sectional structural schematic diagram of another state in the fabrication process of a carbon nanotube device according to one embodiment of this disclosure.
[0114] refer to Figure 4Preferably, the gate dielectric layer 111 of the carbon nanotube device 100 of this disclosure extends outward from the contact layer removal region 104 via the outer wall surface of the self-aligned dielectric sidewall 112, extends to the upper surface of the second dielectric layer 106 and covers the upper surface of the second dielectric layer 106.
[0115] Figure 4 It is possible Figure 3 Based on this, a gate dielectric layer 111 is first formed, and then a gate metal electrode 110 is formed.
[0116] refer to Figures 1 to 5 Preferably, the carbon nanotube device 100 of the above embodiments further includes: a substrate layer 101, and a first dielectric layer 102 disposed on the substrate layer 101.
[0117] The substrate 101 is made of materials including, but not limited to, one or any combination of silicon, quartz, sapphire, gallium arsenide, gallium nitride, indium phosphide, and silicon carbide.
[0118] Refer again Figure 1 Preferably, the lower end of the source electrode 108 of the carbon nanotube device 100 of this disclosure is in contact with the upper end surface of the first region of the conductive layer of the source-drain conductive layer 105, and is led out through the second dielectric layer 106 and the gate dielectric layer 111. The lower end of the drain electrode 109 is in contact with the upper end surface of the second region of the conductive layer of the source-drain conductive layer 105, and is led out through the second dielectric layer 106 and the gate dielectric layer 111.
[0119] refer to Figure 1 Preferably, the source / drain contact layer 104 is connected to the carbon nanotube active layer 103.
[0120] For N-type carbon nanotube devices, a metal or alloy with a work function of less than 4.5 electron volts is used as the material for the N-type source / drain contact layer 104. The material composition of the N-type source / drain contact layer includes, but is not limited to, one or any combination of scandium, yttrium, aluminum, hafnium, and zirconium.
[0121] For P-type carbon nanotube devices, a metal or alloy with a work function greater than 4.5 electron volts is used as the material for the P-type source / drain contact layer 104. The material composition of the P-type source / drain contact layer includes, but is not limited to, one or any combination of palladium, molybdenum, nickel, and gold.
[0122] According to one embodiment of the carbon nanotube device 100 of this disclosure, the first dielectric layer 102 is made of silicon oxide, the source / drain contact layer 104 has a thickness of 10 nanometers, Sc is selected as the N-type source / drain contact layer for the N-type field-effect transistor (N-type carbon nanotube device), Pd is selected as the P-type source / drain contact layer for the P-type field-effect transistor (P-type carbon nanotube device), and Ti / W is selected as the material composition of the source / drain conductive layer 105 with a thickness of 10 nanometers / 20 nanometers. 60 nanometers of silicon oxide is selected as the second dielectric layer 106, and the silicon oxide 106 and the Ti / W source / drain conductive layer 105 are etched using a fluorine-based gas dry etching process, finally stopping at the surface of the source / drain contact layer 104.
[0123] The self-aligned dielectric sidewall 112 is made of silicon nitride, preferably with a thickness of 20 nanometers. For a gate trench with a photolithographic pattern of 90 nanometers, the 20-nanometer-thick silicon nitride sidewall formed by dry etching can reduce the gate trench size to 50 nanometers.
[0124] In this process, the source / drain contact layer 104 is selectively etched in the etchant to form a lateral downcut structure below the silicon nitride sidewall 112 and the Ti / W conductive layer 105. The preferred width of this lateral downcut structure is 40 nanometers. The source / drain contact layer 104 is 20 nanometers narrower than the Ti / W conductive layer above it to form a source / drain field plate structure that is wider at the top and narrower at the bottom. This reduces the peak electric field at the interface between the source / drain contact and the carbon nanotube and suppresses the off-state leakage current of the drain electrode.
[0125] In this design, the gate dielectric layer 111 is hafnium oxide, deposited using atomic layer deposition with a thickness of 7 nanometers. Subsequently, TiN is deposited as the gate work function layer for the P-type field-effect transistor, and W is deposited as the gate metal electrode 110. For the N-type field-effect transistor, TaN is used as the gate work function layer, and W is used as the gate metal electrode 110.
[0126] In this embodiment, the source electrode 108 and the drain electrode 109 are formed using a tungsten plug process, which is compatible with silicon CMOS back-end processes.
[0127] The following text combines Figures 2 to 7 The fabrication method of the carbon nanotube device disclosed herein is described.
[0128] refer to Figure 6 According to an embodiment of the present disclosure, a method for fabricating a carbon nanotube device, S100, includes:
[0129] S101, Deposit a first dielectric layer 102 on the substrate layer 101, such as Figure 2 As shown;
[0130] S102, Deposit a carbon nanotube active layer 103 on the first dielectric layer 102, such as Figure 2 As shown;
[0131] S103. A source / drain contact layer 104 and a source / drain conductive layer 105 are sequentially deposited on the carbon nanotube active layer 103, such as... Figure 2 As shown;
[0132] S104. Deposit a second dielectric layer 106 on the source / drain conductive layer 105, such as Figure 2 As shown;
[0133] S105. Etch the second dielectric layer 106 and the source / drain conductive layer 105 (e.g., dry etching with fluorine-based gas), stopping at the source / drain contact layer 104 to form a gate trench structure, such as... Figure 3 As shown;
[0134] S106. Deposit sidewall dielectric within the grid trench structure, and etch the sidewall dielectric (e.g., ICP-CVD) to form self-aligned dielectric sidewalls 112, such as... Figure 3 As shown;
[0135] S107. Selective wet etching is used to etch the source / drain contact layer 104 to form a lateral downcut structure, such that the size of the contact layer removal region 1041 of the source / drain contact layer 104 is larger than the size of the conductive layer removal region 1051 of the source / drain conductive layer 105. Figure 4 As shown;
[0136] S108. A gate dielectric layer 111 is grown using atomic layer deposition, such that the gate dielectric layer 111 extends outward from the contact layer removal region 104 via the outer wall of the self-aligned dielectric sidewall 112, extends to the upper surface of the second dielectric layer 106 and covers the upper surface of the second dielectric layer 106.
[0137] S109. Based on the gate trench structure, a gate metal electrode 110 is deposited and etched to form a gate metal electrode.
[0138] refer to Figure 7 According to another embodiment of the present disclosure, the method for fabricating a carbon nanotube device, S100, includes:
[0139] S101, Deposit a first dielectric layer 102 on the substrate layer 101, such as Figure 2 As shown;
[0140] S102, Deposit a carbon nanotube active layer 103 on the first dielectric layer 102, such as Figure 2 As shown;
[0141] S103. A source / drain contact layer 104 and a source / drain conductive layer 105 are sequentially deposited on the carbon nanotube active layer 103, such as... Figure 2 As shown;
[0142] S104. Deposit a second dielectric layer 106 on the source / drain conductive layer 105, such as Figure 2 As shown;
[0143] S105. Etch the second dielectric layer 106 and the source / drain conductive layer 105 (e.g., dry etching with fluorine-based gas), stopping at the source / drain contact layer 104 to form a gate trench structure, such as... Figure 3 As shown;
[0144] S106. Deposit sidewall dielectric within the grid trench structure, and etch the sidewall dielectric (e.g., ICP-CVD) to form self-aligned dielectric sidewalls 112, such as... Figure 3 As shown;
[0145] S107. Selective wet etching is used to etch the source / drain contact layer 104 to form a lateral downcut structure, such that the size of the contact layer removal region 1041 of the source / drain contact layer 104 is larger than the size of the conductive layer removal region 1051 of the source / drain conductive layer 105. Figure 4 As shown;
[0146] S108. A gate dielectric layer 111 is grown using atomic layer deposition, such that the gate dielectric layer 111 extends outward from the contact layer removal region 104 via the outer wall of the self-aligned dielectric sidewall 112, extends to the upper surface of the second dielectric layer 106 and covers the upper surface of the second dielectric layer 106.
[0147] S109. Based on the gate trench structure, a gate metal electrode 110 is deposited and etched to form a gate metal electrode.
[0148] S110. Source contact holes and drain contact holes are etched on both sides of the gate metal electrode 110, respectively.
[0149] S111. Based on the source contact hole and the drain contact hole, the source terminal lead-out electrode 108 and the drain terminal lead-out electrode 109 are deposited and etched respectively.
[0150] In the description of this specification, the references to terms such as "one embodiment / mode," "some embodiments / modes," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment / mode or example is included in at least one embodiment / mode or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment / mode or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments / modes or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments / modes or examples described in this specification, as well as the features of different embodiments / modes or examples.
[0151] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0152] Those skilled in the art should understand that the above embodiments are merely for illustrating the present disclosure and are not intended to limit the scope of the disclosure. Those skilled in the art can make other changes or modifications based on the above disclosure, and these changes or modifications still fall within the scope of the present disclosure.
Claims
1. A carbon nanotube device, characterized in that, include: First dielectric layer; A carbon nanotube active layer is disposed on the first dielectric layer to serve as the channel layer of the carbon nanotube device. A source / drain contact layer is disposed on the carbon nanotube active layer; A source / drain conductive layer is disposed on the source / drain contact layer; as well as A second dielectric layer is disposed on the source / drain conductive layer; The source / drain contact layer has a contact layer removal region, the source / drain conductive layer has a conductive layer removal region, the contact layer removal region is located below the conductive layer removal region, and the size of the contact layer removal region is larger than the size of the conductive layer removal region, so that the source / drain conductive layer and the source / drain contact layer form a source / drain field plate structure. The carbon nanotube device also includes: A gate metal electrode and a gate dielectric layer are provided. A dielectric layer removal region is formed in the second dielectric layer. The gate metal electrode passes through the dielectric layer removal region and the conductive layer removal region to enter the contact layer removal region, such that the lower end of the gate metal electrode is located in the contact layer removal region. The lower end of the gate metal electrode has a gate electrode extension, which is disposed within the contact layer removal region and is wrapped by the gate dielectric layer to increase the area affected by the gate electric field applied by the gate metal electrode to the carbon nanotube active layer.
2. The carbon nanotube device according to claim 1, characterized in that, The contact layer removal region divides the source / drain contact layer into a first contact layer region and a second contact layer region. The conductive layer removal region divides the source / drain conductive layer into a first conductive layer region and a second conductive layer region. A source terminal lead-out electrode is disposed on the first conductive layer region, and a drain terminal lead-out electrode is disposed on the second conductive layer region.
3. The carbon nanotube device according to claim 1 or 2, characterized in that, The gate dielectric layer is disposed between the gate metal electrode and the carbon nanotube active layer, between the gate metal electrode and the source / drain contact layer, between the gate metal electrode and the source / drain conductive layer, and between the gate metal electrode and the second dielectric layer.
4. The carbon nanotube device according to claim 3, characterized in that, It also includes a self-aligned dielectric sidewall, which is disposed within the dielectric layer removal region and the conductive layer removal region, and is disposed between the inner sidewall of the gate dielectric layer and the second dielectric layer and between the inner sidewall of the gate dielectric layer and the source / drain conductive layer, so as to electrically isolate the gate metal electrode from the source lead-out electrode and the drain lead-out electrode.
5. The carbon nanotube device according to claim 4, characterized in that, The dielectric layer removal region has the same size as the conductive layer removal region.
6. The carbon nanotube device according to claim 3, characterized in that, The gate metal electrode has a T-shaped cross-section, and the upper end of the gate metal electrode is larger than the lower end to form a gate field plate.
7. The carbon nanotube device according to claim 6, characterized in that, The gate dielectric layer fills within the contact layer removal region to enhance the suppression effect of the source / drain field plate structure on reverse leakage current of the carbon nanotube device.
8. The carbon nanotube device according to claim 4, characterized in that, The gate dielectric layer extends outward from the contact layer removal area via the outer wall of the self-aligned dielectric sidewall, extending to and covering the upper surface of the second dielectric layer.
9. The carbon nanotube device according to claim 1, characterized in that, Also includes: A substrate layer, wherein the first dielectric layer is disposed on the substrate layer.
10. The carbon nanotube device according to claim 1, characterized in that, The active layer of carbon nanotubes is a semiconductor carbon nanotube, and its arrangement is either a randomly arranged carbon nanotube network or a directionally arranged carbon nanotube array.
11. The carbon nanotube device according to claim 2, characterized in that, The lower end of the source electrode contacts the upper surface of the first region of the conductive layer of the source-drain conductive layer and is led out through the second dielectric layer and the gate dielectric layer. The lower end of the drain electrode contacts the upper surface of the second region of the conductive layer of the source-drain conductive layer and is led out through the second dielectric layer and the gate dielectric layer.
12. The carbon nanotube device according to claim 1, characterized in that, The source / drain contact layer serves as an etching barrier layer for the source / drain conductive layer.
13. The carbon nanotube device according to claim 1, characterized in that, The source / drain contact layer is connected to the active layer of the carbon nanotube. For N-type carbon nanotube devices, a metal or alloy with a work function less than 4.5 electron volts is used as the material of the N-type source / drain contact layer. For P-type carbon nanotube devices, a metal or alloy with a work function greater than 4.5 electron volts is used as the material of the P-type source / drain contact layer.
14. The carbon nanotube device according to claim 4, characterized in that, The thickness of the self-aligned medium sidewall is from 1 nanometer to 200 nanometers.
15. The carbon nanotube device according to claim 4, characterized in that, The material composition of the self-aligned medium sidewall is metal oxide, metal nitride, silicon oxide, silicon nitride, or a combination thereof.
16. The carbon nanotube device according to claim 1, characterized in that, The equivalent oxide layer thickness of the gate dielectric layer is less than or equal to 10 nanometers.
17. A method for fabricating a carbon nanotube device, used to fabricate the carbon nanotube device according to any one of claims 1 to 16, characterized in that, The preparation method includes: A first dielectric layer is deposited on the substrate; A carbon nanotube active layer is deposited on the first dielectric layer; A source / drain contact layer and a source / drain conductive layer are sequentially deposited on the carbon nanotube active layer; A second dielectric layer is deposited on the source / drain conductive layer; The second dielectric layer and the source / drain conductive layer are etched to form a gate trench structure; A sidewall medium is deposited within the grid structure, and the sidewall medium is etched to form a self-aligned medium sidewall. The source / drain contact layer is etched using a selective wet etching process to form a lateral downcut structure, such that the size of the contact layer removal area of the source / drain contact layer is larger than the size of the conductive layer removal area of the source / drain conductive layer. A gate dielectric layer is grown using atomic layer deposition (ALD) such that the gate dielectric layer extends outward from the contact layer removal region via the outer wall of the self-aligned dielectric sidewall, extending to and covering the upper surface of the second dielectric layer; and Based on the aforementioned gate trench structure, a gate metal electrode is deposited and etched to form.
18. The preparation method according to claim 17, characterized in that, Also includes: Source contact holes and drain contact holes are respectively etched on both sides of the gate metal electrode; as well as Based on the source contact hole and the drain contact hole, source lead-out electrode and drain lead-out electrode are deposited and etched respectively.