Display device

Abstract

A display device includes a display panel configured to display an image and an input sensing layer. The display panel includes an electrode layer. The input sensing layer is disposed on the display panel. The input sensing layer includes a plurality of sensing electrodes including a first sensing electrode and a second sensing electrode, and a plurality of signal lines electrically connected to the plurality of sensing electrodes. The plurality of signal lines includes a first signal line electrically connected to the first sensing electrode and a second signal line electrically connected to the second sensing electrode. The first signal line has a length different from a length of the second signal line. A distance between the first signal line and the electrode layer is different from a distance between the second signal line and the electrode layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0028761, filed with the Korean Intellectual Property Office on March 4, 2021, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This invention relates to a display device. More specifically, this invention relates to a display device with input sensing functionality. Background Technology

[0004] Various multimedia electronic devices include display devices that display images, such as televisions, mobile phones, tablet computers, navigation units, and gaming units. Multimedia electronic devices may include input sensors that provide touch-based input methods, allowing users to easily and intuitively input information or commands in addition to traditional input methods (such as buttons, keyboards, mice, etc.).

[0005] Input sensors are included in the display device to sense locations such as touch events occurring by a part of the user's body. Summary of the Invention

[0006] The present invention provides a display device that reduces the capacitance difference between signal lines included in an input sensing layer and electrode layers included in a display panel.

[0007] According to an embodiment of the present invention, a display device includes a display panel configured to display an image. The display panel includes an electrode layer. An input sensing layer is disposed on the display panel. The input sensing layer includes a plurality of sensing electrodes, including a first sensing electrode and a second sensing electrode. A plurality of signal lines are electrically connected to the plurality of sensing electrodes. The plurality of signal lines include a first signal line electrically connected to the first sensing electrode and a second signal line electrically connected to the second sensing electrode. The first signal line has a length different from that of the second signal line. The distance between the first signal line and the electrode layer is different from the distance between the second signal line and the electrode layer.

[0008] In one embodiment, the length of the first signal line is greater than the length of the second signal line. The distance between the first signal line and the electrode layer is greater than the distance between the second signal line and the electrode layer.

[0009] In one embodiment, the first signal line has a width greater than that of the second signal line.

[0010] In one embodiment, the first sensing electrode and the second sensing electrode are spaced apart from each other in a first direction. The first signal line includes a first line portion extending in the first direction and a second line portion extending in a second direction intersecting the first direction. The second signal line includes a third line portion extending in the first direction and a fourth line portion extending in the second direction.

[0011] In one embodiment, the first line portion has a length longer than the third line portion, and the distance between the first line portion and the electrode layer is greater than the distance between the third line portion and the electrode layer.

[0012] In one embodiment, the display panel includes: a display element layer comprising a light-emitting element; and an encapsulation layer disposed on the display element layer. The light-emitting element includes: a first electrode; a light-emitting layer disposed on the first electrode; and a second electrode disposed on the light-emitting layer.

[0013] In one embodiment, the electrode layer includes the second electrode, and the distance between the first signal line and the second electrode is different from the distance between the second signal line and the second electrode.

[0014] In one embodiment, the first signal line has a length longer than the length of the second signal line. The distance between the first signal line and the second electrode is greater than the distance between the second signal line and the second electrode.

[0015] In one embodiment, the first encapsulation portion of the encapsulation layer corresponding to the first signal line has a thickness different from the thickness of the second encapsulation portion of the encapsulation layer corresponding to the second signal line.

[0016] In one embodiment, the first signal line has a length longer than the length of the second signal line. The thickness of the first package portion is greater than the thickness of the second package portion.

[0017] In an embodiment, the encapsulation layer includes: a first inorganic layer disposed on the display element layer; a second inorganic layer disposed on the first inorganic layer; and an organic layer disposed between the first inorganic layer and the second inorganic layer.

[0018] In one embodiment, the first organic layer portion of the organic layer corresponding to the first signal line has a greater thickness than the second organic layer portion of the organic layer corresponding to the second signal line.

[0019] In one embodiment, the first sensing electrode and the second sensing electrode are spaced apart from each other in the first direction. The first signal line includes a first line portion extending in the first direction and a second line portion extending in a second direction intersecting the first direction. The second signal line includes a third line portion extending in the first direction and a fourth line portion extending in the second direction.

[0020] In one embodiment, the first line portion has a length longer than the third line portion, and the thickness of the third encapsulation portion of the encapsulation layer corresponding to the first line portion is greater than the thickness of the fourth encapsulation portion of the encapsulation layer corresponding to the third line portion.

[0021] In one embodiment, the first signal line has a length longer than the length of the second signal line. The encapsulation layer further includes a first insulating layer disposed on the second inorganic layer and corresponding to the first signal line and the second signal line, and a second insulating layer disposed on the first insulating layer and corresponding to the first signal line.

[0022] In one embodiment, the input sensing layer includes a sensing insulating layer disposed on the display panel and a conductive layer disposed on the sensing insulating layer and comprising the plurality of sensing electrodes and the plurality of signal lines. A first insulating portion of the sensing insulating layer corresponding to the first signal line has a thickness different from the thickness of a second insulating portion of the sensing insulating layer corresponding to the second signal line.

[0023] In one embodiment, the first signal line has a length longer than the length of the second signal line. The thickness of the first insulating portion is greater than the thickness of the second insulating portion.

[0024] In one embodiment, the first sensing electrode and the second sensing electrode are spaced apart from each other in the first direction. The first signal line includes a first line portion extending in the first direction and a second line portion extending in a second direction intersecting the first direction. The second signal line includes a third line portion extending in the first direction and a fourth line portion extending in the second direction.

[0025] In one embodiment, the first line portion has a length longer than the third line portion, and the thickness of the third insulating portion of the sensing insulating layer corresponding to the first line portion is greater than the thickness of the fourth insulating portion of the sensing insulating layer corresponding to the third line portion.

[0026] In one embodiment, the sensing insulating layer comprises an organic material.

[0027] According to an embodiment of the present invention, a display device includes: a display panel configured to display an image, the display panel including an electrode layer; and an input sensing layer disposed on the display panel and configured to sense input. The input sensing layer includes a plurality of sensing electrodes and a plurality of signal lines electrically connected to the plurality of sensing electrodes respectively. Each of the plurality of signal lines has a length and width different from the length and width of the other signal lines. The plurality of signal lines have substantially the same resistance as each other. The distance between each of the plurality of signal lines and the electrode layer is different from the distance between the other signal lines and the electrode layer. Each of the plurality of signal lines has substantially the same capacitance as the electrode layer.

[0028] In an embodiment, the plurality of sensing electrodes includes a first sensing electrode to an nth sensing electrode, where n is a natural number greater than or equal to 2. The plurality of signal lines includes a first signal line to an nth signal line, respectively electrically connected to the first sensing electrode to the nth sensing electrode. The length and width of the first signal line to the nth signal line increase from the first signal line to the nth signal line. The distance from the first signal line to the nth signal line to the electrode layer increases from the first signal line to the nth signal line.

[0029] In summary, the display device can prevent capacitance differences between each signal line of the input sensing layer and the electrode layer of the display panel. For example, when the signal lines have different lengths or widths, the capacitance difference between each signal line and the electrode layer can be reduced or eliminated by adjusting the distance between each signal line and the electrode layer. Therefore, the degradation of the sensing sensitivity of the input sensing layer caused by capacitance differences is prevented. Attached Figure Description

[0030] The above and other advantages of the inventive concept will become apparent when considered in conjunction with the accompanying drawings and with reference to the following detailed description, wherein:

[0031] Figure 1 This is a perspective view illustrating a display device according to an embodiment of the concept of the present invention;

[0032] Figure 2 This is an exploded perspective view illustrating a display device according to an embodiment of the concept of the present invention;

[0033] Figure 3 This is a cross-sectional view illustrating a display module according to an embodiment of the concept of the present invention;

[0034] Figure 4 This is a plan view illustrating an input sensing layer according to an embodiment of the concept of the present invention;

[0035] Figure 5 This is a cross-sectional view showing a portion of a display module in an active region according to an embodiment of the present invention;

[0036] Figure 6 and Figure 7 This illustrates an embodiment of the concept according to the present invention. Figure 4 A cross-sectional view of the display module taken by line I-I';

[0037] Figure 8 and Figure 9 This illustrates an embodiment of the concept according to the present invention. Figure 4 A cross-sectional view of the display module taken by line I-I';

[0038] Figure 10 This is a plan view illustrating an input sensing layer according to an embodiment of the concept of the present invention; and

[0039] Figure 11 This illustrates an embodiment of the concept according to the present invention. Figure 10 The cross-sectional view of the display module is taken from line II-II'. Detailed Implementation

[0040] In this disclosure, it will be understood that when an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it can be directly on, directly connected to, or coupled to the other element or layer, or an intermediary element or layer may be present. When an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, then an intermediary element or layer is not present.

[0041] The same reference numerals always denote the same elements. In the drawings, for the purpose of effectively describing the technical content, the thickness, scale, and dimensions of components are exaggerated. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0042] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” are also intended to include the plural forms.

[0043] For ease of description, spatial relative terms such as “below,” “under,” “down,” “above,” “above,” etc., may be used in this document to describe the relationship between one element or feature and another element(s) or another feature(s) as shown in the figure.

[0044] It will be further understood that, when used in this specification, the terms “comprising” and / or “including” indicate the presence of the said feature, integer, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0045] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that, unless so explicitly defined herein, terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formalized sense.

[0046] The concept of the present invention will be described in detail below with reference to the accompanying drawings.

[0047] Figure 1 This is a perspective view illustrating a display device DD according to an embodiment of the concept of the present invention, and Figure 2 This is an exploded perspective view showing a display device DD according to an embodiment of the concept of the present invention.

[0048] Reference Figure 1 and Figure 2 In an embodiment, the display device DD may have a rectangular shape defined by a relatively long side extending in a first direction DR1 and a relatively short side extending in a second direction DR2 intersecting the first direction DR1. However, the shape of the display device DD should not be limited to a rectangular shape, and the display device DD may have a variety of shapes.

[0049] In the embodiments, the display device DD can be applied to large display devices such as televisions or monitors, or to small to medium-sized display devices such as mobile phones, tablet computers, car navigation units, or gaming units. However, the embodiments of the present invention are not limited thereto, and the display device DD can be applied to other electronic devices of various sizes.

[0050] The display device DD can display an image IM towards a third direction DR3 via a display surface IS extending in a plane defined in a first direction DR1 and a second direction DR2. The display surface IS through which the image IM is displayed can correspond to the front surface of the display device DD. In embodiments, the image IM may include at least one video and / or still image with different content. For example, in... Figure 1 In this context, the image IM is displayed as a clock, date, and weather window, along with multiple icons associated with the software application. However, embodiments of the present invention are not limited thereto.

[0051] In this embodiment, the front (or upper) surface and the rear (or lower) surface of each component are defined relative to a third-party DR3 (on which the image IM is displayed). The front and rear surfaces are opposite to each other on the third-party DR3, and the normal direction of each of the front and rear surfaces may be substantially parallel to the third-party DR3.

[0052] However, the first direction DR1, the second direction DR2, and the third direction DR3 are relative to each other and can be changed in other directions.

[0053] The display device DD can sense external input TC applied to it from the outside. External input TC can include various forms of input provided from outside the display device DD. For example, in an embodiment, external input TC can include one of various forms of input such as a part of a user's body, light, heat, pressure, or a combination thereof. Additionally, external input TC can include input generated by an input device (such as a stylus, active pen, electronic pen, etc.), rather than the user's hand. Figure 1 In this embodiment, the external input TC is shown as a user's finger touching the front surface. However, this is merely an example, and the external input TC can be provided in various ways. Furthermore, depending on the structure of the display device DD, the display device DD can sense the external input TC applied to its side or rear surface, and embodiments of the inventive concept are not limited to sensing the external input TC from the front surface. The display device DD can obtain positional information, such as coordinate information, of the external input TC.

[0054] The front surface of the display device DD may include a transmissive region TA and a border region BZA. The transmissive region TA may be the area through which an image IM is displayed. The user can view the image IM through the transmissive region TA. In this embodiment, the transmissive region TA may be a quadrilateral shape with rounded vertices. However, embodiments of the present invention are not limited to this, and the transmissive region TA may have various shapes.

[0055] The border region BZA may be defined as adjacent to the transmissive region TA. In an embodiment, the border region BZA may have a predetermined color. The border region BZA may surround the transmissive region TA. For example, in an embodiment, the border region BZA may (e.g., in the first direction DR1 and the second direction DR2) completely surround the transmissive region TA. However, embodiments of the inventive concept are not limited thereto. Therefore, the transmissive region TA may have a shape defined by the border region BZA. However, this is merely an example. For example, in an embodiment, the border region BZA may be configured to be adjacent only to one side of the transmissive region TA, or it may be omitted. According to embodiments, the display device DD may include various different arrangements and should not be particularly limited.

[0056] like Figure 2 As shown, the display device DD may include a display module DM and a window WM disposed on the display module DM (e.g., directly disposed on the display module DM on a third-party DR3). The display module DM may include a display panel DP and an input sensing layer ISP.

[0057] The display panel DP according to embodiments of the present invention can be a light-emitting display panel. However, embodiments of the present invention are not limited thereto. For example, the display panel DP can be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting element of an organic light-emitting display panel may include organic light-emitting materials. The light-emitting element of a quantum dot light-emitting display panel may include quantum dots or quantum rods. In the following, organic light-emitting display panels will be described as representative examples of display panel DPs. The display panel DP can output an image IM (refer to...) Figure 1 ), and the output image IM can be displayed on the display surface IS.

[0058] Figure 1 and Figure 2 A display device DD with a planar structure is shown as a representative example. However, embodiments of the present invention are not limited thereto. The display device DD can be bent or folded relative to a folding axis, and may also have a sliding structure.

[0059] The input sensing layer (ISP) can sense external input (TC) and obtain coordinate information about the external input (TC). The configuration and operation of the input sensing layer (ISP) will refer to... Figure 3 and Figure 4 describe.

[0060] Window WM may include transmission image IM (refer to) Figure 1 The window WM can be made of a transparent material. For example, in an embodiment, the window WM may include glass, sapphire, or plastic. However, embodiments of the present invention are not limited thereto. The window WM may have a single-layer or multi-layer structure.

[0061] In an embodiment, the bezel area BZA of the display device DD can be defined by printing a material with a predetermined color onto the area of ​​the window WM. As an example, the window WM may include a light-blocking pattern to define the bezel area BZA. In an embodiment, the light-blocking pattern may be a colored organic layer and may be formed by a coating method.

[0062] The window WM can be coupled to the display module DM via an adhesive film. For example, in an embodiment, the adhesive film may include an optically clear adhesive (OCA). However, the adhesive film should not be limited to or restricted by this, and the adhesive film may include common adhesives. For example, the adhesive film may include an optically clear resin (OCR) or a pressure-sensitive adhesive (PSA).

[0063] In an embodiment, an anti-reflective layer may be disposed between the window WM and the display module DM. The anti-reflective layer can reduce the reflectivity of external light incident on the window WM from above. According to an embodiment of the present invention, the anti-reflective layer may include a retarder and a polarizer. The retarder may be film-type or liquid crystal coated type, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may be film-type or liquid crystal coated type. A film-type polarizer may include a stretched synthetic resin film, and a liquid crystal coated polarizer may include liquid crystal aligned in a predetermined alignment manner. In an embodiment, the retarder and polarizer may be implemented as a single polarizing film.

[0064] The display module DM can display an image IM in response to an electrical signal (see reference). Figure 1 It can also send / receive information about external input TC. The display module DM can include an active area AA and a peripheral area NAA. The active area AA can be defined as the area through which the image IM provided from the display module DM is transmitted. In addition, the active area AA can be defined as the area through which the input sensing layer ISP senses external input TC applied to it from the outside.

[0065] The peripheral region NAA can be defined as being adjacent to the active region AA. For example, the peripheral region NAA can (e.g., in the first direction DR1 and / or the second direction DR2) surround the active region AA. However, this is merely an example, and the peripheral region NAA can be defined in various shapes and should not be particularly limited. According to an embodiment, the active region AA of the display module DM can correspond to at least a portion of the transmissive region TA.

[0066] The display module DM may further include a main circuit board (MCB), a flexible circuit film (FCB), and a driver chip (DIC). The main circuit board (MCB) may be electrically connected to the flexible circuit film (FCB) and may also be electrically connected to the display panel (DP). The flexible circuit film (FCB) may be electrically connected to the display panel (DP) and may also electrically connect the display panel (DP) to the main circuit board (MCB). The input sensing layer (ISP) may also be electrically connected to the main circuit board (MCB) via the flexible circuit film (FCB). However, embodiments of the present invention are not limited thereto. For example, in some embodiments, the display module DM may further include a separate flexible circuit film to electrically connect the input sensing layer (ISP) to the main circuit board (MCB).

[0067] The main circuit board (MCB) may include multiple driving elements. These driving elements may include circuitry for driving the display panel (DP). The driver chip (DIC) may be mounted on the flexible circuit film (FCB). However, embodiments of the present invention are not limited thereto. For example, in one embodiment, the driver chip (DIC) may be directly disposed on the display panel (DP). In this embodiment, a portion of the display panel (DP) on which the driver chip (DIC) is mounted may be bent to be disposed on the rear surface of the display module (DM). The driver chip (DIC) may include driving elements, such as data driving circuitry, to drive the pixels of the display panel (DP).

[0068] In an embodiment, the display device DD may further include a controller to control the driving of the input sensing layer ISP. For example, in an embodiment, the controller may be mounted on the main circuit board MCB. However, embodiments of the present invention are not limited thereto. For example, in an embodiment, the controller may be built into the driver chip DIC.

[0069] The display device DD may also include a housing EDC configured to receive and house the display module DM. The housing EDC may be coupled to a window WM to define the appearance of the display device DD. The housing EDC can absorb impacts applied to it from the outside and prevent foreign objects and moisture from entering the display module DM, thus protecting the components housed within the housing EDC. In embodiments, the housing EDC may be provided in the form of a plurality of storage components combined with each other.

[0070] According to an embodiment, the display device DD may further include an electronic module containing various functional modules for operating the display module DM, a power supply module for supplying power required for the overall operation of the display device DD, and a bracket coupled to the display module DM and / or the housing EDC to divide the internal space of the display device DD.

[0071] Figure 3 This is a cross-sectional view showing a display module DM according to an embodiment of the present invention.

[0072] Reference Figure 3The display module DM may include a display panel DP and an input sensing layer ISP. The display panel DP may include a substrate layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and an encapsulation layer ENP. The circuit element layer DP-CL, the display element layer DP-OLED, and the encapsulation layer ENP may be disposed on the substrate layer BL. In embodiments, the display panel DP may also include functional layers, such as an anti-reflective layer and a refractive index adjustment layer.

[0073] In an embodiment, the substrate layer BL may include at least one plastic film. The substrate layer BL may be a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. (Reference) Figure 2 The described active region AA and surrounding region NAA can be applied to the matrix layer BL in the same way.

[0074] The circuit element layer DP-CL may include at least one intermediate insulating layer and circuit elements. The intermediate insulating layer may include at least one intermediate inorganic layer and at least one intermediate organic layer. The circuit elements may include signal lines and pixel driving circuitry.

[0075] The display element layer DP-OLED may include the light-emitting element OLED (see reference). Figure 5 In an embodiment, the light-emitting element OLED may include at least an organic light-emitting diode. The display element layer DP-OLED may also include an organic layer, such as a pixel-defining layer PDL (see reference). Figure 5 ).

[0076] An encapsulation layer (ENP) can encapsulate the display element layer (DP-OLED). The ENP may include at least one inorganic layer. The ENP may also include at least one organic layer. The inorganic layer protects the DP-OLED from moisture and oxygen, while the organic layer protects it from foreign matter such as dust particles. In embodiments, the inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer may include an acrylic-based organic layer. However, embodiments of the present invention are not limited thereto.

[0077] In an embodiment, the input sensing layer ISP can be formed on the display panel DP via a continuous process. Alternatively, the input sensing layer ISP can be coupled to the display panel DP via an adhesive film. The input sensing layer ISP can have a multilayer structure. The input sensing layer ISP can have a single-layer insulating layer or a multilayer insulating layer. In an embodiment where the input sensing layer ISP is directly disposed on the display panel DP via a continuous process, the input sensing layer ISP can be directly disposed on the encapsulation layer ENP, and the adhesive film may not be disposed between the input sensing layer ISP and the display panel DP. However, embodiments of the inventive concept are not limited to this. For example, in an embodiment, the adhesive film may be disposed between the input sensing layer ISP and the display panel DP. In this embodiment, the input sensing layer ISP may not be manufactured via a continuous process with the display panel DP, and the input sensing layer ISP may be manufactured via a separate process and then fixed to the upper surface of the display panel DP by an adhesive film.

[0078] In this embodiment, the input sensing layer ISP can obtain information about the external input TC (refer to) using a capacitance method. Figure 1 The coordinate information of ).

[0079] Figure 4 This is a plan view illustrating an input sensing layer (ISP) according to an embodiment of the concept of the present invention.

[0080] Reference Figure 4 The input sensing layer ISP may include transmit electrodes SE1_1 to SE1_4 and receive electrodes SE2_1 to SE2_6. The input sensing layer ISP may also include transmit traces SL1_1 to SL1_4 respectively connected to one side of each of the transmit electrodes SE1_1 to SE1_4, and receive traces SL2_1 to SL2_6 respectively connected to one side of each of the receive electrodes SE2_1 to SE2_6. The transmit electrodes SE1_1 to SE1_4 and the receive electrodes SE2_1 to SE2_6 may be referred to as sensing electrodes. The transmit traces SL1_1 to SL1_4 and the receive traces SL2_1 to SL2_6 may be referred to as signal lines.

[0081] For example, in an embodiment, the transmitting electrodes SE1_1 to SE1_4 may include a first transmitting electrode SE1_1, a second transmitting electrode SE1_2, a third transmitting electrode SE1_3, and a fourth transmitting electrode SE1_4. The receiving electrodes SE2_1 to SE2_6 may include a first receiving electrode SE2_1, a second receiving electrode SE2_2, a third receiving electrode SE2_3, a fourth receiving electrode SE2_4, a fifth receiving electrode SE2_5, and a sixth receiving electrode SE2_6.

[0082] Transmitting traces SL1_1 to SL1_4 may include a first transmitting trace SL1_1, a second transmitting trace SL1_2, a third transmitting trace SL1_3, and a fourth transmitting trace SL1_4. Receiving traces SL2_1 to SL2_6 may include a first receiving trace SL2_1, a second receiving trace SL2_2, a third receiving trace SL2_3, a fourth receiving trace SL2_4, a fifth receiving trace SL2_5, and a sixth receiving trace SL2_6. However, embodiments of the present invention are not limited thereto, and the number of transmitting electrodes, receiving electrodes, transmitting traces, and receiving traces may vary.

[0083] The first transmission trace SL1_1 to the fourth transmission trace SL1_4 can be connected to one side of each of the first transmission electrodes SE1_1 to the fourth transmission electrodes SE1_4. For example, the first transmission trace SL1_1 to the fourth transmission trace SL1_4 can be connected to the lower side of the first transmission electrodes SE1_1 to the fourth transmission electrodes SE1_4 in the first direction DR1. However, embodiments of the inventive concept are not limited to this. The first receiving trace SL2_1 to the sixth receiving trace SL2_6 can be connected to one side of each of the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6. For example, the first receiving trace SL2_1 to the third receiving trace SL2_3 can be connected to the left side of the first receiving electrodes SE2_1 to the third receiving electrodes SE2_3 in the direction opposite to the second direction DR2, and the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be connected to the right side of the fourth receiving electrodes SE2_4 to the sixth receiving electrodes SE2_6 in the second direction DR2. However, embodiments of the inventive concept are not limited to this.

[0084] The first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 can intersect with the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6. A capacitor can be formed between the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6. An external input TC (see reference) can be used. Figure 1 This is used to change the capacitance of the capacitor.

[0085] Each of the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 may include a first sensor portion SP1 and a first connector portion CP1 disposed in the active region AA. Each of the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 may include a second sensor portion SP2 and a second connector portion CP2 disposed in the active region AA.

[0086] For example, Figure 4Four transmitting electrodes SE1_1 to SE1_4 and six receiving electrodes SE2_1 to SE2_6 are shown. However, the number of transmitting electrodes and receiving electrodes should not be limited to or restricted by this. A number of transmitting electrodes may include m transmitting electrodes, and a number of receiving electrodes may include n receiving electrodes. In this embodiment, each of "m" and "n" can be a natural number equal to or greater than 1, and "m" and "n" can be the same as or different from each other.

[0087] Figure 4 The diagram shows a first sensor portion SP1 and a second sensor portion SP2, each having a rhomboid shape. However, embodiments of the present invention are not limited thereto, and the shapes of the first sensor portion SP1 and the second sensor portion SP2 can vary. For example, each of the first sensor portion SP1 and the second sensor portion SP2 can have other polygonal shapes.

[0088] In one embodiment, a first sensor portion SP1 may be arranged along a transmitting electrode on a first direction DR1, and the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 may be arranged spaced apart from each other on a second direction DR2. In one receiving electrode, a second sensor portion SP2 may be arranged along a receiving electrode on a second direction DR2, and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 may be arranged spaced apart from each other on the first direction DR1.

[0089] Each of the first connector portions CP1 can be electrically connected to the adjacent first sensor portions SP1, and each of the second connector portions CP2 can be electrically connected to the adjacent second sensor portions SP2.

[0090] For example, the first sensor portion SP1 included in the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the second sensor portion SP2 included in the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 can have a grid shape. Since the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 have a grid shape, the size of the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the display panel DP (see reference) can be reduced. Figure 3 The capacitance of the parasitic capacitor formed between the electrode layers of the first receiving electrode SE2_1 to the sixth receiving electrode SE2_6 and the electrode layers.

[0091] In an embodiment, the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6, having a mesh shape, may comprise at least one material selected from silver (Ag), aluminum (Al), copper (Cu), chromium (Cr), nickel (Ni), and titanium (Ti), which can be processed at low temperatures. Because the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 are formed from the aforementioned material capable of being processed at low temperatures, even through continuous processes in the display panel DP (refer to...) Figure 3 The formation of an input sensing layer (ISP) on the surface can also prevent damage to the organic light-emitting diodes (OLEDs) included in the display panel (DP). However, embodiments of the present invention are not limited to this, and the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4 and the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 may include a variety of materials other than those described above.

[0092] According to an embodiment, the input sensing layer ISP may further include traces connected to the other side of the first transmitting electrodes SE1_1 to the fourth transmitting electrodes SE1_4. According to an embodiment, the input sensing layer ISP may further include traces respectively connected to the other side of the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6.

[0093] The first transmission trace SL1_1 to the fourth transmission trace SL1_4 and the first receiving trace SL2_1 to the sixth receiving trace SL2_6 can be set in the surrounding area NAA. For example... Figure 4 As shown in the embodiments, the first receiving trace SL2_1 to the third receiving trace SL2_3 can be configured to be adjacent to the first side of the active region AA, and the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be configured to be adjacent to the second side of the active region AA, which is opposite to the first side of the active region AA. For example, the first side of the active region AA can be the left side (e.g., the side of the active region AA in the direction opposite to the second direction DR2), and the second side of the active region AA can be the right side (e.g., the side of the active region AA in the second direction DR2). The first receiving trace SL2_1 to the third receiving trace SL2_3 can be spaced apart from the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 in the second direction DR2 relative to the active region AA.

[0094] The input sensing layer (ISP) may also include a pad portion (PLD) disposed in the peripheral area (NAA). The pad portion (PLD) may be connected to the flexible circuit film (FCB) (see reference). Figure 2It may include an input pad I-PD to connect the flexible circuit film FCB to the input sensing layer ISP. The first transmit trace SL1_1 to the fourth transmit trace SL1_4 and the first receive trace SL2_1 to the sixth receive trace SL2_6 may be connected to the input pad I-PD.

[0095] Figure 5 This is a cross-sectional view showing a portion of the display module DM in the active region AA according to an embodiment of the present invention.

[0096] The display module (DM) may include a display panel (DP) and an input sensing layer (ISP). The display panel (DP) may include a substrate layer (BL), a circuit element layer (DP-CL), a display element layer (DP-OLED), and an encapsulation layer (ENP).

[0097] In embodiments, the substrate layer BL may include a synthetic resin layer. The synthetic resin layer may include a thermosetting resin. The substrate layer BL may have a multilayer structure. For example, the substrate layer BL may have a three-layer structure comprising a synthetic resin layer, an adhesive layer, and a synthetic resin layer. For example, the synthetic resin layer may be a polyimide-based resin layer. However, embodiments of the present invention are not limited thereto, and the material of the synthetic resin layer may vary. The synthetic resin layer may include at least one material selected from acrylic resins, methacrylate resins, polyisoprene resins, vinyl resins, epoxy resins, polyurethane resins, cellulose resins, siloxane resins, polyamide resins, and perylene resins. The substrate layer BL may include a glass substrate, a metal substrate, or an organic / inorganic composite substrate. However, embodiments of the present invention are not limited thereto.

[0098] In an embodiment, at least one inorganic layer may be disposed on the upper surface of the substrate layer BL. The inorganic layer may include at least one compound selected from alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed as a multilayer. The inorganic layer may form a barrier layer and / or a buffer layer. For example, as... Figure 5 As shown in the embodiments, the circuit element layer DP-CL may include a buffer layer BFL.

[0099] The circuit element layer DP-CL may include multiple intermediate insulating layers, semiconductor patterns, conductive patterns, and signal lines. In embodiments, the intermediate insulating layers, semiconductor pattern layers, conductive pattern layers, and signal line layers can be formed by a coating process or a deposition process. The intermediate insulating layers, semiconductor pattern layers, conductive pattern layers, and signal line layers can then be selectively patterned by a photolithography process. Therefore, intermediate insulating layers, semiconductor patterns, conductive patterns, and signal lines included in the circuit element layer DP-CL can be formed.

[0100] The circuit element layer DP-CL may include a buffer layer BFL, a first intermediate insulating layer 100, a second intermediate insulating layer 200, a third intermediate insulating layer 300, a fourth intermediate insulating layer 400, a fifth intermediate insulating layer 500, and a sixth intermediate insulating layer 600, which are continuously disposed on the third-direction DR3.

[0101] The buffer layer BFL can increase the adhesion between the substrate layer BL and the semiconductor pattern. In an embodiment, the buffer layer BFL may include a silicon oxide layer and a silicon nitride layer, and the silicon oxide layer and the silicon nitride layer may be stacked alternately on top of each other.

[0102] Semiconductor patterns can be disposed on the buffer layer BFL. In an embodiment, the semiconductor pattern may include polycrystalline silicon. However, embodiments of the present invention are not limited thereto. For example, in an embodiment, the semiconductor pattern may include amorphous silicon or metal oxide.

[0103] Figure 5 Only a portion of the semiconductor pattern is shown, and the semiconductor pattern can also be disposed in other regions of the pixel in a plane. For example, the semiconductor pattern can be arranged throughout the pixel PX according to a specific rule. The semiconductor pattern can have different electrical characteristics depending on whether it is doped and whether it is doped with N-type or P-type dopant. The semiconductor pattern can include a first semiconductor region with relatively high conductivity and a second semiconductor region with relatively low conductivity. The first semiconductor region can be doped with N-type or P-type dopant. A P-type transistor can include a region doped with P-type dopant. The second semiconductor region can be an undoped region or can be doped at a concentration lower than that of the first semiconductor region.

[0104] The first semiconductor region may have a higher conductivity than the second semiconductor region and may be used essentially as an electrode or signal line. The second semiconductor region may substantially correspond to the channel (or active) region of a transistor. For example, a portion of the semiconductor pattern may be the channel region of a transistor, another portion of the semiconductor pattern may be the source or drain region of a transistor, and yet another portion of the semiconductor pattern may be a connecting electrode or a connecting signal line.

[0105] like Figure 5 As shown in the embodiments, the source region SE, channel region AE, and drain region DE of the transistor TR can be formed by a semiconductor pattern. The source region SE and drain region DE can extend from the channel region AE in opposite directions (e.g., in a second direction DR2). Figure 5 A portion of the connection signal line CSL, formed by a semiconductor pattern, is shown. In an embodiment, when viewed in a plane (e.g., in a plane defined on a first direction DR1 and a second direction DR2), the connection signal line CSL may be electrically connected to the drain region DE of the transistor TR.

[0106] The first intermediate insulating layer 100 may be disposed on the buffer layer BFL. In embodiments, the first intermediate insulating layer 100 may overlap with multiple pixels in a common manner and may cover a semiconductor pattern. In embodiments, the first intermediate insulating layer 100 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. For example, in embodiments, the first intermediate insulating layer 100 may include at least one compound selected from alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. In embodiments, the first intermediate insulating layer 100 may have a single-layer structure of silicon oxide. However, embodiments of the inventive concept are not limited thereto. For example, the first intermediate insulating layer 100 and the second intermediate insulating layer 200, third intermediate insulating layer 300, fourth intermediate insulating layer 400, fifth intermediate insulating layer 500, and sixth intermediate insulating layer 600 of the circuit element layer DP-CL described later may be inorganic layers and / or organic layers of various different materials, and may have a single-layer or multi-layer structure. Inorganic layers may include at least one of the compounds described above.

[0107] The gate GE of transistor TR can be disposed on the first intermediate insulating layer 100 (e.g., directly disposed on the first intermediate insulating layer 100 on the third-direction DR3). The gate GE can correspond to a portion of a metal pattern. The gate GE can (e.g., on the third-direction DR3) overlap with the channel region AE. In an embodiment, the gate GE can be used as a mask in the process of doping the semiconductor pattern.

[0108] The second intermediate insulating layer 200 may be disposed on the first intermediate insulating layer 100 (e.g., directly disposed on the first intermediate insulating layer 100 on the third-direction DR3), and may cover the gate GE, such as the upper surface and lateral side surface of the gate GE. The second intermediate insulating layer 200 may overlap with multiple pixels in a common manner. The second intermediate insulating layer 200 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. For example, in an embodiment, the second intermediate insulating layer 200 may have a single-layer structure of silicon oxide layer.

[0109] The upper electrode UE may be disposed on the second intermediate insulating layer 200 (e.g., directly disposed on the second intermediate insulating layer 200 on the third-direction DR3). The upper electrode UE may (e.g., on the third-direction DR3) overlap with the gate GE. The upper electrode UE may correspond to a portion of a metal pattern. A portion of the gate GE and the upper electrode UE overlapping the aforementioned portion of the gate GE may define a capacitor. However, embodiments of the inventive concept are not limited thereto. For example, in embodiments, the upper electrode UE may be omitted.

[0110] The third intermediate insulating layer 300 may be disposed on the second intermediate insulating layer 200 (e.g., directly disposed on the second intermediate insulating layer 200 on the third-direction DR3), and may cover the upper electrode UE, such as the upper surface and lateral side surface of the upper electrode UE. The third intermediate insulating layer 300 may overlap with multiple pixels in a common manner. The third intermediate insulating layer 300 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. For example, in an embodiment, the third intermediate insulating layer 300 may have a single-layer structure of silicon oxide layer.

[0111] The first connection electrode CNE1 may be disposed on the third intermediate insulating layer 300 (e.g., directly disposed on the third intermediate insulating layer 300 on the third directional DR3). The first connection electrode CNE1 may be connected to the connection signal line CSL via a first contact hole CNT-1 defined through the first intermediate insulating layer 100, the second intermediate insulating layer 200 and the third intermediate insulating layer 300.

[0112] The fourth intermediate insulating layer 400 may be disposed on the third intermediate insulating layer 300 (e.g., directly disposed on the third intermediate insulating layer 300 on the third-direction DR3). In an embodiment, the fourth intermediate insulating layer 400 may have a single-layer structure of silicon oxide layer.

[0113] A fifth intermediate insulating layer 500 may be disposed on the fourth intermediate insulating layer 400 (e.g., directly disposed on the fourth intermediate insulating layer 400 on the third-direction DR3). In an embodiment, the fifth intermediate insulating layer 500 may be an organic layer. A second connecting electrode CNE2 may be disposed on the fifth intermediate insulating layer 500 (e.g., directly disposed on the fifth intermediate insulating layer 500 on the third-direction DR3). The second connecting electrode CNE2 may be connected to the first connecting electrode CNE1 via a second contact hole CNT-2 defined through the fourth intermediate insulating layer 400 and the fifth intermediate insulating layer 500.

[0114] The sixth intermediate insulating layer 600 may be disposed on the fifth intermediate insulating layer 500 (e.g., directly disposed on the fifth intermediate insulating layer 500 on the third-direction DR3), and may cover the second connection electrode CNE2, such as the upper surface and lateral side surface of the second connection electrode CNE2. In an embodiment, the sixth intermediate insulating layer 600 may be an organic layer.

[0115] The display element layer DP-OLED can be disposed on the circuit element layer DP-CL. For example, the display element layer DP-OLED may include the light-emitting element OLED and the pixel-defining layer PDL.

[0116] An OLED light-emitting element may include a first electrode EL1 disposed on a circuit element layer DP-CL, a light-emitting layer EML disposed on the first electrode EL1, and a second electrode EL2 disposed on the light-emitting layer EML.

[0117] The first electrode EL1 can be disposed on the sixth intermediate insulating layer 600 (e.g., directly disposed on the sixth intermediate insulating layer 600 on the third-direction DR3). The first electrode EL1 can be connected to the second connecting electrode CNE2 via the third contact hole CNT-3 defined through the sixth intermediate insulating layer 600.

[0118] A pixel defining layer (PDL) may be disposed on a sixth intermediate insulating layer 600 (e.g., directly disposed on the sixth intermediate insulating layer 600 on a third-direction DR3) and may cover a portion of the first electrode EL1. For example, in an embodiment, the pixel defining layer (PDL) may cover the lateral ends of the first electrode EL1 and may expose the central portion of the first electrode EL1. A pixel opening may be defined by the pixel defining layer (PDL). For example, the pixel opening may be defined in the central portion of the first electrode EL1 exposed by the pixel defining layer (PDL). At least a portion of the first electrode EL1 may be exposed through the pixel opening of the pixel defining layer (PDL). For example, a light-emitting region (PXA) may correspond to the portion of the first electrode EL1 exposed through the pixel opening. A non-light-emitting region (NPXA) may surround the light-emitting region (PXA).

[0119] The light-emitting layer EML can be disposed on the first electrode EL1 (e.g., on the third-direction DR3). The light-emitting layer EML can be disposed in the region corresponding to the pixel opening. For example, the light-emitting layer EML can be disposed in each pixel after being divided into multiple parts. The light-emitting layer EML can include a light-emitting material, such as a fluorescent material or a phosphorescent material. The light-emitting material can include organic light-emitting materials or inorganic light-emitting materials. However, embodiments of the inventive concept are not limited thereto.

[0120] The second electrode EL2 can be disposed on the light-emitting layer EML (e.g., on the third-direction DR3). In an embodiment, the second electrode EL2 can have an integral shape and can be disposed commonly across multiple pixels.

[0121] For example, an OLED light-emitting element may also include a hole control layer and an electron control layer. The hole control layer may be disposed between the first electrode EL1 and the light-emitting layer EML, and may also include a hole injection layer. The electron control layer may be disposed between the light-emitting layer EML and the second electrode EL2, and may also include an electron injection layer.

[0122] The encapsulation layer ENP can be disposed on the display element layer DP-OLED (e.g., on the third-direction DR3). The encapsulation layer ENP can be disposed on the second electrode EL2.

[0123] In this embodiment, the encapsulation layer ENP may be commonly distributed across multiple pixels. For example, in this embodiment, the encapsulation layer ENP may directly cover the second electrode EL2. In this embodiment, a cover layer may also be disposed between the encapsulation layer ENP and the second electrode EL2 to cover the second electrode EL2. In this embodiment, the encapsulation layer ENP may directly cover the cover layer.

[0124] In an embodiment, the encapsulation layer ENP may include a first inorganic layer IML1, an organic layer OL, and a second inorganic layer IML2. The first inorganic layer IML1 and the second inorganic layer IML2 protect the OLED light-emitting element from moisture and oxygen, and the organic layer OL protects the OLED light-emitting element from foreign matter such as dust particles. In an embodiment, the first inorganic layer IML1 and the second inorganic layer IML2 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer OL may include an acrylic-based organic layer. However, embodiments of the present invention are not limited thereto, and the materials of the inorganic and organic layers may vary. Furthermore, the number of inorganic and organic layers may vary.

[0125] The first inorganic layer IML1 can be disposed on the light-emitting element OLED (e.g., on the third-direction DR3). The organic layer OL can be disposed on the first inorganic layer IML1 (e.g., on the third-direction DR3).

[0126] The second inorganic layer IML2 can be disposed on the organic layer OL (e.g., on the third-direction DR3).

[0127] The input sensing layer ISP can be disposed on the display panel DP (e.g., directly disposed on the display panel DP on a third-party DR3). The input sensing layer ISP may include a substrate insulating layer BIL, a first conductive layer CL1, a first sensing insulating layer SIL1, a second conductive layer CL2, and a second sensing insulating layer SIL2. In embodiments, each of the first sensing insulating layer SIL1 and the second sensing insulating layer SIL2 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure.

[0128] The substrate insulating layer (BIL) can be directly disposed on the encapsulation layer (ENP). For example, the lower surface of the substrate insulating layer (BIL) can directly contact the upper surface of the second inorganic layer (IML2). The substrate insulating layer (BIL) can have a single-layer or multi-layer structure.

[0129] The first conductive layer CL1 can be disposed on the substrate insulating layer BIL (e.g., directly disposed on the substrate insulating layer BIL on the third-direction DR3). The first sensing insulating layer SIL1 can be disposed on the first conductive layer CL1 (e.g., directly disposed on the first conductive layer CL1 on the third-direction DR3). The first sensing insulating layer SIL1 can be an inorganic layer and / or an organic layer, and can have a single-layer or multi-layer structure.

[0130] The second conductive layer CL2 may be disposed on the first sensing insulating layer SIL1 (e.g., directly disposed on the first sensing insulating layer SIL1 on the third-direction DR3). Each of the first conductive layer CL1 and the second conductive layer CL2 may have a single-layer structure or a multilayer structure of layers stacked on the third-direction DR3. The conductive layer with a single-layer structure may include an electrode layer or a transparent conductive layer.

[0131] The first conductive layer CL1 and the second conductive layer CL2 may include a first sensor portion SP1, a second sensor portion SP2, and a first connector portion CP1 (see reference). Figure 4 The first conductive layer CL1 may include the first sensor portion SP1, the second sensor portion SP2, and the first connector portion CP2. For example, in one embodiment, the first conductive layer CL1 may include the second connector portion CP2. The second conductive layer CL2 may include the first sensor portion SP1, the second sensor portion SP2, and the first connector portion CP1. However, embodiments of the present invention are not limited thereto. For example, the first sensor portion SP1, the second sensor portion SP2, and the first connector portion CP1 may be included in the first conductive layer CL1, and the second connector portion CP2 may be included in the second conductive layer CL2.

[0132] The second sensing insulating layer SIL2 can be disposed on the second conductive layer CL2. The second sensing insulating layer SIL2 can be an inorganic layer and / or an organic layer, and can have a single-layer or multi-layer structure.

[0133] For example, the first sensor portion SP1 and the second sensor portion SP2, as well as the first connector portion CP1 and the second connector portion CP2, can be disposed in the non-light-emitting area NPXA.

[0134] Figure 6 and Figure 7 It shows along Figure 4 The cross-sectional view of the display module DM shown by line I-I' illustrates the relationship between the signal lines and the encapsulation layer ENP.

[0135] exist Figure 6 and Figure 7 In the figures, the same reference numerals indicate Figure 4 and Figure 5 The same components are used in the same way, and therefore, for ease of explanation, detailed descriptions of the same components will be omitted.

[0136] Reference Figure 6 The first receiving trace SL2_1 to the third receiving trace SL2_3 can be disposed in a peripheral region NAA adjacent to the first side of the active region AA (such as the left side of the active region AA in the direction opposite to the second direction DR2). The fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be disposed in a peripheral region NAA adjacent to the second side of the active region AA opposite to the first side of the active region AA (such as the right side in the second direction DR2). However, embodiments of the present invention are not limited thereto, and the respective orientations of the opposite first and second sides of the active region AA can vary. The fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be spaced apart from the first receiving trace SL2_1 to the third receiving trace SL2_3 in the second direction DR2 relative to the active region AA.

[0137] For example, in an embodiment, the first receiving trace SL2_1 to the sixth receiving trace SL2_6 may be included in the second conductive layer CL2 (see reference). Figure 5 The first receiving trace SL2_1 to the sixth receiving trace SL2_6 can be disposed on the first sensing insulating layer SIL1, and can be respectively connected to the first receiving electrode SE2_1 to the sixth receiving electrode SE2_6 (refer to...). Figure 4 ( ) on one side.

[0138] In the embodiment, the first transmission trace SL1_1 to the fourth transmission trace SL1_4 (refer to...) Figure 4 This can be included in the second conductive layer CL2 (refer to...) Figure 5 It can be set in the surrounding area NAA.

[0139] Reference Figure 4 The first receiving trace SL2_1 to the sixth receiving trace SL2_6 may have different lengths from each other. For example, in an embodiment, the first receiving electrode SE2_1 to the sixth receiving electrode SE2_6 may be spaced apart from each other and may be arranged relative to the input pad I-PD in a direction opposite to the first direction DR1. For example, the first receiving electrode SE2_1 to the sixth receiving electrode SE2_6 may be spaced apart from the input pad I-PD at different distances in the first direction DR1. Therefore, the first receiving trace SL2_1 to the sixth receiving trace SL2_6 used to connect the first receiving electrode SE2_1 to the sixth receiving electrode SE2_6 to the input pad I-PD respectively may have different lengths from each other.

[0140] Each of the first receiving traces SL2_1 to the sixth receiving trace SL2_6 may include a first line portion extending substantially in or in a direction opposite to the second direction DR2 and a second line portion extending substantially in the first direction DR1. For example, Figure 4 The first line portion SLL1 and the second line portion SLL2 of the first receiving trace SL2_1 and the first line portion SLL3 and the second line portion SLL4 of the sixth receiving trace SL2_6 are shown as examples of the first line portions and the second line portions of the first receiving trace SL2_1 to the sixth receiving trace SL2_6.

[0141] The first receiving trace SL2_1 may include a first line portion SLL1 extending in the second direction DR2 and a second line portion SLL2 extending in the first direction DR1. The sixth receiving trace SL2_6 may include a first line portion SLL3 extending in the direction opposite to the second direction DR2 and a second line portion SLL4 extending in the first direction DR1.

[0142] In the following text, the length of each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 can represent the length of a line portion (such as a second line portion SLL2, SLL4) included in each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and extending toward the input pad I-PD in the first direction DR1. However, embodiments of the inventive concept are not limited thereto. For example, in an embodiment, the length of each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 can represent the length of a line portion extending in a direction other than the first direction DR1, depending on the arrangement direction of the first receiving electrodes SE2_1 to the sixth receiving electrodes SE2_6 and the position of the input pad I-PD.

[0143] In this embodiment, the first receiving electrode SE2_1 can be positioned closest to the input pad I-PD, and the second receiving electrodes SE2_2 to the sixth receiving electrodes SE2_6 can be spaced apart from each other, and arranged sequentially relative to the first receiving electrode SE2_1 in a direction opposite to the first direction DR1. Therefore, among the first receiving trace SL2_1 to the sixth receiving trace SL2_6, the first receiving trace SL2_1 has the shortest length, and the sixth receiving trace SL2_6 has the longest length.

[0144] However, in embodiments where the input sensing layer ISP includes n receiving electrodes, the length of the receiving trace can vary depending on the arrangement of the receiving electrodes, and the nth receiving trace can have a maximum or minimum length.

[0145] In a comparative embodiment where the lengths of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 are different from each other and the widths of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 are the same, the first receiving traces SL2_1 to the sixth receiving traces SL2_6 may have different line resistances from each other. The width of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 may refer to the length in the direction intersecting the first direction DR1 and the third direction DR3. In this embodiment, due to the different resistances of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the capacitance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the electrode layer included in the display panel DP, there is a relationship with the external input TC (refer to) transmitted through the first receiving traces SL2_1 to the sixth receiving traces SL2_6. Figure 1 The signal delay value of the information may vary. Therefore, the external input TC (refer to the input sensing layer ISP) obtained through the input sensing layer ISP may differ. Figure 1 The location information may be incorrect. However, in the embodiments of the present invention, referring to... Figure 6 The widths W1 to W6 of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 can be set to be different from each other to compensate for the length differences between the first receiving trace SL2_1 to the sixth receiving trace SL2_6. For example, as Figure 6 As shown in the embodiment, the widths W1 to W6 of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 can be the lengths in a direction parallel to the upper surface of the first sensing insulating layer SIL1.

[0146] For example, among the first receiving trace SL2_1 to the sixth receiving trace SL2_6, the first receiving trace SL2_1, which has the shortest length, can have the shortest width W1, and the sixth receiving trace SL2_6, which has the longest length, can have the longest width W6. The length of the sixth receiving trace SL2_6 is greater than the length of the first receiving trace SL2_1. However, since the width W6 of the sixth receiving trace SL2_6 is greater than the width W1 of the first receiving trace SL2_1, the sixth receiving trace SL2_6 can have a resistance that is substantially the same as that of the first receiving trace SL2_1.

[0147] Reference Figure 4 and Figure 6The length of the second receiving track SL2_2 can be greater than the length of the first receiving track SL2_1. The width W2 of the second receiving track SL2_2 can be greater than the width W1 of the first receiving track SL2_1. The length of the third receiving track SL2_3 can be greater than the length of the second receiving track SL2_2. The width W3 of the third receiving track SL2_3 can be greater than the width W2 of the second receiving track SL2_2. The length of the fourth receiving track SL2_4 can be greater than the length of the third receiving track SL2_3. The width W4 of the fourth receiving track SL2_4 can be greater than the width W3 of the third receiving track SL2_3. The length of the fifth receiving track SL2_5 can be greater than the length of the fourth receiving track SL2_4. The width W5 of the fifth receiving track SL2_5 can be greater than the width W4 of the fourth receiving track SL2_4. The length of the sixth receiving track SL2_6 can be greater than the length of the fifth receiving track SL2_5. The width W6 of the sixth receiving trace SL2_6 can be greater than the width W5 of the fifth receiving trace SL2_5. For example, the electrode layer of the display panel DP may include a second electrode EL2. However, embodiments of the present invention are not limited thereto. According to embodiments, the electrode layer may also include electrodes contained in the display element layer DP-OLED, such as a first electrode EL1 (see reference). Figure 5 ), or electrodes contained in the circuit element layer DP-CL. In the following description, for ease of explanation, the electrode layer of the display panel DP may indicate the second electrode EL2. Furthermore, since the second electrode EL2 extends into the peripheral area NAA, therefore Figure 6 The DP-OLED display element layer is shown to include a second electrode EL2 and a pixel-defining layer PDL.

[0148] In an embodiment, when the widths W1 to W6 of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 are different from each other and the distance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the electrode layer (second electrode EL2) included in the display panel DP is the same, the capacitance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the electrode layer (second electrode EL2) included in the display panel DP may not be constant. In an embodiment, the distance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the electrode layer (second electrode EL2) included in the display panel DP may refer to the length on a third-direction DR3. For example, the capacitance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the second electrode EL2 may be defined by the following Equation 1.

[0149] Equation 1

[0150]

[0151] In Equation 1, C represents capacitance, s represents the width of the receiving trace, d represents the distance between the receiving trace and the electrode layer, and ε represents the dielectric constant (e.g., the dielectric constant of the insulating layer disposed between the receiving trace and the electrode layer). The receiving trace can be, for example, each of the first receiving trace SL2_1 to the sixth receiving trace SL2_6, and the electrode layer can be, for example, the second electrode EL2.

[0152] In a comparative embodiment where the distance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the second electrode EL2 is the same, the capacitance can increase as the widths W1 to W6 of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 increase. In this embodiment, the delay values ​​of the signals transmitted through the first receiving traces SL2_1 to the sixth receiving traces SL2_6 may differ due to the resistance of each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the capacitance between each of the first receiving traces SL2_1 to the sixth receiving traces SL2_6 and the second electrode EL2. Therefore, the external input TC (refer to the input sensing layer ISP) obtained through the input sensing layer ISP... Figure 1 The position information may be incorrect. Therefore, the distance between each of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2 can be set to be different from each other to compensate for the difference between the widths W1 to W6 of the first receiving trace SL2_1 to the sixth receiving trace SL2_6.

[0153] For example, in an embodiment, by adjusting the thickness of the encapsulation layer ENP disposed between the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2, the distance between each of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2 can be set to be different from each other.

[0154] The organic layer OL is configured such that a portion of the peripheral region NAA of the first receiving trace SL2_1 to the third receiving trace SL2_3 can be referred to as the first organic layer OL_1, and the organic layer OL is configured such that a portion of the peripheral region NAA of the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be referred to as the second organic layer OL_2.

[0155] In the first organic layer OL_1, the portion corresponding to the first receiving trace SL2_1 (e.g., overlapping with the first receiving trace SL2_1 on the third-direction DR3) can be referred to as the first encapsulation portion OL_1a, the portion corresponding to the second receiving trace SL2_2 (e.g., overlapping with the second receiving trace SL2_2 on the third-direction DR3) can be referred to as the second encapsulation portion OL_1b, and the portion corresponding to the third receiving trace SL2_3 (e.g., overlapping with the third receiving trace SL2_3 on the third-direction DR3) can be referred to as the third encapsulation portion OL_1c.

[0156] In the second organic layer OL_2, the portion corresponding to the fourth receiving trace SL2_4 (e.g., overlapping with the fourth receiving trace SL2_4 on the third-direction DR3) can be referred to as the fourth encapsulation portion OL_2a, the portion corresponding to the fifth receiving trace SL2_5 (e.g., overlapping with the fifth receiving trace SL2_5 on the third-direction DR3) can be referred to as the fifth encapsulation portion OL_2b, and the portion corresponding to the sixth receiving trace SL2_6 (e.g., overlapping with the sixth receiving trace SL2_6 on the third-direction DR3) can be referred to as the sixth encapsulation portion OL_2c.

[0157] The first encapsulation portion OL_1a to the sixth encapsulation portion OL_2c can be referred to as the first organic layer portion OL_1a to the sixth organic layer portion OL_2c, respectively.

[0158] For example, the upper surface of the first organic layer OL_1 can be formed with a first angle relative to the upper surface of the organic layer OL included in the active region AA. The upper surface of the second organic layer OL_2 can be formed with a second angle relative to the upper surface of the organic layer OL included in the active region AA. In embodiments, the second angle can be greater than the first angle. For example, in embodiments, the first organic layer OL_1 and the second organic layer OL_2 can be formed with either a first angle or a second angle by controlling the time required to apply the organic material or by patterning the photoresist using a halftone mask or a slit mask with slits. However, embodiments of the inventive concept are not limited thereto. For example, in embodiments, the first angle and the second angle of the first organic layer OL_1 and the second organic layer OL_2 can be controlled by processes other than those described above.

[0159] The thickness of the first package portion OL_1a (e.g., its length on the third-direction DR3) can be referred to as the first package thickness OTH_1a. The thickness of the second package portion OL_1b (e.g., its length on the third-direction DR3) can be referred to as the second package thickness OTH_1b. The thickness of the third package portion OL_1c (e.g., its length on the third-direction DR3) can be referred to as the third package thickness OTH_1c. The thickness of the fourth package portion OL_2a (e.g., its length on the third-direction DR3) can be referred to as the fourth package thickness OTH_2a. The thickness of the fifth package portion OL_2b (e.g., its length on the third-direction DR3) can be referred to as the fifth package thickness OTH_2b. The thickness of the sixth package portion OL_2c (e.g., its length on the third-direction DR3) can be referred to as the sixth package thickness OTH_2c.

[0160] The first package thickness OTH_1a to the sixth package thickness OTH_2c can be different from each other. For example, in an embodiment, the second package thickness OTH_1b can be greater than the first package thickness OTH_1a. The third package thickness OTH_1c can be greater than the second package thickness OTH_1b. The fourth package thickness OTH_2a can be greater than the third package thickness OTH_1c. The fifth package thickness OTH_2b can be greater than the fourth package thickness OTH_2a. The sixth package thickness OTH_2c can be greater than the fifth package thickness OTH_2b.

[0161] The distances between the first receiving trace SL2_1 and the second electrode EL2, the distances between the second receiving trace SL2_2 and the second electrode EL2, the distances between the third receiving trace SL2_3 and the second electrode EL2, the distances between the fourth receiving trace SL2_4 and the second electrode EL2, the distances between the fifth receiving trace SL2_5 and the second electrode EL2, and the distances between the sixth receiving trace SL2_6 and the second electrode EL2 can be referred to as the first distance d1, the second distance d2, the third distance d3, the fourth distance d4, the fifth distance d5, and the sixth distance d6, respectively. The aforementioned "distances" can be, for example, lengths along a third-direction DR3.

[0162] Corresponding to the first receiving trace SL2_1 to the sixth receiving trace SL2_6, the thicknesses of the second inorganic layer IML2 and the first sensing insulating layer SIL1 can be substantially the same. Since the thicknesses of the first organic layer OL_1 and the second organic layer OL_2 disposed between the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2 are different from each other according to each corresponding receiving trace among the first receiving trace SL2_1 to the sixth receiving trace SL2_6, the first distance d1 to the sixth distance d6 can be different from each other.

[0163] For example, the second distance d2 can be greater than the first distance d1. The third distance d3 can be greater than the second distance d2. The fourth distance d4 can be greater than the third distance d3. The fifth distance d5 can be greater than the fourth distance d4. The sixth distance d6 can be greater than the fifth distance d5. Therefore, although the width W6 of the sixth receiving trace SL2_6 is greater than the width W1 of the first receiving trace SL2_1, the capacitance between the sixth receiving trace SL2_6 and the second electrode EL2 can be substantially the same as the capacitance between the first receiving trace SL2_1 and the second electrode EL2. Therefore, it is possible to prevent differences in the delay values ​​of signals transmitted through the first receiving trace SL2_1 to the sixth receiving trace SL2_6, which are caused by the resistance of each of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the capacitance between each of the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2.

[0164] Reference Figure 7 The upper surface of the organic layer OL in the peripheral region NAA can have the same angle as the upper surface of the organic layer OL in the active region AA. However, the encapsulation layer ENP may also include a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3, a fourth insulating layer IL4, a fifth insulating layer IL5, and a sixth insulating layer IL6. For example, each of the first insulating layers IL1 to the sixth insulating layer IL6 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. In the following description, each of the first insulating layers IL1 to the sixth insulating layer IL6 will be described as an inorganic layer. However, embodiments of the inventive concept are not limited thereto.

[0165] In the peripheral region NAA where the first receiving trace SL2_1 to the third receiving trace SL2_3 are provided, the first insulating layer IL1 may be provided on the second inorganic layer IML2 (e.g., directly provided on the second inorganic layer IML2 on the third-direction DR3). The first insulating layer IL1 may be configured to correspond to the first receiving trace SL2_1 to the third receiving trace SL2_3 (e.g., overlapping with the first receiving trace SL2_1 to the third receiving trace SL2_3 on the third-direction DR3).

[0166] The second insulating layer IL2 may be disposed on the first insulating layer IL1 (e.g., directly disposed on the first insulating layer IL1 on the third-direction DR3). The second insulating layer IL2 may be configured to correspond to the second receiving trace SL2_2 and the third receiving trace SL2_3 (e.g., overlapping with the second receiving trace SL2_2 and the third receiving trace SL2_3 on the third-direction DR3).

[0167] The third insulating layer IL3 can be disposed on the second insulating layer IL2 (e.g., directly disposed on the second insulating layer IL2 on the third-direction DR3). The third insulating layer IL3 can be configured to correspond to the third receiving trace SL2_3 (e.g., overlap with the third receiving trace SL2_3 on the third-direction DR3).

[0168] The first receiving trace SL2_1 to the third receiving trace SL2_3 can be disposed on the first sensing insulating layer SIL1 (for example, directly disposed on the first sensing insulating layer SIL1 on the third direction DR3), and the first sensing insulating layer SIL1 is disposed on the first insulating layer IL1 to the third insulating layer IL3.

[0169] In the surrounding area NAA where the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 are provided, the first insulating layer IL1 to the third insulating layer IL3 can be provided on the second inorganic layer IML2.

[0170] The fourth insulating layer IL4 may be disposed on the third insulating layer IL3 (e.g., directly disposed on the third insulating layer IL3 on the third-direction DR3). The fourth insulating layer IL4 may be configured to correspond to the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 (e.g., overlapping with the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 on the third-direction DR3).

[0171] The fifth insulating layer IL5 may be disposed on the fourth insulating layer IL4 (e.g., directly disposed on the fourth insulating layer IL4 on the third-direction DR3). The fifth insulating layer IL5 may be configured to correspond to the fifth receiving trace SL2_5 and the sixth receiving trace SL2_6 (e.g., overlapping with the fifth receiving trace SL2_5 and the sixth receiving trace SL2_6 on the third-direction DR3).

[0172] The sixth insulating layer IL6 may be disposed on the fifth insulating layer IL5 (e.g., directly disposed on the fifth insulating layer IL5 on the third-direction DR3). The sixth insulating layer IL6 may be configured to correspond to the sixth receiving trace SL2_6 (e.g., overlap with the sixth receiving trace SL2_6 on the third-direction DR3).

[0173] The fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 can be disposed on the first sensing insulating layer SIL1 (for example, directly disposed on the first sensing insulating layer SIL1 on the third-direction DR3), and the first sensing insulating layer SIL1 is disposed on the fourth insulating layer IL4 to the sixth insulating layer IL6.

[0174] Because the widths or positions of the first insulating layers IL1 to IL6, located between the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2, are different from each other, steps can be formed between adjacent receiving traces in the first sensing insulating layer SL1, and the first distance d1_a, the second distance d2_a, the third distance d3_a, the fourth distance d4_a, the fifth distance d5_a, and the sixth distance d6_a (e.g., the lengths on the third direction DR3) can be different from each other. For example, as Figure 7 As shown in the embodiment, the second distance d2_a can be greater than the first distance d1_a. The third distance d3_a can be greater than the second distance d2_a. The fourth distance d4_a can be greater than the third distance d3_a. The fifth distance d5_a can be greater than the fourth distance d4_a. The sixth distance d6_a can be greater than the fifth distance d5_a.

[0175] Figure 8 and Figure 9 It shows along Figure 4 The diagram shown is a cross-sectional view of the display module DM taken by line I-I' to illustrate the relationship between the signal lines and the sensing insulating layer of the input sensing layer ISP.

[0176] In the following text, Figure 8 and Figure 9 In the figures, the same reference numerals indicate Figures 4 to 7 The same components are used, and therefore, for ease of explanation, detailed descriptions of the same components will be omitted.

[0177] Reference Figure 8 A portion of the peripheral region NAA in which the first sensing insulating layer SIL1 is disposed, including the first receiving trace SL2_1, the second receiving trace SL2_2, and the third receiving trace SL2_3, may be referred to as the first sub-sensing insulating layer SIL1_a. A portion of the peripheral region NAA in which the first sensing insulating layer SIL1 is disposed, including the fourth receiving trace SL2_4, the fifth receiving trace SL2_5, and the sixth receiving trace SL2_6, may be referred to as the second sub-sensing insulating layer SIL1_b.

[0178] The portion of the first sub-sensing insulating layer SIL1_a corresponding to the first receiving trace SL2_1 (e.g., overlapping with the first receiving trace SL2_1 on the third direction DR3) can be referred to as the first insulating portion IL1_a1, the portion of the first sub-sensing insulating layer SIL1_a corresponding to the second receiving trace SL2_2 (e.g., overlapping with the second receiving trace SL2_2 on the third direction DR3) can be referred to as the second insulating portion IL1_a2, and the portion of the first sub-sensing insulating layer SIL1_a corresponding to the third receiving trace SL2_3 (e.g., overlapping with the third receiving trace SL2_3 on the third direction DR3) can be referred to as the third insulating portion IL1_a3.

[0179] The portion of the second sub-sensing insulating layer SIL1_b corresponding to the fourth receiving trace SL2_4 (e.g., overlapping with the fourth receiving trace SL2_4 on the third-direction DR3) can be referred to as the fourth insulating portion IL1_b1, the portion of the second sub-sensing insulating layer SIL1_b corresponding to the fifth receiving trace SL2_5 (e.g., overlapping with the fifth receiving trace SL2_5 on the third-direction DR3) can be referred to as the fifth insulating portion IL1_b2, and the portion of the second sub-sensing insulating layer SIL1_b corresponding to the sixth receiving trace SL2_6 (e.g., overlapping with the sixth receiving trace SL2_6 on the third-direction DR3) can be referred to as the sixth insulating portion IL1_b3.

[0180] For example, the upper surface of the first sub-sensing insulating layer SIL1_a can be formed with a third angle relative to the upper surface of the first sensing insulating layer SIL1 included in the active region AA. The upper surface of the second sub-sensing insulating layer SIL1_b can be formed with a fourth angle relative to the upper surface of the first sensing insulating layer SIL1 included in the active region AA. In an embodiment, the fourth angle can be greater than the third angle. Figure 6 Unlike other embodiments, the upper surface of the organic layer OL in the peripheral region NAA can have the same angle as the upper surface of the organic layer OL in the active region AA. Figure 7 Unlike other embodiments, the encapsulation layer ENP may not have an insulating layer disposed thereon, such as Figure 7 The first insulating layer IL1 to the sixth insulating layer IL6.

[0181] The thickness of the first insulating portion IL1_a1 can be referred to as the first insulation thickness ITH_a1. The thickness of the second insulating portion IL1_a2 can be referred to as the second insulation thickness ITH_a2. The thickness of the third insulating portion IL1_a3 can be referred to as the third insulation thickness ITH_a3. The thickness of the fourth insulating portion IL1_b1 can be referred to as the fourth insulation thickness ITH_b1. The thickness of the fifth insulating portion IL1_b2 can be referred to as the fifth insulation thickness ITH_b2. The thickness of the sixth insulating portion IL1_b3 can be referred to as the sixth insulation thickness ITH_b3.

[0182] The first insulation thickness ITH_a1 to the sixth insulation thickness ITH_b3 (e.g., their lengths on the third-direction DR3) can be different from each other. For example, the second insulation thickness ITH_a2 can be greater than the first insulation thickness ITH_a1. The third insulation thickness ITH_a3 can be greater than the second insulation thickness ITH_a2. The fourth insulation thickness ITH_b1 can be greater than the third insulation thickness ITH_a3. The fifth insulation thickness ITH_b2 can be greater than the fourth insulation thickness ITH_b1. The sixth insulation thickness ITH_b3 can be greater than the fifth insulation thickness ITH_b2.

[0183] Since the thicknesses of the first sub-sensing insulating layer SIL1_a and the second sub-sensing insulating layer SIL1_b disposed between the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2 are different from each other according to each corresponding receiving trace among the first receiving trace SL2_1 to the sixth receiving trace SL2_6, the first distance d1_b, the second distance d2_b, the third distance d3_b, the fourth distance d4_b, the fifth distance d5_b, and the sixth distance d6_b can be different from each other. For example, the second distance d2_b can be greater than the first distance d1_b. The third distance d3_b can be greater than the second distance d2_b. The fourth distance d4_b can be greater than the third distance d3_b. The fifth distance d5_b can be greater than the fourth distance d4_b. The sixth distance d6_b can be greater than the fifth distance d5_b.

[0184] Reference Figure 9 The input sensing layer ISP may further include a third sensing insulating layer SIL3, a fourth sensing insulating layer SIL4, a fifth sensing insulating layer SIL5, a sixth sensing insulating layer SIL6, a seventh sensing insulating layer SIL7, and an eighth sensing insulating layer SIL8. For example, each of the third sensing insulating layers SIL3 to the eighth sensing insulating layer SIL8 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. In the following description, for ease of illustration, each of the third sensing insulating layers SIL3 to the eighth sensing insulating layer SIL8 will be described as an inorganic layer.

[0185] In the peripheral region NAA where the first receiving trace SL2_1, the second receiving trace SL2_2, and the third receiving trace SL2_3 are provided, the third sensing insulating layer SIL3 can be disposed on the first sensing insulating layer SIL1 (e.g., directly disposed on the first sensing insulating layer SIL1 on the third-direction DR3). The third sensing insulating layer SIL3 can be configured to correspond to the first receiving trace SL2_1 to the third receiving trace SL2_3 (e.g., overlapping with the first receiving trace SL2_1 to the third receiving trace SL2_3 on the third-direction DR3). Unlike Figure 8 In one embodiment, the upper surface of the first sensing insulating layer SIL1 in the peripheral region NAA can be formed to have the same angle as the upper surface of the first sensing insulating layer SIL1 in the active region AA.

[0186] The fourth sensing insulating layer SIL4 can be disposed on the third sensing insulating layer SIL3 (e.g., directly disposed on the third sensing insulating layer SIL3 on the third-direction DR3). The fourth sensing insulating layer SIL4 can be configured to correspond to the second receiving trace SL2_2 and the third receiving trace SL2_3 (e.g., overlapping with the second receiving trace SL2_2 and the third receiving trace SL2_3 on the third-direction DR3).

[0187] The fifth sensing insulating layer SIL5 can be disposed on the fourth sensing insulating layer SIL4 (e.g., directly disposed on the fourth sensing insulating layer SIL4 on the third-direction DR3). The fifth sensing insulating layer SIL5 can be configured to correspond to the third receiving trace SL2_3 (e.g., overlap with the third receiving trace SL2_3 on the third-direction DR3).

[0188] The second sensing insulating layer SIL2 can be disposed on the first receiving trace SL2_1 to the third receiving trace SL2_3. For example, the second sensing insulating layer SIL2 can cover the upper surface and the lateral side surface of the first receiving trace SL2_1 to the third receiving trace SL2_3.

[0189] In the surrounding area NAA where the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6 are provided, the first sensing insulating layer SIL1 and the third sensing insulating layer SIL3 to the fifth sensing insulating layer SIL5 can be disposed on the second inorganic layer IML2.

[0190] The sixth sensing insulating layer SIL6 can be disposed on the fifth sensing insulating layer SIL5 (e.g., directly disposed on the fifth sensing insulating layer SIL5 on the third-direction DR3). The sixth sensing insulating layer SIL6 can be configured to correspond to the fourth receiving trace SL2_4, the fifth receiving trace SL2_5, and the sixth receiving trace SL2_6 (e.g., overlapping with the fourth receiving trace SL2_4, the fifth receiving trace SL2_5, and the sixth receiving trace SL2_6 on the third-direction DR3).

[0191] The seventh sensing insulating layer SIL7 can be disposed on the sixth sensing insulating layer SIL6 (e.g., directly disposed on the sixth sensing insulating layer SIL6 on the third-direction DR3). The seventh sensing insulating layer SIL7 can be configured to correspond to the fifth receiving trace SL2_5 and the sixth receiving trace SL2_6 (e.g., overlapping with the fifth receiving trace SL2_5 and the sixth receiving trace SL2_6 on the third-direction DR3).

[0192] The eighth sensing insulating layer SIL8 can be disposed on the seventh sensing insulating layer SIL7 (e.g., directly disposed on the seventh sensing insulating layer SIL7 on the third-direction DR3). The eighth sensing insulating layer SIL8 can be configured to correspond to the sixth receiving trace SL2_6 (e.g., overlap with the sixth receiving trace SL2_6 on the third-direction DR3).

[0193] The second sensing insulating layer SIL2 can be disposed on the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6. For example, the second sensing insulating layer SIL2 can cover the upper surface and the lateral side surface of the fourth receiving trace SL2_4 to the sixth receiving trace SL2_6.

[0194] Because the arrangement of the first sensing insulating layer SIL1 and the third sensing insulating layers SIL3 to the eighth sensing insulating layers SIL8, which are disposed between the first receiving trace SL2_1 to the sixth receiving trace SL2_6 and the second electrode EL2, is different from each other, a step can be formed between adjacent receiving traces, and the first distance d1_c, the second distance d2_c, the third distance d3_c, the fourth distance d4_c, the fifth distance d5_c, and the sixth distance d6_c (e.g., the length on the third direction DR3) can be different from each other. For example, the second distance d2_c can be greater than the first distance d1_c. The third distance d3_c can be greater than the second distance d2_c. The fourth distance d4_c can be greater than the third distance d3_c. The fifth distance d5_c can be greater than the fourth distance d4_c. The sixth distance d6_c can be greater than the fifth distance d5_c.

[0195] Figure 10 This is a plan view illustrating an input sensing layer (ISP) according to an embodiment of the concept of the present invention, and Figure 11 It shows along Figure 10 The cross-sectional view of the display module DM, shown by line II-II', illustrates the relationship between the signal lines and the ENP package layer. Figure 10 and Figure 11 In the figures, the same reference numerals indicate Figures 4 to 6 The same components are used in the same way, and therefore, for ease of explanation, detailed descriptions of the same components will be omitted.

[0196] Reference Figure 10 and Figure 11 The first receiving trace SL2_1a to the sixth receiving trace SL2_6a can be located in the peripheral region NAA to be adjacent to one side of the active region AA (such as the right side of the active region AA in the second direction DR2). However, embodiments of the present invention are not limited thereto.

[0197] The first receiving trace SL2_1a to the sixth receiving trace SL2_6a can have different lengths. For example, the first receiving electrode SE2_1 can be positioned closest to the input pad I-PD, and the second receiving electrodes SE2_2 to the sixth receiving electrodes SE2_6 can be spaced apart from each other and arranged sequentially in the opposite direction to the first direction DR1 relative to the first receiving electrode SE2_1. Therefore, among the first receiving trace SL2_1a to the sixth receiving trace SL2_6a, the first receiving trace SL2_1a can have the smallest length, and the sixth receiving trace SL2_6a can have the largest length.

[0198] The widths W1_a of the first receiving trace SL2_1a, W2_a of the second receiving trace SL2_2a, W3_a of the third receiving trace SL2_3a, W4_a of the fourth receiving trace SL2_4a, W5_a of the fifth receiving trace SL2_5a, and W6_a of the sixth receiving trace SL2_6a can be set to be different from each other to compensate for the length differences between the first receiving trace SL2_1a and the sixth receiving trace SL2_6a. For example, among the first receiving trace SL2_1a to the sixth receiving trace SL2_6a, the first receiving trace SL2_1a, which has the shortest length, can have the shortest width W1_a, and the sixth receiving trace SL2_6a, which has the longest length, can have the longest width W6_a.

[0199] For example, in an embodiment, by controlling the settings of the first receiving trace SL2_1a to the sixth receiving trace SL2_6a and the electrode layer ( Figure 5 The thickness of the encapsulation layer ENP between the second electrode EL2 and the distance between each of the first receiving trace SL2_1a to the sixth receiving trace SL2_6a and the second electrode EL2 can be set to be different from each other.

[0200] The organic layer OL is configured such that a portion of the surrounding region NAA of the first receiving trace SL2_1a to the sixth receiving trace SL2_6a can be referred to as the third organic layer OL_3.

[0201] The portion of the third organic layer OL_3 corresponding to the first receiving trace SL2_1a (e.g., overlapping with the first receiving trace SL2_1a on the third-direction DR3) can be referred to as the first encapsulation portion OL_3a; the portion of the third organic layer OL_3 corresponding to the second receiving trace SL2_2a (e.g., overlapping with the second receiving trace SL2_2a on the third-direction DR3) can be referred to as the second encapsulation portion OL_3b; and the portion of the third organic layer OL_3 corresponding to the third receiving trace SL2_3a (e.g., overlapping with the third receiving trace SL2_3a on the third-direction DR3) can be referred to as the third encapsulation portion OL_3c. The portion of the third organic layer OL_3 corresponding to the fourth receiving trace SL2_4a (e.g., overlapping with the fourth receiving trace SL2_4a on the third-direction DR3) can be referred to as the fourth encapsulation portion OL_3d, the portion of the third organic layer OL_3 corresponding to the fifth receiving trace SL2_5a (e.g., overlapping with the fifth receiving trace SL2_5a on the third-direction DR3) can be referred to as the fifth encapsulation portion OL_1e, and the portion of the third organic layer OL_3 corresponding to the sixth receiving trace SL2_6a (e.g., overlapping with the sixth receiving trace SL2_6a on the third-direction DR3) can be referred to as the sixth encapsulation portion OL_3f.

[0202] The first encapsulation portion OL_3a to the sixth encapsulation portion OL_3f can be referred to as the first organic layer portion OL_3a to the sixth organic layer portion OL_3f.

[0203] For example, the upper surface of the third organic layer OL_3 can be formed to have a fifth angle relative to the upper surface of the organic layer OL included in the active region AA.

[0204] The thickness of the first package portion OL_3a can be referred to as the first package thickness OTH_3a. The thickness of the second package portion OL_3b can be referred to as the second package thickness OTH_3b. The thickness of the third package portion OL_3c can be referred to as the third package thickness OTH_3c. The thickness of the fourth package portion OL_3d can be referred to as the fourth package thickness OTH_3d. The thickness of the fifth package portion OL_3e can be referred to as the fifth package thickness OTH_3e. The thickness of the sixth package portion OL_3f can be referred to as the sixth package thickness OTH_3f.

[0205] The first package thickness OTH_3a to the sixth package thickness OTH_3f (e.g., length on the third-direction DR3) can be different from each other. For example, in an embodiment, the second package thickness OTH_3b can be greater than the first package thickness OTH_3a. The third package thickness OTH_3c can be greater than the second package thickness OTH_3b. The fourth package thickness OTH_3d can be greater than the third package thickness OTH_3c. The fifth package thickness OTH_3e can be greater than the fourth package thickness OTH_3d. The sixth package thickness OTH_3f can be greater than the fifth package thickness OTH_3e.

[0206] The distance between the first receiving trace SL2_1a and the second electrode EL2 can be referred to as the first distance d1_d, the distance between the second receiving trace SL2_2a and the second electrode EL2 can be referred to as the second distance d2_d, the distance between the third receiving trace SL2_3a and the second electrode EL2 can be referred to as the third distance d3_d, the distance between the fourth receiving trace SL2_4a and the second electrode EL2 can be referred to as the fourth distance d4_d, the distance between the fifth receiving trace SL2_5a and the second electrode EL2 can be referred to as the fifth distance d5_d, and the distance between the sixth receiving trace SL2_6a and the second electrode EL2 can be referred to as the sixth distance d6_d.

[0207] The thickness of the organic layer OL3 disposed between the first receiving trace SL2_1a to the sixth receiving trace SL2_6a and the second electrode EL2 can vary according to each corresponding receiving trace among the first receiving trace SL2_1a to the sixth receiving trace SL2_6a, and therefore, the first distance d1_d to the sixth distance d6_d can be different from each other.

[0208] For example, in an embodiment, the second distance d2_d can be greater than the first distance d1_d. The third distance d3_d can be greater than the second distance d2_d. The fourth distance d4_d can be greater than the third distance d3_d. The fifth distance d5_d can be greater than the fourth distance d4_d. The sixth distance d6_d can be greater than the fifth distance d5_d. Therefore, as an example, although the width W6_a of the sixth receiving trace is greater than the width W1_a of the first receiving trace, the capacitance between the sixth receiving trace SL2_6a and the second electrode EL2 can be substantially the same as the capacitance between the first receiving trace SL2_1a and the second electrode EL2. Therefore, even if the first receiving trace SL2_1a to the sixth receiving trace SL2_6a are located on one side of the peripheral region NAA, it is possible to prevent the occurrence of external input TC (refer to) transmitted through the first receiving trace SL2_1a to the sixth receiving trace SL2_6a due to the resistance of each of the first receiving trace SL2_1a to the sixth receiving trace SL2_6a and the capacitance between each of the first receiving trace SL2_1a to the sixth receiving trace SL2_6a and the second electrode EL2. Figure 1 The difference in the delay value of the information signal occurs.

[0209] Reference Figure 10 The input pad I-PD may include a first input pad IPD1 connected to the first transmit trace SL1_1 to the fourth transmit trace SL1_4 and a second input pad IPD2 connected to the first receive trace SL2_1a to the sixth receive trace SL2_6a.

[0210] Although embodiments of the inventive concept have been described, it should be understood that the inventive concept is not limited to these embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of the inventive concept, as set forth in the appended claims.

[0211] Therefore, the subject matter disclosed should not be limited to any single embodiment described herein.

Claims

1. A display device, wherein, The display device includes: A display panel configured to display an image, the display panel comprising an electrode layer and a display element layer comprising light-emitting elements; An encapsulation layer is disposed on the display element layer, a first portion of the encapsulation layer having an upper surface inclined toward an edge of the display device; and An input sensing layer is disposed on the display panel, the input sensing layer comprising: Multiple sensing electrodes, including a first sensing electrode and a second sensing electrode; and Multiple signal lines are electrically connected to the multiple sensing electrodes and overlap with the first portion of the encapsulation layer. The multiple signal lines include a first signal line electrically connected to the first sensing electrode and a second signal line electrically connected to the second sensing electrode. Wherein, all of the first signal lines have a length greater than the length of all of the second signal lines, and The distance between the first signal line and the electrode layer is greater than the distance between the second signal line and the electrode layer.

2. The display device as claimed in claim 1, wherein: The first signal line has a width greater than that of the second signal line.

3. The display device as claimed in claim 2, wherein: The first sensing electrode and the second sensing electrode are spaced apart from each other in a first direction; The first signal line includes a first line portion extending in the first direction and a second line portion extending in a second direction intersecting the first direction; The second signal line includes a third line portion extending in the first direction and a fourth line portion extending in the second direction; The length of the first line portion is greater than the length of the third line portion; and The distance between the first line portion and the electrode layer is greater than the distance between the third line portion and the electrode layer.

4. The display device as claimed in claim 1, wherein, The light-emitting element includes: First electrode; A light-emitting layer is disposed on the first electrode; and The second electrode is disposed on the light-emitting layer. The electrode layer includes the second electrode.

5. The display device as claimed in claim 4, wherein: The encapsulation layer includes a first encapsulation portion corresponding to the first signal line and a second encapsulation portion corresponding to the second signal line; and The first packaging portion has a thickness greater than that of the second packaging portion.

6. The display device as claimed in claim 5, wherein, The encapsulation layer includes: A first inorganic layer is disposed on the display element layer; A second inorganic layer is disposed on the first inorganic layer; and An organic layer is disposed between the first inorganic layer and the second inorganic layer. The organic layer includes a first organic layer portion corresponding to the first signal line and a second organic layer portion corresponding to the second signal line; and The first organic layer portion has a greater thickness than the second organic layer portion.

7. The display device as claimed in claim 6, wherein: The encapsulation layer further includes: A first insulating layer is disposed on the second inorganic layer and corresponds to the first signal line and the second signal line; and A second insulating layer is disposed on the first insulating layer and corresponds to the first signal line.

8. The display device as claimed in claim 5, wherein: The first sensing electrode and the second sensing electrode are spaced apart from each other in a first direction; The first signal line includes a first line portion extending in the first direction and a second line portion extending in a second direction intersecting the first direction; as well as The second signal line includes a third line portion extending in the first direction and a fourth line portion extending in the second direction. The encapsulation layer includes a third encapsulation portion corresponding to the first line portion and a fourth encapsulation portion corresponding to the third line portion; The first line portion has a length greater than the length of the third line portion; and The third packaging portion has a greater thickness than the fourth packaging portion.

9. The display device as claimed in claim 1, wherein, The input sensing layer includes: A sensing insulating layer is disposed on the display panel; and A conductive layer is disposed on the sensing insulating layer, and the conductive layer includes the plurality of sensing electrodes and the plurality of signal lines. The sensing insulating layer includes a first insulating portion corresponding to the first signal line and a second insulating portion corresponding to the second signal line. The first insulating portion has a thickness greater than that of the second insulating portion.

10. A display device, wherein, The display device includes: A display panel configured to display an image, the display panel comprising an electrode layer and a display element layer comprising light-emitting elements; An encapsulation layer is disposed on the display element layer, a first portion of the encapsulation layer having an upper surface inclined toward an edge of the display device; and An input sensing layer is disposed on the display panel and configured to sense input. The input sensing layer includes a plurality of sensing electrodes and a plurality of signal lines electrically connected to the plurality of sensing electrodes, the plurality of signal lines overlapping the first portion of the encapsulation layer. Each of the plurality of signal lines has a length and width different from the other signal lines, and the plurality of signal lines have the same resistance. The distance between each of the plurality of signal lines and the electrode layer is different from the distance between the other signal lines and the electrode layer. Each of the plurality of signal lines has the same capacitance as the electrode layer, and The distance from each of the plurality of signal lines to the electrode layer increases as the length of each of the plurality of signal lines increases.

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