Monostable dual-voltage output power supply dynamic allocation dummy load voltage stabilizing circuit

Abstract

The application discloses a single-stable dual-voltage output power supply dynamic adjustment dummy load voltage stabilizing circuit, which comprises a first input end, a second input end, a first output circuit and a second output circuit. The first input end is electrically connected with one output end of a power supply circuit. The second input end is electrically connected with another output end of the power supply circuit. The first output circuit is electrically connected with the first input end and adjusts a dummy load in the first output circuit to lower or raise the voltage value of the first output circuit. The second output circuit is electrically connected with the second input end and adjusts a dummy load in the second output circuit to lower or raise the voltage value of the second output circuit. The application aims to provide a single-stable dual-voltage output power supply dynamic adjustment dummy load voltage stabilizing circuit which can automatically adjust the dummy load and realize the function of lowering the voltage of one path or raising the voltage of another path.

Description

Technical Field

[0001] This invention relates to the field of voltage regulator circuits, and more particularly to a dynamic adjustment dummy load voltage stabilization circuit for a single-stable dual-voltage output power supply. Background Technology

[0002] Because in monostable dual-voltage output or multi-voltage output power supplies, a large voltage deviation will occur when one side is under load, which may cause the voltage to drop or rise, resulting in the circuit failing to work properly or burning out the output device.

[0003] In existing monostable dual-voltage or multi-voltage output power supplies, a large voltage deviation occurs when handling single-side load. The common approach is to add a fixed dummy load to lower the voltage of the current circuit or raise the voltage of other circuits. This method leads to an increase in average power and a decrease in efficiency. It cannot automatically adjust according to the voltage magnitude, thus limiting its application range. Summary of the Invention

[0004] The purpose of this invention is to propose a dynamic dummy load voltage stabilization circuit for a monostable dual-voltage output power supply, which can automatically adjust the dummy load to reduce the voltage of its own circuit or increase the voltage of other circuits.

[0005] To achieve this objective, the present invention employs the following technical solution: a dynamic adjustment dummy load voltage stabilization circuit for a monostable dual-voltage output power supply, comprising:

[0006] The first input terminal is used to be electrically connected to one of the output terminals of the power supply circuit;

[0007] The second input terminal is used to be electrically connected to the other output terminal of the power supply circuit.

[0008] The first output circuit is used to be electrically connected to the first input terminal and to adjust the dummy load in the first output circuit to lower or raise the voltage value of the first output circuit.

[0009] The second output circuit is used to electrically connect to the second input terminal and adjust the dummy load in the second output circuit to lower or raise the voltage value of the second output circuit.

[0010] Preferably, the first output circuit includes a first output terminal, a Zener diode ZN2, a resistor R18, a transistor Q2, and a resistor R19. The first input terminal is electrically connected to the negative terminal of the Zener diode ZN2, the first output terminal, and one end of the resistor R19. The positive terminal of the Zener diode ZN2 is electrically connected to the base of the transistor Q2 and one end of the resistor R18. The other end of the resistor R19 is electrically connected to the collector of the transistor Q2. The other end of the resistor R18 and the emitter of the transistor Q2 are connected to zero.

[0011] Preferably, the first output circuit further includes a resistor R12, a diode D6, a Zener diode ZN3, a resistor R20, and a transistor Q5. One end of the resistor R12 is electrically connected to the first input terminal, and the other end of the resistor R12 is electrically connected to the positive terminal of the diode D6 and the second output circuit. The negative terminal of the diode D6 is electrically connected to the base of the transistor Q2. The negative terminal of the Zener diode ZN3 is electrically connected to the first input terminal, and the positive terminal of the Zener diode ZN3 is electrically connected to the base of the transistor Q5 and one end of the resistor R20. The other end of the resistor R20 and the emitter of the transistor Q5 are connected to zero, and the collector of the transistor Q5 is electrically connected to the second output circuit.

[0012] Preferably, the second output circuit includes a second output terminal, a Zener diode ZN4, a resistor R21, a transistor Q3, and a resistor R22. The second input terminal is electrically connected to the negative terminal of the Zener diode ZN4, the second output terminal, and one end of the resistor R22. The positive terminal of the Zener diode ZN4 is electrically connected to the base of the transistor Q3 and one end of the resistor R21. The other end of the resistor R22 is electrically connected to the collector of the transistor Q3. The other end of the resistor R21 and the emitter of the transistor Q3 are connected to zero.

[0013] Preferably, the second output circuit further includes a resistor R13, a diode D7, a Zener diode ZN1, a resistor R17, and a transistor Q4. One end of the resistor R13 is electrically connected to the second input terminal, and the other end of the resistor R13 is electrically connected to the positive terminal of the diode D7 and the collector of the transistor Q5. The negative terminal of the diode D7 is electrically connected to the base of the transistor Q3. The negative terminal of the Zener diode ZN1 is electrically connected to the second input terminal, and the positive terminal of the Zener diode ZN1 is electrically connected to the base of the transistor Q4 and one end of the resistor R17. The other end of the resistor R17 and the emitter of the transistor Q4 are connected to zero, and the collector of the transistor Q4 is electrically connected to the positive terminal of the diode D6.

[0014] One of the beneficial effects of the technical solution of the present invention is that by automatically adjusting the dummy load, the function of lowering the voltage of its own circuit or raising the voltage of other circuits can be realized, thus stabilizing the voltage more effectively. After the circuit improvement of this solution, the monostable dual-voltage output power supply can automatically adjust the dummy load to realize the function of lowering the voltage of its own circuit or raising the voltage of other circuits. This method will reduce the average power consumption, increase the efficiency, and make the dummy load adjustment range wider and the application range broader. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a structure according to an embodiment of the present invention.

[0016] Among them: first output circuit 1, second output circuit 2. Detailed Implementation

[0017] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0018] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0019] In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0020] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0021] See Figure 1 As shown, a dynamic dummy load voltage stabilization circuit for a monostable dual-voltage output power supply includes:

[0022] The first input terminal is used to be electrically connected to one of the output terminals of the power supply circuit;

[0023] The second input terminal is used to be electrically connected to the other output terminal of the power supply circuit.

[0024] The first output circuit 1 is used to be electrically connected to the first input terminal and to adjust the dummy load in the first output circuit 1 to lower or raise the voltage value of the first output circuit 1.

[0025] The second output circuit 2 is used to be electrically connected to the second input terminal and to adjust the dummy load in the second output circuit 2 to lower or raise the voltage value of the second output circuit 2.

[0026] This application presents a dynamic dummy load voltage stabilization circuit for a monostable dual-voltage output power supply. This circuit can automatically adjust the dummy load to lower its own voltage or raise the voltage of other circuits, effectively stabilizing the voltage. After the circuit improvement in this solution, the monostable dual-voltage output power supply can automatically adjust the dummy load in the circuit to lower its own voltage or raise the voltage of other circuits. This method will reduce the average power consumption, increase efficiency, widen the dummy load adjustment range, and broaden the applicability of the circuit.

[0027] The voltage of the first output circuit 1 is affected by its own voltage and the voltage of other circuits (i.e., the voltage of the second output circuit 2), and the voltage of the second output circuit 2 is also affected by its own voltage and the voltage of other circuits (i.e., the voltage of the first output circuit 1).

[0028] Voltage regulation: When the output voltage of the first output circuit 1 is greater than the preset first regulated voltage range, the dummy load of the first output circuit 1 operates, the dummy load of the first output circuit 1 discharges and reduces the voltage, thereby sharing part of the energy consumption of the first output circuit 1, thereby lowering the voltage of the first output circuit 1, so that the voltage of the first output circuit 1 drops to the preset first regulated voltage range.

[0029] Voltage regulation by another circuit (second output circuit 2): When the output voltage of the second output circuit 2 is less than the preset second regulated voltage range, the dummy load of the second output circuit 2 operates and discharges, thereby raising the output voltage of the first output circuit 1 to the preset second regulated voltage range. Similarly, the output voltage of the second output circuit 2 can be adjusted. In a monostable dual-voltage output power supply, its characteristic is that one transformer outputs two voltages, causing the voltage of the other circuit to be affected when one voltage is under load. For example, if the monostable dual-voltage output power supply outputs two voltages, such as the output voltage of the first output circuit 1 being +24V and the output voltage of the second output circuit 2 being +36V, when the +24V circuit is under load, the voltage of the +36V circuit will decrease, and similarly, when the +36V circuit is under load, the voltage of the +24V circuit will decrease. Therefore, by adjusting the dummy load in the first output circuit 1 and the second output circuit 2, the function of lowering one's own voltage or raising the voltage of another circuit can be achieved.

[0030] Preferably, the first output circuit 1 includes a first output terminal, a Zener diode ZN2, a resistor R18, a transistor Q2, and a resistor R19. The first input terminal is electrically connected to the negative terminal of the Zener diode ZN2, the first output terminal, and one end of the resistor R19. The positive terminal of the Zener diode ZN2 is electrically connected to the base of the transistor Q2 and one end of the resistor R18. The other end of the resistor R19 is electrically connected to the collector of the transistor Q2. The other end of the resistor R18 and the emitter of the transistor Q2 are connected to zero.

[0031] When the voltage at the first output terminal Vout1 is greater than the Zener diode ZN2's regulated voltage, Zener diode ZN2 turns on. At this time, the base of transistor Q2 is at a high level, and transistor Q2 turns on. Resistor R19 acts as a dummy load for the first output terminal Vout1, discharging to reduce the voltage at the first output terminal Vout1 until the voltage at the first output terminal Vout1 drops to the regulated voltage of Zener diode ZN2.

[0032] Meanwhile, the first output circuit 1 also includes a resistor R12, a diode D6, a Zener diode ZN3, a resistor R20, and a transistor Q5. One end of the resistor R12 is electrically connected to the first input terminal, and the other end of the resistor R12 is electrically connected to the positive terminal of the diode D6 and the second output circuit 2. The negative terminal of the diode D6 is electrically connected to the base of the transistor Q2. The negative terminal of the Zener diode ZN3 is electrically connected to the first input terminal, and the positive terminal of the Zener diode ZN3 is electrically connected to the base of the transistor Q5 and one end of the resistor R20. The other end of the resistor R20 and the emitter of the transistor Q5 are connected to zero, and the collector of the transistor Q5 is electrically connected to the second output circuit 2.

[0033] Specifically, the second output circuit 2 includes a second output terminal, a Zener diode ZN4, a resistor R21, a transistor Q3, and a resistor R22. The second input terminal is electrically connected to the negative terminal of the Zener diode ZN4, the second output terminal, and one end of the resistor R22. The positive terminal of the Zener diode ZN4 is electrically connected to the base of the transistor Q3 and one end of the resistor R21. The other end of the resistor R22 is electrically connected to the collector of the transistor Q3. The other end of the resistor R21 and the emitter of the transistor Q3 are connected to zero.

[0034] When the voltage at the second output terminal Vout2 is greater than the Zener diode ZN4, the Zener diode ZN4 turns on. At this time, the base of transistor Q3 is at a high level, and transistor Q3 turns on. Resistor R22 acts as a dummy load for the second output terminal Vout2 and discharges, thereby reducing the voltage at the second output terminal Vout2 until the voltage at the second output terminal Vout2 drops to the Zener diode ZN4.

[0035] In this application, the second output circuit 2 further includes a resistor R13, a diode D7, a Zener diode ZN1, a resistor R17, and a transistor Q4. One end of the resistor R13 is electrically connected to the second input terminal, and the other end of the resistor R13 is electrically connected to the positive terminal of the diode D7 and the collector of the transistor Q5. The negative terminal of the diode D7 is electrically connected to the base of the transistor Q3. The negative terminal of the Zener diode ZN1 is electrically connected to the second input terminal, and the positive terminal of the Zener diode ZN1 is electrically connected to the base of the transistor Q4 and one end of the resistor R17. The other end of the resistor R17 and the emitter of the transistor Q4 are connected to zero, and the collector of the transistor Q4 is electrically connected to the positive terminal of the diode D6.

[0036] When the voltage at the second output terminal Vout1 is less than the Zener diode ZN3's regulated voltage, ZN3 is cut off, the base of transistor Q5 is at a low level, and Q5 is not conducting. At this time, the collector of transistor Q5 is at a high level, connected to the base of transistor Q3 through diode D7, making the base of transistor Q3 high and turning Q3 on. At this time, resistor R22 acts as a dummy load for the second output terminal Vout2, causing Vout2 to drop. Due to the characteristics of the monostable dual-voltage output power supply, the voltage at the first output terminal Vout1 is raised, eventually causing the voltage at the first output terminal Vout1 to rise to the regulated voltage of Zener diode ZN3.

[0037] When the voltage at the second output terminal Vout2 is less than the Zener diode ZN1, Zener diode ZN1 is cut off, the base of transistor Q4 is at a low level, and transistor Q4 is not conducting. At this time, the collector of transistor Q4 is at a high level, which is connected to the base of transistor Q2 through diode D6, making the base of transistor Q2 high and transistor Q2 conducting. At this time, resistor R19 acts as a dummy load for the first output terminal Vout1 and discharges, causing Vout1 to decrease. Due to the characteristics of the monostable dual-voltage output power supply, the voltage at the second output terminal Vout2 is raised, eventually causing the voltage at the second output terminal Vout2 to rise to the Zener diode ZN1's regulated voltage.

[0038] In the description of this specification, references to terms such as "embodiment," "example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0039] The technical principles of the present invention have been described above with reference to specific embodiments. These descriptions are merely for explaining the principles of the invention and should not be construed as limiting the scope of protection of the invention in any way. Based on this explanation, those skilled in the art can readily conceive of other specific embodiments of the invention without inventive effort, and these embodiments will all fall within the scope of protection of the present invention.

Claims

1. A dynamic dummy load voltage stabilization circuit for a monostable dual-voltage output power supply, characterized in that, include: The first input terminal is used to be electrically connected to one of the output terminals of the power supply circuit; The second input terminal is used to be electrically connected to the other output terminal of the power supply circuit. The first output circuit is used to be electrically connected to the first input terminal and to adjust the dummy load in the first output circuit to lower or raise the voltage value of the first output circuit. The second output circuit is used to electrically connect to the second input terminal and adjust the dummy load in the second output circuit to lower or raise the voltage value of the second output circuit. The first output circuit includes a first output terminal, a Zener diode ZN2, a resistor R18, a transistor Q2, and a resistor R19. The first input terminal is electrically connected to the negative terminal of the Zener diode ZN2, the first output terminal, and one end of the resistor R19. The positive terminal of the Zener diode ZN2 is electrically connected to the base of the transistor Q2 and one end of the resistor R18. The other end of the resistor R19 is electrically connected to the collector of the transistor Q2. The other end of the resistor R18 and the emitter of the transistor Q2 are connected to zero. The first output circuit further includes a resistor R12, a diode D6, a Zener diode ZN3, a resistor R20, and a transistor Q5. One end of the resistor R12 is electrically connected to the first input terminal, and the other end of the resistor R12 is electrically connected to the positive terminal of the diode D6 and the second output circuit. The negative terminal of the diode D6 is electrically connected to the base of the transistor Q2. The negative terminal of the Zener diode ZN3 is electrically connected to the first input terminal, and the positive terminal of the Zener diode ZN3 is electrically connected to the base of the transistor Q5 and one end of the resistor R20. The other end of the resistor R20 and the emitter of the transistor Q5 are connected to zero. The collector of the transistor Q5 is electrically connected to the second output circuit. The second output circuit includes a second output terminal, a Zener diode ZN4, a resistor R21, a transistor Q3, and a resistor R22. The second input terminal is electrically connected to the negative terminal of the Zener diode ZN4, the second output terminal, and one end of the resistor R22. The positive terminal of the Zener diode ZN4 is electrically connected to the base of the transistor Q3 and one end of the resistor R21. The other end of the resistor R22 is electrically connected to the collector of the transistor Q3. The other end of the resistor R21 and the emitter of the transistor Q3 are connected to zero. The second output circuit further includes a resistor R13, a diode D7, a Zener diode ZN1, a resistor R17, and a transistor Q4. One end of the resistor R13 is electrically connected to the second input terminal, and the other end of the resistor R13 is electrically connected to the positive terminal of the diode D7 and the collector of the transistor Q5. The negative terminal of the diode D7 is electrically connected to the base of the transistor Q3. The negative terminal of the Zener diode ZN1 is electrically connected to the second input terminal, and the positive terminal of the Zener diode ZN1 is electrically connected to the base of the transistor Q4 and one end of the resistor R17. The other end of the resistor R17 and the emitter of the transistor Q4 are connected to zero, and the collector of the transistor Q4 is electrically connected to the positive terminal of the diode D6.

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