An epitaxial structure of a semiconductor device and its fabrication method, a semiconductor device

Abstract

This invention discloses an epitaxial structure of a semiconductor device and its fabrication method, as well as the semiconductor device itself. The epitaxial structure of the semiconductor device includes a substrate, and a back barrier layer, a channel layer, and a barrier layer sequentially located on one side of the substrate. A two-dimensional electron gas is formed between the barrier layer and the channel layer. The back barrier layer includes Al. x Ga 1‑x N-back barrier layer, or, back barrier layer including In x Ga 1‑x N-back barrier layer. The epitaxial structure and fabrication method of the semiconductor device provided in this invention, and the semiconductor device thereof, involve forming a back barrier layer on the side of the channel layer near the substrate, and the back barrier layer includes Al. x Ga 1‑x N-back barrier layer or In x Ga 1‑x The N-back barrier layer raises the conduction band on one side of the back barrier layer, thereby increasing the barrier on the back barrier layer and enhancing the confinement capability of 2DEG. This makes it less likely for the high concentration of 2DEG formed at the interface between the channel layer and the barrier layer to leak into the back barrier layer, thereby reducing the leakage current of the back barrier layer and increasing the breakdown voltage of the semiconductor device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial structure of a semiconductor device and its fabrication method, and a semiconductor device. Background Technology

[0002] Gallium nitride (GaN), a semiconductor material, has become a research hotspot due to its large bandgap, high electron saturation drift velocity, high breakdown field strength, and good thermal conductivity. In electronic devices, GaN is more suitable than silicon (Si) and gallium arsenide (GaAs) for fabricating high-temperature, high-frequency, high-voltage, and high-power devices, thus GaN-based semiconductor devices have excellent application prospects.

[0003] However, in existing gallium nitride-based semiconductor devices, two-dimensional electron gas (2DEG) can easily leak into the buffer layer, causing leakage current in the buffer layer, which makes the semiconductor device prone to breakdown and failure. Summary of the Invention

[0004] This invention provides an epitaxial structure of a semiconductor device and its fabrication method, as well as the semiconductor device itself, to solve the problem of easy leakage of two-dimensional electron gas into the buffer layer, increase the confinement capability of 2DEG, and improve the breakdown voltage of the semiconductor device.

[0005] In a first aspect, embodiments of the present invention provide an epitaxial structure for a semiconductor device, comprising:

[0006] Substrate;

[0007] A back barrier layer, a channel layer, and a barrier layer are sequentially located on one side of the substrate, and a two-dimensional electron gas is formed between the barrier layer and the channel layer;

[0008] The back barrier layer includes Al x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer.

[0009] Optionally, the back barrier layer includes Al x Ga 1-x N-back barrier layer, wherein the aluminum composition of the back barrier layer remains constant or gradually decreases along the first direction;

[0010] Alternatively, the back barrier layer includes In x Ga 1-x N-back barrier layer, wherein the indium composition of the back barrier layer remains unchanged or gradually decreases along the first direction;

[0011] Wherein, the first direction is the direction in which the substrate points to the channel layer.

[0012] Optionally, the back barrier layer includes at least one sub-back barrier layer;

[0013] The subback barrier layer near the channel layer includes Al p Ga 1-p N-sub-back barrier layer, or, the sub-back barrier layer near the side of the channel layer includes In. p Ga 1-p N-type back barrier layer, where 1% ≤ p ≤ 10%.

[0014] Optionally, the back barrier layer includes at least two sub-back barrier layers, each sub-back barrier layer including a first sub-back barrier layer and a second sub-back barrier layer, wherein the second sub-back barrier layer is located on the side of the first sub-back barrier layer away from the substrate.

[0015] The first sub-back barrier layer includes Al y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes Al z Ga 1- z N sub-back barrier layers, or, the first sub-back barrier layer includes In y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes In z Ga 1-z N-type back barrier layer, where 0 < z < y ≤ 30%.

[0016] Optionally, the first sub-back barrier layer includes Al y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes Al z Ga 1-z N-sub-back barrier layer, wherein the aluminum composition of the first sub-back barrier layer remains constant or gradually decreases along the first direction, and the aluminum composition of the second sub-back barrier layer remains constant or gradually decreases along the first direction.

[0017] Alternatively, the first sub-back barrier layer includes In y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes In z Ga 1-z N-sub-back barrier layer, wherein the indium composition of the first sub-back barrier layer remains unchanged or gradually decreases along the first direction, and the indium composition of the second sub-back barrier layer remains unchanged or gradually decreases along the first direction;

[0018] Wherein, the first direction is the direction in which the substrate points to the channel layer.

[0019] Optionally, the thickness of the back barrier layer is D, where 0 μm < D ≤ 5 μm.

[0020] Optionally, the thickness of the channel layer is T;

[0021] The back barrier layer includes Al x Ga 1-x N-back barrier layer, the Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer is Q1, where T is positively correlated with Q1;

[0022] Alternatively, the back barrier layer includes In x Ga 1-x N-back barrier layer, the In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer is Q2, where T is positively correlated with Q2.

[0023] Optionally, the thickness of the channel layer is T;

[0024] The back barrier layer includes Al x Ga 1-x N-back barrier layer, the Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer is Q1, where 5*Q1 nm≤T≤50*Q1 nm;

[0025] Alternatively, the back barrier layer includes In x Ga 1-x N-back barrier layer, the In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer is Q2, wherein 5*Q2 nm≤T≤50*Q2 nm.

[0026] In a second aspect, embodiments of the present invention also provide a semiconductor device, including an epitaxial structure of any of the semiconductor devices described in the first aspect, wherein the epitaxial structure of the semiconductor device further includes a cap layer, the cap layer being located on the side of the barrier layer away from the substrate;

[0027] The semiconductor device further includes a gate, a source, and a drain, wherein the gate, the source, and the drain are all located on the side of the cap layer away from the substrate, and the gate is located between the source and the drain.

[0028] Thirdly, embodiments of the present invention also provide a method for fabricating an epitaxial structure of a semiconductor device, used to fabricate an epitaxial structure of any of the semiconductor devices described in the first aspect, the method comprising:

[0029] Provide substrate;

[0030] A back barrier layer, a channel layer, and a barrier layer are sequentially fabricated on one side of the substrate, wherein a two-dimensional electron gas is formed between the barrier layer and the channel layer, and the back barrier layer comprises Al. x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer.

[0031] The epitaxial structure and fabrication method of the semiconductor device provided in this invention, and the semiconductor device thereof, involve forming a back barrier layer on the side of the channel layer near the substrate, wherein the back barrier layer 11 includes Al. x Ga 1-x N-back barrier layer, or, back barrier layer 11 includes In x Ga 1-x The N-back barrier layer raises the conduction band on one side of the back barrier layer, thereby increasing the barrier on the back barrier layer and enhancing the confinement capability of 2DEG. This makes it less likely for the high concentration of 2DEG formed at the interface between the channel layer and the barrier layer to leak into the back barrier layer, thereby reducing the leakage current of the back barrier layer and increasing the breakdown voltage of the semiconductor device. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the epitaxial structure of a semiconductor device provided in an embodiment of the present invention;

[0033] Figure 2 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention;

[0034] Figure 3-8 A schematic diagram of the aluminum composition of the back barrier layer provided in an embodiment of the present invention;

[0035] Figure 9 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention;

[0036] Figure 10 A schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention;

[0037] Figure 11 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention;

[0038] Figure 12 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention;

[0039] Figure 13This is a schematic flowchart illustrating a method for fabricating an epitaxial structure of a semiconductor device according to an embodiment of the present invention.

[0040] Figure 14 This is a schematic flowchart of a method for fabricating a semiconductor device according to an embodiment of the present invention. Detailed Implementation

[0041] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0042] Figure 1 This is a schematic diagram of the epitaxial structure of a semiconductor device provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the epitaxial structure of the semiconductor device provided in this embodiment of the invention includes a substrate 10, and a back barrier layer 11, a channel layer 12, and a barrier layer 13 sequentially located on one side of the substrate 10. A two-dimensional electron gas is formed between the barrier layer 13 and the channel layer 12. The back barrier layer 11 includes Al x Ga 1-x N-back barrier layer, or, back barrier layer 11 includes In x Ga 1-x N-back barrier layer.

[0043] The substrate 10 can be one or more of the following materials: sapphire, silicon (Si), silicon-on-insulator (SOI), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), lithium niobate (LiNbO3), rare earth oxides, or any other material capable of growing nitrides. The specific type of substrate 10 is not limited in the embodiments of the present invention.

[0044] Continue to refer to Figure 1 The channel layer 12 is located on the side of the back barrier layer 11 away from the substrate 10, and the barrier layer 13 is located on the side of the channel layer 12 away from the substrate 10. The channel layer 12 and the barrier layer 13 form a semiconductor heterojunction structure. A high-concentration two-dimensional electron gas (2DEG) is formed at the interface between the channel layer 12 and the barrier layer 13, and the channel layer 12 is used to provide a channel for the movement of the two-dimensional electron gas.

[0045] Optionally, the material used to fabricate the channel layer 12 includes nitrides. For example, the material used to fabricate the channel layer 12 includes at least one of gallium nitride (GaN), aluminum nitride (AlN), indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), or other semiconductor materials. This embodiment of the invention does not limit the specific materials used.

[0046] The material of the barrier layer 13 can be any semiconductor material capable of forming a heterojunction structure with the channel layer 12, including ternary nitrides, etc. For example, the barrier layer 13 may include at least one of indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN) or other semiconductor materials. This embodiment of the invention does not limit this.

[0047] For example, the channel layer 12 is made of gallium nitride (GaN), and the barrier layer 13 is made of aluminum gallium nitride (AlGaN), forming an AlGaN / GaN material system. The AlGaN / GaN material system exhibits strong spontaneous polarization and piezoelectric polarization, and 1E12 / cm can be obtained without doping. -3 The order of magnitude of 2DEG concentration confines a large amount of 2DEG within the potential well at the AlGaN / GaN interface.

[0048] In the prior art, a buffer layer is disposed on the side of the channel layer 12 near the substrate 10. 2DEGs can easily leak into the buffer layer, causing leakage current in the buffer layer, which makes the semiconductor device prone to breakdown and failure. The inventors discovered through research that the reason for the above-mentioned technical problem is that the potential barrier height on the buffer layer side is low, resulting in poor confinement ability of the 2DEGs. Under high electric field conditions, the 2DEGs can easily leak into the buffer layer, forming leakage current in the buffer layer.

[0049] Therefore, continue to refer to Figure 1 The epitaxial structure of the semiconductor device provided in this embodiment of the invention has a back barrier layer 11 disposed on the side of the channel layer 12 near the substrate 10, and the back barrier layer 11 includes Al x Ga 1-x N (aluminum gallium nitride) back barrier layer, or, the back barrier layer 11 includes In x Ga 1-x N (Indium Gallium Nitride) back barrier layer, wherein Al is used x Ga 1-x N (aluminum gallium nitride) and In x Ga 1-x N (indium gallium nitride) can raise the conduction band on one side of the back barrier layer, thereby increasing the barrier on one side of the back barrier layer 11, increasing the confinement capability of 2DEG, making it less likely for 2DEG to leak into the back barrier layer 11, thereby reducing the leakage current of the back barrier layer 11 and increasing the breakdown voltage of the semiconductor device.

[0050] Meanwhile, the back barrier layer 11 includes Al x Ga 1-x N (aluminum gallium nitride) back barrier layer, or, the back barrier layer 11 includes In x Ga 1-x The N (indium gallium nitride) back barrier layer is also easy to implement in terms of process, which helps to reduce the cost of semiconductor devices.

[0051] In summary, the epitaxial structure of the semiconductor device provided in this embodiment of the invention includes a back barrier layer 11 disposed on the side of the channel layer 12 near the substrate 10, and the back barrier layer 11 includes Al. x Ga 1-x N (aluminum gallium nitride) back barrier layer, or, the back barrier layer 11 includes In x Ga 1-x The N (indium gallium nitride) back barrier layer can raise the conduction band on one side of the back barrier layer, thereby increasing the barrier on one side of the back barrier layer 11, increasing the confinement capability of 2DEG, making it less likely for the high concentration of 2DEG formed at the interface between the channel layer 12 and the barrier layer 13 to leak into the back barrier layer 11, thereby reducing the leakage current of the back barrier layer 11 and increasing the breakdown voltage of the semiconductor device.

[0052] Based on the above embodiments, optionally, the bandgap of the back barrier layer 11 is greater than the bandgap of gallium nitride (GaN).

[0053] Among them, due to the advantages of gallium nitride (GaN) material, gallium nitride (GaN) can be used to prepare the back barrier layer 11. Furthermore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention, by setting the band gap of the back barrier layer 11 to be larger than that of gallium nitride (GaN), can further improve the barrier on one side of the back barrier layer 11, increase the 2DEG confinement capability, and further reduce the leakage current of the back barrier layer 11, thereby improving the breakdown voltage of the semiconductor device.

[0054] Optional, 0 < x ≤ 30%.

[0055] Among them, when the back barrier layer 11 includes Al x Ga 1-x With an N (aluminum gallium nitride) back barrier layer, in Al x Ga 1-x In N (aluminum gallium nitride), x represents Al x Ga 1-xIf the aluminum content of N is too high, the thermal conductivity of the back barrier layer 11 will decrease, thereby affecting the heat dissipation of the semiconductor device. Therefore, by setting 0 < x ≤ 30%, the aluminum content in the back barrier layer 11 will not be too high, ensuring the thermal conductivity of the back barrier layer 11, which helps the semiconductor device to dissipate heat. For example, 0 < x ≤ 20% can be set, or 0 < x ≤ 20% can be set. Preferably, 0 < x ≤ 10% can be set. Those skilled in the art can set it according to actual needs.

[0056] In other embodiments, when the back barrier layer 11 includes In x Ga 1-x When using an N (indium gallium nitride) back barrier layer, in In x Ga 1-x In N (indium gallium nitride), x represents In x Ga 1-x If the indium content of N is too high, the thermal conductivity of the back barrier layer 11 will decrease, thereby affecting the heat dissipation of the semiconductor device. Therefore, by setting 0 < x ≤ 30%, the indium content in the back barrier layer 11 will not be too high, ensuring the thermal conductivity of the back barrier layer 11, which helps the semiconductor device to dissipate heat. For example, 0 < x ≤ 20% can be set, or 0 < x ≤ 20% can be set. Preferably, 0 < x ≤ 10% can be set. Those skilled in the art can set it according to actual needs.

[0057] Continue to refer to Figure 1 Optionally, the back barrier layer 11 includes Al x Ga 1-x N-back barrier layer, wherein the aluminum composition of the back barrier layer 11 remains constant or gradually decreases along the first direction X; or, the back barrier layer 11 includes In x Ga 1-x N-back barrier layer, the indium composition of the back barrier layer 11 remains unchanged or gradually decreases along the first direction X; wherein, the first direction X is the direction from the substrate 10 to the channel layer 12.

[0058] For example, the back barrier layer 11 includes Al x Ga 1-x When the N-back barrier layer is used, the aluminum composition of the back barrier layer 11 can remain unchanged along the first direction X, that is, the aluminum composition of the back barrier layer 11 remains constant along the first direction X. The process is relatively simple and easy to prepare.

[0059] In other embodiments, the aluminum composition of the back barrier layer 11 may be gradually reduced along the first direction X, such that the aluminum composition of the back barrier layer 11 is lower on the side closer to the channel layer 12 and higher on the side farther away from the channel layer 12. This improves the confinement capability of 2DEG, reduces leakage current of the back barrier layer 11 of the semiconductor device, increases the breakdown voltage, reduces lattice strain, reduces piezoelectric polarization, effectively suppresses the formation of two-dimensional holes, prevents semiconductor device performance degradation, and thus improves the stability and reliability of semiconductor device operation.

[0060] Furthermore, along the first direction X, the aluminum composition of the back barrier layer 11 can decrease linearly or nonlinearly. Those skilled in the art can set it according to actual needs, and the embodiments of the present invention do not limit it in this regard.

[0061] For example, the back barrier layer 11 includes In x Ga 1-x When the N-back barrier layer is used, the indium composition of the back barrier layer 11 can remain unchanged along the first direction X. That is, the indium composition of the back barrier layer 11 remains constant along the first direction X. The process is relatively simple and easy to prepare.

[0062] In other embodiments, the indium composition of the back barrier layer 11 may be gradually reduced along the first direction X, such that the indium composition of the back barrier layer 11 is lower on the side closer to the channel layer 12 and higher on the side farther away from the channel layer 12. This improves the confinement capability of 2DEG, reduces leakage current of the back barrier layer 11 of the semiconductor device, increases the breakdown voltage, reduces lattice strain, reduces piezoelectric polarization, effectively suppresses the formation of two-dimensional holes, prevents semiconductor device performance degradation, and thus improves the stability and reliability of semiconductor device operation.

[0063] Furthermore, along the first direction X, the indium composition of the back barrier layer 11 can decrease linearly or nonlinearly. Those skilled in the art can set it according to actual needs, and the embodiments of the present invention do not limit it in this regard.

[0064] Figure 2 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention, as shown below. Figure 2 As shown, optionally, the back barrier layer 11 includes at least one sub-back barrier layer, and the sub-back barrier layer near the channel layer 12 includes Al. p Ga 1-p N-subback barrier layer, or, the subback barrier layer near the channel layer 12, includes In. p Ga 1-p N-type back barrier layer, where 1% ≤ p ≤ 10%.

[0065] Among them, the sub-back barrier layer closest to the channel layer 12 is the sub-back barrier layer adjacent to the channel layer 12.

[0066] For example, when the sub-back barrier layer near the side of the channel layer 12 includes Al p Ga 1-p When using an N-sub-back barrier layer, if the aluminum content of the sub-back barrier layer near the channel layer 12 is too high, the mobility of the 2DEG will decrease significantly. Conversely, if the aluminum content of the sub-back barrier layer near the channel layer 12 is too low, it will reduce the conduction band of the sub-back barrier layer, which is detrimental to increasing the confinement capability of the 2DEG and leads to leakage in the back barrier layer 11. Therefore, by setting 1% ≤ p ≤ 10%, the mobility of the 2DEG can be improved while ensuring increased confinement capability and reduced leakage in the back barrier layer 11.

[0067] In other embodiments, when the subback barrier layer near the side of the channel layer 12 includes In p Ga 1-p When using an N-sub-back barrier layer, if the indium content of the sub-back barrier layer near the channel layer 12 is too high, the mobility of the 2DEG will decrease significantly. Conversely, if the indium content of the sub-back barrier layer near the channel layer 12 is too low, it will reduce the conduction band of that sub-back barrier layer, which is detrimental to increasing the confinement capability of the 2DEG and leads to leakage in the back barrier layer 11. Therefore, by setting 1% ≤ p ≤ 10%, the mobility of the 2DEG can be improved while ensuring increased confinement capability and reduced leakage in the back barrier layer 11.

[0068] It should be noted that the back barrier layer 11 can be configured as a single-layer structure, that is, the back barrier layer 11 includes only one sub-back barrier layer. In this case, when the sub-back barrier layer near the channel layer 12 includes Al p Ga 1-p When an N-type sub-back barrier layer is used, if the aluminum composition of the back barrier layer 11 gradually decreases along the first direction X, then the aluminum composition at the interface of the back barrier layer 11 near the channel layer 12 is not less than 1% and not more than 10%; when the sub-back barrier layer near the channel layer 12 includes In p Ga 1-p When the N-type back barrier layer is used, if the indium composition of the back barrier layer 11 gradually decreases along the first direction X, the indium composition at the interface of the back barrier layer 11 near the channel layer 12 is set to be not less than 1% and not more than 10%. Those skilled in the art can set it according to actual needs.

[0069] In other embodiments, the back barrier layer 11 may also be configured as a multi-layer structure, that is, the back barrier layer 11 includes multiple sub-back barrier layers. The following embodiments use a multi-layer structure of the back barrier layer 11 as an example for illustration.

[0070] For example, such as Figure 2 As shown, the sub-back barrier layer near the channel layer 12 includes Al p Ga 1-pTaking an N-sub-back barrier layer, and the back barrier layer 11 including two sub-back barrier layers as an example, the two sub-back barrier layers are a first sub-back barrier layer 111 and a second sub-back barrier layer 112, respectively. The second sub-back barrier layer 112 is located on the side of the first sub-back barrier layer 111 away from the substrate 10. Then the second sub-back barrier layer 112 is a sub-back barrier layer close to the channel layer 12. By setting the aluminum composition of the second sub-back barrier layer 112 to be not less than 1% and not more than 10%, the confinement capability of 2DEG is increased, the leakage current of the back barrier layer 11 is reduced, and the mobility of 2DEG is improved.

[0071] Continue to refer to Figure 2 Optionally, the back barrier layer 11 includes at least two sub-back barrier layers, each including a first sub-back barrier layer 111 and a second sub-back barrier layer 112. The second sub-back barrier layer 112 is located on the side of the first sub-back barrier layer 111 away from the substrate 10. The first sub-back barrier layer 111 includes Al. y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes Al z Ga 1-z N-subback barrier layer, or, the first subback barrier layer 111 includes In y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes In z Ga 1-z N-type back barrier layer, where 0 < z < y ≤ 30%.

[0072] For example, such as Figure 2 As shown, taking the back barrier layer 11 as an example, which includes two sub-back barrier layers, the two sub-back barrier layers are the first sub-back barrier layer 111 and the second sub-back barrier layer 112, and the second sub-back barrier layer 112 is located on the side of the first sub-back barrier layer 111 away from the substrate 10.

[0073] When the first sub-back barrier layer 111 includes Al y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes Al z Ga 1- z When using an N-sub back barrier layer, by setting 0 < z < y ≤ 30%, the aluminum composition of the second sub-back barrier layer 112 near the channel layer 12 is lower, while the aluminum composition of the first sub-back barrier layer 111 far from the channel layer 12 is higher. This improves the confinement capability of 2DEG, reduces leakage current of the back barrier layer 11 of the semiconductor device, increases the breakdown voltage, reduces lattice strain, reduces piezoelectric polarization, effectively suppresses the formation of two-dimensional holes, prevents semiconductor device performance degradation, and thus improves the stability and reliability of semiconductor device operation.

[0074] When the first sub-back barrier layer 111 includes In y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes In z Ga 1- z When using an N-sub-back barrier layer, by setting 0 < z < y ≤ 30%, the indium content of the second sub-back barrier layer 112 near the channel layer 12 is lower, while the indium content of the first sub-back barrier layer 111 far from the channel layer 12 is higher. This improves the confinement capability of 2DEG, reduces leakage current of the back barrier layer 11 of the semiconductor device, increases the breakdown voltage, reduces lattice strain, reduces piezoelectric polarization, effectively suppresses the formation of two-dimensional holes, prevents semiconductor device performance degradation, and thus improves the stability and reliability of semiconductor device operation.

[0075] In other embodiments, the back barrier layer 11 may also include more sub-back barrier layers. Those skilled in the art can configure it according to actual needs, and the embodiments of the present invention do not limit this.

[0076] Continue to refer to Figure 2 Optionally, the first sub-back barrier layer 111 includes Al y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes Al z Ga 1-z N-sub-back barrier layer, the aluminum composition of the first sub-back barrier layer 111 remains constant or gradually decreases along the first direction X, and the aluminum composition of the second sub-back barrier layer 112 remains constant or gradually decreases along the first direction X; or, the first sub-back barrier layer 111 includes In y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes In z Ga 1-z N-sub-back barrier layer, the indium composition of the first sub-back barrier layer 111 remains unchanged or gradually decreases along the first direction X, and the indium composition of the second sub-back barrier layer 112 remains unchanged or gradually decreases along the first direction X; wherein, the first direction X is the direction from the substrate 10 to the channel layer 12.

[0077] For example, when the first sub-back barrier layer 111 includes Al y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes Al z Ga 1-z When the N-sub-back barrier layer is used, the aluminum composition of the first sub-back barrier layer 111 can remain unchanged along the first direction X. That is, the aluminum composition of the first sub-back barrier layer 111 remains constant along the first direction X. The process is relatively simple and easy to prepare.

[0078] In other embodiments, the aluminum composition of the first sub-back barrier layer 111 can be gradually reduced along the first direction X, thereby improving the 2DEG confinement capability, reducing the leakage current of the back barrier layer 11 of the semiconductor device, increasing the breakdown voltage, reducing lattice strain, reducing piezoelectric polarization, effectively suppressing the formation of two-dimensional holes, preventing the performance degradation of the semiconductor device, and thus improving the stability and reliability of the semiconductor device operation.

[0079] Similarly, the aluminum composition of the second sub-back barrier layer 112 can remain unchanged along the first direction X, making the process relatively simple and easy to fabricate. The aluminum composition of the second sub-back barrier layer 112 can also be gradually reduced along the first direction X, thereby improving the confinement capability of 2DEG while enhancing the stability and reliability of the semiconductor device. Those skilled in the art can configure the first sub-back barrier layer 111 and the second sub-back barrier layer 112 according to actual needs.

[0080] For example, when the first sub-back barrier layer 111 includes In y Ga 1-y N-subback barrier layer, the second subback barrier layer 112 includes In z Ga 1-z When the N-sub-back barrier layer is used, the indium composition of the first sub-back barrier layer 111 can remain unchanged along the first direction X. That is, the indium composition of the first sub-back barrier layer 111 remains constant along the first direction X. The process is relatively simple and easy to prepare.

[0081] In other embodiments, the indium composition of the first sub-back barrier layer 111 can be gradually reduced along the first direction X, thereby improving the 2DEG confinement capability, reducing the leakage current of the back barrier layer 11 of the semiconductor device, increasing the breakdown voltage, reducing lattice strain, reducing piezoelectric polarization, effectively suppressing the formation of two-dimensional holes, preventing the performance degradation of the semiconductor device, and thus improving the stability and reliability of the semiconductor device operation.

[0082] Similarly, the indium composition of the second sub-back barrier layer 112 can remain unchanged along the first direction X, making the process relatively simple and easy to fabricate. The indium composition of the second sub-back barrier layer 112 can also be gradually reduced along the first direction X, thereby improving the confinement capability of 2DEG while enhancing the stability and reliability of the semiconductor device. Those skilled in the art can configure the first sub-back barrier layer 111 and the second sub-back barrier layer 112 according to actual needs.

[0083] In other embodiments, the back barrier layer 11 may further include multiple sub-back barrier layers, where the sub-back barrier layers include Al p Ga 1-p When the N-type sub-back barrier layer is used, the aluminum composition of any sub-back barrier layer can remain constant or gradually decrease along the first direction X; when the sub-back barrier layer includes In... p Ga 1-pWhen using N-sub-back barrier layers, the indium composition of any sub-back barrier layer can be kept constant or gradually decreased along the first direction X. Those skilled in the art can set it according to actual needs.

[0084] For example, Figure 3-8 A schematic diagram of the aluminum composition of the back barrier layer provided in an embodiment of the present invention is shown below. Figure 3-8 As shown, the back barrier layer 11 includes Al x Ga 1-x Taking the N-back barrier layer as an example, the vertical axis represents the aluminum composition, and the horizontal axis represents the back barrier layer thickness. The back barrier layer thickness refers to the distance between the back barrier layer 11 and the surface away from the channel layer 12. When the back barrier layer 11 is a single-layer structure, the aluminum composition of the back barrier layer 11 can be kept constant (e.g., ...). Figure 3 (As shown), the aluminum composition of the back barrier layer 11 can also be set to gradually decrease along the direction from the substrate 10 to the channel layer 12 (e.g. Figure 4 (As shown). When the back barrier layer 11 has a multilayer structure, for example, taking a back barrier layer 11 comprising three sub-back barrier layers, the three sub-back barrier layers are a first sub-back barrier layer, a second sub-back barrier layer, and a third sub-back barrier layer, respectively. The aluminum composition of the first sub-back barrier layer, the second sub-back barrier layer, and the third sub-back barrier layer can be decreased sequentially (e.g., Figure 5 (As shown), or, taking the back barrier layer 11 as an example, which includes two sub-back barrier layers, the two sub-back barrier layers are the first sub-back barrier layer and the second sub-back barrier layer, respectively, and the aluminum composition of the first sub-back barrier layer and the second sub-back barrier layer can be decreased sequentially (e.g. Figure 6 (As shown).

[0085] In other embodiments, the aluminum composition of at least one sub-back barrier layer may be provided to gradually decrease along the direction from the substrate 10 to the channel layer 12. For example, taking a back barrier layer 11 comprising two sub-back barrier layers as an example, the two sub-back barrier layers are a first sub-back barrier layer and a second sub-back barrier layer, respectively. The aluminum composition of both the first sub-back barrier layer and the second sub-back barrier layer can gradually decrease along the direction from the substrate 10 to the channel layer 12 (e.g., Figure 7 (as shown), or, the aluminum composition of only the second sub-back barrier layer can be gradually reduced along the direction from the substrate 10 to the channel layer 12 (as shown). Figure 8 (As shown).

[0086] Furthermore, as the aluminum composition of the sub-back barrier layer gradually decreases along the first direction X, the aluminum composition of the sub-back barrier layer can decrease linearly or non-linearly along the first direction X, and those skilled in the art can set it according to actual needs.

[0087] It should be noted that the above embodiments are merely examples. Those skilled in the art can set the number of back barrier layers 11 and the aluminum composition distribution of each sub-back barrier layer according to actual needs. The embodiments of the present invention do not limit this.

[0088] It is understandable that when the back barrier layer 11 includes In y Ga 1-y N-back barrier layer, which, in the above embodiment, includes Al. y Ga 1-y Similarly, for the N-back barrier layer, those skilled in the art can set the number of back barrier layers 11 and the indium composition distribution of each sub-back barrier layer according to actual needs, which will not be elaborated here.

[0089] Continue to refer to Figure 1 Optionally, the thickness of the back barrier layer 11 is D, where 0 μm < D ≤ 5 μm.

[0090] If the thickness of the back barrier layer 11 is too large, the growth time of the back barrier layer 11 will be longer during fabrication, reducing fabrication efficiency and making it difficult to control the stress in the back barrier layer 11. This can easily lead to warping or cracking of the back barrier layer 11. Furthermore, an excessively thick back barrier layer 11 is also detrimental to the heat dissipation of the semiconductor device. The epitaxial structure of the semiconductor device provided in this embodiment of the invention sets the thickness D of the back barrier layer 11 to satisfy 0μm < D ≤ 5μm. This reduces the growth time of the back barrier layer 11, improves fabrication efficiency, avoids warping or cracking of the back barrier layer 11, and ensures the heat dissipation performance of the semiconductor device.

[0091] Continue to refer to Figure 1 The thickness of the channel layer 12 is T; the back barrier layer 11 includes Al x Ga 1-x N-back barrier layer, Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer 12 is Q1, where T is positively correlated with Q1.

[0092] Among them, Al x Ga 1-x The aluminum composition Q1 of the N-back barrier layer near the channel layer 12 is Al. x Ga 1-x Regarding the aluminum composition at the interface between the N-back barrier layer and the channel layer 12, if the thickness T of the channel layer 12 is too small, alloy scattering in the back barrier layer 11 will reduce the mobility of 2DEGs; if the thickness T of the channel layer 12 is too large, two-dimensional holes will be generated at the interface between the channel layer 12 and the back barrier layer 11, resulting in a parasitic channel, making it difficult for the semiconductor device to turn off. Therefore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention, by setting the thickness of the channel layer 12 to be T and Al... x Ga 1-xThe aluminum composition Q1 of the N-back barrier layer near the channel layer 12 is positively correlated, which helps to ensure that the thickness T of the channel layer 12 is not too small or too large. While ensuring the mobility of 2DEG, it avoids the generation of two-dimensional cavitation gas at the interface between the channel layer 12 and the back barrier layer 11, thereby avoiding the formation of parasitic channels and ensuring the normal operation of semiconductor devices.

[0093] In other embodiments, the back barrier layer 11 may include In x Ga 1-x N-back barrier layer, In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer 12 is Q2, where T is positively correlated with Q2.

[0094] Among them, In x Ga 1-x The indium composition Q2 of the N-back barrier layer near the channel layer 12 is In. x Ga 1-x Regarding the indium composition at the interface between the N-back barrier layer and the channel layer 12, if the thickness T of the channel layer 12 is too small, alloy scattering in the back barrier layer 11 will reduce the mobility of the 2DEG; if the thickness T of the channel layer 12 is too large, two-dimensional holes will be generated at the interface between the channel layer 12 and the back barrier layer 11, resulting in a parasitic channel, making it difficult for the semiconductor device to turn off. Therefore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention, by setting the thickness of the channel layer 12 to be T and In x Ga 1-x The indium composition Q2 of the N-back barrier layer near the channel layer 12 is positively correlated, which helps to ensure that the thickness T of the channel layer 12 is not too small or too large. While ensuring the mobility of 2DEG, it avoids the generation of two-dimensional holes at the interface between the channel layer 12 and the back barrier layer 11, thereby avoiding the formation of parasitic channels and ensuring the normal operation of semiconductor devices.

[0095] Continue to refer to Figure 1 Optionally, the thickness of the channel layer 12 is T, and the back barrier layer 11 includes Al. x Ga 1-x N-back barrier layer, Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer 12 is Q1, where 5*Q1 nm≤T≤50*Q1 nm.

[0096] Among them, Al x Ga 1-x The aluminum composition Q1 of the N-back barrier layer near the channel layer 12 is Al. x Ga 1-xRegarding the aluminum composition at the interface between the N-back barrier layer and the channel layer 12, if the thickness T of the channel layer 12 is less than 5*Q1 nm, alloy scattering in the back barrier layer 11 will reduce the mobility of the 2DEG. If the thickness T of the channel layer 12 is greater than 50*Q1 nm, two-dimensional holes will be generated at the interface between the channel layer 12 and the back barrier layer 11, resulting in a parasitic channel that makes it difficult for the semiconductor device to turn off. Therefore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention, by setting the thickness T of the channel layer 12 to satisfy 5*Q1 nm ≤ T ≤ 50*Q1 nm, ensures the mobility of the 2DEG while avoiding the generation of two-dimensional holes at the interface between the channel layer 12 and the back barrier layer 11, thereby avoiding the formation of parasitic channels and ensuring the normal operation of the semiconductor device.

[0097] In other embodiments, the back barrier layer 11 may include In x Ga 1-x N-back barrier layer, In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer 12 is Q2, where 5*Q2 nm≤T≤50*Q2 nm.

[0098] Among them, In x Ga 1-x The indium composition Q2 of the N-back barrier layer near the channel layer 12 is In. x Ga 1-x Regarding the indium composition at the interface between the N-back barrier layer and the channel layer 12, if the thickness T of the channel layer 12 is less than 5*Q² nm, alloy scattering in the back barrier layer 11 will reduce the mobility of the 2DEG. If the thickness T of the channel layer 12 is greater than 50*Q² nm, two-dimensional holes will be generated at the interface between the channel layer 12 and the back barrier layer 11, resulting in a parasitic channel that makes it difficult for the semiconductor device to be turned off. Therefore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention, by setting the thickness T of the channel layer 12 to satisfy 5*Q² nm ≤ T ≤ 50*Q² nm, ensures the mobility of the 2DEG while avoiding the generation of two-dimensional holes at the interface between the channel layer 12 and the back barrier layer 11, thereby avoiding the formation of parasitic channels and ensuring the normal operation of the semiconductor device.

[0099] Figure 9 This is a schematic diagram of the structure of another semiconductor device provided in an embodiment of the present invention, such as... Figure 9 As shown, optionally, the epitaxial structure of the semiconductor device provided in the embodiment of the present invention further includes an insertion layer 14, which is located on the side of the channel layer 12 near the barrier layer 13, and the material of the insertion layer 14 includes nitride.

[0100] Specifically, such as Figure 9As shown, an insertion layer 14 is disposed between the channel layer 12 and the barrier layer 13. The material of the insertion layer 14 includes nitrides, such as aluminum nitride (AlN), indium nitride (InN), or at least one other semiconductor material. By disposing of the insertion layer 14 between the channel layer 12 and the barrier layer 13, the mobility of the 2DEG can be improved, resulting in a faster response of the semiconductor device and thus a higher operating frequency.

[0101] Continue to refer to Figure 9 Optionally, the thickness of the insertion layer 14 is E, where 0 < E ≤ 1 nm.

[0102] If the thickness of the insertion layer 14 is too large, it will affect the growth of the barrier layer 13. Therefore, the epitaxial structure of the semiconductor device provided in this embodiment of the invention sets the thickness E of the insertion layer 14 to satisfy 0 < E ≤ 1 nm, thereby avoiding the influence of the insertion layer 14 on the growth of the barrier layer 13.

[0103] Continue to refer to Figure 1 Optionally, the semiconductor device provided in this embodiment of the invention further includes a nucleation layer 19, which is located on the side of the substrate 10 near the back barrier layer 11. The nucleation layer 19 varies with different substrate materials and is used to influence parameters such as crystal quality, surface morphology, and electrical properties of the heterojunction structure. It mainly plays the role of matching the substrate material and the semiconductor material layer in the heterojunction structure, thereby ensuring the crystal quality of the heterojunction structure, reducing surface morphology defects, and effectively improving the electrical performance stability of the semiconductor device.

[0104] Optionally, the nucleation layer 19 may include at least one of gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or other semiconductor materials, and the embodiments of the present invention are not limited thereto.

[0105] In other embodiments, those skilled in the art can also set the thickness of each layer in the semiconductor structure according to actual needs, and the embodiments of the present invention do not limit this.

[0106] For example, such as Figure 1 As shown, optionally, the thickness of the barrier layer 13 is G, where 10nm≤G≤50nm.

[0107] If the thickness G of the barrier layer 13 is too large, it is easy to cause cracks in the barrier layer 13; if the thickness G of the barrier layer 13 is too small, it will reduce the concentration of 2DEG. Therefore, the thickness G of the barrier layer 13 can be set to satisfy 10nm≤G≤50nm to increase the concentration of 2DEG while avoiding cracks on the surface of the barrier layer 13.

[0108] It should be understood that the embodiments of the present invention address the problem of easy leakage of two-dimensional electron gas into the buffer layer from the perspective of epitaxial structure design of semiconductor devices, thereby increasing the confinement capability of 2DEG and improving the breakdown voltage of semiconductor devices. The semiconductor devices include, but are not limited to: high-power gallium nitride high electron mobility transistors (HEMTs) operating under high voltage and high current environments; silicon-on-insulator (SOI) transistors; gallium arsenide (GaAs)-based transistors; and metal-oxide-semiconductor field-effect transistors (MOSFETs), metal-insulator field-effect transistors (MISFETs), double heterojunction field-effect transistors (DHFETs), junction field-effect transistors (JFETs), metal-semiconductor field-effect transistors (MESFETs), and metal-insulator heterojunction field-effect transistors (MESFETs). Transistor (MISHFET) or other field-effect transistors.

[0109] Specific embodiments of the epitaxial structure of the semiconductor device applicable to the above embodiments are further described below with reference to the accompanying drawings.

[0110] Example 1

[0111] Figure 10 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention, as shown below. Figure 10 As shown, by way of example, the epitaxial structure of the semiconductor device provided in the embodiment of the present invention includes a substrate 10, and a nucleation layer 19, a back barrier layer 11, a channel layer 12, an insertion layer 14 and a barrier layer 13 sequentially located on one side of the substrate 10.

[0112] Among them, such as Figure 10As shown, the thickness of the nucleation layer 19 is 100 nm. The nucleation layer 19 varies with different substrate materials and is used to influence parameters such as crystal quality, surface morphology and electrical properties of the heterojunction structure. It mainly plays the role of matching the substrate material and the semiconductor material layer in the heterojunction structure, thereby ensuring the crystal quality of the heterojunction structure, reducing surface morphology defects, and effectively improving the electrical performance stability of semiconductor devices.

[0113] Continue to refer to Figure 10 The back barrier layer 11 includes a first sub-back barrier layer 111 and a second sub-back barrier layer 112. The second sub-back barrier layer 112 is located on the side of the first sub-back barrier layer 111 away from the substrate 10. The first sub-back barrier layer 111 includes Al y Ga 1-y N-type back barrier layer, Al y Ga 1-y The thickness of the N-sub-back barrier layer is 1000 nm. The aluminum composition of the first sub-back barrier layer 111 remains constant along the first direction X, and y = 15%. The second sub-back barrier layer 112 includes Al. z Ga 1-z N-type back barrier layer, Al z Ga 1-z The thickness of the N-sub back barrier layer is 1000 nm. The aluminum composition of the first sub back barrier layer 111 gradually decreases along the first direction X. For example, along the first direction X, the aluminum composition of the first sub back barrier layer 111 decreases from 15% to 5%.

[0114] Continue to refer to Figure 10 The channel layer 12 is made of gallium nitride (GaN) and has a thickness of 50 nm. The barrier layer 13 is made of aluminum gallium nitride (AlGaN) and has a thickness of 25 nm. The channel layer 12 and the barrier layer 13 form a semiconductor heterojunction structure. A high-concentration two-dimensional electron gas (2DEG) is formed at the interface between the channel layer 12 and the barrier layer 13. The channel layer 12 is used to provide a channel for the movement of the two-dimensional electron gas.

[0115] Continue to refer to Figure 10 The material of the insertion layer 14 includes aluminum nitride (AlN), and the thickness of the insertion layer 14 is 1 nm. By placing the insertion layer 14 between the channel layer 12 and the barrier layer 13, the mobility of 2DEG can be improved, making the semiconductor device respond faster and thus have a higher operating frequency.

[0116] Example 2

[0117] Figure 11 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention, as shown below. Figure 11As shown, by way of example, the epitaxial structure of the semiconductor device provided in the embodiment of the present invention includes a substrate 10, and a nucleation layer 19, a buffer layer 20, a back barrier layer 11, a channel layer 12, an insertion layer 14 and a barrier layer 13 sequentially located on one side of the substrate 10.

[0118] Among them, such as Figure 11 As shown, the thickness of the nucleation layer 19 is 100 nm. The nucleation layer 19 varies with different substrate materials and is used to influence parameters such as crystal quality, surface morphology and electrical properties of the heterojunction structure. It mainly plays the role of matching the substrate material and the semiconductor material layer in the heterojunction structure, thereby ensuring the crystal quality of the heterojunction structure, reducing surface morphology defects, and effectively improving the electrical performance stability of semiconductor devices.

[0119] Continue to refer to Figure 11 The material of the buffer layer 20 includes gallium nitride (GaN), and the thickness of the buffer layer 20 is 2000 nm. By setting the buffer layer 20, the lattice mismatch between the substrate 10 and the channel layer 12 can be reduced, thereby improving the lattice quality of the channel layer 12.

[0120] Continue to refer to Figure 11 The back barrier layer 11 includes In x Ga 1-x N-back barrier layer, In x Ga 1-x The thickness of the N-back barrier layer is 5 nm, In x Ga 1-x The indium composition of the N-back barrier layer remains constant along the first direction X, and x = 10%. The channel layer 12 is made of gallium nitride (GaN) and has a thickness of 50 nm. The barrier layer 13 is made of aluminum gallium nitride (AlGaN) and has a thickness of 25 nm. The channel layer 12 and the barrier layer 13 form a semiconductor heterojunction structure. A high-concentration two-dimensional electron gas (2DEG) is formed at the interface between the channel layer 12 and the barrier layer 13, and the channel layer 12 is used to provide a channel for the movement of the two-dimensional electron gas.

[0121] Continue to refer to Figure 11 The material of the insertion layer 14 includes aluminum nitride (AlN), and the thickness of the insertion layer 14 is 1 nm. By placing the insertion layer 14 between the channel layer 12 and the barrier layer 13, the mobility of 2DEG can be improved, making the semiconductor device respond faster and thus have a higher operating frequency.

[0122] The above embodiments are merely examples. In other embodiments, those skilled in the art can set the thickness of each layer in the semiconductor structure according to actual needs, and the embodiments of the present invention do not limit this.

[0123] Based on the same inventive concept, this embodiment of the invention also provides a semiconductor device, including the epitaxial structure of any of the semiconductor devices provided in the above embodiments. Therefore, the semiconductor device provided in this embodiment of the invention has the technical effects of the technical solutions in any of the above embodiments. The explanations of the same or corresponding structures and terms as those in the above embodiments will not be repeated here.

[0124] Figure 12 A schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention is shown below. Figure 12 As shown, optionally, the epitaxial structure of the semiconductor device further includes a cap layer 15, which is located on the side of the barrier layer 13 away from the substrate 10. The semiconductor device provided in this embodiment of the invention also includes a gate 16, a source 17, and a drain 18, all of which are located on the side of the cap layer 15 away from the substrate 10, and the gate 16 is located between the source 17 and the drain 18.

[0125] Specifically, the cap layer 15 is used to passivate the surface of the barrier layer 13, reduce the gate current, and make metal / semiconductor ohmic contacts easier. The cap layer 15 can be made of any material such as gallium nitride (GaN) that can achieve the above functions, and those skilled in the art can set it according to actual needs.

[0126] Continue to refer to Figure 12 Optionally, the cap layer 15 has a thickness of F, where 1nm≤F≤10nm.

[0127] In other embodiments, those skilled in the art can set the thickness of the cap layer 15 according to actual needs, and the embodiments of the present invention do not limit this.

[0128] Continue to refer to Figure 12 A gate 16, a source 17, and a drain 18 are disposed on the side of the cap layer 15 away from the substrate 10, and the gate 16 is located between the source 17 and the drain 18. Optionally, the source 17 and the drain 18 form an ohmic contact with the barrier layer 13, and the gate 16 forms a Schottky contact with the barrier layer 13.

[0129] The source electrode 17 and drain electrode 18 may be made of one or more metals such as nickel (Ni), titanium (Ti), aluminum (Al), and gold (Au), and the gate electrode 16 may be made of one or more metals such as nickel (Ni), platinum (Pt), lead (Pb), and gold (Au).

[0130] In other embodiments, the cap layer 15 may be omitted, and the gate 16, source 17 and drain 18 may be directly disposed on the side of the barrier layer 13 away from the substrate 10. Those skilled in the art can make such a configuration according to actual needs, and the embodiments of the present invention do not limit this.

[0131] Based on the same inventive concept, embodiments of the present invention also provide a method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure of any of the semiconductor devices provided in the above embodiments. Explanations of structures and terms identical or corresponding to those in the above embodiments will not be repeated here. Figure 13 This is a schematic flowchart of a method for fabricating an epitaxial structure of a semiconductor device according to an embodiment of the present invention, as shown below. Figure 13 As shown, the method includes the following steps:

[0132] Step 110: Provide a substrate.

[0133] For example, the substrate material can be one or more of the following: sapphire, silicon (Si), silicon-on-insulator (SOI), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), lithium niobate (LiNbO3), rare earth oxides, or any other material capable of growing nitrides. The substrate can be prepared by methods such as atmospheric pressure chemical vapor deposition, sub-atmospheric pressure chemical vapor deposition, organometallic chemical vapor deposition, low-pressure chemical vapor deposition, high-density plasma chemical vapor deposition, ultra-high vacuum chemical vapor deposition, plasma-enhanced chemical vapor deposition, catalytic chemical vapor deposition, hybrid physical-chemical vapor deposition, rapid thermochemical vapor deposition, vapor phase epitaxy, pulsed laser deposition, atomic layer epitaxy, molecular beam epitaxy, sputtering, or evaporation.

[0134] Step 120: Sequentially fabricate a back barrier layer, a channel layer, and a barrier layer on one side of the substrate, wherein a two-dimensional electron gas is formed between the barrier layer and the channel layer, and the back barrier layer comprises Al. x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer.

[0135] The channel layer is fabricated using nitrides. For example, the channel layer may be fabricated using at least one of gallium nitride (GaN), aluminum nitride (AlN), indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), or other semiconductor materials.

[0136] The material of the barrier layer can be any semiconductor material capable of forming a heterojunction structure with the channel layer, including ternary nitrides, etc. For example, the barrier layer may include at least one of indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), or other semiconductor materials.

[0137] A back barrier layer is fabricated on one side of a substrate, and the back barrier layer includes Al. x Ga 1-x N-back barrier layer, or, back barrier layer including In x Ga 1-x The N-back barrier layer can raise the conduction band on one side of the back barrier layer, thereby increasing the barrier on one side of the back barrier layer 11, increasing the confinement capability of the 2DEG, making it less likely for the 2DEG to leak into the back barrier layer 11, thereby reducing the leakage current of the back barrier layer 11 and increasing the breakdown voltage of the semiconductor device.

[0138] Based on the same inventive concept, this invention also provides a method for fabricating a semiconductor device. Explanations of structures and terms identical or corresponding to those in the above embodiments will not be repeated here. Figure 14 This is a schematic flowchart of a method for fabricating a semiconductor device according to an embodiment of the present invention, as shown below. Figure 14 As shown, the method includes the following steps:

[0139] Step 210, provide a substrate.

[0140] The substrate can be one or more of the following materials: sapphire, silicon (Si), silicon-on-insulator (SOI), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), lithium niobate (LiNbO3), rare earth oxides, or any other material capable of growing nitrides.

[0141] Step 220: A nucleation layer is formed on one side of the substrate.

[0142] The nucleation layer may include at least one of gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or other semiconductor materials.

[0143] Step 230: A back barrier layer is formed on the side of the nucleation layer away from the substrate, the back barrier layer comprising Al x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer.

[0144] Among them, Al x Ga 1-x N (aluminum gallium nitride) and In x Ga 1-x N (indium gallium nitride) can raise the conduction band on one side of the back barrier layer.

[0145] Step 240: A channel layer is formed on the side of the back barrier layer away from the substrate.

[0146] The channel layer is fabricated using nitrides. For example, the channel layer may be fabricated using at least one of gallium nitride (GaN), aluminum nitride (AlN), indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), or other semiconductor materials.

[0147] Step 250: An insertion layer is formed on the side of the channel layer away from the back barrier layer.

[0148] The material of the insertion layer includes at least one of aluminum nitride (AlN), indium nitride (InN), or other semiconductor materials.

[0149] Step 260: A barrier layer is formed on the side of the insertion layer away from the back barrier layer.

[0150] The material of the barrier layer can be any semiconductor material capable of forming a heterojunction structure with the channel layer 12, including ternary nitrides, etc. For example, the barrier layer may include at least one of indium aluminum nitride (InAlN), aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), or other semiconductor materials.

[0151] Optionally, continue to refer to Figure 14 After the barrier layer is formed on the side of the insertion layer away from the back barrier layer, the method further includes:

[0152] Step 270: A cap layer is formed on the side of the barrier layer away from the channel layer.

[0153] The cap layer can be made of materials such as gallium nitride (GaN).

[0154] Step 280: Form the source, gate, and drain on the side of the cap layer away from the channel layer.

[0155] The source and drain electrodes may be made of one or more metals such as nickel (Ni), titanium (Ti), aluminum (Al), and gold (Au), while the gate electrode may be made of one or more metals such as nickel (Ni), platinum (Pt), lead (Pb), and gold (Au).

[0156] In summary, the semiconductor device fabrication method provided by the embodiments of the present invention involves fabricating a back barrier layer on one side of a substrate, and setting the back barrier layer to include Al. x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-xThe N-back barrier layer raises the conduction band on one side of the back barrier layer, thereby increasing the barrier on the other side of the back barrier layer, increasing the confinement capability of 2DEG, making it less likely for high-concentration 2DEG to leak into the back barrier layer, thereby reducing the leakage current of the back barrier layer and increasing the breakdown voltage of the semiconductor device.

[0157] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. An epitaxial structure for a semiconductor device, characterized in that, include: Substrate; A back barrier layer, a channel layer, and a barrier layer are sequentially located on one side of the substrate, with a two-dimensional electron gas formed between the barrier layer and the channel layer; the thickness of the channel layer is T. The back barrier layer includes Al x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer; the back barrier layer includes at least two sub-back barrier layers, the sub-back barrier layer includes a first sub-back barrier layer and a second sub-back barrier layer, the second sub-back barrier layer is located on the side of the first sub-back barrier layer away from the substrate; The first sub-back barrier layer includes Al y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes Al z Ga 1-z N-sub-back barrier layers, wherein the aluminum composition of the first sub-back barrier layer gradually decreases along a first direction, and the aluminum composition of the second sub-back barrier layer also gradually decreases along a first direction; the Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer is Q1, and T is positively correlated with Q1. Alternatively, the first sub-back barrier layer includes In y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes In z Ga 1-z N-sub-back barrier layers, wherein the indium composition of the first sub-back barrier layer gradually decreases along a first direction, and the indium composition of the second sub-back barrier layer also gradually decreases along a first direction; the In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer is Q2, and T is positively correlated with Q2. Wherein, the first direction is the direction in which the substrate points to the channel layer.

2. The epitaxial structure of the semiconductor device according to claim 1, characterized in that, The back barrier layer includes Al x Ga 1-x N-back barrier layer, wherein the aluminum composition of the back barrier layer gradually decreases along the first direction; Alternatively, the back barrier layer includes In x Ga 1-x N-back barrier layer, wherein the indium composition of the back barrier layer gradually decreases along the first direction; Wherein, the first direction is the direction in which the substrate points to the channel layer.

3. The epitaxial structure of the semiconductor device according to claim 1, characterized in that, The back barrier layer includes at least one sub-back barrier layer; The subback barrier layer near the channel layer includes Al p Ga 1-p N-sub-back barrier layer, or, the sub-back barrier layer near the side of the channel layer includes In. p Ga 1-p N-type back barrier layer, where 1%≤p≤10%.

4. The epitaxial structure of the semiconductor device according to claim 1, characterized in that, 0 < z < y ≤ 30%.

5. The epitaxial structure of the semiconductor device according to claim 1, characterized in that, The thickness of the back barrier layer is D, where 0 μm < D ≤ 5 μm.

6. The epitaxial structure of the semiconductor device according to claim 1, characterized in that, The thickness of the channel layer is T; The back barrier layer includes Al x Ga 1-x N-back barrier layer, the Al x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer is Q1, where 5×Q1 nm≤T≤50×Q1 nm; Alternatively, the back barrier layer includes In x Ga 1-x N-back barrier layer, the In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer is Q2, wherein 5×Q2 nm≤T≤50×Q2 nm.

7. A semiconductor device, characterized in that, The epitaxial structure of the semiconductor device according to any one of claims 1-6 further includes a cap layer located on the side of the barrier layer away from the substrate; The semiconductor device further includes a gate, a source, and a drain, wherein the gate, the source, and the drain are all located on the side of the cap layer away from the substrate, and the gate is located between the source and the drain.

8. A method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure of the semiconductor device according to any one of claims 1-6, characterized in that, include: Provide substrate; A back barrier layer, a channel layer, and a barrier layer are sequentially fabricated on one side of the substrate, wherein a two-dimensional electron gas is formed between the barrier layer and the channel layer, and the back barrier layer comprises Al. x Ga 1-x N-back barrier layer, or the back barrier layer includes In x Ga 1-x N-back barrier layer; the back barrier layer includes at least two sub-back barrier layers, each sub-back barrier layer including a first sub-back barrier layer and a second sub-back barrier layer, the second sub-back barrier layer being located on the side of the first sub-back barrier layer away from the substrate; the first sub-back barrier layer includes Al y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes Al z Ga 1-z N-sub-back barrier layers, wherein the aluminum composition of the first sub-back barrier layer gradually decreases along a first direction, and the aluminum composition of the second sub-back barrier layer also gradually decreases along a first direction; the thickness of the channel layer is T, and the Al... x Ga 1-x The aluminum composition of the N-back barrier layer near the channel layer is Q1, and T is positively correlated with Q1; or, the first sub-back barrier layer includes In. y Ga 1-y N-sub-back barrier layer, the second sub-back barrier layer includes In z Ga 1-z N-sub-back barrier layers, wherein the indium composition of the first sub-back barrier layer gradually decreases along a first direction, and the indium composition of the second sub-back barrier layer also gradually decreases along a first direction; the In x Ga 1-x The indium composition of the N-back barrier layer near the channel layer is Q2, and T is positively correlated with Q2; wherein, the first direction is the direction from the substrate to the channel layer.

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