半导体结构及制备方法
By employing a gate-all-around transistor structure and a three-dimensional memory structure design in the semiconductor structure, the problem of limited storage density after the device linewidth is reduced is solved, realizing a highly integrated and high-performance memory device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-06-08
- Publication Date
- 2026-07-17
AI Technical Summary
In existing technologies, the shrinking of feature size in metal-oxide-semiconductor field-effect transistors (MOSFETs) presents challenges in terms of limited storage density and increased integration.
A three-dimensional semiconductor device is formed by using a gate-all-around (GAA) transistor structure, which involves setting multiple memory structures in a semiconductor structure, electrically connecting the memory structures to the active pillars of the source or drain regions, arranging isolation layers at intervals perpendicular to the substrate surface, and word lines surrounding the channel region.
It improves the integration density and storage capacity of memory devices, solves the leakage current, capacitance effect and short-channel effect caused by the reduction of gate pitch size, and enhances gate control performance and integration.
Smart Images
Figure CN115064494B_ABST