A forced reset device and method for external modulator bias voltage

Abstract

This invention discloses an external modulator bias voltage forced reset device. The positive voltage reset channel of the device includes a first integrator, a first comparator, a second integrator, and a second comparator connected in sequence, and the negative voltage reset channel includes a first integrator, a third comparator, a third integrator, and a fourth comparator connected in sequence. The operational amplifier chips used in the first integrator, first comparator, second integrator, second comparator, third comparator, third integrator, and fourth comparator are all dual rail-to-rail operational amplifiers, and each operational amplifier chip contains two sets of operational amplifiers. Pin 1 of the first operational amplifier U1A in the first integrator is simultaneously connected to the first comparator, the third comparator, and the external modulator bias BIAS interface. This invention also discloses a reset method for the external modulator bias voltage forced reset device. This device has a simple architecture, low cost, and no electromagnetic interference from frequency sources. This method is simple and practical.

Description

Technical Field

[0001] This invention relates to the field of radio frequency fiber optic transmission technology, specifically to an external modulator bias voltage forced reset device and reset method. Background Technology

[0002] With the development of analog signal fiber optic transmission technology, the frequency of transmitted signals is getting higher and higher. The frequency currently used has reached the Ka band. In these frequency bands, the commonly used electro-optic modulation device is the intensity external modulator. The bias point of the intensity modulator changes continuously with temperature. Therefore, it is necessary to control the bias voltage of the external modulator. An important function of the external modulator bias voltage control system is to force the bias voltage to reset, prevent the bias voltage from drifting out of the system's maximum and minimum control voltage range, and ensure the stable operation of the system.

[0003] Currently, the most common reset method involves a microcontroller monitoring the bias voltage. When the voltage exceeds the maximum bias range provided by the system, a forced reset command is sent to the system to reset the bias voltage. The biggest drawback of this method is the complexity of the microcontroller and its peripheral circuits, which hinders miniaturization and integration. Furthermore, the microcontroller requires a crystal oscillator to provide a frequency source, making it difficult to eliminate the introduced frequency signals, which can interfere with the signals to be transmitted. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of existing technologies by providing an external modulator bias voltage forced reset device and reset method. This device has a simple architecture, low cost, and no electromagnetic interference from frequency sources; the method is simple and practical.

[0005] The technical solution to achieve the objective of this invention is: An external modulator bias voltage forced reset device is characterized in that the positive voltage reset channel of the device includes a first integrator, a first comparator, a second integrator, and a second comparator connected in sequence, and the negative voltage reset channel includes a first integrator, a third comparator, a third integrator, and a fourth comparator connected in sequence. The operational amplifier chips used in the first integrator, first comparator, second integrator, second comparator, third comparator, third integrator, and fourth comparator are all dual rail-to-rail operational amplifiers, and each operational amplifier chip contains two sets of operational amplifiers. Pin 1 of the first operational amplifier U1A in the first integrator is simultaneously connected to the first comparator, the third comparator, and the external modulator bias BIAS interface.

[0006] The first integrator includes a first operational amplifier U1A and a resistor R. 10 And capacitor C3, wherein pin 8 of the first operational amplifier U1A is connected to +NS and pin 4 is connected to -NS, capacitor C3 and resistor R 10One end is connected in parallel, and the parallel end is connected to pin 2 of the first operational amplifier U1A. Pin 1 of the first operational amplifier U1A is connected to the other end of capacitor C3. Pin 3 of the first operational amplifier U1A is grounded. Pin 1 of the first operational amplifier U1A is connected to an external modulator. The capacitance of capacitor C3 is 10μF, and the resistor R... 10 The resistance is 51kΩ.

[0007] The first comparator includes a second operational amplifier U2A, a diode D1, and resistors R1, R5, R8, and R9. Pin 8 of the second operational amplifier U2A is connected to +5V, and pin 4 is connected to -5V. Resistors R1 and R8 are connected in parallel, with the parallel connection end connected to one end of resistor R5. The other end of resistor R1 is connected to the +5V power supply. The other end of resistor R8 is grounded. The other end of resistor R5 is connected to pin 2 of the second operational amplifier U2A. Pin 3 of the second operational amplifier U2A is connected to one end of resistor R9. The other end of resistor R9 is connected to pin 1 of the first operational amplifier U1A in the first integrator. Pin 1 of the second operational amplifier U2A is connected to the anode of the first diode D1. The resistance values ​​of resistors R1, R5, and R8 are 100Ω, 10kΩ, and 1kΩ, respectively. The first diode D1 is a 1N4148.

[0008] The second integrator includes a third operational amplifier U3A, resistors R4 and R6, and capacitors C1 and C2. Pin 8 of the third operational amplifier U3A is grounded, and pin 4 is connected to -5V. Resistor R6 is connected in parallel with one end of capacitor C1, and the parallel connection is connected to pin 2 of the third operational amplifier U3A. The other end of capacitor C1 is connected to pin 1 of the third operational amplifier U3A. Resistor R4 is connected in parallel with one end of capacitor C2, and the parallel connection is connected to the other end of R6 and the negative terminal of the first diode D1 of the first comparator. The other end of resistor R4 is connected to the -5V power supply, and the other end of capacitor C2 is grounded. The resistance of resistor R4 is 100kΩ, the resistance of R6 is 1kΩ, the capacitance of capacitor C1 is 100μF, and the capacitance of capacitor C2 is 10μF.

[0009] The second comparator includes a fourth operational amplifier U4A, resistors R2, R3, and R7. Pin 8 of the fourth operational amplifier U4A is connected to +5V, and pin 4 is grounded. Resistors R2 and R3 are connected in parallel, and their parallel terminals are connected to pin 2 of the fourth operational amplifier U4A. The other end of resistor R2 is connected to a -5V power supply, and the other end of resistor R3 is grounded. Pin 3 of the fourth operational amplifier U4A is connected to one end of resistor R7, and the other end of resistor R7 is connected to pin 1 of the third operational amplifier U3A in the second integrator. Pin 1 of the fourth operational amplifier U4A is connected to pin 8 of the first operational amplifier U1A in the first integrator. The resistance values ​​of resistors R2, R3, and R7 are all 10kΩ.

[0010] The third comparator includes a fifth operational amplifier U2B, a diode D2, and a resistor R. 11 R 12 R 16 and R 19 In this configuration, pin 8 of the fifth operational amplifier U2B is connected to +5V, pin 4 is connected to -5V, and resistor R... 11 R 19 Parallel connection, with the parallel terminals connected to resistor R. 16 One end is connected to resistor R 11 The other end is connected to a -5V power supply, resistor R 19 The other end is grounded, resistor R 16 The other end is connected to pin 6 of the fifth operational amplifier U2B, and pin 5 of the fifth operational amplifier U2B is connected to resistor R. 12 One end is connected to resistor R 12 The other end is connected to pin 1 of the first operational amplifier U1A in the first integrator, and pin 7 of the fifth operational amplifier U2B is connected to the cathode of diode D2. Resistor R 11 The resistance value is 100Ω, resistor R 12 and resistor R 16 The resistance value is 10kΩ, resistor R 19 The resistance is 1kΩ.

[0011] The third integrator includes a sixth operational amplifier U4B and a resistor R. 15 and R 17 Capacitors C4 and C5, where pin 8 of the sixth operational amplifier U4B is +5V and pin 4 is grounded, and resistor R... 17 One end of capacitor C4 is connected in parallel to pin 6 of the sixth operational amplifier U4B, and the other end of capacitor C4 is connected to pin 7 of the sixth operational amplifier U4B. Resistor R... 15 Connected in parallel with one end of capacitor C5, and the parallel terminal is connected to R. 17 The other end is connected to the positive terminal of the second diode D2 of the third comparator, and resistor R 15 The other end is connected to a +5V power supply, resistor R 15 The resistance value is 100kΩ, resistor R 17 The resistance is 1kΩ, the capacitance of capacitor C4 is 100μF, and the capacitance of capacitor C5 is 10μF.

[0012] The fourth comparator includes a seventh operational amplifier U3B and a resistor R. 13 R 14 R 18 In this configuration, pin 8 of the seventh operational amplifier U3B is grounded, pin 4 is connected to -5V, and resistor R... 13 R 14The parallel connection is simultaneously connected to pin 6 of the seventh operational amplifier U3B, and resistor R... 13 The other end is connected to a +5V power supply, resistor R 14 The other end is grounded, and pin 5 of the seventh operational amplifier U3B is connected to resistor R. 14 One end is connected to resistor R 14 The other end is connected to pin 7 of the sixth operational amplifier U4B in the third integrator, and pin 7 of the seventh operational amplifier U3B is connected to pin 4 of the first operational amplifier U1A in the first integrator. Resistor R 13 R 14 R 18 The resistance of each is 10kΩ.

[0013] A method for forcibly resetting the bias voltage of an external modulator, comprising the aforementioned device for forcibly resetting the bias voltage of an external modulator, the method comprising the following steps: 1) The external modulator bias voltage forced reset device receives the status signal DT, integrates the status signal DT, and outputs the integrated voltage in three ports, which are respectively given to the positive voltage reset channel and connected to the first comparator, the external modulator bias control, and the negative voltage reset channel and connected to the third comparator. 2) The voltage across resistor R8 is approximately 4.55V. The first comparator determines whether the first integrating output voltage is greater than 4.55V. When the integrating voltage is greater than 4.55V, the second operational amplifier U2A outputs +5V. Since the diode voltage difference is 0.7V, the first comparator outputs +4.3V. When the integrator voltage is less than 4.55V, the second operational amplifier U2A outputs -5V. Because the first comparator has a voltage output when the forward voltage of diode D1 is greater than +0.7V, the first comparator and the second integrator are effectively disconnected at this time. 3) The second integrator integrates the output voltage of the first comparator. When the first comparator outputs a high level of +4.3V, the second integrator begins to integrate, meaning its output voltage begins to decrease. Since the voltage across resistor R3 is approximately -2.5V, when the second integrator's output voltage is less than -2.5V, the second comparator's output level +NS is 0V. When the first comparator has no output voltage, the second integrator's input is -5V due to the pull-down resistor R4. At this time, the second integrator integrates -5V, meaning its output voltage begins to increase. When the second integrator's output voltage is greater than -2.5V, the second comparator's output level +NS is +5V. 4) Resistor R 19The voltage at the top is approximately -4.55V. The third comparator determines whether the first integral output voltage is less than -4.55V. When the second integral voltage is less than -4.55V, the second operational amplifier U2B outputs a level of -5V. Since the voltage difference between the diodes is 0.7V, the third comparator outputs a level of -4.3V. When the second integral voltage is greater than -4.55V, the second operational amplifier U2B outputs a level of +5V. Because the third comparator has a voltage output when the reverse voltage of diode D2 is less than -0.7V, the third comparator and the third integrator are effectively disconnected at this time. 5) The third comparator has two output states. The first state is -4.3V, and the second state is a high-impedance disconnected state with no voltage output. In the first state, when the third comparator outputs -4.3V, the third integrator begins to integrate, and its output voltage begins to increase. When the third integrator output voltage is greater than +2.5V, the fourth comparator output level -NS is 0V. In the second state, when the third comparator has no voltage output, due to the pull-up resistor R15 of the second comparator, the input of the second integrator is +5V. At this time, the third integrator integrates +5V, and its output voltage begins to decrease. When the third integrator output voltage is less than +2.5V, the fourth comparator output level -NS is -5V. 6) The power supply terminals 8 and 4 of the operational amplifier in the first integrator are powered by the output terminals of the second and fourth comparators, respectively. When the output voltage V of the first integrator... b Satisfying -4.55V < V b When the voltage is < +4.55V, the output voltage of the second comparator (+NS) is +5V, and the output voltage of the fourth comparator (-NS) is -5V. At this time, the first integrator operates normally and does not perform the reset function. When the output voltage of the first integrator V... b Satisfy V b When the voltage is greater than +4.55V, the output voltage +NS of the second comparator is 0V. At this time, the maximum voltage at the +NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0; when the output voltage V of the first integrator is... b Satisfy V b When the voltage is less than -4.55V, the output voltage of the fourth comparator, -NS, is 0V. At this time, the minimum voltage at the -NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0.

[0014] Compared with existing technologies, this technical solution has the following characteristics: 1. All chips are operational amplifiers, small in size and easy to integrate; 2. The circuit contains no frequency source and has no interference signals.

[0015] This device has a simple structure, low cost, and no electromagnetic interference from frequency sources, making this method simple and practical. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of an embodiment. Detailed Implementation

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments, but this is not intended to limit the scope of the invention.

[0018] Example: Reference Figure 1 An external modulator bias voltage forced reset device is characterized in that the positive voltage reset channel of the device includes a first integrator, a first comparator, a second integrator, and a second comparator connected in sequence, and the negative voltage reset channel includes a first integrator, a third comparator, a third integrator, and a fourth comparator connected in sequence. The operational amplifier chips used in the first integrator, the first comparator, the second integrator, the second comparator, the third comparator, the third integrator, and the fourth comparator are all dual rail-to-rail operational amplifiers, and each operational amplifier chip contains two sets of operational amplifiers. Pin 1 of the first operational amplifier U1A in the first integrator is simultaneously connected to the first comparator, the third comparator, and the external modulator bias BIAS interface.

[0019] The first integrator includes a first operational amplifier U1A and a resistor R. 10 And capacitor C3, wherein pin 8 of the first operational amplifier U1A is connected to +NS and pin 4 is connected to -NS, capacitor C3 and resistor R 10 One end is connected in parallel, and the parallel end is connected to pin 2 of the first operational amplifier U1A. Pin 1 of the first operational amplifier U1A is connected to the other end of capacitor C3. Pin 3 of the first operational amplifier U1A is grounded. Pin 1 of the first operational amplifier U1A is connected to an external modulator. The capacitance of capacitor C3 is 10μF, and the resistor R... 10 The resistance is 51kΩ.

[0020] The first comparator includes a second operational amplifier U2A, a diode D1, and resistors R1, R5, R8, and R9. Pin 8 of the second operational amplifier U2A is connected to +5V, and pin 4 is connected to -5V. Resistors R1 and R8 are connected in parallel, with the parallel connection end connected to one end of resistor R5. The other end of resistor R1 is connected to the +5V power supply. The other end of resistor R8 is grounded. The other end of resistor R5 is connected to pin 2 of the second operational amplifier U2A. Pin 3 of the second operational amplifier U2A is connected to one end of resistor R9. The other end of resistor R9 is connected to pin 1 of the first operational amplifier U1A in the first integrator. Pin 1 of the second operational amplifier U2A is connected to the anode of the first diode D1. The resistance values ​​of resistors R1, R5, and R8 are 100Ω, and the diode is a 1N4148.

[0021] The second integrator includes a third operational amplifier U3A, resistors R4 and R6, and capacitors C1 and C2. Pin 8 of the third operational amplifier U3A is grounded, and pin 4 is connected to -5V. Resistor R6 is connected in parallel with one end of capacitor C1, and the parallel connection is connected to pin 2 of the third operational amplifier U3A. The other end of capacitor C1 is connected to pin 1 of the third operational amplifier U3A. Resistor R4 is connected in parallel with one end of capacitor C2, and the parallel connection is connected to the other end of R6 and the negative terminal of the first diode D1 of the first comparator. The other end of resistor R4 is connected to the -5V power supply, and the other end of capacitor C2 is grounded. The resistance of resistor R4 is 100kΩ, the resistance of R6 is 1kΩ, the capacitance of capacitor C1 is 100μF, and the capacitance of capacitor C2 is 10μF.

[0022] The second comparator includes a fourth operational amplifier U4A, resistors R2, R3, and R7. Pin 8 of the fourth operational amplifier U4A is connected to +5V, and pin 4 is grounded. Resistors R2 and R3 are connected in parallel, and their parallel terminals are connected to pin 2 of the fourth operational amplifier U4A. The other end of resistor R2 is connected to a -5V power supply, and the other end of resistor R3 is grounded. Pin 3 of the fourth operational amplifier U4A is connected to one end of resistor R7, and the other end of resistor R7 is connected to pin 1 of the third operational amplifier U3A in the second integrator. Pin 1 of the fourth operational amplifier U4A is connected to pin 8 of the first operational amplifier U1A in the first integrator. The resistance values ​​of resistors R2, R3, and R7 are all 10kΩ.

[0023] The third comparator includes a fifth operational amplifier U2B, a diode D2, and a resistor R. 11 R 12 R 16 and R 19 In this configuration, pin 8 of the fifth operational amplifier U2B is connected to +5V, pin 4 is connected to -5V, and resistor R... 11 R 19Parallel connection, with the parallel terminals connected to resistor R. 16 One end is connected to resistor R 11 The other end is connected to a -5V power supply, resistor R 19 The other end is grounded, resistor R 16 The other end is connected to pin 6 of the fifth operational amplifier U2B, and pin 5 of the fifth operational amplifier U2B is connected to resistor R. 12 One end is connected to resistor R 12 The other end is connected to pin 1 of the first operational amplifier U1A in the first integrator, and pin 7 of the fifth operational amplifier U2B is connected to the cathode of diode D2. Resistor R 11 The resistance value is 100Ω, resistor R 12 and resistor R 16 The resistance value is 10kΩ, resistor R 19 The resistance is 1kΩ.

[0024] The third integrator includes a sixth operational amplifier U4B and a resistor R. 15 and R 17 Capacitors C4 and C5, where pin 8 of the sixth operational amplifier U4B is +5V and pin 4 is grounded, and resistor R... 17 One end of capacitor C4 is connected in parallel to pin 6 of the sixth operational amplifier U4B, and the other end of capacitor C4 is connected to pin 7 of the sixth operational amplifier U4B. Resistor R... 15 Connected in parallel with one end of capacitor C5, and the parallel terminal is connected to R. 17 The other end is connected to the positive terminal of the second diode D2 of the third comparator, and resistor R 15 The other end is connected to a +5V power supply, resistor R 15 The resistance value is 100kΩ, resistor R 17 The resistance is 1kΩ, the capacitance of capacitor C4 is 100μF, and the capacitance of capacitor C5 is 10μF.

[0025] The fourth comparator includes a seventh operational amplifier U3B and a resistor R. 13 R 14 R 18 In this configuration, pin 8 of the seventh operational amplifier U3B is grounded, pin 4 is connected to -5V, and resistor R... 13 R 14 The parallel connection is simultaneously connected to pin 6 of the seventh operational amplifier U3B, and resistor R... 13 The other end is connected to a +5V power supply, resistor R 14 The other end is grounded, and pin 5 of the seventh operational amplifier U3B is connected to resistor R. 14 One end is connected to resistor R 14The other end is connected to pin 7 of the sixth operational amplifier U4B in the third integrator, and pin 7 of the seventh operational amplifier U3B is connected to pin 4 of the first operational amplifier U1A in the first integrator. Resistor R 13 R 14 R 18 The resistance of each is 10kΩ.

[0026] A method for forcibly resetting the bias voltage of an external modulator, comprising the aforementioned device for forcibly resetting the bias voltage of an external modulator, the method comprising the following steps: 1) The external modulator bias voltage forced reset device receives the status signal DT, integrates the status signal DT, and outputs the integrated voltage in three ports, which are respectively given to the positive voltage reset channel and connected to the first comparator, the external modulator bias control, and the negative voltage reset channel and connected to the third comparator. 2) The voltage across resistor R8 is approximately 4.55V. The first comparator determines whether the first integrating output voltage is greater than 4.55V. When the integrating voltage is greater than 4.55V, the second operational amplifier U2A outputs +5V. Since the diode voltage difference is 0.7V, the first comparator outputs +4.3V. When the integrator voltage is less than 4.55V, the second operational amplifier U2A outputs -5V. Because the first comparator has a voltage output when the forward voltage of diode D1 is greater than +0.7V, the first comparator and the second integrator are effectively disconnected at this time. 3) The second integrator integrates the output voltage of the first comparator. When the first comparator outputs a high level of +4.3V, the second integrator begins to integrate, meaning its output voltage begins to decrease. Since the voltage across resistor R3 is approximately -2.5V, when the second integrator's output voltage is less than -2.5V, the second comparator's output level +NS is 0V. When the first comparator has no output voltage, the second integrator's input is -5V due to the pull-down resistor R4. At this time, the second integrator integrates -5V, meaning its output voltage begins to increase. When the second integrator's output voltage is greater than -2.5V, the second comparator's output level +NS is +5V. 4) Resistor R 19 The voltage at the top is approximately -4.55V. The third comparator determines whether the first integral output voltage is less than -4.55V. When the second integral voltage is less than -4.55V, the second operational amplifier U2B outputs a level of -5V. Since the voltage difference between the diodes is 0.7V, the third comparator outputs a level of -4.3V. When the second integral voltage is greater than -4.55V, the second operational amplifier U2B outputs a level of +5V. Because the third comparator has a voltage output when the reverse voltage of diode D2 is less than -0.7V, the third comparator and the third integrator are effectively disconnected at this time. 5) The third comparator has two output states. The first state is -4.3V, and the second state is a high-impedance disconnected state with no voltage output. In the first state, when the third comparator outputs -4.3V, the third integrator begins to integrate, and its output voltage begins to increase. When the third integrator output voltage is greater than +2.5V, the fourth comparator output level -NS is 0V. In the second state, when the third comparator has no voltage output, due to the pull-up resistor R15 of the second comparator, the input of the second integrator is +5V. At this time, the third integrator integrates +5V, and its output voltage begins to decrease. When the third integrator output voltage is less than +2.5V, the fourth comparator output level -NS is -5V. 6) The power supply terminals 8 and 4 of the operational amplifier in the first integrator are powered by the output terminals of the second and fourth comparators, respectively. When the output voltage V of the first integrator... b Satisfying -4.55V < V b When the voltage is < +4.55V, the output voltage of the second comparator (+NS) is +5V, and the output voltage of the fourth comparator (-NS) is -5V. At this time, the first integrator operates normally and does not perform the reset function. When the output voltage of the first integrator V... b Satisfy V b When the voltage is greater than +4.55V, the output voltage +NS of the second comparator is 0V. At this time, the maximum voltage at the +NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0; when the output voltage V of the first integrator is... b Satisfy V b When the voltage is less than -4.55V, the output voltage of the fourth comparator, -NS, is 0V. At this time, the minimum voltage at the -NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0.

[0027] In summary, in this example, when the output voltage of the first integrator, i.e., the bias voltage of the external modulator, is between -4.55V and +4.55V, the second and third integrators integrate -5V and +5V respectively. The output voltage of the second integrator is +5V, and the output voltage of the third integrator is -5V. At this time, the bias voltage output is in the non-reset region. When the output voltage of the first integrator, i.e., the bias voltage of the external modulator, is higher than the forced reset voltage +4.55V, the second integrator integrates +4.3V. When the second integrator integrates to an output voltage less than -2.5V, the device resets. When the output voltage of the first integrator, i.e., the bias voltage of the external modulator, is higher than or lower than the forced reset voltage -4.55V, the third integrator integrates -4.3V. When the third integrator integrates to an output voltage greater than +2.5V, the device resets. The reset initiation time is the time it takes for the second integrator's output voltage to integrate from +5V to -2.5V, and the time it takes for the second integrator's output voltage to integrate from -5V to +2.5V. Based on the calculations for integrator circuits in the fundamentals of analog electronics, the reset and startup time of the second integrator satisfies the following relationship: In the formula, V O V is the output voltage of the second integrator. I t1 is the input voltage of the second integrator, t2 is the start time of integration, and t2 is the end time of integration. Let V be the initial voltage of the second integrator, and according to the initial conditions, let V O -2.5V, R6 is 1000Ω, C1 is 0.0001F (100μF), V I +4.3V, t1 is 0s, Given a voltage of +5V, the integration time t2 can be calculated to be 0.174s. Therefore, when the output voltage of the first integrator meets the condition of being greater than +4.55V, the device will reset after 0.1744s. Similarly, when the output voltage of the first integrator meets the condition of being less than -4.55V, the integration time of the third integrator to the reset threshold is also 0.1744s, meaning the device will reset after 0.1744s.

[0028] In this example, the external modulator bias voltage forced reset device does not initiate forced reset when the external modulator bias voltage is between -4.55V and +4.55V; it initiates forced reset when the external modulator bias voltage is greater than +4.55V or less than -4.55V, and the external modulator bias voltage is reset to 0V after 0.1744s.

Claims

1. A device for forcibly resetting the bias voltage of an external modulator, characterized in that, The positive voltage reset channel of the device includes a first integrator, a first comparator, a second integrator, and a second comparator connected in sequence, and a negative voltage reset channel includes a first integrator, a third comparator, a third integrator, and a fourth comparator connected in sequence. The operational amplifier chips used in the first integrator, the first comparator, the second integrator, the second comparator, the third comparator, the third integrator, and the fourth comparator are all dual rail-to-rail operational amplifiers, and each operational amplifier chip contains two sets of operational amplifiers. Pin 1 of the first operational amplifier U1A in the first integrator is simultaneously connected to the first comparator, the third comparator, and the external modulator bias BIAS interface. The first integrator includes a first operational amplifier U1A and a resistor R. 10 And capacitor C3, wherein pin 8 of the first operational amplifier U1A is connected to +NS and pin 4 is connected to -NS, capacitor C3 and resistor R 10 One end is connected in parallel, and the parallel end is connected to pin 2 of the first operational amplifier U1A. Pin 1 of the first operational amplifier U1A is connected to the other end of capacitor C3. Pin 3 of the first operational amplifier U1A is grounded. Pin 1 of the first operational amplifier U1A is connected to an external modulator. The capacitance of capacitor C3 is 10μF, and the resistor R... 10 The resistance is 51kΩ; Pin 1 of the fourth operational amplifier U4A is connected to pin 8 of the first operational amplifier U1A of the first integrator, and pin 7 of the seventh operational amplifier U3B is connected to pin 4 of the first operational amplifier U1A of the first integrator. When the output voltage V of the first integrator b Satisfying -4.55V < V b When the voltage is < +4.55V, the output voltage of the second comparator (+NS) is +5V, and the output voltage of the fourth comparator (-NS) is -5V. At this time, the first integrator operates normally and does not perform the reset function. When the output voltage of the first integrator V... b Satisfy V b When the voltage is greater than +4.55V, the output voltage +NS of the second comparator is 0V. At this time, the maximum voltage at the +NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0; when the output voltage V of the first integrator is... b Satisfy V b When the voltage is less than -4.55V, the output voltage of the fourth comparator, -NS, is 0V. At this time, the minimum voltage at the -NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0.

2. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The first comparator includes a second operational amplifier U2A, a diode D1, and resistors R1, R5, R8, and R9. Pin 8 of the second operational amplifier U2A is connected to +5V, and pin 4 is connected to -5V. Resistors R1 and R8 are connected in parallel, with the parallel connection end connected to one end of resistor R5. The other end of resistor R1 is connected to the +5V power supply. The other end of resistor R8 is grounded. The other end of resistor R5 is connected to pin 2 of the second operational amplifier U2A. Pin 3 of the second operational amplifier U2A is connected to one end of resistor R9. The other end of resistor R9 is connected to pin 1 of the first operational amplifier U1A in the first integrator. Pin 1 of the second operational amplifier U2A is connected to the anode of the first diode D1. The resistance values ​​of resistors R1, R5, and R8 are 100Ω, 10kΩ, and 1kΩ, respectively. The first diode D1 is a 1N4148.

3. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The second integrator includes a third operational amplifier U3A, resistors R4 and R6, and capacitors C1 and C2. Pin 8 of the third operational amplifier U3A is grounded, and pin 4 is connected to -5V. Resistor R6 is connected in parallel with one end of capacitor C1, and the parallel connection is connected to pin 2 of the third operational amplifier U3A. The other end of capacitor C1 is connected to pin 1 of the third operational amplifier U3A. Resistor R4 is connected in parallel with one end of capacitor C2, and the parallel connection is connected to the other end of R6 and the negative terminal of the first diode D1 of the first comparator. The other end of resistor R4 is connected to the -5V power supply, and the other end of capacitor C2 is grounded. The resistance of resistor R4 is 100kΩ, the resistance of R6 is 1kΩ, the capacitance of capacitor C1 is 100μF, and the capacitance of capacitor C2 is 10μF.

4. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The second comparator includes a fourth operational amplifier U4A, resistors R2, R3, and R7. Pin 8 of the fourth operational amplifier U4A is connected to +5V, and pin 4 is grounded. Resistors R2 and R3 are connected in parallel, and their parallel terminals are connected to pin 2 of the fourth operational amplifier U4A. The other end of resistor R2 is connected to a -5V power supply, and the other end of resistor R3 is grounded. Pin 3 of the fourth operational amplifier U4A is connected to one end of resistor R7, and the other end of resistor R7 is connected to pin 1 of the third operational amplifier U3A in the second integrator. Pin 1 of the fourth operational amplifier U4A is connected to pin 8 of the first operational amplifier U1A in the first integrator. The resistance values ​​of resistors R2, R3, and R7 are all 10kΩ.

5. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The third comparator includes a fifth operational amplifier U2B, a diode D2, and a resistor R. 11 R 12 R 16 and R 19 In this configuration, pin 8 of the fifth operational amplifier U2B is connected to +5V, pin 4 is connected to -5V, and resistor R... 11 R 19 Parallel connection, with the parallel terminals connected to resistor R. 16 One end is connected to resistor R 11 The other end is connected to a -5V power supply, resistor R 19 The other end is grounded, resistor R 16 The other end is connected to pin 6 of the fifth operational amplifier U2B, and pin 5 of the fifth operational amplifier U2B is connected to resistor R. 12 One end is connected to resistor R 12 The other end is connected to pin 1 of the first operational amplifier U1A in the first integrator, and pin 7 of the fifth operational amplifier U2B is connected to the cathode of diode D2. Resistor R 11 The resistance value is 100Ω, resistor R 12 and resistor R 16 The resistance value is 10kΩ, resistor R 19 The resistance is 1kΩ.

6. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The third integrator includes a sixth operational amplifier U4B and a resistor R. 15 and R 17 Capacitors C4 and C5, where pin 8 of the sixth operational amplifier U4B is +5V and pin 4 is grounded, and resistor R... 17 One end of capacitor C4 is connected in parallel to pin 6 of the sixth operational amplifier U4B, and the other end of capacitor C4 is connected to pin 7 of the sixth operational amplifier U4B. Resistor R... 15 Connected in parallel with one end of capacitor C5, and the parallel terminal is connected to R. 17 The other end is connected to the positive terminal of the second diode D2 of the third comparator, and resistor R 15 The other end is connected to the +5V power supply, the other end of capacitor C5 is grounded, and resistor R... 15 The resistance value is 100kΩ, resistor R 17 The resistance is 1kΩ, the capacitance of capacitor C4 is 100μF, and the capacitance of capacitor C5 is 10μF.

7. The external modulator bias voltage forced reset device according to claim 1, characterized in that, The fourth comparator includes a seventh operational amplifier U3B and a resistor R. 13 R 14 R 18 In this configuration, pin 8 of the seventh operational amplifier U3B is grounded, pin 4 is connected to -5V, and resistor R... 13 R 14 The parallel connection is simultaneously connected to pin 6 of the seventh operational amplifier U3B, and resistor R... 13 The other end is connected to a +5V power supply, resistor R 14 The other end is grounded, and pin 5 of the seventh operational amplifier U3B is connected to resistor R. 14 One end is connected to resistor R 14 The other end is connected to pin 7 of the sixth operational amplifier U4B in the third integrator, and pin 7 of the seventh operational amplifier U3B is connected to pin 4 of the first operational amplifier U1A in the first integrator. Resistor R 13 R 14 R 18 The resistance of each is 10kΩ.

8. A method for forcibly resetting the bias voltage of an external modulator, comprising the external modulator bias voltage forced reset device as described in any one of claims 1-7, characterized in that, The method includes the following steps: 1) The external modulator bias voltage forced reset device receives the status signal DT, integrates the status signal DT, and outputs the integrated voltage in three ports, which are respectively given to the positive voltage reset channel and connected to the first comparator, the external modulator bias control, and the negative voltage reset channel and connected to the third comparator. 2) The voltage across resistor R8 is approximately 4.55V. The first comparator determines whether the first integrating output voltage is greater than 4.55V. When the integrating voltage is greater than 4.55V, the second operational amplifier U2A outputs +5V. Since the diode voltage difference is 0.7V, the first comparator outputs +4.3V. When the integrator voltage is less than 4.55V, the second operational amplifier U2A outputs -5V. Because the first comparator has a voltage output when the forward voltage of diode D1 is greater than +0.7V, the first comparator and the second integrator are effectively disconnected at this time. 3) The second integrator integrates the output voltage of the first comparator. When the first comparator outputs a high level of +4.3V, the second integrator begins to integrate, meaning its output voltage begins to decrease. Since the voltage across resistor R3 is approximately -2.5V, when the second integrator's output voltage is less than -2.5V, the second comparator's output level +NS is 0V. When the first comparator has no output voltage, the second integrator's input is -5V due to the pull-down resistor R4. At this time, the second integrator integrates -5V, meaning its output voltage begins to increase. When the second integrator's output voltage is greater than -2.5V, the second comparator's output level +NS is +5V. 4) Resistor R 19 The voltage at the top is approximately -4.55V. The third comparator determines whether the first integral output voltage is less than -4.55V. When the second integral voltage is less than -4.55V, the second operational amplifier U2B outputs a level of -5V. Since the voltage difference between the diodes is 0.7V, the third comparator outputs a level of -4.3V. When the second integral voltage is greater than -4.55V, the second operational amplifier U2B outputs a level of +5V. Because the third comparator has a voltage output when the reverse voltage of diode D2 is less than -0.7V, the third comparator and the third integrator are effectively disconnected at this time. 5) The third comparator has two output states. The first state is -4.3V, and the second state is a high-impedance disconnected state with no voltage output. In the first state, when the third comparator outputs -4.3V, the third integrator begins to integrate, and its output voltage begins to increase. When the third integrator output voltage is greater than +2.5V, the fourth comparator output level -NS is 0V. In the second state, when the third comparator has no voltage output, due to the pull-up resistor R15 of the second comparator, the input of the second integrator is +5V. At this time, the third integrator integrates +5V, and its output voltage begins to decrease. When the third integrator output voltage is less than +2.5V, the fourth comparator output level -NS is -5V. 6) The power supply terminals 8 and 4 of the operational amplifier in the first integrator are powered by the output terminals of the second and fourth comparators, respectively. When the output voltage V of the first integrator... b Satisfying -4.55V < V b When the voltage is < +4.55V, the output voltage of the second comparator (+NS) is +5V, and the output voltage of the fourth comparator (-NS) is -5V. At this time, the first integrator operates normally and does not perform the reset function. When the output voltage of the first integrator V... b Satisfy V b When the voltage is greater than +4.55V, the output voltage +NS of the second comparator is 0V. At this time, the maximum voltage at the +NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0; when the output voltage V of the first integrator is... b Satisfy V b When the voltage is less than -4.55V, the output voltage of the fourth comparator, -NS, is 0V. At this time, the minimum voltage at the -NS terminal of the operational amplifier in the first integrator can only provide 0V, so the output voltage of the first integrator is forced to reset to 0.

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