Power amplifier system and its automatic tuning optimization method based on transfer learning

Abstract

A digital power amplifier (DPA) system includes a power amplifier (PA) circuit having a control input and an output for generating an output signal, and an adaptive control circuit including an input interface, an output interface, a memory storing an adaptive control algorithm, and a processor coupled to the memory that executes instructions based on the adaptive control algorithm, wherein the input interface receives an input status signal and the output signal of the DPA circuit, wherein the adaptive control algorithm determines control parameters of a control signal sent from the output interface to the control input in response to the input status signal and the output signal to control operation of the DPA circuit.

Description

Technical Field

[0001] This invention relates to power amplifier systems, and more specifically, to a digital Doherty power amplifier system for enhancing the performance of radio frequency power amplifiers and a transfer learning-based automatic tuning optimization method for power amplifier systems. Background Technology

[0002] The rapid increase in data volume and rate in wireless communication has significantly increased power consumption in wireless transmitters, with power amplifiers (PAs) being a key component in this energy-consuming process. Several advanced techniques, including envelope tracking (ET), Doherty power amplifiers (DPAs), and envelope cancellation and recovery (EER), have been proposed to improve the power enhancement efficiency (PAE) of PAs. Among these techniques, DPAs are particularly promising due to their simple structure based on active load modulation, which enables high average efficiency.

[0003] Despite the numerous advantages that DPAs offer in terms of efficiency enhancement, traditional analog DPAs still suffer from drawbacks that lead to performance degradation in energy efficiency and operating bandwidth. Traditional DPA designs are based on a single-input configuration that includes an analog power divider (potentially tunable), fixed phase alignment, a carrier PA operating in Class AB mode and a peak PA operating in Class C mode, and an output power combiner. Several approaches have been investigated to improve DPA efficiency, including gate bias adaptation, asymmetric DPA, multiplexed DPA, tunable phase alignment, and adaptive power allocation ratio.

[0004] To achieve optimal PA performance, designers need to manually tune the circuit operating parameters, and this tuning process is only effective for fixed operating conditions such as input power, frequency, and signal standard. However, in real-world scenarios, the optimal control parameters do indeed change with variations in input and circuit states. The compensation circuitry is also complex and challenging to optimize, making DPA design cumbersome. These are limitations of purely analog design.

[0005] More flexible architectures, such as digital DPA (DDPA), are needed to adaptively find the optimal control parameters for various circuit states and input signals with various bandwidths, modulation formats, power levels, and modulation formats. Summary of the Invention

[0006] Some implementations are based on the understanding that digital power amplifiers (DPAs) are programmable, thus facilitating circuit tuning by designers (autotuning) and allowing for consideration of circuit imbalances such as phase delays from multipaths and environmental variations (including temperature and the input signal of the excitation). Therefore, DPAs are not only more flexible than analog DPAs but also offer enhanced performance.

[0007] According to embodiments of the present invention, a DPA system, a Digital Doherty Power Amplifier (DDPA) system, and a learning-based automatic tuning method (optimization method) are provided, which improve the efficiency and gain of the PA, in particular, through adaptive control that simultaneously satisfies linearity requirements. The DDPA system and optimization method can be used in broadband mobile communications with multi-standard radio front-ends, including radio transmitters for 3G, 4G LTE, and upcoming 5G base stations.

[0008] Some embodiments of the present invention provide a control circuit that adaptively seeks the optimal set of control parameters without complex engineering tuning, regardless of device parameters or environmental variations, wherein the objective of optimal control is, for example, high efficiency with reasonable gain in a broadband power transmitter.

[0009] Furthermore, some embodiments of the present invention are based on the understanding that a control circuit for controlling a power amplifier (PA) circuit includes: an interface configured to receive input and signals and transmit output signals for controlling the PA circuit; a memory storing a first set of parameters corresponding to the input frequency, a second set of parameters corresponding to the input signals, a cost function represented by the parameters, and an adaptive control algorithm; and a processor configured to execute instructions based on the adaptive control algorithm in connection with the memory and the interface, wherein the interface receives input state signals and output signals of the PA circuit, wherein the adaptive control algorithm determines control parameters of the control signals in response to the input state signals and the output signals for controlling the operation of the PA circuit, wherein the initialization of the adaptive control algorithm is performed based on transfer learning from previous control parameters obtained for previous input signals, wherein the cost function includes a performance cost function and a disturbance cost function, wherein the adaptive control algorithm determines the control parameters by maximizing the cost function, and an output interface that transmits the control parameters.

[0010] One embodiment of the invention is a model-free algorithm without assumptions or prior knowledge about the DPA device, wherein the algorithm searches for the optimal configuration based on black-box optimization. Some embodiments not only optimize DPA efficiency but also enhance gain and linearity in a flexible manner. For example, in some embodiments, the system can balance gain and efficiency tradeoffs across different frequency bands or maximize efficiency under certain constraints. One example is optimizing efficiency while requiring gain to be greater than a configured threshold. In the case of modulated signals, we optimize efficiency, gain, and adjacent channel power ratio (ACPR) under the same DDPA scenario. ACPR is an important factor in modulated signals to ensure finite power transmitted from the main channel to adjacent signals.

[0011] According to an embodiment of the present invention, a digital power amplifier (DPA) system includes: a power amplifier (PA) circuit having a control input and an output for generating an output signal; and an adaptive control circuit including an input interface, an output interface, a memory storing an adaptive control algorithm, and a processor connected to the memory to execute instructions based on the adaptive control algorithm, wherein the input interface receives an input state signal and an output signal of the PA circuit, and wherein the adaptive control algorithm determines control parameters of a control signal sent from the output interface to the control input in response to the input state signal and the output signal to control the operation of the PA circuit.

[0012] Furthermore, according to another embodiment of the present invention, a Digital Doherty Power Amplifier (DDPA) system includes: a Doherty Power Amplifier (DPA) circuit having a control input and an output for generating an output signal; and an adaptive control circuit including an input interface, an output interface, a memory storing an adaptive control algorithm, and a processor connected to the memory to execute instructions based on the adaptive control algorithm, wherein the input interface receives an input state signal and an output signal of the DPA circuit, and wherein the adaptive control algorithm, in response to the input state signal and the output signal, determines control parameters of a control signal sent from the output interface to the control input to control the operation of the DPA circuit.

[0013] Some other implementations take both nonlinearity and efficiency requirements into account, decoupling the linear compensation and efficiency improvements of DDPA. Note that all compensation and enhancement components operate in the digital domain. Attached Figure Description

[0014] [ Figure 1 ]

[0015] Figure 1 This is a block diagram of a DDPA hardware setup according to some embodiments of the present invention;

[0016] [ Figure 2 ]

[0017] Figure 2 It is a framework structure for adaptive control (linearity, efficiency, and gain) according to some embodiments of the present invention;

[0018] [ Figure 3A ]

[0019] Figure 3A This is a block diagram of an adaptive control module for efficiency enhancement according to some embodiments of the present invention;

[0020] [ Figure 3B ]

[0021] Figure 3BThis is a block diagram of an adaptive control system for a digital power amplifier (DPA) according to some embodiments of the present invention;

[0022] [ Figure 4 ]

[0023] Figure 4 This is a flowchart of DDPA optimization based on simulated annealing (SA) + extreme value search (ES) according to some embodiments of the present invention;

[0024] [ Figure 5 ]

[0025] Figure 5 This is a simplified flowchart of an ES according to some embodiments of the present invention;

[0026] [ Figure 6 ]

[0027] Figure 6 This is a flowchart of a detailed ES algorithm according to some embodiments of the present invention;

[0028] [ Figure 7 ]

[0029] Figure 7 Real-time extreme value search for a variable according to some embodiments of the present invention;

[0030] [ Figure 8 ]

[0031] Figure 8 Real-time extreme value search for multiple variables according to some embodiments of the present invention;

[0032] [ Figure 9 ]

[0033] Figure 9 A flowchart illustrating the selection of a starting point for faster optimization according to an embodiment of the present invention is shown;

[0034] [ Figure 10 ]

[0035] Figure 10 This illustrates a case of transfer learning between different operating conditions according to some embodiments of the present invention;

[0036] [ Figure 11 ]

[0037] Figure 11 The following illustrates the hyperparameter update for new operating conditions according to some embodiments of the present invention;

[0038] [ Figure 12 ]

[0039] Figure 12A method for selecting optimal initial parameters for new operating conditions is shown according to some embodiments of the present invention;

[0040] [ Figure 13A ]

[0041] Figure 13A The diagram illustrates the power ratio α and the input CW (continuous wave) signal power level for different frequencies according to some embodiments of the present invention;

[0042] [ Figure 13B ]

[0043] Figure 13B This illustrates a modulated signal with a varying envelope after normalization, according to some embodiments of the invention; and

[0044] [ Figure 14 ]

[0045] Figure 14 The relationship between the phase of the modulated signal and the normalized signal amplitude according to an embodiment of the present invention is shown. Detailed Implementation

[0046] Various embodiments of the present invention are described below with reference to the accompanying drawings. It will be noted that the drawings are not drawn to scale, and elements with similar structures or functions are indicated throughout the drawings by similar reference numerals. It should also be noted that the drawings are merely for the purpose of describing specific embodiments of the invention. They are not intended as an exhaustive description of the invention or as a limitation on the scope of the invention. Furthermore, aspects described in connection with specific embodiments of the invention are not necessarily limited to those embodiments and can be implemented in any other embodiment of the invention.

[0047] Figure 1 This is a block diagram of a digital power amplifier (DPA) module 100 according to some embodiments of the present invention. The DPA module 100 may be a digital power amplifier (DPA) module constructed from a multi-input power amplifier 120 such as a Doherty power amplifier, a phase-shifting power amplifier, a balanced power amplifier, and a push-pull power amplifier.

[0048] As an example, a Doherty power amplifier is used in the digital power amplifier (DPA) module 100 to illustrate the function of the DPA module. The DPA module 100 may be referred to as a DDPA (Digital Doherty Power Amplifier) ​​module 100. However, it should be noted that, depending on variations in circuit design, a phase-shifting power amplifier circuit, a balanced power amplifier circuit, or a push-pull power amplifier circuit may also be used.

[0049] The DDPA module 100 may include a baseband processing module 101, a digital Doherty amplifier (DDA) adaptive control module 102, an amplitude-phase module 103, a signal converter 110, a dual-input DPA module (DPA module, but not limited to dual-input) 120, and a power supply 104. The power supply 104 is used to provide bias conditions (voltage and / or current) to the DPA unit 120 according to the optimal control parameters (or control parameters) 313 generated by the DDA adaptive control module 102. The DPA module 120 includes a main PA (carrier PA) 121, a peak PA 122, and an output combiner 123. The signal converter 110 includes digital-to-analog converters (DACs) 111 and 112, and up-converters 113 and 114.

[0050] The dual-input DPA 120 includes a carrier power amplifier (PA) 121 for controlling the carrier signal and a peak power amplifier (PA) 122 for controlling the peak signal, and an output combiner 123 for combining the signals from the carrier PA 121 and the peak PA 122. Clearly, the configuration of the digital Doherty can be extended to involve multi-path Doherties with more than two PAs having a similar topology described in 100.

[0051] When a power amplifier other than the Doherty amplifier is used in module 100, the DDA adaptive control module 102 can be referred to as the digital adaptive (DA) control module 102.

[0052] Input signal 301 is sent to DA adaptive control module 102. DA adaptive control module 102 performs data-driven optimization and generates optimal control parameters 313 using input signal 301 and output signal 300 from DPA module 120, for the phase difference (θ) between PAs 121 and 122 and the input power ratio (α) of PAs 121 and 122. In some cases, control parameters 313 may be referred to as updated DDPA parameters. Updated DDPA parameters 313 are provided to amplitude-phase (Amp-phase) module 103. Furthermore, the optimization discussed above may be referred to as a learning-based automatic tuning method for the power amplifier system.

[0053] In this case, control parameter 313 includes the gate bias parameters (V) of PA 121 and 122. g1 V g2 The phase difference (θ) between PA 121 and 122, and the input power distribution (ratio α) of PA 121 and 122. Furthermore, power supply 104 receives gate bias parameters from DDA adaptive control module 102 and adjusts them according to the gate bias parameters (V... g1 Vg2 A gate bias voltage is applied to PAs 121 and 122. When the amplitude-phase module 103 receives the phase difference between PAs 121 and 122 and the input power ratio of PAs 121 and 122 as part of the control parameter 313 from the DDA adaptive control module 102, the amplitude-phase module 103 generates signals S1 and S2 to be applied to PAs 121 and 122, respectively. In this case, signals S1 and S2 are configured such that the amplitude ratio of signals S1 and S2 and the phase difference between signals S1 and S2 satisfy the values ​​indicated by the optimal control parameter 313 calculated by the DDA adaptive control module 102.

[0054] In some cases, the DDA adaptive control module 102 may include a power supply 104, and PAs 121 and 122 may be field-effect transistors (FETs) fabricated using gallium nitride (GaN)-based materials or other different semiconductor device technologies. Alternatively, PAs 121 and 122 may be bipolar transistors (BPTs). In this case, the base current bias of the bipolar transistor is used instead of the gate bias. BPTs can be formed using GaN-based materials or other different semiconductor device technologies.

[0055] The output signal of the output combiner 123 can be transmitted from the antenna (not shown) via a predetermined bandpass filter (not shown). (For example, a quarter-wave transmission line can be used as the output combining network. Alternatively, other formats, such as lumped components based on inductors and capacitors, can be used to perform the same combining function.) Furthermore, the input interface (not shown) of the DDA control module 102 receives (detects) the output signal of the output combiner 123 to calculate control parameters 313 that control the carrier PA 121 and the peak PA 122, respectively. In some cases, control parameters 313 may be referred to as tuning parameters.

[0056] Each of the carrier PA 121 and the peak PA 122 can be controlled by control parameters 313, which indicate gate bias, phase, and input signal power. The phase signal and the input power signal are applied to the amplitude-phase module 103. The amplitude-phase module 103 adjusts the amplitude ratio and phase of the signals of the carrier PA 121 and the peak PA 122 according to the control parameters 313 generated by the DDA adaptive control module 102.

[0057] In this case, if necessary, the signal converter 110 generates a phase signal and an input power signal and provides the signal to the carrier PA 121 and the peak PA 122 via a drive amplifier (not shown) that drives the carrier PA 121 and the peak PA 122.

[0058] The DDA adaptive control module 102 includes a processor (not shown) connected to one or more memories (not shown) storing an adaptive control algorithm, wherein the processor executes instructions according to a predetermined adaptive control algorithm. Furthermore, the adaptive control algorithm is based on model-free optimization known as adaptive tuning control.

[0059] Control parameter 313 is generated by the DDA adaptive control module 102, which calculates the value of control parameter 313 through adaptive optimization control. In some cases, control parameter 313 may be referred to as a data-driven optimization parameter.

[0060] In addition, the DDA adaptive control module 102 also includes an input interface (not shown) for receiving the input signal 301 and the output signal 300 of the dual-input DPA module 120, and an output interface (not shown) for generating control parameters 313. The control parameters 313 include a phase control signal, a power ratio control signal, and a bias signal for controlling the dual-input DPA 120, the carrier PA 104, and the peak PA 105.

[0061] The DDA adaptive control module 102 receives the baseband signal from the baseband processing module 101 and detects the output signal 300 of the output combiner 106 via the input interface to generate control parameters 313, which can be referred to as data-driven optimization parameters 313, based on an adaptive control algorithm. In this case, a portion of the data-driven optimization parameters 313 is provided to the amplitude-phase control module 103 via the output interface to control the phase and power ratio of PAs 121 and 122. Furthermore, another portion of the data-driven optimization parameters 313 is converted into gate biases provided to PAs 121 and 122 via power supply 104, respectively, to control the gate biases of PAs 121 and 122.

[0062] exist Figure 1 In this design, the DDPA module 100 is programmable, which facilitates circuit tuning by the designer and allows for full consideration of circuit imbalances and defects in multipaths. Therefore, the DDPA module 100 is not only more flexible and less expensive than analog DPA, but also offers better performance. The design according to embodiments of the present invention benefits from software design principles, allowing the control port to be adapted to achieve optimal performance through algorithms.

[0063] Making an RF power amplifier more efficient means driving it near its saturation point. In this case, the modulated waveform tends to become distorted (introducing nonlinearity characterized by ACPR (Adjacent Channel Power Ratio)). Therefore, the design goal is to maximize power-increase efficiency (PAE) while maintaining high gain and good linearity (ACPR). In some cases, digital linearity can be achieved through digital predistortion (DPD).

[0064] Figure 2 The stages for improving the linearity and efficiency of PAs 121 and 122 through a DPD (Digital Predistortion) process 201 and an efficiency enhancement process 202 are illustrated. In these processes, digital predistortion of the input signal is performed in step 201, efficiency enhancement is performed in step 202, and the input signal obtained through the digital predistortion (DPD) and efficiency enhancement processes is provided to PAs 121 and 122 in step 203.

[0065] Figure 3A A detailed block diagram of the algorithm for PA auto-tuning is shown, wherein an input signal (input status signal) 301 serves as the input status, which includes, but is not limited to, different states indicating frequency and input power level, and may also include other states such as signal modulation format. The input status signal 301, indicating frequency and input signal power level, is fed to the DDA adaptive control module 102 to adaptively tune control parameters 313 of the DDPA 120, such as gate bias 303, phase difference 304 between the main amplifier and the peak amplifier, and input power distribution 305, using the input signal 301 and the output signal 330 of the dual-input DPA module 120. Finally, the tuning parameters are fed to the dual-input DPA module 120.

[0066] Depending on variations in circuit design, the DPA module 120 may include three or more power amplifiers (PAs). For example, refer to... Figure 3B In this case, the DDA adaptive control module 102 provides control parameters 313 for each of the three or more power amplifiers.

[0067] Figure 3B This is a block diagram illustrating a multi-input digital power amplifier module 350 that performs the automatic tuning process of a DPA module according to an embodiment of the present invention.

[0068] In this diagram, when the function of the component is... Figure 1 When the components are similar, use the following for these components: Figure 1 The same reference numerals for the same parts are used in the accompanying drawings. Furthermore, descriptions of the reference numerals for the same parts are omitted.

[0069] The multi-input digital power amplifier module 350 includes a baseband processing module 101, a DA adaptive control module 102, an amplitude ratio / phase control module 103, a signal converter 110, and a multi-input PA module 120. In this case, the signal converter 110 includes digital-to-analog converters (DACs) 111, 112, and 112n, and up-converters 113, 114, and 114n.

[0070] The multi-input PA module 120 includes a carrier power amplifier (PA) 121 for controlling a carrier signal, a peak power amplifier (PA) 122 for controlling a peak signal, a second peak power amplifier (PA) 122n for controlling a second peak signal, and an output combiner 123 for combining signals from PAs 121, 122, and 122n. In this configuration, the signal converter 110 includes three or more DACs and three or more up-converters, and the multi-input PA module 120 includes three or more power amplifiers 121, 122, and 122n.

[0071] The DDA adaptive control module 102 may include a processor (or signal processor) configured to execute a DA adaptive control algorithm stored in a memory (one or more memories and storage devices) (not shown) storing a set of parameters. The DDA adaptive control module 102 uses the input signal 301 and the output signal 300 of the multi-input PA module 120 to generate updated DPA parameters 313, and provides the updated DPA parameters 313 to the amplitude-phase module 103. The amplitude-phase module 103 then provides signals to the signal converter 110, causing the signal converter to generate S1, S2, and Sn, respectively, applied to PA 121, PA 122, and PA 122n.

[0072] As described above, the optimal control parameters 313 are calculated using the adaptive control module 102. A detailed discussion of the optimal control parameters will be provided below.

[0073] Optimal control parameters

[0074] To search for the optimal control parameter θ with the maximum cost function Q(θ) * :

[0075] θ * =argmax θ∈U Q(θ)

[0076] Find θ * The update rule is based on a model-free optimization algorithm, where θ is a vector of amplifier tuning parameters, defined as:

[0077] θ = [Gate-bias] main Gait-bias peak [Power distribution, phase difference].

[0078] Note that the control port contains phase alignment components, and operating a phase shift at RF frequencies is very challenging for digital circuits. To address the phase shift challenge, assume we have a baseband signal:

[0079]

[0080] Assumption Furthermore, the modulated signal of RF can be written as:

[0081] y RF (t)=y IF (t)·y LO (t)

[0082] The phase-shift version can be written as:

[0083] y RF (t+Δt)=y IF (t+Δt)·y LO (t+Δt)

[0084] Note that the phase shift component in the RF frequency of the baseband signal can be ignored (y IF (t+Δt)≈y IF (t)), then we have:

[0085] y RF (t+Δt)=y IF (t)·y LO (t+Δt)

[0086] The phase shifter can be replaced by shifting the phase of the upconverter. A programmable phase shifter is another option for achieving phase alignment, but it requires careful selection of the tuning range to obtain high resolution at an additional cost.

[0087] In a further approach, particularly in the case of modulated signals, we implemented a curve fitting function instead of constant values ​​for the two optimal control parameters (the input power ratio of PA 121 and 122, and the phase difference between PA 121 and 122).

[0088] In one embodiment of the present invention, we will Figure 4 The simulated annealing (SA) plus extremum search (ES) implementation shown is a model-free optimization method. The combination of SA 406 and ES 409 makes the system hybrid, where SA 406 captures the random sudden changes in the model mainly due to frequency and input power variations, while ES 409 captures the slow changes in the model due to temperature. Figure 4 The hybrid algorithm for DDPA optimization is explained. The algorithm described below can be stored in the memory of the DA adaptive control module 102 as a program (instructions) to be executed by the processor in module 102.

[0089] In one implementation, we choose the cost function Q(θ)401 as

[0090] Q(θ)=Gain[dB]+0.01*PAE[%]+a1Pout[dBm]+a2ACPR[dBc] (8)

[0091] Where Gain is the amplifier gain in dB, PAE is the power increase efficiency in %, Pout is the amplifier power output in dBm, ACPR is the adjacent channel power in dBc, and a1 and a2 are numbers greater than 100 to ensure that ACPR[dBc] and Pout[dBm] have been allocated to important factors that are crucial to the modulation signal.

[0092] To search for the optimal control parameter θ with the maximum cost function Q(θ)401 * We implemented a model-free optimization algorithm based on the following two stages:

[0093] Phase 1: Exploration Phase Start with a random initial point θ0 and temperature T. For each iteration, θ is randomly generated within a predefined boundary, while the temperature is reduced by a discount factor α to T←αT.

[0094] For each random move in the i-th iteration, determine the cost Q(θ,t)401, and if

[0095] Q(θ,t)-Q(θ,t-1)>0 (10)

[0096] Then accept the move and store θ.

[0097] If the condition is not met, random shifts can be accepted as follows by using Boltzmann condition 405:

[0098]

[0099] If the above conditions are not met, the specific move is not accepted and the next random point is generated. Even if the cost is lower than the previous cost of 402, we accept some random moves to avoid local minima.

[0100] Repeat the above process until the temperature T is higher than the threshold T. stop .

[0101] Next, select the optimal θ with the maximum cost Q(θ). best The goal is to find the optimal parameters to achieve the maximum cost within the exploration set of values. The exploration phase ensures that the global optimum is found.

[0102] Next, in the second phase, once DDPA achieves the maximum cost within the exploration set of values, the algorithm switches to extreme value search. The goal of the ES phase is to fine-tune the values ​​of the optimal parameters using local search.

[0103] Phase Two: The Exploration Phase Through Extreme Value Search

[0104] Figure 5 A block diagram of an extremum search (ES) method for updating an amplifier model is shown. The extremum search iteratively perturbs the amplifier parameters using a perturbation signal with a predetermined frequency until a termination condition is met. For example, the iterations of the extremum search use a perturbation signal updated during previous iterations of the extremum search to perturb the parameters of amplifier 560, and a cost function for the performance of amplifier 570 is determined in response to the perturbation of 560. For example, the perturbation signal may include a periodic signal with a predetermined frequency.

[0105] Next, the iteration determines the gradient of the cost function by modifying it with the perturbation signal, and integrates the perturbation signal with the gradient of the cost function to update the perturbation signal for the next iteration of the extremum search. For example, the gradient of the cost function is determined to be the product of the cost function, the perturbation signal, and the gain of the extremum search. The iteration of the extremum search can be repeated until the termination condition is met.

[0106] Figure 6 A block diagram of an extremum search method using a performance cost function according to some embodiments is shown. The method determines a performance cost function 615. For example, the performance cost function 615 may include power enhancement efficiency (PAE), gain, and adjacent channel power ratio (ACPR). In step 620, the extremum search multiplies the cost function 615 by a first periodic signal 625 of time to produce a perturbation cost function 629, and subtracts (in step 650) a second periodic signal 637 with a ninety-degree quadrature phase shift relative to the first periodic signal 625 from the perturbation cost function 629 to produce the derivative 655 of the cost function. Furthermore, in step 640, the extremum search method integrates the derivative of the gain function over time to produce a parameter value 645 as a function of time.

[0107] Figure 7 A schematic diagram of an ES controller for a simple case of a tuning parameter is shown, which implements... Figure 6 The extreme value search method is shown. The ES controller injects a sinusoidal perturbation asinωt 625 into the system, resulting in the output Q(θ)401 of the cost function. This output Q(θ)401 is then multiplied by asinωt 637. The signal obtained after multiplying by the gain l is... 707 is an estimate of the gradient of the cost function θ. The gradient estimate is then passed through an integrator 1 / s 706 and added to the modulated signal asinωt 637.

[0108] Extreme value search is a model-free learning method and can therefore be used for amplifier parameter tuning. However, it may be necessary to update multiple amplifier parameters, in which case a multi-parameter ES (Extreme Value Search) is required.

[0109] Figure 8 A schematic diagram of a multi-parameter ES controller according to one embodiment is shown. In this embodiment, the multi-parameter ES perturbs the parameters in a parameter set with corresponding perturbation signals of different frequencies to update a model stored in memory. In some implementations, each of the different frequencies is greater than the frequency response of the battery. Additionally or alternatively, in some implementations, the different frequencies of the perturbation signals satisfy a convergence condition such that the sum of the first frequency of the first perturbation signal and the second frequency of the second perturbation signal in the set is not equal to the third frequency of the third perturbation signal.

[0110] For example, when there are n parameters to estimate, Figure 8 The ES controller is copied n times, with n control parameters θ. i 313, n parameters ξ i 813, 818, 823, n disturbance signals 625, 637, and a common cost function 401, which is all the estimated control parameters θ = (θ1,...,θ2) n ) T The function of 313.

[0111] This multi-parameter ES can be described by the following formula:

[0112]

[0113] θ i =ξ i +a i sin(ω i t) (4)

[0114] Wherein, the perturbation frequency ω i Make ω i ≠ω j ω i +ω j ≠ω k i, j, k ∈ {1, 2, n}, and ω i >ω * , and ω * It should be large enough to ensure convergence. This is possible if the parameter a is chosen appropriately. i ω i If l is constant, then the cost function output Q(θ) converges to the optimal cost function value Q(θ). * The neighborhood of ).

[0115] To implement the ES algorithm in real-time embedded systems, a discrete version of the ES algorithm is advantageous. An example discrete version of the ES algorithm is:

[0116] ξ i (k+1)=ξ i (k)+a i lΔTsin(ω i k)Q(θ(k)) (5)

[0117] θ i (k+1)=ξ i (k+1)+a i sin(ω i (k)) (6)

[0118] Where k is the time step and ΔT is the sampling time.

[0119] Additionally, between the initialization of DDPA parameters 404 and SA 406, we optimize the starting point selection before feeding it to the DDA adaptive control module 102 to adaptively tune the control parameter 313.

[0120] Instead of starting with a random initial point θ0, use θ obtained from a previous optimization run. experienced Information is used to identify a smarter starting point for the next optimization run.

[0121] Based on searchable experience, first select a set of control parameters, and then select an optimized set of parameters with corresponding input signals that are close to the new operating conditions, so as to warm-start learning iteration and improve the learning speed.

[0122] Figure 9 A detailed description of the above processing is shown. Input signal 301 (frequency and input power) is used to select θ from the data obtained from the previous optimization run. experienced The template. Before the input signal 301 is sent to the DA adaptive control module, the first stage (first scan process) 910 begins scanning the parameter set to find parameters with the following frequency values: where these values, identical values, closest values, or near values ​​are within a range relative to the input frequency of the input signal. After narrowing the range of the parameter set 911 through the first scan process, the second stage 912 scans the parameter set to select the final parameter set corresponding to the two input signals by selecting a specific set of parameters with identical or closest values ​​of input power from the list provided in the first stage (first scan process) 910. This will be described in more detail in the following sections.

[0123] Figure 10A method for initializing the optimized parameters of a new operating condition for an input signal is illustrated. For example, the initial values ​​of the optimized parameters for condition (F1, P1) are random. After a number of learning iterations, the learning algorithm converges to the optimal parameter values ​​for that condition, denoted as X1*. Next, for a new condition (F2, P2) that is adjacent to or close to the first condition (F1, P1), a new search for 1001 new optimal parameters is initialized from the previous optimal parameter set X1*. After many learning iterations, the learning algorithm converges to the optimal parameter value X2* for this new condition. This method can be repeated for any number of new operating conditions.

[0124] To further improve the learning algorithm, we propose a method based on previous operational conditions (F). i P i The hyperparameters of ) for any new operating condition (F) i+1 P i+1 Hyperparameters of the learning algorithm, such as Figure 11 As shown. For example, for the simulated annealing part 1101 of the learning algorithm, we will use the new temperature T i+1 Tuning to the previous temperature T i The linear function is the product of the previous temperature and a constant term proportional to the change in frequency and power level of the operating conditions of the input signal. Similarly, for the extremum search part 1102 of the learning algorithm, we can use the new jitter signal amplitude a i+1 Tuning to the previous jitter signal amplitude a i A linear function, which multiplies the amplitude of the previous jitter signal by a constant term proportional to the changes in frequency and power of the operating conditions of the input signal.

[0125] If the new operating conditions (F′, P′) of the input signal are not explicitly adjacent to or close to the previous operating conditions, then we propose operating conditions learned from the previous ones. We search for the closest operation condition 1201 in the set of previously learned operation conditions, where N is the number of previously learned operation conditions. We formulate the minimization problem to search for the operation condition 1201 that gives the minimum distance between the new operation condition (F′, P′) and the set of previously trained operation conditions, such as...

[0126]

[0127] Minimization is for Then, the operating conditions with the minimum distance are selected. And use its optimal parameters as the initial conditions for the new operating conditions (F′, P′) 1202.

[0128] In a further approach, particularly in the case of modulated signals, we implemented a curve fitting function instead of constant values ​​for the two optimal control parameters (the input power ratio of PA 121 and 122, and the phase difference between PA 121 and 122).

[0129] To optimize the input power ratio per sample of the modulated signal's follower envelope, the relationship between the amplitude and power ratio of the modulated signal envelope can be described as an example in the following equation (8):

[0130] y Power ratio =A·(10·log10·|Envelop|-2+20) 2 +0.45, (8)

[0131] in, Figure 13A The power ratio α versus the input CW (continuous wave) signal power level is shown for different frequencies (3 GHz, 3.3 GHz, and 3.6 GHz). Figure 4 The algorithm in the text can determine α for each input power level of the CW signal at different frequencies. For example, Figure 13B The normalized modulated signal shown can be modified using polynomial equations such as (8) that describe the relationship between the "envelope" and the power ratio α, based on the CW signal. Figure 13A The curve in the equation is fitted using curve fitting, and the remaining parameters A and other constants are fitted using methods such as least mean square. The result is... Figure 13B Equation (8) further enhances the performance of the modulated signal because it provides the optimal power ratio α for each sample or each (sub)frame (based on signal characteristics) rather than processing the average amplitude to obtain average performance.

[0132] Similarly, such as Figure 14 As given in equation (9), we can optimize the phase difference of the modulated signal per sample or per (sub)frame, assuming the following linear function as an example, but not limited to linear functions.

[0133] y Phase difference =y0+B·(|Envelop|-0.5), (9)

[0134] Here, y0 is equivalent to a constant value of the phase difference.

[0135] By optimizing the value of B and y0 (which is the slope and initial phase of the low envelope amplitude signal), it is possible to achieve the optimal θ with the maximum cost Q(θ). best This results in improved performance, rather than an average performance improvement.

[0136] The above-described embodiments of the present invention can be implemented in any of a variety of ways. For example, the embodiments can be implemented using hardware, software, or a combination thereof. When implemented in software, the software code can execute on any suitable processor or set of processors, whether it is located in a single computer or distributed across multiple computers. Such a processor can be implemented as an integrated circuit having one or more processors in an integrated circuit assembly. However, the processor can be implemented using circuits of any suitable format.

[0137] Furthermore, embodiments of the present invention can be embodied as a method, examples of which have been provided. Actions performed as part of this method can be ordered in any suitable manner. Therefore, embodiments can be constructed in which actions are performed in a different order than that illustrated, which may include performing several actions simultaneously, even if these actions are shown as sequential actions in the exemplary embodiments.

[0138] The use of ordinal terms such as "first" or "second" to modify claim elements in claims does not imply any priority, order, or sequence of one claim element relative to another, or the chronological order of the execution of method actions. Rather, it serves only as a label to distinguish one claim element with a certain name from another element with the same name (except for the use of ordinal terms), thus differentiating claim elements.

[0139] Although the invention has been described by way of example of preferred embodiments, it should be understood that various other adaptations and modifications can be made within the spirit and scope of the invention.

[0140] Therefore, the purpose of the appended claims is to cover all such variations and modifications that fall within the true spirit and scope of the invention.

Claims

1. A control circuit for controlling a power amplifier (PA) circuit, the control circuit comprising: An interface configured to receive input signals and send output signals for controlling the PA circuit; The memory stores a first set of parameters including parameters having input frequency values, a second set of parameters including parameters having input power values, a cost function represented by at least one of the parameters having input frequency values ​​and the parameters having input power values, and an adaptive control algorithm. as well as A processor, configured to execute instructions based on the adaptive control algorithm in connection with the memory and the interface, wherein the interface receives input signals and output signals of the PA circuit, wherein the adaptive control algorithm determines control parameters for control signals used to control the operation of the PA circuit in response to the input signals and the output signals, wherein the initialization of the adaptive control algorithm is performed based on transfer learning from previous control parameters obtained for previous input signals, wherein the cost function includes a performance cost function and a perturbation cost function, wherein the adaptive control algorithm determines the control parameters by maximizing the cost function, and an output interface for sending the control parameters. The transfer learning uses operating conditions that give the minimum distance between the operating conditions of the input signal and the operating conditions of the previous input signal, wherein the hyperparameters of the adaptive control algorithm are updated based on the operating conditions having the distance.

2. The control circuit according to claim 1, wherein, The processor selects a cost function based on the adaptive control algorithm to estimate the control parameters.

3. The control circuit according to claim 1, wherein, The performance cost function includes parameters related to the power increase efficiency (PAE), gain, and adjacent channel power ratio (ACPR) of the PA circuit.

4. The control circuit according to claim 1, wherein, The adaptive control algorithm performs a scan of the parameter set to provide a list of parameters.

5. The control circuit according to claim 1, wherein, The PA circuit is a phase-shifting power amplifier circuit, a balanced power amplifier circuit, or a push-pull power amplifier circuit, wherein the PA circuit includes at least two power transistors and an output combiner to combine the output signals of the power transistors.

6. The control circuit according to claim 1, wherein, The PA circuit includes a field-effect transistor (FET).

7. The control circuit according to claim 1, wherein, The PA circuit is formed of a material including gallium nitride (GaN).

8. The control circuit according to claim 1, wherein, Maximum cost function Q( ) is defined as and It is based on a model-free optimization algorithm, in which, It is a vector of amplifier tuning parameters, such that θ = [Gate-bias] main Gate-bias peak , α , ] The Gate-bias main The gate bias parameter of the main PA, the Gate-bias peak The gate bias parameter of the peak PA is α, where α is the input power ratio of the main PA and the peak PA. The phase difference between the main PA and the peak PA.

9. The control circuit according to claim 1, wherein, The PA circuit includes more than three PAs, wherein the adaptive control circuit outputs more than three output signals.

10. The control circuit according to claim 1, wherein, The input interface includes a power sensing circuit, a phase measurement circuit, and an analog-to-digital converter.

Images