Power amplifier circuit, high frequency circuit, and communication device
Patent Information
- Application Number
- CN202180014084.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-02-14
- Filing Date
- 2021-02-05
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2041-02-05
AI Technical Summary
[0006]然而,在专利文献1所记载的功率放大电路中,若高频信号的振幅的变化变得陡峭,则有难以使电源电压的振幅电平追随高频信号的振幅的变化这样的问题
[0011]根据本发明的上述方式的功率放大电路、高频电路以及通信装置,能够与高频对应,并且进一步降低功耗。
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Figure CN115088190B_ABST
Abstract
Description
Technical Field
[0001] This invention generally relates to power amplifier circuits, high-frequency circuits, and communication devices, and more specifically, to power amplifier circuits that amplify the power of high-frequency signals, high-frequency circuits having power amplifier circuits, and communication devices having high-frequency circuits. Background Technology
[0002] In recent years, power amplifier circuits using envelope tracking (hereinafter referred to as "ET method") have been known (for example, see Patent Document 1). ET method refers to a high-frequency amplification technique that varies the amplitude of the power supply voltage of the amplifying element according to the amplitude of the envelope of the high-frequency signal. More specifically, ET method refers to a technique that reduces power loss when operating under a fixed power supply voltage by varying the collector voltage of the amplifying element according to the output voltage, thereby achieving high efficiency.
[0003] The power amplifier circuit described in Patent Document 1 includes a transistor that amplifies the signal input to the base and outputs it from the collector, and changes the power supply voltage of the transistor according to the amplitude of the envelope of the high-frequency signal, and supplies the power supply voltage to the transistor.
[0004] Patent document 1: International Publication No. 2003 / 176147.
[0005] In addition, as the frequency of high-frequency signals increases, a power amplifier circuit corresponding to the even higher frequency of the high-frequency signal is required.
[0006] However, in the power amplifier circuit described in Patent Document 1, if the amplitude change of the high-frequency signal becomes steep, there is a problem that it is difficult to make the amplitude level of the power supply voltage follow the change of the high-frequency signal amplitude. Summary of the Invention
[0007] The present invention was made in view of the above-mentioned points. The object of the present invention is to provide a power amplifier circuit, a high-frequency circuit, and a communication device that can be used with high frequencies and can further reduce power consumption.
[0008] According to one aspect of the present invention, a power amplifier circuit includes a transmitting circuit, a control circuit, a first terminal, and a second terminal. The transmitting circuit includes an amplifying element, which amplifies the power of a high-frequency signal. The control circuit controls the transmitting circuit. A serial data signal is input to the first terminal. The serial data signal is a signal based on a serial data transmission standard. A digital signal different from the serial data signal is input to the second terminal. The control circuit controls the transmitting circuit based on the digital signal input from the second terminal.
[0009] One aspect of the high-frequency circuit of the present invention includes the aforementioned power amplifier circuit and filter. The filter allows the high-frequency signal output from the power amplifier circuit to pass through, where the power amplifier element in the power amplifier circuit amplifies the power.
[0010] A communication device according to one aspect of the present invention includes the aforementioned high-frequency circuit and signal processing circuit. The aforementioned signal processing circuit outputs the aforementioned high-frequency signal to the aforementioned transmitting circuit.
[0011] The power amplifier circuit, high-frequency circuit, and communication device according to the above-described manner of the present invention are capable of operating at high frequencies and further reduce power consumption. Attached Figure Description
[0012] Figure 1 This is a schematic diagram showing the structure of the power amplifier circuit, high-frequency circuit, and communication device in Embodiment 1.
[0013] Figure 2 This is a schematic diagram showing the structure of the main parts of the power amplifier circuit described above.
[0014] Figure 3 This is a graph showing the relationship between the power supply voltage and the gain when the output matching circuit is changed in the power amplifier circuit described above.
[0015] Figure 4 This is a graph showing the characteristics of the transistor's power supply voltage and the impedance characteristics of the output matching circuit in the power amplifier circuit described above.
[0016] Figure 5 This is a schematic diagram showing the structure of the power amplifier circuit, high-frequency circuit, and communication device in Embodiment 2.
[0017] Figure 6 This is a schematic diagram showing the structure of the main parts of the power amplifier circuit described above.
[0018] Figure 7 This is a graph showing the relationship between the reverse voltage of the variable capacitor diode and the capacitance value of the variable capacitor section in the power amplifier circuit described above.
[0019] Figure 8 This is a graph showing the relationship between output power and gain in the power amplifier circuit described above.
[0020] Figure 9 This is a schematic diagram showing the structure of the power amplifier circuit, high-frequency circuit, and communication device in Embodiment 3.
[0021] Figure 10 This is a schematic diagram showing the structure of the main parts of the power amplifier circuit described above.
[0022] Figure 11 This is a graph showing the relationship between bias current and gain in the power amplifier circuit described above. Detailed Implementation
[0023] Hereinafter, the power amplifier circuit, high-frequency circuit, and communication device of embodiments 1 to 3 will be described with reference to the accompanying drawings. The drawings referred to in the following embodiments are schematic diagrams, and the ratios of the size and thickness of each structural element in the drawings do not necessarily reflect the actual size ratios.
[0024] (Implementation Method 1)
[0025] (1) Power amplifier circuit
[0026] The structure of the power amplifier circuit 1 and the high-frequency circuit 6 of Embodiment 1 will be described with reference to the accompanying drawings.
[0027] like Figure 1 As shown, the power amplifier circuit 1 of Embodiment 1 includes a transmitting circuit 2 and a control circuit 3. Furthermore, the power amplifier circuit 1 includes an input terminal 11, an output terminal 12, a first terminal 4, and a second terminal 5.
[0028] The power amplifier circuit 1 is an amplifier circuit that amplifies the power of the high-frequency signal (RF signal) output from the RF signal processing circuit 75 (described later) to the level required for transmission to the base station (not shown) and outputs the amplified high-frequency signal.
[0029] Here, when amplifying high-frequency signals, the envelope tracking method (hereinafter referred to as "ET method") is used. The ET method includes analog envelope tracking (hereinafter referred to as "analog ET method") and digital envelope tracking (hereinafter referred to as "digital ET method").
[0030] Analog ET mode continuously detects the envelope of the high-frequency signal input to the amplifying element and adjusts the amplitude level of the power supply voltage to the amplifying element accordingly. In analog ET mode, because the envelope is continuously detected, the amplitude level of the power supply voltage changes continuously.
[0031] Digital Echo Echo (ET) mode discretely detects the envelope of the amplitude of the high-frequency signal input to the amplification element and adjusts the amplitude level of the power supply voltage of the amplification element according to this envelope. In digital ET mode, the amplitude level of the high-frequency signal is detected discontinuously but at constant intervals, and the detected amplitude level is quantized. Because the envelope is detected discretely in digital ET mode, the amplitude level of the power supply voltage varies discretely (see reference). Figure 4 ).
[0032] The power amplifier circuit 1 in Embodiment 1 uses digital ET method to amplify high-frequency signals. The power amplifier circuits 1 in Embodiments 2 and 3 also use digital ET method to amplify high-frequency signals.
[0033] (2) High-frequency circuits
[0034] Next, the high-frequency circuit 6 using the power amplifier circuit 1 will be described with reference to the attached diagram.
[0035] like Figure 1 As shown, the high-frequency circuit 6 includes a power amplifier circuit 1, a filter 61, a switch 62, and an antenna terminal 63. The high-frequency signal output from the high-frequency circuit 6 is transmitted to a base station (not shown) via the antenna 71, which will be described later. The high-frequency circuit 6 serves as a high-frequency module and is used in communication devices such as the communication device 7, which will be described later.
[0036] (2.1) Filter
[0037] like Figure 1 As shown, filter 61 is a transmitting filter that allows high-frequency signals of a specific communication frequency band to pass through. Filter 61 is disposed between transistor 21 (described later) and antenna terminal 63 of power amplifier circuit 1 in the transmitting path. More specifically, filter 61 is disposed between output terminal 12 of power amplifier circuit 1 and switch 62. Filter 61 allows high-frequency signals amplified by transistor 21 in power amplifier circuit 1 and output from power amplifier circuit 1 to pass through. The transmitting path is the path connecting input terminal 11 of power amplifier circuit 1 and antenna terminal 63 for transmitting high-frequency signals from antenna 71.
[0038] Furthermore, filter 61 is not limited to a transmitting filter; it can also be a duplexer containing both a transmitting filter and a receiving filter, or a multiplexer containing three or more filters.
[0039] (2.2) Switch
[0040] like Figure 1 As shown, switch 62 is a switch that switches the path connected to antenna terminal 63. In other words, switch 62 is a switch that switches the filter connected to antenna terminal 63 from among a plurality of filters including filter 61.
[0041] Switch 62 has a common terminal 621 and multiple (two in the example) select terminals 622, 623. Common terminal 621 is connected to antenna terminal 63. Select terminal 622 is connected to filter 61. Select terminal 623 is connected to another filter (not shown) different from filter 61.
[0042] Switch 62 is, for example, a switch capable of connecting any one of multiple selectable terminals 622, 623 to a common terminal 621. Switch 62 is, for example, a switch IC (Integrated Circuit). For example, switch 62 is controlled by signal processing circuit 72 (described later). Switch 62 switches the connection state between the common terminal 621 and the multiple selectable terminals 622, 623 according to control signals from RF signal processing circuit 75 of signal processing circuit 72. Alternatively, switch 62 can also be a switch capable of simultaneously connecting multiple selectable terminals 622, 623 to the common terminal 621. In this case, switch 62 is a switch capable of one-to-many connections (direct mapping switch).
[0043] (2.3) Antenna terminal
[0044] like Figure 1 As shown, antenna terminal 63 is the terminal for connecting to antenna 71, which will be described later. High-frequency signals from high-frequency circuit 6 are output to antenna 71 via antenna terminal 63. Additionally, although not shown, high-frequency signals from antenna 71 are output to high-frequency circuit 6 via antenna terminal 63.
[0045] (3) Communication device
[0046] Next, the communication device 7 using the high-frequency circuit 6 will be described with reference to the accompanying drawings.
[0047] like Figure 1 As shown, the communication device 7 includes a high-frequency circuit 6, an antenna 71, a signal processing circuit 72, and a power supply circuit 73.
[0048] (3.1) Signal processing circuit
[0049] The signal processing circuit 72 includes a baseband signal processing circuit 74 and an RF signal processing circuit 75. The signal processing circuit 72 outputs a high-frequency signal to the transmitting circuit 2.
[0050] The baseband signal processing circuit 74, for example, is a BBIC (Baseband Integrated Circuit), which performs signal processing on high-frequency signals. The frequency of high-frequency signals is, for example, from several hundred MHz to several GHz.
[0051] The baseband signal processing circuit 74 generates I-phase and Q-phase signals based on the baseband signal. The baseband signal can be, for example, an externally input audio signal or image signal. The baseband signal processing circuit 74 performs IQ modulation processing by combining the I-phase and Q-phase signals and outputs a transmit signal. At this time, the transmit signal is generated as a modulated signal (IQ signal) obtained by amplitude modulation of the carrier signal with a period longer than the period of the carrier signal at a specified frequency. The modulated signal output from the baseband signal processing circuit 74 is output as the IQ signal. The IQ signal represents the amplitude and phase on the IQ plane. The frequency of the IQ signal is, for example, around several MHz to several tens of MHz.
[0052] The RF signal processing circuit 75 is, for example, an RFIC (Radio Frequency Integrated Circuit) that performs signal processing on high-frequency signals. The RF signal processing circuit 75, for example, performs prescribed signal processing on the modulated signal (IQ signal) output from the baseband signal processing circuit 74. More specifically, the RF signal processing circuit 75 performs up-modulation and other signal processing on the modulated signal output from the baseband signal processing circuit 74, and outputs the processed high-frequency signal to the power amplifier circuit 1. Furthermore, the RF signal processing circuit 75 is not limited to performing a direct conversion from the modulated signal to a high-frequency signal. The RF signal processing circuit 75 can also convert the modulated signal into an intermediate frequency (IF) signal and generate a high-frequency signal based on the converted IF signal.
[0053] The signal processing circuit 72 outputs a power control signal to the power supply circuit 73. The power control signal is a signal containing information related to changes in the amplitude of the high-frequency signal, and is output from the signal processing circuit 72 to the power supply circuit 73 to change the amplitude of the power supply voltage V1. The power control signal may be, for example, an I-phase signal and a Q-phase signal.
[0054] (3.2) Power supply circuit
[0055] The power supply circuit 73 supplies power supply voltage V1 to the power amplifier circuit 1. More specifically, the power supply circuit 73 includes an input terminal (not shown) for receiving a power control signal and a voltage generation unit (not shown) for generating the power supply voltage V1. The input terminal is connected to the signal processing circuit 72, and a power control signal is received from the signal processing circuit 72. The power supply circuit 73 generates the power supply voltage V1 based on the power control signal input to the input terminal. At this time, the power supply circuit 73 changes the amplitude of the power supply voltage V1 based on the power control signal from the signal processing circuit 72. In other words, the power supply circuit 73 is an envelope tracking circuit that generates a power supply voltage V1 that varies according to the envelope of the amplitude of the high-frequency signal output from the signal processing circuit 72. The power supply circuit 73 is, for example, configured as a DC-DC converter, which detects the amplitude level of the high-frequency signal based on the I-phase signal and the Q-phase signal, and uses the detected amplitude level to generate the power supply voltage V1.
[0056] Additionally, the power supply circuit 73 is connected to a battery (not shown) of a terminal equipped with the high-frequency circuit 6, and supplies a battery voltage V2 from the battery to the power supply circuit 73. The power supply circuit 73 extracts the envelope based on the modulation signal of the high-frequency signal, generates a power supply voltage V1 corresponding to the level of the envelope, and supplies it to the power amplifier circuit 1.
[0057] (4) Structural elements of power amplifier circuit
[0058] Hereinafter, the structural elements of the power amplifier circuit 1 of Embodiment 1 will be described with reference to the accompanying drawings. The power amplifier circuit 1 of Embodiment 1 is composed of a single-stage amplifier circuit.
[0059] (4.1) Transmitting circuit
[0060] like Figure 1 as well as Figure 2 As shown, the transmitting circuit 2 of Embodiment 1 includes a transistor 21 (amplifying element), a bias circuit 22, an inductor 23, a resistor 24, a resistor 25, an input matching circuit 26, and an output matching circuit 27. The transmitting circuit 2 is, for example, composed of a single-chip IC containing an HBT (Heterojunction Bipolar Transistor).
[0061] (4.2) Transistor
[0062] like Figure 1 as well as Figure 2As shown, transistor 21 is, for example, an NPN transistor, an amplifying element that receives power from the supply voltage V1 and amplifies the high-frequency signal. Transistor 21 amplifies the high-frequency signal output from the RF signal processing circuit 75. The base of transistor 21 is connected to the output of the input matching circuit 26. Alternatively, the base of transistor 21 can also be electrically connected to the output of the input matching circuit 26 via a capacitor (not shown). The collector of transistor 21 is electrically connected to inductor 23. The emitter of transistor 21 is grounded.
[0063] A transistor 21 and an inductor 23 form an emitter-grounded circuit that amplifies the high-frequency signal input to the base. A power supply voltage V1 is supplied to the emitter-grounded circuit. The high-frequency signal output from the input matching circuit 26 is input to the base of transistor 21. Furthermore, a bias circuit 22 is connected to the base of transistor 21 via a resistor 24, and a predetermined bias current is superimposed on the high-frequency signal output from the input matching circuit 26. The collector of transistor 21 is connected to the power supply circuit 73 via the inductor 23. A power supply voltage V1 controlled according to the amplitude level of the high-frequency signal is applied to the collector of transistor 21 from the power supply circuit 73. Additionally, the collector of transistor 21 is connected to the output terminal 12 via the output matching circuit 27.
[0064] Here, as mentioned above, due to the use of digital ET method, the amplitude level of power supply voltage V1 varies based on the amplitude of the high-frequency signal.
[0065] (4.3) Bias Circuit
[0066] like Figure 2 As shown, the bias circuit 22 is a circuit used to bias the transistor 21 toward the operating point. The bias circuit 22 is, for example, composed of a transistor such as an HBT.
[0067] The bias circuit 22 is connected to the base of the transistor 21. More specifically, the bias circuit 22 has an output terminal connected between the output terminal of the input matching circuit 26 and the base of the transistor 21. Moreover, the bias circuit 22 is configured to supply a bias voltage (bias current) to the base of the transistor 21.
[0068] Although the diagram is omitted, a battery voltage V2, such as that supplied from a battery in a communication device 7 equipped with high-frequency circuit 6, is applied as a bias voltage to the collector of the transistor constituting bias circuit 22. The emitter of the transistor constituting bias circuit 22 is connected to the base of transistor 21. Furthermore, bias circuit 22 is not limited to the structure described above; any circuit that biases transistor 21 toward its operating point can have other structures.
[0069] (4.4) Input Matching Circuit
[0070] like Figure 1As shown, the input matching circuit 26 is connected to the input side of transistor 21 and is used to match the output impedance of the circuit on the input side of transistor 21 (e.g., RF signal processing circuit 75) with the input impedance of transistor 21. The input matching circuit 26 is composed of, for example, at least one of an inductor and a capacitor.
[0071] (4.5) Output Matching Circuit
[0072] like Figure 1 As shown, the output matching circuit 27 is connected to the output side of transistor 21 and is used to match the output impedance of transistor 21 with the input impedance of a circuit (e.g., filter 61) on the output side of transistor 21. The output matching circuit 27 is composed of, for example, at least one of an inductor and a capacitor. The output matching circuit 27 can be impedance varied by the control circuit 3.
[0073] The output matching circuit 27 can, for example, switch the connection state of the inductor or capacitor by turning the switch on and off using the control circuit 3, thereby changing the impedance. Alternatively, as another example, if the inductor is a variable inductor, the inductance of the variable inductor can be changed using the control circuit 3, thereby changing the impedance of the output matching circuit 27. Or, if the capacitor is a variable capacitor, the capacitance of the variable capacitor can be changed using the control circuit 3, thereby changing the impedance of the output matching circuit 27.
[0074] (4.6) First terminal
[0075] like Figure 1 As shown, the first terminal 4 is connected to the signal processing circuit 72. A MIPI (Mobile Industry Processor Interface) signal (serial data signal) is input from the signal processing circuit 72 to the first terminal 4. The MIPI signal contains information based on the MIPI standard (serial data transmission standard). The MIPI signal input to the first terminal 4 is output to the control circuit 3.
[0076] (4.7) Second terminal
[0077] like Figure 1 As shown, the second terminal 5 is connected to path P1 between the signal processing circuit 72 and the power supply circuit 73. A digital signal is input to the second terminal 5. This digital signal is different from the MIPI signal. The digital signal contains information related to the amplitude variation of the high-frequency signal, such as the IQ signal output from the signal processing circuit 72 to the power supply circuit 73. The digital signal input to the second terminal 5 is output to the control circuit 3.
[0078] exist Figure 1 In the example, for the second terminal 5, a power control signal is input as a digital signal from path P1 connecting the signal processing circuit 72 and the power supply circuit 73. As described above, the power control signal is a signal containing information related to the change in the amplitude of the high-frequency signal. In order to change the amplitude of the power supply voltage V1, the power control signal is output from the signal processing circuit 72 to the power supply circuit 73.
[0079] (4.8) Control Circuit
[0080] like Figure 1 As shown, control circuit 3 controls transmitting circuit 2. More specifically, control circuit 3 controls bias circuit 22, input matching circuit 26, and output matching circuit 27.
[0081] Control circuit 3 controls transmitting circuit 2 based on the digital signal input to second terminal 5. In embodiment 1, control circuit 3 controls the impedance of output matching circuit 27 based on the digital signal input to second terminal 5. The digital signal corresponds to the power supply voltage V1 of transistor 21, so control circuit 3 can grasp the change in amplitude level of power supply voltage V1 of transistor 21 based on the digital signal.
[0082] (5) Operation of the power amplifier circuit
[0083] Next, refer to Figure 3 as well as Figure 4 The operation of the power amplifier circuit 1 in Embodiment 1 will be explained.
[0084] In power amplifier circuit 1, digital ET is used, so as... Figure 4 As shown, the amplitude level of the power supply voltage V1 changes in stages. Therefore, compared to the case of analog ET, in transistor 21 (refer to...) Figure 1 When the output power of transistor 21 changes, it is difficult to keep the gain constant or make it change smoothly, but rather the gain changes in stages. In other words, compared with the analog ET case, the gain variation is wider in the digital ET case when the output power of transistor 21 changes.
[0085] like Figure 3 As shown, the power-added efficiency varies depending on the amplitude level of the supply voltage V1. More specifically, the power-added efficiency increases as the supply voltage V1 increases.
[0086] Additionally, according to the output matching circuit 27 (refer to...) Figure 1 The relationship between the impedance of the power supply voltage V1 and the power-added efficiency changes. Figure 3 Characteristic A1 is the characteristic when the impedance of the output matching circuit 27 is relatively small. Figure 3Characteristic A3 is the characteristic when the impedance of the output matching circuit 27 is relatively large. Figure 3 Characteristic A2 refers to the condition where the impedance of the output matching circuit 27 is greater than that of characteristic A1 and less than that of characteristic A3. When the impedance of the output matching circuit 27 is lower, the skewness of the power-added efficiency relative to the supply voltage V1 is smaller. Figure 3 Characteristic A1). When the impedance of the output matching circuit 27 is large, the power-added efficiency relative to the supply voltage V1 is significantly tilted ( Figure 3 Characteristic A3).
[0087] With the same power supply voltage V1 amplitude level, the higher the impedance of the output matching circuit 27, the greater the power-added efficiency. With the same power-added efficiency, the lower the impedance of the output matching circuit 27, the higher the power supply voltage V1.
[0088] In the power amplifier circuit 1 of embodiment 1, the control circuit 3 (refer to...) Figure 1 In order to keep the power-added efficiency at a high level even when the amplitude level of the power supply voltage V1 changes, the output matching circuit 27 is controlled.
[0089] First, control circuit 3 predicts the amplitude level of the power supply voltage V1. More specifically, control circuit 3 acquires the input to the second terminal 5 (refer to...). Figure 1 The digital signal is from the signal processing circuit 72 (see reference 72). As described above, the digital signal is from the signal processing circuit 72 (see reference 72). Figure 1 Output to power supply circuit 73 (refer to) Figure 1 The control circuit 3 predicts the amplitude level of the power supply voltage V1 based on the digital signal that serves as the IQ signal.
[0090] Next, the control circuit 3 controls the output matching circuit 27 so that its impedance changes according to the amplitude level of the power supply voltage V1. When the power supply voltage V1 is high, the control circuit 3 controls the output matching circuit 27 so that its impedance decreases. On the other hand, when the power supply voltage V1 is low, the control circuit 3 controls the output matching circuit 27 so that its impedance increases.
[0091] The operation described above is performed by power amplifier circuit 1, such as... Figure 4 As shown, when the power supply voltage V1 is high, the impedance of the output matching circuit 27 is reduced to prioritize output power. Figure 4 (Power emphasis). On the other hand, when the power supply voltage V1 is low, the impedance of the output matching circuit 27 is increased to emphasize power-added efficiency. Figure 4(Efficiency is a key consideration). In other words, it enables the impedance change of the output matching circuit 27 to follow the amplitude level change of the power supply voltage V1.
[0092] Based on the above, even when the amplitude level of the power supply voltage V1 changes, by changing the impedance of the output matching circuit 27, the variation width of the power-added efficiency can be reduced, and the circuit can operate stably with a higher power-added efficiency. Therefore, the variation width of the gain can also be reduced.
[0093] On the other hand, even if the amplitude level of the power supply voltage V1 changes, the impedance of the output matching circuit 27 remains constant. The impedance of the output matching circuit 27 is set to the impedance when the output power is at its maximum (a smaller impedance), thus reducing the power-added efficiency.
[0094] (6) Effect
[0095] In the power amplifier circuit 1 of embodiment 1, the control circuit 3 controls the transmitting circuit 2 based on the digital signal input to the second terminal 5. This enables operation at high frequencies and further reduces power consumption.
[0096] Here, a power supply voltage V1 with an amplitude level that varies based on the amplitude of the high-frequency signal is supplied to transistor 21 (amplifying element). The digital signal contains information related to the amplitude variation of the high-frequency signal. Therefore, by adjusting the power supply voltage V1 to transistor 21 according to the amplitude variation of the high-frequency signal, the efficiency of the transmitting circuit 2 as a whole can be optimized. As a result, it can correspond to high frequencies and further reduce power consumption.
[0097] In the power amplifier circuit 1 of embodiment 1, the control circuit 3 controls the impedance of the output matching circuit 27 based on a digital signal different from the MIPI signal (serial data signal). As a result, the gain and power-added efficiency can be improved.
[0098] In the power amplifier circuit 1 of Embodiment 1, a power control signal is input as a digital signal to the second terminal 5 from the path P1 connecting the signal processing circuit 72 and the power supply circuit 73. This allows for the easy acquisition of a digital signal containing information related to changes in the amplitude of the high-frequency signal.
[0099] (Implementation Method 2)
[0100] like Figure 5 As shown, the power amplifier circuit 1 of Embodiment 2 controls the variable capacitor section 29 based on the digital signal input to the second terminal 5, which is different from the power amplifier circuit 1 of Embodiment 1 (see reference). Figure 1(Different). Furthermore, regarding the power amplifier circuit 1 of Embodiment 2, the same reference numerals are added to the same structural elements as those of the power amplifier circuit 1 of Embodiment 1, and the descriptions are omitted.
[0101] (1) Structure
[0102] like Figure 5 As shown, the power amplifier circuit 1 of Embodiment 2 includes a transmitting circuit 2, a control circuit 3, a first terminal 4, and a second terminal 5. Furthermore, the high-frequency circuit 6 of Embodiment 2 is similar to the high-frequency circuit 6 of Embodiment 1 (see reference 1). Figure 1 The communication device 7 of Embodiment 2 is identical to that of Embodiment 1, including a power amplifier circuit 1, a filter 61, a switch 62, and an antenna terminal 63. Furthermore, the communication device 7 of Embodiment 2 is the same as that of Embodiment 1 (see...). Figure 1 It is the same as the one that has a high-frequency circuit 6, an antenna 71, a signal processing circuit 72, and a power supply circuit 73.
[0103] (1.1) Transmitting circuit
[0104] like Figure 5 As shown, the transmitting circuit 2 of Embodiment 2 includes multiple (two in the example) transistors 21a and 21b (amplifying elements) and multiple (two in the example) bias circuits 22a and 22b. Additionally, the transmitting circuit 2 includes multiple (two in the example) inductors 23a and 23b, multiple (two in the example) resistors 24a and 24b, multiple (three in the example) resistors 25a, 25b, and 25c, an input matching circuit 26, an output matching circuit 27, a matching circuit 28, and a variable capacitor section 29.
[0105] (1.2) Transistor
[0106] like Figure 5 As shown, transistor 21a is, for example, an NPN transistor, which is an amplifying element that amplifies the high-frequency signal output from the RF signal processing circuit 75. The base of transistor 21a is connected to the output of the input matching circuit 26. Alternatively, the base of transistor 21a can also be electrically connected to the output of the input matching circuit 26 via a capacitor (not shown). The collector of transistor 21a is electrically connected to inductor 23a. The emitter of transistor 21a is grounded.
[0107] A transistor 21a and an inductor 23a form an emitter-grounded circuit that amplifies the high-frequency signal input to the base. A power supply voltage V11 is supplied to the emitter-grounded circuit. The high-frequency signal output from the input matching circuit 26 is input to the base of transistor 21a. Furthermore, a bias circuit 22a is connected to the base of transistor 21a via a resistor 24a, and a predetermined bias current is superimposed on the high-frequency signal output from the input matching circuit 26. The collector of transistor 21a is connected to a power supply circuit 73 via an inductor 23a. A power supply voltage V11 controlled according to the amplitude level of the high-frequency signal is applied to the collector of transistor 21a from the power supply circuit 73. Additionally, the collector of transistor 21a is connected to transistor 21b via a matching circuit 28.
[0108] like Figure 5 As shown, transistor 21b is, for example, an NPN transistor, which is an amplifying element that further amplifies the high-frequency signal amplified in transistor 21b. The base of transistor 21b is connected to the output of matching circuit 28. Alternatively, the base of transistor 21b can also be electrically connected to the output of matching circuit 28 via a capacitor (not shown). The collector of transistor 21b is electrically connected to inductor 23b. The emitter of transistor 21b is grounded.
[0109] A transistor 21b and an inductor 23b form an emitter-grounded circuit that amplifies the high-frequency signal input to the base. A power supply voltage V12 is supplied to the emitter-grounded circuit. The high-frequency signal output from the matching circuit 28 is input to the base of transistor 21b. Furthermore, a bias circuit 22b is connected to the base of transistor 21b via a resistor 24b, and a predetermined bias voltage is superimposed on the high-frequency signal output from the matching circuit 28. The collector of transistor 21b is connected to a power supply circuit 73 via an inductor 23b. A power supply voltage V12 controlled according to the amplitude level of the high-frequency signal is applied to the collector of transistor 21b from the power supply circuit 73. Additionally, the collector of transistor 21b is connected to the output terminal 12 via an output matching circuit 27.
[0110] (1.3) Bias Circuit
[0111] Figure 5 The bias circuit 22a shown is used to bias the transistor 21a toward the operating point. The bias circuit 22a is constructed, for example, by an HBT transistor.
[0112] The bias circuit 22a is connected to the base of the transistor 21a. More specifically, the bias circuit 22a has an output terminal connected between the output terminal of the input matching circuit 26 and the base of the transistor 21a. Moreover, the bias circuit 22a is configured to supply a bias voltage (bias current) to the base of the transistor 21a.
[0113] Although the diagram is omitted, a battery voltage V2 supplied from a battery in a communication device 7 equipped with high-frequency circuit 6 is applied as a bias voltage to the collector of the transistor constituting bias circuit 22a. The emitter (output terminal of bias circuit 22a) of the transistor constituting bias circuit 22a is connected to the base of transistor 21a. Furthermore, bias circuit 22a is not limited to the structure described above; any circuit that biases transistor 21a toward its operating point can have other structures.
[0114] Figure 5 The bias circuit 22b shown is used to bias transistor 21b toward the operating point. The bias circuit 22b is constructed, for example, by an HBT transistor.
[0115] The bias circuit 22b is connected to the base of the transistor 21b. More specifically, the bias circuit 22b has an output terminal connected between the output terminal of the matching circuit 28 and the base of the transistor 21b. Moreover, the bias circuit 22b is configured to supply a bias voltage (bias current) to the base of the transistor 21b.
[0116] Although the diagram is omitted, a battery voltage V2 supplied from a battery in a communication device 7 equipped with high-frequency circuit 6 is applied as a bias voltage to the collector of the transistor constituting bias circuit 22b. The emitter of the transistor constituting bias circuit 22b (the output terminal of bias circuit 22b) is connected to the base of transistor 21b. Furthermore, bias circuit 22b is not limited to the structure described above; any circuit that biases transistor 21b toward its operating point can have other structures.
[0117] (1.4) Matching Circuit
[0118] like Figure 5 As shown, the matching circuit 28 is disposed between transistors 21a and 21b, and is used to match the output impedance of transistor 21a with the input impedance of transistor 21b. The matching circuit 28 is composed of, for example, at least one of an inductor and a capacitor.
[0119] (1.5) Variable Capacitor Section
[0120] like Figure 5 As shown, the variable capacitor section 29 is disposed between the base (input terminal) and collector (output terminal) of the transistor 21a. More specifically, as... Figure 6 As shown, the variable capacitor section 29 includes a variable capacitor diode 291 and a capacitor 292. If the power supply voltage V11 increases, the capacitance value of the variable capacitor section 29 decreases. The variable capacitor section 29 is connected between the base and collector of the primary transistor 21a, which is the first transistor in the two-stage transistors 21a and 21b to receive a high-frequency signal.
[0121] The anode of the variable capacitor diode 291 is connected to the base of transistor 21a, and the cathode is connected to capacitor 292. More specifically, the variable capacitor diode 291 is connected to the path between the output of the input matching circuit 26 and the base of transistor 21a. The variable capacitor diode 291 changes as a reverse voltage V3 of the voltage across its terminals according to the capacitor control signal described later.
[0122] Capacitor 292 is disposed between the variable capacitor diode 291 and the collector of transistor 21a. More specifically, the first end of capacitor 292 is connected to the negative terminal of variable capacitor diode 291, and the second end is connected to the path between the collector of transistor 21a and power supply circuit 73.
[0123] like Figure 7 As shown, the higher the voltage across the variable capacitor diode 291, i.e., the reverse voltage V3, the smaller the capacitance value of the variable capacitor section 29 (the capacitance value between the base and collector of the transistor 21a). For the variable capacitor section 29, the capacitance value of the variable capacitor section 29 can be changed by adjusting the reverse voltage V3 of the variable capacitor diode 291.
[0124] (1.6) Control Circuit
[0125] like Figure 5 As shown, in Embodiment 2, the control circuit 3 controls the variable capacitor section 29. More specifically, the control circuit 3 controls the variable capacitor section 29 to change its capacitance value based on the digital signal input to the second terminal 5. The control circuit 3 outputs a capacitance control signal to change the capacitance value of the variable capacitor section 29, thereby controlling the variable capacitor section 29.
[0126] (2) Operation of the power amplifier circuit
[0127] Next, refer to Figure 5 The operation of the power amplifier circuit 1 in Embodiment 2 will be explained.
[0128] In power amplifier circuit 1, a digital ET is used, so the amplitude level of the power supply voltage V11 changes in stages. Therefore, compared to the case of analog ET, it is difficult to keep the gain constant or make it change smoothly when the output power of transistor 21a changes, and the gain changes in stages instead. In other words, compared to the case of analog ET, the gain variation is wider in the case of digital ET when the output power of transistor 21 changes.
[0129] Therefore, in Embodiment 2, the power amplifier circuit 1 controls the capacitance value of the variable capacitor section 29 so that even when the amplitude level of the power supply voltage V11 changes, the gain variation width is reduced.
[0130] First, control circuit 3 predicts the amplitude level of power supply voltage V11. More specifically, control circuit 3 acquires the digital signal input to the second terminal 5. This digital signal is the IQ signal output from signal processing circuit 72 to power supply circuit 73. Control circuit 3 predicts the amplitude level of power supply voltage V11 based on the digital signal, which is the IQ signal.
[0131] Next, the control circuit 3 controls the variable capacitor section 29 so that its capacitance value changes according to the amplitude level of the power supply voltage V11. As described above, the capacitance value of the variable capacitor section 29 varies depending on the reverse voltage V3 of the variable capacitor diode 291 of the variable capacitor section 29.
[0132] like Figure 8 As shown, when the power supply voltage V11 increases and the gain increases ( Figure 8 Characteristic B2) requires a reduction in gain. In this case, control circuit 3 controls the variable capacitor section 29 to increase its capacitance value. Control circuit 3 increases the capacitance value of the variable capacitor section 29 by reducing the reverse voltage V3 of the variable capacitor diode 291. Therefore, the gain can be reduced when the power supply voltage V11 is high. Figure 8 Characteristic B1).
[0133] On the other hand, when the power supply voltage V11 decreases and the gain decreases ( Figure 8 Characteristic B3) requires increased gain. In this case, control circuit 3 controls the variable capacitor section 29 to reduce its capacitance value. Control circuit 3 reduces the capacitance value of the variable capacitor section 29 by increasing the reverse voltage V3 of the variable capacitor diode 291. Therefore, the gain can be increased even when the power supply voltage V11 is low. Figure 8 Characteristic B1).
[0134] As described above, the higher the reverse voltage V3 of the variable capacitor diode 291, the smaller the capacitance value of the variable capacitor section 29.
[0135] The capacitance of the variable capacitor section 29 decreases as the power supply voltage V11 increases. Therefore, when the power supply voltage V11 is low, the capacitance between the base and collector of the transistor 21a is large, and when the power supply voltage V11 is high, the capacitance is small.
[0136] Furthermore, the smaller the capacitance value of the variable capacitor section 29, the smaller the negative feedback applied to the transistor 21a, and therefore the higher the gain of the transistor 21a. This reduces the gain deviation between cases where the power supply voltage V11 is low and cases where the power supply voltage V11 is high.
[0137] Therefore, by reducing the gain deviation, the width of the gain variation when the output power changes can be reduced compared to cases with a large gain deviation.
[0138] (3) Effect
[0139] In the power amplifier circuit 1 of Embodiment 2, the control circuit 3 controls the variable capacitor section 29 based on a digital signal different from the MIPI signal (serial data signal). As a result, the gain and power-added efficiency can be improved.
[0140] Furthermore, in embodiment 2, each of the multiple resistors 25a, 25b, and 25c is not a necessary structural element, and the transmitting circuit 2 may not have the multiple resistors 25a, 25b, and 25c.
[0141] (Implementation Method 3)
[0142] like Figure 9 As shown, the power amplifier circuit 1 of Embodiment 3 controls the variable capacitor section 29 and the bias circuit 22a based on the digital signal input to the second terminal 5, which is different from the power amplifier circuit 1 of Embodiment 2 (see Figure 1). Figure 5 (Different). Furthermore, regarding the power amplifier circuit 1 of Embodiment 3, the same reference numerals are added to the same structural elements as those of the power amplifier circuit 1 of Embodiment 2, and the descriptions are omitted.
[0143] (1) Structure
[0144] like Figure 9 As shown, the power amplifier circuit 1 of Embodiment 2 includes a transmitting circuit 2, a control circuit 3, a first terminal 4, and a second terminal 5. Furthermore, the high-frequency circuit 6 of Embodiment 3 is similar to the high-frequency circuit 6 of Embodiment 2 (see reference 6). Figure 5 The communication device 7 of Embodiment 3 is identical to that of Embodiment 2, including a power amplifier circuit 1, a filter 61, a switch 62, and an antenna terminal 63. Furthermore, the communication device 7 of Embodiment 3 is the same as that of Embodiment 2 (see...). Figure 5 It is the same as the one that has a high-frequency circuit 6, an antenna 71, a signal processing circuit 72, and a power supply circuit 73.
[0145] (1.1) Transmitting circuit
[0146] The transmitting circuit 2 in Embodiment 3 is the same as the transmitting circuit 2 in Embodiment 2, such as... Figure 9As shown, the circuit includes multiple (two in the example) transistors 21a and 21b (amplifying elements) and multiple (two in the example) bias circuits 22a and 22b. Additionally, the transmitting circuit 2 includes multiple (two in the example) inductors 23a and 23b, multiple (two in the example) resistors 24a and 24b, multiple (three in the example) resistors 25a, 25b, and 25c, an input matching circuit 26, an output matching circuit 27, a matching circuit 28, and a variable capacitor section 29.
[0147] (1.2) Control Circuit
[0148] like Figure 9 as well as Figure 10 As shown, in Embodiment 3, the control circuit 3 controls the variable capacitor section 29 and the bias circuit 22a based on the digital signal input to the second terminal 5. More specifically, the control circuit 3 controls the bias current I1 of the transistor 21a based on the digital signal input to the second terminal 5.
[0149] (2) Operation of the power amplifier circuit
[0150] Next, refer to Figure 9 as well as Figure 11 The operation of the power amplifier circuit 1 in Embodiment 3 will be explained.
[0151] In power amplifier circuit 1, due to the use of digital ET, the amplitude level of the power supply voltage V11 changes in stages. Therefore, compared to the case of analog ET, it is difficult to keep the gain constant or make it change smoothly when the output power of transistor 21a changes, resulting in a staged gain change. In other words, compared to the case of analog ET, the gain variation is wider in the case of digital ET when the output power of transistor 21 changes.
[0152] Therefore, in embodiment 3, the power amplifier circuit 1 controls the bias current I1 so that the gain variation width is small even when the amplitude level of the power supply voltage V11 changes. The control circuit 3 controls the bias circuit 22a to change the bias current I1 in conjunction with the capacitor control signal used to change the capacitance value of the variable capacitor section 29.
[0153] like Figure 11 As shown, the characteristic representing the relationship between bias current I1 and gain is that the gain increases as the bias current I1 increases. Increasing the bias current I1 improves the gain, while decreasing the bias current I1 decreases the gain.
[0154] When the power supply voltage V11 increases and the gain increases, it is necessary to reduce the gain. In this case, the control circuit 3 controls the bias circuit 22a to reduce the bias current I1. Thus, the gain can be reduced even when the power supply voltage V11 is high.
[0155] On the other hand, when the power supply voltage V11 decreases and the gain decreases, it is necessary to increase the gain. In this case, the control circuit 3 controls the bias circuit 22a to increase the bias current I1. Thus, the gain can be increased even when the power supply voltage V11 is low.
[0156] (3) Effect
[0157] In the power amplifier circuit 1 of embodiment 3, the control circuit 3 controls the bias current I1 of transistor 21a (amplifying element) based on a digital signal different from the MIPI signal (serial data signal). As a result, the gain and power-added efficiency can be improved.
[0158] Furthermore, in embodiment 3, each of the multiple resistors 25a, 25b, and 25c is not a necessary structural element, and the transmitting circuit 2 may not have the multiple resistors 25a, 25b, and 25c.
[0159] (Modified Example)
[0160] The power amplifier circuit 1 can be configured with only one stage of transistor 21 as the amplification element, or it can be configured with two stages of transistors 21a and 21b. Alternatively, the power amplifier circuit 1 can be configured with three or more stages of transistors. By having multiple stages of transistors, the power amplifier circuit 1 can further increase the gain of the high-frequency signal output from the power amplifier circuit 1, thereby improving the linearity of the high-frequency signal.
[0161] As a variation of the power amplifier circuit 1 in embodiments 2 and 3, the variable capacitor section 29 can be a variable capacitor section whose capacitance value changes analogically or digitally. For example, the variable capacitor section 29 can also be configured to have multiple fixed capacitance values, which are switched by a switch.
[0162] Furthermore, the variable capacitor section 29 is not limited to the variable capacitor diode 291; it can be any structure other than the variable capacitor diode 291, as long as it is a component used to make the capacitance value variable. For example, the variable capacitor section 29 can also be a digitally adjustable capacitor (DTC).
[0163] In the power amplifier circuit 1 of embodiments 2 and 3, when multiple stages of transistors 21a and 21b are provided as amplifying elements, a variable capacitor 29 is connected between the base and collector of the primary transistor 21a, which is the first to receive a high-frequency signal. Furthermore, in the modified power amplifier circuit 1 of embodiments 2 and 3, the structure of connecting the variable capacitor 29 to the primary transistor 21a is not limited. The variable capacitor 29 may also be connected between the base and collector of other transistors 21b, or between the base and collector of transistors 21a and 21b on both sides of the primary stage and other stages.
[0164] Furthermore, the second terminal 5 of the power amplifier circuit 1 is not limited to being connected to the path P1 connecting the signal processing circuit 72 and the power supply circuit 73; it can also be connected to the power supply circuit 73. In this case, the power supply circuit 73 not only has an input terminal (not shown) for inputting power control signals and a voltage generation unit for generating power supply voltages V1 (V11, V12), but also has an output terminal (not shown) for outputting power control signals. The second terminal 5 is connected to the output terminal of the power supply circuit 73. The power supply circuit 73 outputs the power control signal input to the input terminal from the output terminal. As described above, the power control signal input to the second terminal 5 is a digital signal. In this case, the power control signal can be input to the second terminal 5 without altering the path P1 connecting the signal processing circuit 72 and the power supply circuit 73.
[0165] The embodiments and modifications described above are only a part of the various embodiments and modifications of the present invention. Furthermore, the embodiments and modifications can be modified in various ways, depending on the design, as long as they achieve the objectives of the present invention.
[0166] (Way)
[0167] The following methods are disclosed in this specification.
[0168] The power amplifier circuit (1) of the first type includes a transmitting circuit (2), a control circuit (3), a first terminal (4), and a second terminal (5). The transmitting circuit (2) includes amplifying elements (transistors 21; 21a; 21b). The amplifying elements amplify the power of the high-frequency signal. The control circuit (3) controls the transmitting circuit (2). A serial data signal is input to the first terminal (4). The serial data signal is a signal based on a serial data transmission standard. A digital signal different from the serial data signal is input to the second terminal (5). The control circuit (3) controls the transmitting circuit (2) based on the digital signal input from the second terminal (5).
[0169] According to the power amplifier circuit (1) of the first method, it can be used at high frequencies and further reduce power consumption.
[0170] In the second power amplifier circuit (1), in the first method, the transmitting circuit (2) further includes an output matching circuit (27). The output matching circuit (27) is connected to the output side of the amplifying elements (transistors 21; 21a; 21b). The control circuit (3) controls the impedance of the output matching circuit (27) based on digital signals.
[0171] According to the power amplifier circuit (1) of the second method, the gain and power-added efficiency can be improved.
[0172] In the third-party power amplifier circuit (1), in either the first or second embodiment, the transmitting circuit (2) further includes a variable capacitor section (29). The variable capacitor section (29) is disposed between the input terminal (base) and the output terminal (collector) of the amplifying element (transistor 21; 21a; 21b). The control circuit (3) controls the variable capacitor section (29) based on digital signals.
[0173] According to the third-party power amplifier circuit (1), the gain and power-added efficiency can be improved.
[0174] In the power amplifier circuit (1) of the fourth type, in any of the first to third types, the control circuit (3) controls the bias current of the amplification elements (transistors 21; 21a; 21b) based on digital signals.
[0175] According to the power amplifier circuit (1) of the fourth method, the gain and power-added efficiency can be improved.
[0176] In the fifth power amplifier circuit (1), in any of the first to fourth methods, a power control signal is input as a digital signal to the second terminal (5) via the path (P1) connecting the signal processing circuit (72) and the power supply circuit (73). The signal processing circuit (72) outputs a high-frequency signal to the transmitting circuit (2). The power supply circuit (73) changes the amplitude of the power supply voltage (V1; V11; V12) of the amplifying elements (transistors 21; 21a; 21b) based on the power control signal from the signal processing circuit (72). The power control signal contains information related to the change in the amplitude of the high-frequency signal and is output from the signal processing circuit (72) to the power supply circuit (73) to change the amplitude of the power supply voltage (V1; V11; V12).
[0177] According to the power amplifier circuit (1) of the fifth method, it is possible to easily acquire a digital signal containing information related to the change in amplitude of the high-frequency signal.
[0178] The high-frequency circuit (6) of the sixth method includes any one of the power amplifier circuits (1) of the first to fifth methods and a filter (61). The filter (61) allows the high-frequency signal output from the power amplifier circuit (1) to pass through the amplifying elements (transistors 21; 21a; 21b) of the power amplifier circuit (1) which have been amplified.
[0179] According to the high-frequency circuit (6) of the sixth method, in the power amplifier circuit (1), based on the change in the amplitude of the high-frequency signal, not only can the power supply voltages (V1; V11; V12) to the amplifying elements (transistors 21; 21a; 21b) be optimized in terms of efficiency, but the overall efficiency of the transmitting circuit (2) can also be optimized. As a result, it can correspond to high frequencies and further reduce power consumption.
[0180] The communication device (7) of the seventh method includes the high-frequency circuit (6) of the sixth method and the signal processing circuit (72). The signal processing circuit (72) processes the high-frequency signal input to the power amplifier circuit (1) of the high-frequency circuit (6).
[0181] According to the communication device (7) of the seventh method, in the power amplifier circuit (1), based on the change in the amplitude of the high-frequency signal, not only can the power supply voltage (V1; V11; V12) of the amplifying elements (transistors 21; 21a; 21b) be optimized in terms of efficiency, but the overall efficiency of the transmitting circuit (2) can also be optimized. As a result, it can correspond to high frequencies and further reduce power consumption.
[0182] The power supply circuit (73) of the eighth type includes an input terminal, a voltage generation unit, and an output terminal. A power control signal is input to the input terminal. The power control signal contains information related to the amplitude change of the high-frequency signal. Based on the power control signal input to the input terminal, the voltage generation unit generates a power supply voltage (V1; V11; V12) to be supplied to the amplifying elements (transistors 21; 21a; 21b). The amplifying elements amplify the power of the high-frequency signal. The power control signal input to the input terminal is output to the output terminal.
[0183] Explanation of reference numerals in the attached figures
[0184] 1…Power amplifier circuit, 11…Input terminal, 12…Output terminal, 2…Transmitting circuit, 21, 21a, 21b…Transistors (amplifying elements), 22, 22a, 22b…Bias circuit, 23, 23a, 23b…Inductors, 24, 24a, 24b…Resistors, 25, 25a, 25b…Resistors, 26…Input matching circuit, 27…Output matching circuit, 28…Matching circuit, 29…Variable capacitor section, 291…Variable capacitor diode, 292…Capacitor, 3…Control circuit, 4…First terminal 5…Second terminal, 6…High frequency circuit, 61…Filter, 62…Switch, 621…Common terminal, 622, 623…Selection terminals, 63…Antenna terminal, 7…Communication device, 71…Antenna, 72…Signal processing circuit, 73…Power supply circuit, 74…Baseband signal processing circuit, 75…RF signal processing circuit, P1…Path, V1, V11, V12…Power supply voltage, V2…Battery voltage, V3…Reverse voltage, I1…Bias current, A1, A2, A3…Characteristics, B1, B2, B3…Characteristics.
Claims
1. A power amplifier circuit, wherein, have: The transmitting circuit includes a power amplification element that amplifies high-frequency signals; The control circuit controls the aforementioned transmitting circuit; The first terminal is input with a serial data signal based on the serial data transmission standard; as well as The second terminal receives a digital signal that is not based on the aforementioned serial data signal transmission standard. The control circuit controls the transmitting circuit based on the digital signal input from the second terminal.
2. The power amplifier circuit according to claim 1, wherein, The aforementioned transmitting circuit also includes an output matching circuit connected to the output side of the aforementioned amplifying element. The control circuit described above controls the impedance of the output matching circuit based on the digital signal described above.
3. The power amplifier circuit according to claim 1 or 2, wherein, The aforementioned transmitting circuit also includes a variable capacitor section disposed between the input and output terminals of the aforementioned amplifying element. The control circuit described above controls the variable capacitor section based on the digital signal described above.
4. The power amplifier circuit according to claim 1 or 2, wherein, The control circuit described above controls the bias current of the amplifying element based on the digital signal described above.
5. The power amplifier circuit according to claim 1 or 2, wherein, A power control signal is input to the second terminal as a digital signal via the path connecting the signal processing circuit and the power supply circuit. The signal processing circuit outputs the high-frequency signal to the transmitting circuit. The power supply circuit changes the amplitude of the power supply voltage of the amplifying element based on the power control signal from the signal processing circuit. The power control signal contains information related to the change in amplitude of the high-frequency signal. In order to change the amplitude of the power supply voltage, the power control signal is output from the signal processing circuit to the power supply circuit.
6. A high-frequency circuit, wherein, have: The power amplifier circuit according to any one of claims 1 to 5; and The filter allows the high-frequency signal output from the power amplifier circuit to pass through the amplifying element in the power amplifier circuit, whose power is amplified.
7. A communication device, wherein, have: The high-frequency circuit of claim 6; and The signal processing circuit outputs the high-frequency signal to the aforementioned transmitting circuit.
Citation Information
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