Thin film transistor, method of manufacturing the same, array substrate, and display device

Abstract

The application discloses a thin film transistor and a preparation method thereof, an array substrate and a display device. The source electrode and / or the drain electrode of the thin film transistor comprises an oxide layer and a metal layer which is combined with the oxide layer in a laminated manner, and the oxide layer is arranged in a laminated manner with an active layer. The source electrode and / or the drain electrode of the thin film transistor takes the oxide layer as a base layer, and a composite layer is formed by the base layer and the metal layer, so that the composite layer has strong mechanical properties, the surface of the metal layer is flat, the angle formed by the isotropic etching is steeper, the preparation method can effectively avoid the penetration of metal ions into the active layer to contaminate the active layer, the performance of the thin film transistor can be ensured to be stable, the efficiency and the yield are high, and the cost is reduced. The array substrate and the display device comprise the thin film transistor.

Description

Technical Field

[0001] This invention belongs to the field of thin-film transistor technology, specifically relating to a thin-film transistor and its fabrication method, array substrate, and display device. Background Technology

[0002] Thin film transistors (TFTs) are currently the main driving components in liquid crystal display devices and active matrix OLED display devices, and are directly related to the development direction of high-performance flat panel display devices.

[0003] Currently, as display products continuously pursue larger sizes and higher resolutions, the requirements for metal linewidth and wiring distance are becoming increasingly stringent. Nowadays, most Ultra High Definition (UD) televisions use copper instead of aluminum for their TFTs, and due to the dual requirements for size and resolution, some factories are gradually adopting the M2 (Data Line) copper process.

[0004] Copper processes offer excellent conductivity, leading to a significant increase in panel charging and discharging current. Often, this is achieved by widening the switch area during the process, but this method significantly impacts the aperture ratio. It necessitates compressing the linewidth to increase the aperture, resulting in narrower process space and a higher risk of process-related anomalies.

[0005] Therefore, it is necessary to improve the angle of the copper process. However, Cu acid is mainly composed of hydrogen peroxide. When the source and drain contain a composite layer structure of Mo and copper layers, the etching rate of the Mo layer by hydrogen peroxide is relatively slow. Therefore, the etching rates of the substrate Mo layer and copper layer are quite different, resulting in the phenomenon that the angle is too gentle during isotropic etching.

[0006] Furthermore, because Cu is inherently reactive, and when Mo is used as the underlying metal, the Mo particles are relatively dispersed. This can lead to Cu ions contaminating the underlying active layer, causing Cu ions to become doped into the active layer. Since Cu ions possess the effect of vacancy-electron interaction, this increases the leakage current of the switch. Even at high temperatures, a large current can still exist, resulting in abnormal operation. Summary of the Invention

[0007] The purpose of this application is to overcome the above-mentioned deficiencies of the prior art and provide a thin film transistor and its fabrication method, so that the isotropic etching angle of the base layer and metal layer contained in the source and / or drain is steeper, avoiding metal ions from entering the active layer and thus improving the electrical performance of the thin film transistor. This solves the technical problem that the isotropic etching angle of the base layer and metal layer of the source and drain contained in the existing thin film transistor is too gentle, and metal ions penetrate into the active layer.

[0008] To achieve the aforementioned objectives, a first aspect of this application provides a thin-film transistor. The thin-film transistor of this application includes: Substrate; The gate is disposed on the substrate. A gate insulating layer is stacked on the substrate and covers the gate. An active layer is disposed on the gate insulating layer and is away from the substrate. The source and drain are located on the active layer; The source and / or drain include an oxide layer and a metal layer stacked with the oxide layer, and the oxide layer is stacked with the active layer. The material of the oxide layer includes molybdenum oxide doped with non-metallic elements and / or a mixed oxide of doped metal oxide and molybdenum oxide.

[0009] A second aspect of this application provides a method for fabricating a thin-film transistor. The method for fabricating a thin-film transistor includes the following steps: A gate and a gate insulating layer are sequentially formed on a substrate, with the gate insulating layer covering the gate. An active layer is formed on the gate insulating layer; An oxide film containing molybdenum oxide is first formed on the active layer, and then a metal film layer is formed stacked on the oxide film layer; wherein, the material of the oxide layer includes molybdenum oxide doped with non-metallic elements or / and a mixed oxide of doped metal oxide and molybdenum oxide; The oxide film and the metal film are etched to form the source and / or drain.

[0010] A third aspect of this application provides an array substrate. The array substrate includes a thin-film transistor, and the thin-film transistor is the same as the one described in this application.

[0011] A fourth aspect of this application provides a display device. The display device includes an array substrate, and the array substrate is the same as the array substrate described in this application.

[0012] Compared with the prior art, this application has the following technical effects: The thin-film transistor of this application contains a source and / or drain with an oxide layer as the substrate layer. The composite layer formed by the oxide layer and the metal layer has the following advantages: First, it makes the angle formed by isotropic etching of the composite layer steeper, which effectively reduces the resistance of the source and / or drain, increases the circuit bottom, and improves the adhesion of photoresist. Second, it effectively enhances the bonding strength between the substrate layer and the metal layer, thereby enhancing the mechanical properties of the composite layer. Third, due to the presence of the oxide layer, the flatness of the metal layer is significantly improved, the stress release effect is good, and it can improve the warping and protrusion of the substrate after coating. It can also reduce the abnormal phenomena of machine failure and substrate scratches when entering the machine.

[0013] The method for fabricating thin-film transistors in this application sequentially forms an oxide film layer and a metal film layer on the active layer, effectively improving the flatness of the metal film layer and the density of the oxide film layer, while also achieving high bonding strength between the two layers. Furthermore, during the etching process, the etching rates of the oxide film layer and the metal film layer can be kept relatively close or synchronized, resulting in a steeper etching angle during isotropic etching. This increases the linewidth of the metal layers forming the source and / or drain, thereby improving the resistance of the source and / or drain and the adhesion of photoresist, as well as increasing etching efficiency. Simultaneously, due to the high density of the oxide film layer, it acts as an ion migration barrier, preventing metal ions generated during etching from penetrating into the active layer, thus ensuring the purity of the active layer and improving the electrical performance of the fabricated thin-film transistor. In addition, the fabrication method of the thin-film transistor in this application is easy to control, resulting in stable performance, high efficiency and yield of the fabricated thin-film transistor, and reduced costs.

[0014] Since both the array substrate and the display device of this application contain the thin-film transistors described above, the array substrate of this application has stable performance, which improves the display performance stability and high display quality of the display device using the array substrate of this application. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the TFT structure according to an embodiment of this application; Figure 2 This is a schematic diagram of the process flow for the fabrication method of the TFT in this application embodiment; Figure 3 The diagrams are schematic diagrams of the structures formed in steps S03 and S04 of the TFT fabrication method in the embodiments of this application; wherein, Figure a is a schematic diagram of the oxide film composite structure formed in step S03; and Figure b is a schematic diagram of the source and / or drain structure formed in step S04. Detailed Implementation

[0017] To make the technical problems, technical solutions, and beneficial effects of this application clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0018] In this application, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0019] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, "at least one of a, b, or c", or "at least one of a, b, and c", can both mean: a, b, c, ab (i.e., a and b), ac, bc, or abc, where a, b, and c can be single or multiple.

[0020] It should be understood that in the various embodiments of this application, the order of the above processes does not imply the order of execution. Some or all steps may be executed in parallel or sequentially. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0021] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0022] The weights of the relevant components mentioned in the embodiments of this application can refer not only to the specific content of each component, but also to the proportional relationship between the weights of the components. Therefore, any scaling up or down of the content of the relevant components according to the embodiments of this application is within the scope disclosed in the embodiments of this application. Specifically, the mass described in the embodiments of this application can be a well-known unit of mass in the chemical industry, such as µg, mg, g, or kg.

[0023] The terms "first" and "second" are used for descriptive purposes only, to distinguish objects, such as substances, from one another, and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. For example, without departing from the scope of the embodiments of this application, "first" may also be referred to as "second," and similarly, "second" may also be referred to as "first." Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0024] This application provides a thin-film transistor (TFT, hereinafter referred to as TFT), the structure of which is as follows: Figure 1 As shown, the structure includes a substrate 1, a gate 2, a gate insulating layer 3, an active layer 4, a source 5, and a drain 6. The gate 2 is disposed on the substrate 1. The gate insulating layer 3 is stacked on the substrate 1 and covers the gate 2. The active layer 4 is disposed on the gate insulating layer 3 and is away from the substrate 1. The source 5 and the drain 6 are disposed on the active layer 4.

[0025] In this embodiment, the source electrode 5 and / or drain electrode 6 of the TFT are composite layer structures, including an oxide layer and a metal layer stacked with the oxide layer, and the oxide layer is stacked with the active layer. Specifically, as shown in Figure 1, the source electrode 5 includes a first oxide layer 51 and a first metal layer 52 stacked with the first oxide layer 51, and the first oxide layer 51 is stacked with the active layer 4; the drain electrode 6 includes a second oxide layer 61 and a second metal layer 62 stacked with the second oxide layer 61, and the second oxide layer 61 is stacked with the active layer 4. The oxide layer specifically includes molybdenum oxide doped with non-metallic elements and / or a mixed oxide of doped metal oxide and molybdenum oxide. Thus, the source electrode 5 and / or drain electrode 6 of the TFT in this embodiment are composite layers formed with the oxide layer as the base layer and the metal layer. Specifically, the first oxide layer 51 and the first metal layer 52 form a composite layer structure for the source electrode 5; the second oxide layer 61 and the second metal layer 62 form a composite layer structure for the drain electrode 6. This design allows for a steeper angle formed by isotropic etching of the composite layer. Specifically, as shown... Figure 3 In Figure b, the larger angle γ effectively reduces the resistance of source 5 and / or drain 6, increases the width of the substrate metal layer on the circuit, and improves the adhesion of photoresist. This angle γ is the angle formed by the side of the composite layer and the surface of the active layer 4. Measurements show that this angle γ is greater than 60°, and further greater than or equal to 65°, as shown in Example 1 below where the angle γ is 80°. Simultaneously, it effectively enhances the bonding strength between the substrate layer (oxide layer) and the metal layer, thereby enhancing the mechanical properties of the composite layer. Furthermore, the presence of the oxide layer significantly improves the flatness of the metal layer, resulting in better stress release and reducing substrate warping and protrusion after coating. It also reduces downtime and substrate scratches during equipment entry. In addition, the high density of the oxide layer prevents metal ions generated during etching from penetrating into functional layers such as the active layer, ensuring the stability of the TFT's electrical performance.

[0026] The inventors discovered in their research that the material of the oxide layer is closely related to properties such as etching rate, oxide layer density, metal layer flatness, and bonding strength between the oxide layer and the metal layer. In the embodiments, the oxide layer contained in the source electrode 5 is specifically such as the first oxide layer 51 and / or the oxide layer contained in the drain electrode 6 is specifically such as the second oxide layer 61. The material may include, as described above, molybdenum oxide doped with non-metallic elements or / and a mixed oxide of doped metal oxide and molybdenum oxide.

[0027] In this embodiment, when the oxide layer contains the non-metallic element doped, the non-metallic element may include nitrogen. In this case, the non-metallic molybdenum oxide doped with the non-metallic element is nitrogen-doped molybdenum oxide. In this embodiment, the weight doping amount of nitrogen in the nitrogen-doped molybdenum oxide is 20%-40%.

[0028] When the oxide layer contains a mixed oxide of doped metal oxide and molybdenum oxide, in the embodiments, the doped metal oxide includes at least one of tungsten oxide and titanium oxide. Therefore, in a further embodiment, when the material of the oxide layer includes a mixed oxide of tungsten oxide and molybdenum oxide, it is a composite oxide formed from molybdenum oxide and tungsten oxide. In a specific embodiment, based on the total weight of molybdenum and tungsten elements being 100%, the weight content of tungsten element is 30%-50%.

[0029] When the material of the oxide layer includes a mixed oxide of titanium oxide and molybdenum oxide, it is a composite oxide formed by molybdenum oxide and titanium oxide. In a specific embodiment, the weight content of titanium element is 30%-40% based on 100% total weight of molybdenum and titanium elements.

[0030] The oxide layers are preferably made of materials with etching rates close to or even synchronized with those of the metal layers, particularly the copper metal layers. This results in steeper etching angles through isotropic etching, effectively increasing the width of the substrate, specifically the metal layer, and improving the adhesion of photoresist. Simultaneously, it reduces the resistance of the source 5 and / or drain 6. Secondly, the materials of these oxide layers result in high oxide layer density and excellent surface properties such as flatness, thereby improving the surface quality of the metal layer, including its flatness. Furthermore, it enhances stress relief, further mitigating substrate warping and protrusion after coating, and reducing downtime and substrate scratches. Additionally, it effectively strengthens the bond strength between the oxide and metal layers, thus enhancing the mechanical properties of the composite layer.

[0031] In the embodiments, the thickness of the oxide layer, specifically the first oxide layer 51 and / or the second oxide layer 61, can be 200 Å to 500 Å, specifically typical but not limiting thicknesses such as 200 Å, 250 Å, 300 Å, 350 Å, 400 Å, 450 Å, and 500 Å. This range of oxide layer thickness can enhance the aforementioned effects of the oxide layer. Furthermore, the material and thickness of the oxide layer can be simultaneously controlled and optimized, further enhancing the aforementioned effects of the oxide layer.

[0032] Furthermore, the oxide layer in the source electrode 5, specifically the first oxide layer 51, and the oxide layer in the drain electrode 6, specifically the second oxide layer 61, can be made of the same or different materials. For efficiency reasons, the oxide layers in the source electrode 5 and the drain electrode 6 are made of the same material to improve the efficiency of forming the source electrode 5 and the drain electrode 6.

[0033] Based on the aforementioned oxide layer materials and the size and resolution requirements of the display field, in this embodiment, the metal layer contained in the source electrode 5, specifically the first metal layer 52, and / or the metal layer contained in the drain electrode 6, specifically the second metal layer 62, is preferably made of copper. This allows the copper metal layer to have a similar or synchronous etching rate to the aforementioned oxide layer, particularly the molybdenum-tungsten alloy oxide layer, resulting in a steeper angle formed by isotropic etching. This effectively increases the width of the copper metal layer, significantly reducing the resistance of the source electrode 5 and / or the drain electrode 6 while improving the adhesion of photoresist. Furthermore, the copper metal layer exhibits high bonding strength with the oxide layer, particularly the molybdenum-tungsten alloy oxide layer, and also possesses high surface quality, such as flatness. Of course, other metal materials can also be used; for example, the metal of the metal layer can also be aluminum. Therefore, the metal of the metal layer includes at least one of copper and aluminum.

[0034] Furthermore, the thickness of the metal layer, specifically the first metal layer 52 and / or the second metal layer 62, can be 2200 Å-6000 Å, further 2250 Å-6000 Å, and even further 4350 Å-6000 Å. Of course, the thickness of the metal layer can be controlled and adjusted according to actual needs.

[0035] Furthermore, the materials of the metal layer in the source electrode 5, specifically the first metal layer 52, and the metal layer in the drain electrode 6, specifically the second metal layer 62, can be the same or different. For fabrication efficiency, the materials of the metal layers in the source electrode 5 and the drain electrode 6 are set to be the same to improve the efficiency of forming the source electrode 5 and the drain electrode 6.

[0036] In the above embodiments, the substrate 1 included in the TFT can be a conventional substrate, which can be selected according to the actual needs of display production, such as a glass substrate or a flexible substrate. When producing flexible display devices, the substrate 1 is selected as a flexible substrate.

[0037] The materials, thicknesses, and morphologies of the gate 2, gate insulating layer 3, and active layer 4 in the aforementioned TFT can be conventionally configured. For example, in the embodiment, the material of the gate 2 may include one or more of molybdenum (Mo), aluminum (Al), and copper (Cu). The material of the gate insulating layer 30 may include silicon nitride (SiNx), silicon oxide (SiOx), or a composite film of silicon nitride (SiNx) and silicon oxide (SiOx). The material of the active layer 4 may include one or more of indium gallium zinc oxide (IGZO) and indium zinc tin oxide (IZTO).

[0038] In a further embodiment, based on the TFT structure in the above embodiments, the TFT further includes a planarization layer 8, which at least covers the source electrode 5 and the drain electrode 6, as well as the channel region 7 between the source electrode 5 and the drain electrode 6. This planarization layer 8 is used to ensure good local and overall uniformity of the layers in the subsequently fabricated optoelectronic display device, and also serves as insulation between devices. In the embodiments, the material of the planarization layer 8 can be a protective material, such as a single-layer film formed from at least one of photoresist, polyimide, styrene, or polymethyl methacrylate, or a multilayer film.

[0039] Secondly, embodiments of this application also provide a method for fabricating the TFT described above. The process flow of the TFT fabrication method in this application embodiment is as follows: Figure 2 As shown, combined with Figure 1 It includes the following steps: S01: A gate 2 and a gate insulating layer 3 are sequentially formed on a substrate 1, such that the gate insulating layer 3 covers the gate 2. S02: An active layer 4 is formed on the gate insulating layer 3; S03: First, an oxide film layer is formed on the active layer 4, and then a metal film layer is formed stacked with the oxide film layer. S04: Etching the oxide film and metal film to form source 5 and / or drain 6.

[0040] The method for forming the gate 2 and gate insulating layer 3 in step S01 and the method for forming the active layer 4 in step S02 can be prepared according to the existing methods for forming the gate, gate insulating layer and active layer. Of course, the layers can also be formed sequentially according to the improved method based on the existing method.

[0041] The composite structure of the oxide film and metal film formed in step S03 can be as follows: Figure 3As shown in Figure a, the oxide film layer is the oxide layer forming the source electrode 5 and drain electrode 6 of the TFT in the above-described embodiment. The thickness and material of the oxide film layer are the same as the thickness and material of the first oxide layer 51 in the source electrode 5 or the second oxide layer 61 in the source electrode 6. Therefore, the material of the oxide film layer formed in step S03 includes molybdenum oxide doped with a non-metallic element and / or a mixed oxide of doped metal oxide and molybdenum oxide. For example, when the oxide film layer material contains a non-metallic element dopant, the non-metallic element may include nitrogen, and the non-metallic element doped molybdenum oxide is nitrogen-doped molybdenum oxide, wherein the weight doping amount of nitrogen in the nitrogen-doped molybdenum oxide is 20%-40%. When the oxide film layer contains a mixed oxide of doped metal oxide and molybdenum oxide, the doped metal oxide includes at least one of tungsten oxide and titanium oxide, and the material of the oxide layer may include a mixed oxide of tungsten oxide and molybdenum oxide, a mixed oxide of titanium oxide and molybdenum oxide, etc. The composite oxide formed by molybdenum oxide and tungsten oxide has a tungsten content of 30%-50% by weight, based on a total weight of 100% for molybdenum and tungsten. The composite oxide formed by molybdenum oxide and titanium oxide has a titanium content of 30%-40% by weight, based on a total weight of 100% for molybdenum and titanium. Furthermore, the thickness of this oxide film can be 200 Å-500 Å.

[0042] In this embodiment, the method for forming the oxide film layer can be magnetron sputtering. For example, a target material for forming the oxide film layer is prepared, and magnetron sputtering is performed under controlled conditions to deposit the oxide film layer in situ on the active layer 4. Specifically, in this embodiment, the method for forming the oxide film layer includes the following steps: In an oxygen-containing sputtering environment, a compound target containing doped elements and molybdenum, or / and a doped metal and a molybdenum metal alloy target, are subjected to magnetron sputtering treatment, so that the molybdenum element or molybdenum element and doped metal element in the target react with oxygen to generate molybdenum oxide or / and a mixed oxide of doped metal oxide and molybdenum oxide containing the non-metallic element, and an oxide film is deposited on the active layer.

[0043] The metal film layer formed in step S03 is the same metal layer formed in the source electrode 5 and drain electrode 6 of the TFT in the above-described embodiment. Therefore, the thickness and material of the metal film layer are the same as the thickness and material of the first metal layer 52 in the source electrode 5 or the second metal layer 62 in the source electrode 6. Thus, the material used to form the metal layer in step S03 can be a metal such as copper.

[0044] In this embodiment, the method for forming the metal film can also be magnetron sputtering, such as depositing a metal target for forming the metal film in situ on an oxide film. When the metal film is a copper film, the metal target is a copper target, and the formed metal film is a copper film.

[0045] Since step S03 involves sequentially forming an oxide film and a metal film on the active layer 4—that is, first forming an oxide film on the active layer 4, and then forming a metal film on top of the oxide film—the oxide film material, such as the target material in magnetron sputtering, has already undergone an oxidation reaction with oxygen to form oxides. Therefore, during the etching process in step S04, it is more easily etched compared to the existing molybdenum metal substrate, resulting in a high etching rate. This achieves an etching rate close to or even synchronous with that of metal films such as copper films. This allows for steeper line angles during isotropic etching. Figure 3 As shown in Figure b. Furthermore, due to the high density of the oxide film, especially the oxide film of the aforementioned material, and its excellent surface quality such as smoothness, the metal film formed on the oxide film surface also possesses high surface quality, such as smoothness. Simultaneously, the bonding strength between the oxide film and the metal film is high.

[0046] In step S04, the oxide film and metal film are etched. Specifically, the etching process proceeds from the surface of the metal film to the oxide film until the active layer 4 is reached, thereby forming the source 5 and / or drain 6 of the TFT in the above-described embodiment. A channel region 7 is formed between the source 5 and the drain 6. Since the active layer is in contact with the oxide film, as described above, the etching process in step S04 allows the etching rates of the oxide layer and the metal layer to remain relatively close or synchronized. This results in a steeper angle formed during isotropic etching, thereby increasing the linewidth of the metal layer contained in the source 5 and / or drain 6. Figure 3 As shown in Figure b, this improves the resistance of the source 5 and / or drain 6, enhances the adhesion of photoresist, and also increases etching efficiency. Simultaneously, due to the high density of the oxide film, it acts as an ion migration barrier, preventing metal ions generated during etching from penetrating into the active layer 4, thus ensuring the purity of the active layer 4 and improving the electrical performance of the fabricated TFT. Furthermore, the etching solution used can be any existing etching solution, such as Cu acid.

[0047] When the TFT in the embodiment of this application contains, as follows: Figure 1 The planarization layer 8 shown also includes the following step S05: forming a planarization layer 8 at least on the surfaces of the source 5 and the drain 6 and in the channel region 7 between the source 5 and the drain 6.

[0048] The method for forming the planarization layer 8 can be determined based on its material. For example, when it is the material contained in the planarization layer 8 mentioned above, it can be formed by spin coating.

[0049] As can be seen from the above-described TFT fabrication method of this application embodiment, the TFT fabrication method of this application embodiment can keep the etching rates of the oxide film layer and the metal film layer relatively close or synchronous. In the etching process in step S04, that is, after isotropic etching, the angle of the source and / or drain is steeper. As mentioned above, the angle γ formed between the side of the composite layer and the surface of the active layer is greater than 60°, and further greater than or equal to 65°, such as the angle γ of 80° in Example 1 below. This can increase the linewidth of the metal layer, thereby improving the resistance of the source and / or drain and the adhesion effect of photoresist, and also improving the etching efficiency. Moreover, it can prevent the metal ions generated during the etching process from penetrating into the active layer, thereby ensuring the purity of the active layer and improving the electrical performance of the fabricated TFT. In addition, the TFT fabrication method of this application embodiment is easy to control, which can make the fabricated TFT have stable performance, high efficiency and yield, and reduce costs.

[0050] Based on the TFT and its fabrication method described in the above application, the following examples further illustrate the TFT and its fabrication method.

[0051] Example 1 This embodiment provides a TFT and its fabrication method. The TFT in this embodiment includes the following structure: Figure 1 As shown, it includes a substrate 1 and a gate 2 disposed on the substrate 1, a gate insulating layer 3 disposed on the substrate 1 and covering the gate 2, an active layer 4 disposed on the gate insulating layer 3, and a source electrode 5 and a drain electrode 6 disposed on the active layer 4, with a channel region 7 formed between the source electrode 5 and the drain electrode 6. In this structure, gate 2 is a molybdenum / copper composite layer, gate insulating layer 3 is made of silicon nitride compound, active layer 4 is made of amorphous silicon, source 5 includes a first oxide layer 51 and a first metal layer 52 stacked with the first oxide layer 51, and drain 6 includes a second oxide layer 61 and a second metal layer 62 stacked with the second oxide layer 61. Both the first oxide layer 51 and the second oxide layer 61 are stacked with the active layer 4, and both are made of molybdenum-tungsten alloy oxide (the weight ratio of molybdenum to tungsten is based on 100% of the total weight of the molybdenum-tungsten alloy, and the weight content of tungsten is 40%), with a thickness of 200 Å. The first metal layer 52 and the second metal layer 62 are both made of copper, with a thickness of 2250 Å.

[0052] The TFT fabrication method in this embodiment includes the following steps: S1: A gate 2 and a gate insulating layer 3 are sequentially formed on a substrate 1, such that the gate insulating layer 3 covers the gate 2. S2: An active layer 4 is formed on the gate insulating layer 3; S3: Molybdenum metal is doped with tungsten metal to form a tungsten-molybdenum alloy target. When fabricating the Data layer, the tungsten-molybdenum alloy target is placed in the first chamber of the physical deposition thin film equipment, and copper targets are placed in the latter two chambers. Sputtering is started. After Ar ions bombard the tungsten-molybdenum alloy target, oxygen is introduced simultaneously so that the free tungsten-molybdenum ions are oxidized to tungsten oxide and molybdenum oxide before being deposited to the active layer 4. Finally, a tungsten-molybdenum alloy oxide film is deposited on the surface of the active layer 4. After the oxide film reaches 200 Å, the copper targets in the latter two chambers are sputtered to deposit a copper film on the oxide film. S4: Isotropic etching is performed on the oxide film and copper film to form source 5 and drain 6.

[0053] Testing revealed that the composite layer consisting of oxide and metal layers in the source 5 and drain 6, formed by isotropic etching, has a steeper angle. Figure 3 In diagram b, angle γ is approximately 80°.

[0054] Example 2 This embodiment provides a TFT and its preparation method. The difference between the TFT in this embodiment and the TFT in Embodiment 1 is that the first oxide layer 51 and the second oxide layer 61 are both made of molybdenum-titanium alloy oxide with a thickness of 500 Å, and the first metal layer 52 and the second metal layer 62 are both made of copper with a thickness of 2250 Å.

[0055] The TFT fabrication method in this embodiment includes the following steps: S1: Refer to step S1 in Example 1; S2: Refer to step S2 in Example 1; S3: Compared with step S3 in Example 1, the difference is that a molybdenum-titanium alloy target is used instead of a molybdenum-tungsten alloy target, and the thickness of the oxide film layer is controlled to be 500 Å. S4: Refer to step S4 in Example 1; Testing revealed that the composite layer consisting of oxide and metal layers in the source 5 and drain 6, formed by isotropic etching, has a steeper angle. Figure 3 The angle γ in diagram b is approximately 70°.

[0056] Example 3 This embodiment provides a TFT and its fabrication method. The difference between the TFT in this embodiment and the TFT in Embodiment 1 is that the materials of the first oxide layer 51 and the second oxide layer 61 are both nitrogen-doped molybdenum oxide with a thickness of 300 Å, and the materials of the first metal layer 52 and the second metal layer 62 are both copper with a thickness of 2250 Å.

[0057] The TFT fabrication method in this embodiment includes the following steps: S1: Refer to step S1 in Example 1; S2: Refer to step S2 in Example 1; S3: Compared with step S3 in Example 1, the difference is that a molybdenum nitride target is used instead of a molybdenum-tungsten alloy target, and the thickness of the oxide film layer is controlled to be 300 Å. S4: Refer to step S4 in Example 1; Testing revealed that the composite layer consisting of oxide and metal layers in the source 5 and drain 6, formed by isotropic etching, has a steeper angle. Figure 3 The angle γ in diagram b is approximately 65°.

[0058] Comparative Example 1 This comparative example provides a TFT that differs from Embodiment 1 in that the source electrode 5 includes a first metal substrate 51 and a first metal layer 52 stacked with the first metal substrate 51, and the drain electrode 6 includes a second metal substrate 61 and a second metal layer 62 stacked with the second metal substrate 61; both the first metal substrate 51 and the second metal substrate 61 are stacked with the active layer 4, and both are made of molybdenum elemental metal layers, while the first metal layer 52 and the second metal layer 62 are both made of copper.

[0059] The preparation method of this comparative TFT includes the following steps: S1: Refer to step S1 in Example 1; S2: Refer to step S2 in Example 1; S3: Compared with step S3 in Example 1, the difference is that a molybdenum elemental target is used instead of a molybdenum-tungsten alloy target, and the sputtering environment is controlled to be free of oxygen, that is, to ensure that the deposited film is a molybdenum elemental film. S4: Refer to step S4 in Example 1; Upon testing, the composite layer consisting of a molybdenum elemental layer and a copper metal layer in the source electrode 5 and drain electrode 6 formed by isotropic etching was found to be... Figure 3 In diagram b, angle γ is approximately 45°.

[0060] Comparative Example 2 This comparative example provides a TFT that differs from Example 1 in that the materials of both the first oxide layer 51 and the second oxide layer 61 are replaced with indium tin oxide (ITO), while other aspects remain unchanged.

[0061] Upon testing, the composite layer consisting of a molybdenum elemental layer and a copper metal layer in the source electrode 5 and drain electrode 6 formed by isotropic etching is as follows: Figure 3 In diagram b, angle γ is approximately 50°.

[0062] From the TFT-related performance of Examples 1 to 3 and Comparative Examples 1 to 3, it can be seen that the source electrode 5 and drain electrode 6 contained in the TFTs of Examples 1 to 3 are as follows: Figure 3 In Figure b, the angle γ of the TFT is larger, meaning it is steeper, compared to Comparative Examples 1 to 3.

[0063] Further tests on the surface flatness and resistance of the copper metal layers in the source electrode 5 and drain electrode 6 revealed that the copper metal layers in the source electrode 5 and drain electrode 6 of the TFTs in Examples 1 to 3 exhibited good flatness and low resistance. Specifically, the flatness of the copper metal layers in the source electrode 5 and drain electrode 6 of the TFTs in Examples 1 to 3 was significantly better than that in Comparative Example 1, and also better than that in Comparative Example 2. The resistance of the source electrode 5 and drain electrode 6 of the TFTs in Examples 1 to 3 was significantly lower than that in Comparative Example 1 and Comparative Example 2. This flatness and resistance performance of the source electrode 5 and drain electrode 6 of the TFTs in Examples 1 to 3 also corresponded to their steeper γ gradient.

[0064] Thirdly, based on the TFT and its fabrication method described in the above-mentioned embodiments, this application also provides an array substrate. The array substrate of this application includes a substrate on which TFTs are disposed. It may also include other related components of the array substrate, such as gate lines, data lines, and pixel electrodes.

[0065] In this application embodiment, the TFT in the array substrate is the TFT of the above application embodiment (the TFT structure is as follows). Figure 1 As shown, they are arranged in an array. Furthermore, the connection and positional relationships between the TFTs or other components in the array substrate of this application embodiment can be configured and connected according to the components contained in existing array substrates. Since the array substrate of this application embodiment contains the TFTs described in the above application embodiment, the array substrate of this application embodiment has stable performance.

[0066] Fourthly, based on the array substrate of the above-described embodiments of this application, this application also provides a display device. The display device of this application includes an array substrate, and the array substrate is the array substrate of the above-described embodiments of this application. Since the display device of this application includes the array substrate of the above-described embodiments of this application, the display performance of the display device of this application is stable and the display quality is high.

[0067] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A thin-film transistor, comprising: Substrate; A gate is disposed on the substrate. A gate insulating layer is stacked on the substrate and covers the gate. An active layer is disposed on the gate insulating layer and is away from the substrate. The source and drain are disposed on the active layer; The thin-film transistor is characterized by having a source and / or drain composite layer structure, wherein the composite layer structure includes an oxide layer as a substrate and a metal layer stacked on the oxide layer, and the oxide layer is stacked with the active layer. The oxide layer is made of molybdenum oxide doped with non-metallic elements and a mixed oxide, wherein the mixed oxide is obtained by mixing a doped metal oxide with molybdenum oxide. The oxide layer has an etching rate synchronized with that of the metal layer, the metal layer is made of copper, and the oxide layer has a thickness of 200 Å-500 Å. The ends of the source and drain that are opposite to each other are inclined surfaces, and the angle γ formed by the inclined surface and the surface of the active layer is greater than 60°. The mixed oxide comprises a mixed oxide of tungsten oxide and molybdenum oxide, wherein the weight content of tungsten is 30%-50% based on 100% of the total weight of the molybdenum-tungsten alloy; or The mixed oxide is a mixture of titanium oxide and molybdenum oxide, and the titanium content is 30%-40% by weight, based on the total weight of the molybdenum-titanium alloy as 100%; or The non-metallic element is nitrogen, and the weight doping amount of nitrogen is 20%-40%.

2. The thin-film transistor according to claim 1, characterized in that: The nonmetallic element includes nitrogen; and / or The doped metal oxide includes at least one of tungsten oxide and titanium oxide.

3. The thin-film transistor according to claim 1 or 2, characterized in that: The metal in the metal layer includes at least one of copper and aluminum.

4. The method for fabricating a thin-film transistor according to any one of claims 1-3, comprising the following steps: A gate and a gate insulating layer are sequentially formed on a substrate, wherein the gate insulating layer covers the gate; An active layer is formed on the gate insulating layer; An oxide layer is first formed on the active layer, followed by a metal layer stacked on top of the oxide layer; wherein, The oxide layer is made of molybdenum oxide doped with non-metallic elements and a mixed oxide. The mixed oxide is obtained by mixing a doped metal oxide with molybdenum oxide. The oxide layer has an etching rate that is synchronized with that of the metal layer. The metal layer is made of copper. The thickness of the oxide layer is 200 Å to 500 Å. The oxide layer and metal layer are etched to form the source and / or drain.

5. The preparation method according to claim 4, characterized in that: The nonmetallic element includes nitrogen; and / or The doped metal oxide includes at least one of tungsten oxide and titanium oxide.

6. The preparation method according to claim 4 or 5, characterized in that: The method for forming the oxide layer includes the following steps: In an oxygen-containing sputtering environment, a compound target containing doped elements and molybdenum, or / and a target containing doped metal and molybdenum metal alloy, is subjected to magnetron sputtering. This causes the molybdenum element or molybdenum element and doped metal element in the target to react with oxygen, generating molybdenum oxide doped with the non-metallic element and a mixed oxide of doped metal oxide and molybdenum oxide. The oxide layer is then deposited on the active layer to form the oxide layer.

7. The preparation method according to claim 4 or 5, characterized in that: The method for forming the metal layer includes the following steps: A metal target is used to form the metal layer, and the metal target is subjected to magnetron sputtering to deposit the metal layer on the surface of the oxide layer.

8. An array substrate, characterized in that, This includes the thin-film transistor according to any one of claims 1-3 or the thin-film transistor prepared by the preparation method according to any one of claims 4-7.

9. A display device, characterized in that, Includes the array substrate as described in claim 8.

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