A high linearity, low noise amplifier chip

Abstract

This invention discloses a high-linearity, low-noise amplifier chip, comprising an RF main circuit, an input matching circuit, an output matching network, an active bias circuit, and a linear auxiliary circuit. The RF signal is input through the RF input port RFin, passes through the input matching circuit, and enters the input terminal of the RF main circuit. The output terminal of the RF main circuit is connected to the output matching circuit, and the amplified RF signal is output from the RF output port RFout through the output matching circuit. One end of the active bias circuit is connected to the output terminal of the RF main circuit, and the other end is connected to the input terminal of the RF main circuit, providing bias for the RF main circuit. One end of the linear auxiliary circuit is connected to the output terminal of the RF main circuit, the other end is connected to the input terminal of the RF main circuit, and the third end is connected internally to the RF main circuit. The output terminal of the RF main circuit is fed by a power supply VDD through a resistor Rs and an inductor L. This invention achieves high linearity performance of the low-noise amplifier by using a linear auxiliary circuit.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuits, and more specifically, to a high linearity, low noise amplifier chip. Background Technology

[0002] Low-noise amplifiers (LNAs) are a crucial component of the radio frequency (RF) receiver front-end, widely used in microwave communications, radar, electronic warfare systems, and are indispensable devices. The primary function of an LNA is to amplify the weak signal received by the antenna without distortion, providing a certain power gain. The gain, noise, and linearity of the LNA often determine the performance of the entire signal receiving link and system. To ensure that the signal received by the receiving system can be transmitted to the subsequent processor without distortion, the entire RF front-end circuit must also possess good linearity.

[0003] With the development of radio frequency and microwave technology, the demand for low-noise amplifiers in fields such as microwave communication, navigation, guidance, satellite communication, military electronic warfare, and radar is increasing. In particular, due to the increasing scarcity of radio communication frequency resources and the increasingly dense frequency spacing allocated to various communication systems, higher requirements are placed on the performance of devices at the front end of the receiving system. Therefore, researching a high-linearity low-noise amplifier circuit has significant application value and practical significance.

[0004] Because gallium arsenide pseudohigh electron mobility transistors (GaAs PHEMTs) have better high-frequency characteristics and excellent noise performance, GaAs PHEMTs are often used to implement the active devices in low-noise amplifiers. The main specifications of low-noise amplifiers include return loss, noise figure, gain, reverse isolation, third-order intermodulation, 1dB compression point, and DC power consumption, which are interdependent.

[0005] The low-noise amplifier is the first key module in the front-end circuit of an RF receiver. It amplifies the RF signal and suppresses the noise signal received by the antenna. On the other hand, with the widespread use of radio communication equipment, the electromagnetic spectrum environment is becoming increasingly complex, and the interference signals received by the antenna are also becoming more complex. This requires it to provide high linearity, prevent intermodulation of interference signals, and ensure high sensitivity. Summary of the Invention

[0006] This invention provides a high linearity, low noise amplifier chip circuit, characterized by the introduction of a linear auxiliary circuit to improve linearity.

[0007] To achieve the above objectives, the present invention provides a high linearity, low noise amplifier chip, comprising an RF main circuit, an input matching circuit, an output matching network, an active bias circuit, and a linear auxiliary circuit.

[0008] The radio frequency (RF) signal is input through the RF input port RFin, passes through the input matching circuit, and enters the input terminal of the RF main circuit. The output terminal of the RF main circuit is connected to the output matching circuit, and the amplified RF signal is output from the RF output port RFout through the output matching circuit.

[0009] One end of the active bias circuit is connected to the output terminal of the RF main circuit, and the other end is connected to the input terminal of the RF main circuit, providing bias for the RF main circuit.

[0010] One end of the linear auxiliary circuit is connected to the output terminal of the RF main circuit, the other end is connected to the input terminal of the RF main circuit, and the third end is connected to the inside of the RF main circuit.

[0011] The output of the RF main circuit is fed by a power supply VDD through a resistor Rs and an inductor L.

[0012] Preferably, the RF main circuit includes a transistor T1, a resistor R7, and a source inductor Ls;

[0013] The radio frequency signal is input through the gate of transistor T1. The drain of transistor T1 is connected to one end of resistor R7, and the other end of R7 is connected to the input of the output matching circuit. The source of transistor T1 is connected to the first end of inductor Ls, and the other end of Ls is grounded.

[0014] The source of transistor T1 is connected to one end of the linear auxiliary circuit.

[0015] Preferably, the input matching circuit includes capacitor C1, inductor L1, diodes D1, D2, D3, and D4;

[0016] The radio frequency signal enters through one end of capacitor C1, and the other end of capacitor C1 is connected to one end of inductor L1. The other end of inductor L1 is connected to the input terminal of the radio frequency main circuit.

[0017] At the junction of capacitor C1 and inductor L1, the forward terminal of diode D1 is connected, the reverse terminal of diode D1 is connected to the forward terminal of diode D2, the reverse terminal of diode D2 is connected to ground, the reverse terminal of D2 is simultaneously connected to the forward terminal of diode D3, and the reverse terminal of diode D3 is connected to the forward terminal of diode D4.

[0018] Preferably, the active bias circuit includes transistor T2, resistor R2, resistor R3, and resistor R4;

[0019] One end of resistor R2 is connected to the output terminal of the RF main circuit, and the other end of resistor R2 is connected to the drain of transistor T2. The gate of transistor T2 is shorted to the drain. The gate of transistor T2 is connected to the first end of resistor R3, and the other end of resistor R3 is connected to the input terminal of the RF main circuit.

[0020] The source of transistor T2 is connected to one end of resistor R4, and the other end of resistor R4 is grounded.

[0021] Preferably, the linear auxiliary circuit includes transistor T3, capacitor C3, resistor R5, and resistor R6.

[0022] The drain of transistor T3 is connected to one end of resistor R6, the other end of resistor R6 is connected to the source of transistor T3, the source of transistor T3 is connected to one end of resistor R5, and the other end of resistor R5 is grounded.

[0023] The source of transistor T3 is connected to one end of capacitor C3, and the other end of capacitor C3 is connected to the input terminal of the RF main circuit. The gate of transistor T3 is connected to the source of transistor T1.

[0024] Preferably, the output matching circuit includes a capacitor C2 and an inductor L2;

[0025] The amplified radio frequency signal is output from the output terminal of the radio frequency main circuit and enters one end of L2. The other end of L2 is connected to one end of capacitor C2, and the other end of capacitor C2 is the output terminal of the radio frequency signal.

[0026] Preferably, the output terminal of the RF main circuit is connected to a resistor Rs, the other end of the resistor Rs is connected to an inductor L, and the other end of the inductor L is the power supply terminal of the circuit; the circuit is powered by a single power supply.

[0027] Preferably, the other end of the resistor R3 shares node P1 with the output of the input matching circuit, the input of the RF main circuit, and the second end of the linear auxiliary circuit.

[0028] Preferably, the drain of transistor T3 shares a common node Q with one end of resistor R6, the output terminal of the RF main circuit, resistor R2, resistor Rs, and the input terminal of the output matching circuit.

[0029] Preferably, the inductor L is an off-chip choke inductor and Rs is an off-chip resistor.

[0030] The high linearity and low noise amplifier chip circuit provided by the present invention has the following beneficial effects: The present invention achieves both low noise and high linearity performance by using a linear auxiliary circuit on the basis of a single-stage common source structure. Resistors R6 and R5 provide a bias operating point for the linear auxiliary transistor T3.

[0031] The radio frequency (RF) signal enters the RF main circuit from node P1, generating a third-order intermodulation component at node Q. The RF signal also enters the auxiliary transistor T3 from nodes P1 and P2, generating a third-order intermodulation component at node Q. These two third-order intermodulation components are out of phase and cancel each other out, thus greatly reducing the third-order intermodulation component at the output RFout and significantly improving the linearity of the amplifier. On the other hand, since the auxiliary transistor T3 is not turned on, it exhibits a high impedance state to the RF signal, which hardly affects other circuit performance. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the circuit structure of a high linearity, low noise amplifier chip according to the present invention;

[0033] Figure 2 This is a circuit schematic diagram of a high linearity, low noise amplifier chip according to the present invention;

[0034] Figure 3 The simulation results show the small-signal gain as a function of frequency in this invention.

[0035] Figure 4 The simulation results show the input and output standing waves as a function of frequency in this invention.

[0036] Figure 5 The simulation results show the noise figure of this invention as a function of frequency.

[0037] Figure 6 The simulation results of the 1dB power compression point as a function of frequency are output for this invention;

[0038] Figure 7 The simulation results of the third-order intermodulation point as a function of frequency are output for this invention. Detailed Implementation

[0039] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0041] See Figure 1-2 A high-linearity, low-noise amplifier chip includes an RF main circuit, an input matching circuit, an output matching network, an active bias circuit, and a linear auxiliary circuit.

[0042] The radio frequency (RF) signal is input through the RF input port RFin, passes through the input matching circuit, and enters the input terminal of the RF main circuit. The output terminal of the RF main circuit is connected to the output matching circuit, and the amplified RF signal is output from the RF output port RFout through the output matching circuit.

[0043] One end of the active bias circuit is connected to the output terminal of the RF main circuit, and the other end is connected to the input terminal of the RF main circuit, providing bias for the RF main circuit.

[0044] One end of the linear auxiliary circuit is connected to the output terminal of the RF main circuit, the other end is connected to the input terminal of the RF main circuit, and the third end is connected to the inside of the RF main circuit; the linear auxiliary circuit is used to improve the linearity performance of the amplifier chip.

[0045] The output of the RF main circuit is fed by a power supply VDD through a resistor Rs and an inductor L.

[0046] The radio frequency main circuit includes transistor T1, resistor R7, and source inductor Ls;

[0047] The radio frequency signal is input through the gate of transistor T1. The drain of transistor T1 is connected to one end of resistor R7, and the other end of R7 is connected to the input of the output matching circuit. The source of transistor T1 is connected to the first end of inductor Ls, and the other end of Ls is grounded.

[0048] The source of transistor T1 is connected to one end of the linear auxiliary circuit.

[0049] The input matching circuit includes capacitor C1, inductor L1, diodes D1, D2, D3, and D4.

[0050] The radio frequency signal enters through one end of capacitor C1, and the other end of capacitor C1 is connected to one end of inductor L1. The other end of inductor L1 is connected to the input terminal of the radio frequency main circuit.

[0051] At the junction of capacitor C1 and inductor L1, the forward terminal of diode D1 is connected, the reverse terminal of diode D1 is connected to the forward terminal of diode D2, the reverse terminal of diode D2 is connected to ground, the reverse terminal of D2 is simultaneously connected to the forward terminal of diode D3, and the reverse terminal of diode D3 is connected to the forward terminal of diode D4.

[0052] The active bias circuit includes transistor T2, resistor R2, resistor R3, and resistor R4;

[0053] One end of resistor R2 is connected to the output terminal of the RF main circuit, and the other end of resistor R2 is connected to the drain of transistor T2. The gate of transistor T2 is shorted to the drain. The gate of transistor T2 is connected to the first end of resistor R3, and the other end of resistor R3 is connected to the input terminal of the RF main circuit.

[0054] The source of transistor T2 is connected to one end of resistor R4, and the other end of resistor R4 is grounded.

[0055] The linear auxiliary circuit includes transistor T3, capacitor C3, resistor R5, and resistor R6.

[0056] The drain of transistor T3 is connected to one end of resistor R6, the other end of resistor R6 is connected to the source of transistor T3, the source of transistor T3 is connected to one end of resistor R5, and the other end of resistor R5 is grounded.

[0057] The source of transistor T3 is connected to one end of capacitor C3, and the other end of capacitor C3 is connected to the input terminal of the RF main circuit. The gate of transistor T3 is connected to the source of transistor T1.

[0058] The output matching circuit includes a capacitor C2 and an inductor L2;

[0059] The amplified radio frequency signal is output from the output terminal of the radio frequency main circuit and enters one end of L2. The other end of L2 is connected to one end of capacitor C2, and the other end of capacitor C2 is the output terminal of the radio frequency signal.

[0060] The output terminal of the RF main circuit is connected to a resistor Rs, and the other end of the resistor Rs is connected to an inductor L. The other end of the inductor L is the power supply terminal of the circuit. The circuit is powered by a single power supply. The inductor L is an external choke inductor, and Rs is an external resistor.

[0061] The other end of the resistor R3 shares node P1 with the output of the input matching circuit, the input of the RF main circuit, and the second end of the linear auxiliary circuit.

[0062] The drain of transistor T3 shares a common node Q with one end of resistor R6, the output terminal of the RF main circuit, resistor R2, resistor Rs, and the input terminal of the output matching circuit.

[0063] The high linearity and low noise amplifier chip circuit provided by the present invention has the following beneficial effects: The present invention achieves both low noise and high linearity performance by using a linear auxiliary circuit on the basis of a single-stage common source structure. Resistors R6 and R5 provide a bias operating point for the linear auxiliary transistor T3.

[0064] The radio frequency (RF) signal enters the RF main circuit from node P1, generating a third-order intermodulation component at node Q. The RF signal also enters the auxiliary transistor T3 from nodes P1 and P2, generating a third-order intermodulation component at node Q. These two third-order intermodulation components are out of phase and cancel each other out, thus greatly reducing the third-order intermodulation component at the output RFout and significantly improving the linearity of the amplifier. On the other hand, since the auxiliary transistor T3 is not turned on, it exhibits a high impedance state to the RF signal, which hardly affects other circuit performance.

[0065] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between units or modules may be electrical or other forms.

[0066] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0067] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0068] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0069] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A high-linearity, low-noise amplifier chip, characterized in that, It includes the RF main circuit, input matching circuit, output matching network, active bias circuit, and linear auxiliary circuit. The radio frequency (RF) signal is input through the RF input port RFin, passes through the input matching circuit, and enters the input terminal of the RF main circuit. The output terminal of the RF main circuit is connected to the output matching circuit, and the amplified RF signal is output from the RF output port RFout through the output matching circuit. One end of the active bias circuit is connected to the output terminal of the RF main circuit, and the other end is connected to the input terminal of the RF main circuit, providing bias for the RF main circuit. One end of the linear auxiliary circuit is connected to the output terminal of the RF main circuit, the other end is connected to the input terminal of the RF main circuit, and the third end is connected to the inside of the RF main circuit. The output of the RF main circuit is fed by a power supply VDD through a resistor Rs and an inductor L. The radio frequency main circuit includes transistor T1, resistor R7, and source inductor Ls; The radio frequency signal is input through the gate of transistor T1. The drain of transistor T1 is connected to one end of resistor R7, and the other end of R7 is connected to the input of the output matching circuit. The source of transistor T1 is connected to the first end of inductor Ls, and the other end of Ls is grounded. The source of transistor T1 is connected to one end of the linear auxiliary circuit; The linear auxiliary circuit includes transistor T3, capacitor C3, resistor R5, and resistor R6. The drain of transistor T3 is connected to one end of resistor R6, the other end of resistor R6 is connected to the source of transistor T3, the source of transistor T3 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The source of transistor T3 is connected to one end of capacitor C3, and the other end of capacitor C3 is connected to the input terminal of the RF main circuit. The gate of transistor T3 is connected to the source of transistor T1 through node P2. The drain of transistor T3 shares a common node Q with one end of resistor R6, the output terminal of the RF main circuit, resistor R2, resistor Rs, and the input terminal of the output matching circuit. The input terminal of the RF main circuit and the second terminal of the linear auxiliary circuit share a common node P1.

2. The high linearity, low noise amplifier chip according to claim 1, characterized in that: The input matching circuit includes capacitor C1, inductor L1, diodes D1, D2, D3, and D4. The radio frequency signal enters through one end of capacitor C1, and the other end of capacitor C1 is connected to one end of inductor L1. The other end of inductor L1 is connected to the input terminal of the radio frequency main circuit. At the junction of capacitor C1 and inductor L1, the forward terminal of diode D1 is connected, the reverse terminal of diode D1 is connected to the forward terminal of diode D2, the reverse terminal of diode D2 is connected to ground, the reverse terminal of D2 is simultaneously connected to the forward terminal of diode D3, and the reverse terminal of diode D3 is connected to the forward terminal of diode D4.

3. The high linearity, low noise amplifier chip according to claim 1, characterized in that, The active bias circuit includes transistor T2, resistor R2, resistor R3, and resistor R4; One end of resistor R2 is connected to the output terminal of the RF main circuit, and the other end of resistor R2 is connected to the drain of transistor T2. The gate of transistor T2 is shorted to the drain. The gate of transistor T2 is connected to the first end of resistor R3, and the other end of resistor R3 is connected to the input terminal of the RF main circuit. The source of transistor T2 is connected to one end of resistor R4, and the other end of resistor R4 is grounded.

4. The high linearity, low noise amplifier chip according to claim 1, characterized in that, The output matching circuit includes a capacitor C2 and an inductor L2; The amplified radio frequency signal is output from the output terminal of the radio frequency main circuit and enters one end of L2. The other end of L2 is connected to one end of capacitor C2, and the other end of capacitor C2 is the output terminal of the radio frequency signal.

5. A high linearity, low noise amplifier chip according to claim 1, characterized in that, The output terminal of the RF main circuit is connected to a resistor Rs, and the other end of the resistor Rs is connected to an inductor L. The other end of the inductor L is the power supply terminal of the circuit; the circuit uses a single power supply.

6. A high linearity, low noise amplifier chip according to claim 3, characterized in that, The other end of the resistor R3 shares node P1 with the output of the input matching circuit.

7. A high linearity, low noise amplifier chip according to claim 5, characterized in that, The inductor L is an off-chip choke inductor, and Rs is an off-chip resistor.

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