Display panel

Abstract

The application provides a display panel and a display device. The display panel is divided into a display area and a non-display area. The display panel comprises a substrate, a first metal layer, a second metal layer and a filling layer. The first metal layer is stacked on the substrate and comprises a plurality of first signal lines. The first signal lines located in the non-display area comprise a first segment, and a side wall of the first segment is provided with a groove. The second metal layer is located on a side of the first metal layer away from the substrate and comprises a plurality of second signal lines. A part of a normal projection of the second signal lines on the substrate overlaps with a normal projection of the first segment on the substrate. The filling layer is located in the non-display area and at least partially fills the groove of the first segment. Based on the above design, the groove of the first segment of the first signal line is filled with the filling layer, and the short circuit problem of the second signal line can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel. Background Technology

[0002] With the development of display technology, display panels, especially those with integrated touch functionality, have been widely used. However, due to the close proximity of the touch electrodes to the display electrodes, and limitations in the wiring and processing of the signal lines connecting the touch and display electrodes, short circuits can occur at the edges of the signal lines connecting the display electrodes, affecting the normal operation of the display panel. Summary of the Invention

[0003] A first aspect of this application provides a display panel divided into a display area and a non-display area. The display panel includes a substrate, a first metal layer, a second metal layer, and a filler layer. The first metal layer is stacked on the substrate and includes a plurality of first signal lines, at least partially located within the non-display area. Each first signal line within the non-display area includes a first segment, and the sidewall of the first segment has a groove formed therein. The second metal layer is located on the side of the first metal layer away from the substrate and includes a plurality of second signal lines, at least partially overlapping the orthographic projection of two adjacent second signal lines onto the substrate with the orthographic projection of the first segment onto the substrate. The filler layer is located within the non-display area and at least partially fills the groove of the first segment.

[0004] In the above solution, filling the groove of the first section with a filling layer isolates the connection between adjacent second signal lines, thus improving the short circuit problem of adjacent second signal lines.

[0005] In conjunction with the first aspect, in some embodiments, the filler layer is located between the first metal layer and the second metal layer. Further, the filler layer at least covers the sidewalls of the first segment. Further, at least a portion of the filler layer also covers the first signal line. Further, the first signal line includes a second segment, and the sidewalls of the second segment are formed with grooves, the orthographic projection of the second segment on the substrate being offset from the orthographic projections of at least two adjacent second signal lines on the substrate, and at least a portion of the filler layer fills the grooves of the second segment.

[0006] In the above scheme, there are multiple design options for the filling layer. The filling layer can be designed according to the needs of the display panel, which not only reduces the design difficulty of the filling layer, but also improves the adaptability of the filling layer.

[0007] In conjunction with the first aspect, in some embodiments, the display panel further includes a first insulating layer, which is an inorganic film layer located between a first metal layer and a second metal layer, and a filler layer is an organic film layer. Further, the thickness of the filler layer is greater than the thickness of the first insulating layer.

[0008] In the above solution, the organic film layer is relatively thick, which can effectively fill the groove in the first segment and effectively improve the short circuit problem of the second signal line. Furthermore, the thickness of the filling layer is greater than the thickness of the first insulating layer, making it less likely for the filling layer to break when it intersects at the edge of the first signal line. This allows it to fill the groove in the first segment more effectively, blocking the path that may cause a short circuit between adjacent second signal lines, and thus more effectively improving the short circuit problem of the second signal line.

[0009] In conjunction with the first aspect, in some embodiments, the filler layer is located between the first insulating layer and the second metal layer. Further, the display panel also includes an encapsulation layer located on the side of the filler layer facing away from the substrate, the encapsulation layer comprising a first layer, a second layer, and a third layer stacked sequentially. The first and third layers are both inorganic film layers, and the second layer is an organic film layer. The first insulating layer includes the portions of the first and third layers located in the non-display area.

[0010] In the above solution, the filler layer indirectly fills the groove in the first segment without affecting the adhesion strength between the first insulating layer and other film layers on the substrate, thus improving the short-circuit problem of the second signal line. Furthermore, the first layer of the encapsulation layer is in contact with the filler layer, and the film layer containing the second signal line is on the side of the encapsulation layer away from the first signal line. This not only improves the display panel's resistance to water and oxygen but also protects the film layer between the substrate and the second signal line.

[0011] In conjunction with the first aspect, in some embodiments, the filler layer is located between the first insulating layer and the first metal layer.

[0012] In the above scheme, the filling layer directly fills the groove of the first segment of the first signal line, effectively improving the short circuit problem between the second signal lines.

[0013] In conjunction with the first aspect, in some embodiments, the filling layer has one or more through-holes, and at least a portion of the first insulating layer fills the through-holes. Further, the orthographic projection of at least a portion of the through-hole onto the substrate lies within the orthographic projection of the first segment onto the substrate, and the first insulating layer contacts the first segment. Further, the substrate includes a second insulating layer, and the first signal line is located between the second insulating layer and the first insulating layer, with the first insulating layer contacting the second insulating layer through a through-hole. Further, the second insulating layer is a planarization layer or a passivation layer.

[0014] In the above solution, the through-hole design, while not affecting the filling of the groove of the first segment of the first signal line by the filling layer, also allows the first insulating layer on the filling layer to directly contact the second insulating layer under the filling layer, achieving a high-strength bond and improving the quality of the display panel.

[0015] In conjunction with the first aspect, in some embodiments, the display panel further includes an encapsulation layer located on the side of the second signal line facing the substrate, the encapsulation layer comprising a first layer, a second layer, and a third layer stacked sequentially. The first and third layers are both inorganic film layers, and the second layer is an organic film layer. The first insulating layer includes the portions of the first and third layers located in the non-display area.

[0016] In the above scheme, the first layer of the encapsulation layer is in contact with the second signal line. Both the first and third layers are inorganic film layers. The encapsulation layer plays a role in protecting the first signal line and other film layers on the substrate, thereby improving the quality and water and oxygen resistance of the display panel.

[0017] In conjunction with the first aspect, in some embodiments, the display panel further includes a buffer layer and a touch layer sequentially stacked on the side of the encapsulation layer facing away from the substrate. The first insulating layer also includes a portion of the buffer layer located in the non-display area.

[0018] In the above scheme, the buffer layer not only protects the film between the first signal line and the second signal line from being affected by the fabrication process of the touch layer as much as possible, but also flattens the surface of the film, preventing the vias in the filling layer from affecting the fabrication of the second signal line.

[0019] In conjunction with the first aspect, in some embodiments, the display panel further includes a display function layer and a touch layer located in the display area. The substrate includes a driving circuit layer located in the display area for driving the display function layer, a plurality of first signal lines electrically connected to the driving circuit layer, and a plurality of second signal lines electrically connected to the touch layer.

[0020] In the above scheme, multiple display electrodes in the display functional layer extend into the non-display area and are electrically connected to multiple first signal lines, and the first signal lines are also electrically connected to the leads of the driver chip that drives the light emission of the display functional layer. Multiple touch electrodes in the touch layer extend into the non-display area and are connected to multiple second signal lines.

[0021] In conjunction with the first aspect, in some embodiments, a portion of the non-display area far from the display area is divided into a bending area, and the display panel also includes a barrier dam located between the bending area and the display area, with a filling layer located between the barrier dam and the bending area.

[0022] In the above scheme, since the part where the edge of the first signal line intersects with the second signal line is located at the junction of the barrier and the bending area, the design of the filling layer not only effectively improves the short circuit problem of the second signal line, but also simplifies the preparation process of the filling layer to the greatest extent, thereby simplifying the processing technology of the display panel and reducing the production cost of the display panel.

[0023] A second aspect of this application provides a display device. This display device includes any of the display panels provided in the first aspect described above. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the planar structure of a portion of a display panel according to an embodiment of this application.

[0025] Figure 2 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 1 The diagram shows a cross-sectional view of the display panel along M1N1.

[0026] Figure 3 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 1 The diagram shows a cross-sectional view of the display panel along M2N2.

[0027] Figure 4A This is a schematic diagram of the structure of the first signal line in an ideal design according to an embodiment of this application.

[0028] Figure 4B This is a schematic diagram of the actual structure of the first signal line according to an embodiment of this application.

[0029] Figure 5 This is a schematic diagram of the planar structure of a portion of a display panel according to an embodiment of this application.

[0030] Figure 6 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M1N1.

[0031] Figure 7 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M2N2.

[0032] Figure 8 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M1N1.

[0033] Figure 9 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M2N2.

[0034] Figure 10 This is a schematic diagram of the structure of a display panel according to another embodiment of this application.

[0035] Figure 11 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 10The diagram shows a cross-sectional view of the display panel along M1N1.

[0036] Figure 12 This is a cross-sectional view of a portion of a display panel according to an embodiment of this application, which includes... Figure 10 The diagram shows a cross-sectional view of the display panel along M2N2.

[0037] Figure 13 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 10 The diagram shows a cross-sectional view of the display panel along M2N2.

[0038] Figure 14 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 10 The diagram shows a cross-sectional view of the display panel along M2N2.

[0039] Figure 15 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 10 The diagram shows a cross-sectional view of the display panel along M2N2.

[0040] Figure 16 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M1N1.

[0041] Figure 17 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M2N2.

[0042] Figure 18 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M1N1.

[0043] Figure 19 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M2N2.

[0044] Figure 20 This is a cross-sectional view of a portion of a display panel according to another embodiment of this application, which includes... Figure 5 The diagram shows a cross-sectional view of the display panel along M2N2. Detailed Implementation

[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0046] With the technological advancements in display panels, they are no longer limited to just display functions; they can also perform at least one other function, such as touch functionality. Thus, a display panel includes multiple first signal lines that perform at least the display function and multiple second signal lines that perform at least one other function. Due to the limited overall thickness of the display panel, the spatial distance between the multiple first signal lines and the multiple second signal lines is very short. Therefore, the structure of the first signal lines can also affect the fabrication of the second signal lines, potentially causing short circuits between adjacent second signal lines.

[0047] Specifically, during the display panel manufacturing process, when fabricating other layers above the layer containing the first signal line, corrosive liquids such as developing solutions (hydrofluoric acid, etc.) and etching solutions (nitric acid, etc.) flow into the layer containing the first signal line. Since the corrosion resistance of at least two different metal layers within the first signal line differs, grooves appear at the edges of the first signal line due to the varying degrees of corrosion of the different material layers. The insulating layer between the first and second signal lines is typically an inorganic thin film, which is also relatively thin and will form defects at the grooves. Therefore, when fabricating the second signal line on the insulating layer, for the second signal line intersecting the space of the first signal line, the grooves at the edges of the first signal line (actually defects formed by the aforementioned inorganic thin film at the grooves) will leave metal residue from the fabrication of the second signal line in the intersecting portion of the channel between adjacent second signal lines, leading to short circuits between adjacent second signal lines.

[0048] This application provides a display panel with a filling layer for filling the groove of the first segment where the edge of the first signal line intersects with the space of the second signal line. This reduces the risk of metal residue forming in the groove of the first segment, thereby reducing the impact of the groove on the sidewall of the first signal line on the fabrication of the second signal line and improving the short circuit problem between adjacent second signal lines.

[0049] This embodiment provides a display panel, such as Figure 1 , Figure 2 , Figure 3 and Figure 4A , Figure 4BAs shown, the display panel is divided into a display area AA and a non-display area DA, and includes a substrate 1, a display functional layer 2 and at least one other functional layer 3 sequentially stacked on the substrate 1. The display panel also includes a first metal layer, a second metal layer, and a fill layer 4 disposed on the substrate 1 on the same side as the display functional layer 2 and the at least one other functional layer 3. The first metal layer is stacked on the substrate 1 and includes multiple first signal lines 21, at least partially located within the non-display area DA. Each first signal line 21 within the non-display area DA includes a first segment 211, and the sidewall of the first segment 211 forms a groove 212. The second metal layer is located on the side of the first metal layer away from the substrate 1 and includes multiple second signal lines 31, at least partially overlapping the orthographic projection of two adjacent second signal lines 31 onto the substrate 1 with the orthographic projection of the first segment 211 onto the substrate 1. The fill layer 4 is located within the non-display area DA and at least partially fills the groove 212 of the first segment 211.

[0050] Each first signal line 21 includes at least two sub-metal layers of different materials stacked on the substrate 1. The structure of the first signal line 21 affects the fabrication of the second signal line 31 disposed on its side facing away from the substrate 1. For example, regarding the structure of the first signal line 21, for instance... Figure 4A and 4B As shown, the first signal line 21 includes a first metal layer 213, a second metal layer 214, and a third metal layer 215 stacked sequentially. For example, the first metal layer 213 and the third metal layer 215 are made of the same material, titanium (Ti), while the second metal layer 214 is made of a different material than the other metal layers, namely aluminum (Al). The first signal line 21, first formed on the substrate 1, is as follows... Figure 4A As shown, the three metal layers, namely the Ti-Al-Ti metal layers, are flush at the edge of the first signal line 21. However, after further fabrication of other films on the film layer containing the first signal line 21, the film layer containing the first signal line 21 will be corroded, and different metals have different corrosion resistance; for example, Ti has greater corrosion resistance than Al. Specifically, as... Figure 4B As shown, since the length of the second metal layer 214 that is corroded (shown by the dashed line in the figure) is longer than the length of the first metal layer 213 that is corroded (shown by the dashed line in the figure) and the length of the third metal layer 214 that is corroded (shown by the dashed line in the figure), a groove 212 is formed at the edge of the first signal line.

[0051] Based on the design of the groove 212 and the filling layer 4 on the first signal line 21, the groove 212 that fills at least the first segment 211, that is, fills at least part of the edge of the first signal line 21 located between two adjacent second signal lines 31, flattening it, so that the path that may cause a short circuit between two adjacent second signal lines 31 is broken, avoiding the short circuit problem, thereby improving the short circuit problem of the second signal line 31.

[0052] It should be understood that the structure of the first signal line is not limited to a three-layer Ti-Al-Ti structure; it can also be made into a multi-layer structure using other metallic materials, such as using molybdenum to make at least one metal layer. The filler layer can be a single layer or multiple layers. The appropriate structure of the first signal line can be selected based on the requirements of the display panel and the manufacturing process.

[0053] By filling the groove through which the channel between two adjacent second signal lines passes, or even completely flattening it, the short-circuit problem between adjacent second signal lines can be improved. In one embodiment, the fill layer at least covers the sidewalls of the first segment. Furthermore, the fill layer at least partially covers the first signal line.

[0054] In at least one embodiment, the first signal line further includes a second segment, and the sidewall of the second segment is formed with a groove. The orthographic projection of the second segment on the substrate is offset from the orthographic projections of at least two adjacent second signal lines on the substrate. At least a portion of the filling layer fills the groove of the second segment. The design scheme of the filling layer will be described in detail below with reference to the accompanying drawings.

[0055] Option 1: In some embodiments, such as Figure 1 , Figure 2 and Figure 3 As shown, the filler layer 4 is disposed between the first metal layer and the second metal layer, that is, the filler layer 4 is disposed between the first signal line 21 and the second signal line 31, and the filler layer 4 only fills the groove of the first segment 211 of the first signal line 21. That is, the orthographic projection of the filler layer 4 on the surface of the substrate 1 covers the part of the edge of the first signal line 21 that intersects with the two adjacent second signal lines 31 and the part located between the two adjacent second signal lines 31; that is, the orthographic projection of the first segment 211 on the surface of the substrate 1. This design flattens the groove of the first signal line 21 that intersects with the channel space where a short circuit may occur between the first signal line 21 and the adjacent second signal line 22. The channel portion above the flattened groove will not have metal residue, which will disconnect the possible short circuit route, thereby improving the short circuit problem of the second signal line 31.

[0056] Option 2: In some embodiments, such as Figure 1 , Figure 2 and Figure 3As shown, a filler layer 4 is disposed between the first metal layer and the second metal layer, that is, between the first signal line 21 and the second signal line 31. The filler layer 4 only covers the portion of the edge of the first signal line 21 located between two adjacent second signal lines 31, covering the first segment 211 of the first signal line 21. That is, the orthographic projection of the filler layer 4 on the surface of the substrate 1 covers the orthographic projection of the portion of the edge of the first signal line 21 located between two adjacent second signal lines 31 on the surface of the substrate 1. This scheme flattens the grooves in the portion of the edge of the first signal line 21 located between two adjacent second signal lines 31, ensuring that there is no metal residue in the upper film layer intersecting with these groove spaces. This causes the channel between adjacent second signal lines 31 to be partially broken and unable to conduct, thus improving the short-circuit problem of the second signal line 31.

[0057] Option 3: In some embodiments, such as Figure 5 , Figure 6 and Figure 7 As shown, the filler layer 4 is located between the first metal layer and the second metal layer, that is, between the first signal line 21 and the second signal line 31. The orthographic projection of the portion of the edge of the first signal line 21 that intersects with the second signal line 31 on the surface of the substrate 1 lies within the orthographic projection of the filler layer 4 on the surface of the substrate 1. Similarly, the orthographic projection of the portion of the edge of the first signal line 21 located between two adjacent second signal lines 32 on the surface of the substrate 1 lies within the orthographic projection of the filler layer 4 on the surface of the substrate 1. In other words, not only is the groove of the first segment 211 filled, but the first signal line 21 is also at least partially covered by the filler layer 4. This completely fills the channels of adjacent second signal lines 31, flattens the interface, and avoids metal residue during the fabrication of the second signal lines 31, thus solving the short-circuit problem between adjacent second signal lines 31. Furthermore, the flat filler layer between the first and second signal lines is more conducive to processing in actual production, saving production costs.

[0058] In some embodiments, such as Figure 8 and Figure 9 As shown, the display panel also includes a first insulating layer 5 located between the first metal layer and the second metal layer, specifically between the first signal line 21 and the second signal line 31. This first insulating layer 5 is an inorganic film layer. Correspondingly, the filler layer 4 disposed in the display panel is an organic film layer. Considering that the inorganic film layer is relatively thin, the first insulating layer 5 disposed between the first signal line 21 and the second signal line 31 cannot cover the groove at the edge where the edge of the first signal line 21 intersects with the edge of the second signal line 31. Therefore, the filler layer 4 is made of an organic film layer. During the preparation of the filler layer 4, it is leveled at a portion of the edge of the first signal line 21, filling the groove at that edge and improving the short circuit problem between the second signal lines 31. It should be understood that the first insulating layer 5 can be a single layer or multiple layers.

[0059] In at least one embodiment, the thickness of the filler layer is greater than the thickness of the first insulating layer. This makes the filler layer less prone to breakage when it intersects at the edges of the first signal lines, and allows it to completely fill the grooves at the edges of the first signal lines, thereby effectively improving the short circuit problem between the second signals. In practical applications, the specific location of the filler layer is designed according to the film layer design between the first and second signal lines, as well as other functional requirements.

[0060] In some embodiments, such as Figure 8 and Figure 9 As shown, the filler layer 4 is located between the first insulating layer 5 and the first metal layer, i.e., the first signal line 21. The filler layer 4 directly fills the groove at the edge of the first signal line 21, effectively improving the short circuit problem between the second signal lines 31.

[0061] The placement of the filler layer affects the direct contact relationship between the existing film layers in the display panel. Therefore, in some embodiments, such as... Figure 10 , Figure 11 and Figure 12 As shown, the filling layer 4 has one or more through holes 41, and the first insulating layer 5 at least partially fills the through holes 41. The filling layer 4 has multiple through holes 41 in areas where it intersects with at least the multiple first signal lines 21. The design of the through holes 41 does not affect the adhesion between the first insulating layer 5 and the buffer layer 4 and the substrate 1.

[0062] In at least one embodiment, at least a portion of the through-hole's orthographic projection on the substrate lies within the orthographic projection of the first segment on the substrate, and the first insulating layer contacts the first segment. For example, as shown... Figure 10 As shown, in the portion of the through holes 41 that intersects the first signal line 21, the length a of the through hole 41 in the width direction of the first signal line 21 is less than the width b of the first signal line 21, i.e., a < b. This ensures that the through holes do not affect the effective coverage of the filling layer 4 at the edge of the first signal line, and do not affect the bonding strength of the film between the first insulating layer 5 and the buffer layer 4 and the substrate 1.

[0063] In at least one embodiment, such as Figure 11 and Figure 12 As shown, substrate 1 includes a second insulating layer 6, and a first signal line 21 is located between the second insulating layer 6 and the first insulating layer 5. The first insulating layer 5 is in contact with the second insulating layer 6 through a through-hole 41. That is, the portion of the first insulating layer 5 on the filler layer 4 that is in direct contact with the second insulating layer 6 under the filler layer 4 through the through-hole 41 achieves a high-strength bond, avoiding the problem of low bonding strength between the filler layer 4 and the first and second insulating layers 5 and 6 when an organic film layer is used, thus improving the quality of the display panel.

[0064] Regarding the effect of the vias disposed on the fill layer 4 on the second signal lines thereon, in at least one embodiment, such as Figure 11 As shown, the second signal line 31 is designed to avoid the via 41 of the fill layer 4. In at least another embodiment, as Figure 12 As shown, a portion of the second signal line 31 passes through the via 41 in the fill layer 4. Methods to reduce the impact of the via 41 on the second signal line 31 will be described in detail below and will not be repeated here.

[0065] It should be understood that this application does not limit the specific number of through holes, the shape of the through holes, or the distribution pattern between different through holes. The cross-section of the through hole can be... Figure 10 The rectangular rows shown can also be circular, semi-circular, square, triangular, or other polygonal structures. Furthermore, the size of each through-hole and the spacing between different through-holes can be equal or unequal. Multiple through-holes can be evenly spaced in an array, or other distribution schemes can be used, such as a centrally symmetrical distribution. The specific design scheme for the through-holes can be tailored to the functional requirements of the display panel and the requirements of the manufacturing process.

[0066] In at least one embodiment, the display panel further includes a planarization layer or a passivation layer disposed on the substrate, and the second insulating layer is a planarization layer or a passivation layer.

[0067] Besides improving the short-circuit problem of the second signal line by adding a fill layer, other methods can also be used to improve the quality of the display panel. For example, such as Figure 13 As shown, in some embodiments, the display panel further includes an encapsulation layer 7 located on the side of the second signal line 31 near the substrate 1. The encapsulation layer 7 includes a first layer 71, a second layer 72, and a third layer 73 stacked sequentially. The first layer 71 and the third layer 73 are both inorganic film layers, while the second layer 72 is an organic film layer. The first insulating layer 5 includes portions of the first layer 71 and the third layer 73 located in the non-display area DA. The first layer 71 of the first insulating layer 5 is disposed on the side of the film layer containing the second signal line 31 facing the substrate, and the third layer 73 is disposed on the side of the filling layer 4 facing away from the substrate. Both the first layer 71 and the third layer 73 are inorganic film layers, and the third layer 71 achieves a high-strength bond with the second insulating layer 6 through the through-hole 41 on the filling layer 4. Therefore, the encapsulation layer 7 improves the water and oxygen resistance of the display panel without affecting its quality.

[0068] Based on the impact of vias in the fill layer on the second signal line mentioned above, the following two methods will be provided to improve this. Details are as follows:

[0069] The first method, exemplarily, is as follows: Figure 14As shown, in some embodiments, the other functional layer 3 of the display panel is a touch layer, and the display panel also includes a buffer layer 8 between the encapsulation layer 7 and the touch layer 3. The first insulating layer 5 also includes a portion of the buffer layer 8 located in the non-display area DA. On the one hand, considering that the fabrication process of the second signal line 31 on the buffer layer 8 may cause a certain degree of corrosion to the film layer between the first signal line 21 and the second signal line 31, the buffer layer 8 protects the film layer between the first signal line 21 and the second signal line 31, improving the quality of the display panel. On the other hand, the buffer layer 8 flattens the end face of the film layer, mitigating the impact of the through-hole 41 on the filling layer 4 on the fabrication of the second signal line 31.

[0070] The second method, for example, is as follows: Figure 15 As shown, the encapsulation layer 7 of the display panel also includes an adhesive layer 74 located between the first layer 71 and the third layer 73, and within the non-display area DA. This adhesive layer 74 intersects with the through-hole 41 of the filling layer 4. The adhesive layer 74 at least fills the space remaining after the through-hole 41 of the filling layer 4 is covered by the film layer between the third layer 73 of the encapsulation layer 7 and the filling layer 4. This allows the first layer 71 and the third layer 73 of the encapsulation layer 7 to be bonded together by the adhesive layer, resulting in a flattened end face of the first layer 71 facing the film layer where the second signal line 31 is located, thus improving the impact of the through-hole 41 on the second signal line 31. Furthermore, the adhesive layer 74 increases the bonding strength between the first layer 71 and the third layer 73 at the edge of the display panel, improving the sealing quality of the encapsulation layer 7 and further enhancing the display panel's resistance to water and oxygen.

[0071] Considering the impact of the fabrication of the second signal line on the relationship between the second signal line and the substrate, especially on the film layer near the second signal line, such as Figure 15 As shown, in at least one embodiment, a buffer layer 8 is provided between the film layer where the second signal line 31 is located, i.e., the touch layer 3, and the first layer 71 of the encapsulation layer 7. The buffer layer 8 can reduce the problem of corrosion between the second signal line 31 and the substrate 1 by corrosive liquid during the fabrication of the second signal line 31, which would affect the quality of the display panel.

[0072] The filling layer is not limited to a design where it is positioned between the first insulating layer and the first signal line, as long as it can fill the groove at the edge of the first signal line. Therefore, instead of having the filling layer directly contact the first signal line to fill the groove at its edge, it can also be positioned without direct contact with the first signal line. This can be achieved by placing the filling layer above the film layer containing the first signal line and below the film layer containing the second signal line. Specific implementation methods are detailed below.

[0073] In some embodiments, such as Figure 16 and Figure 17As shown, the filler layer 4 is located between the first insulating layer 5 and the second signal line 31. The first insulating layer 5 has already filled the grooves at the edges of the first signal line 21, but it has not completely filled all the spaces in these grooves. Therefore, the filler layer 4 does not directly contact the first signal line 31. Instead, it is disposed on the first insulating layer 5. After the first insulating layer 5 covers the grooves, it provides a secondary cover for the remaining spaces in these grooves, which more effectively improves the efficiency and effect of filling the grooves at the edges of the first signal line 21, thereby effectively improving the short circuit problem of the second signal line 31. Furthermore, the placement of the filler layer does not affect the adhesion strength between the first insulating layer and other film layers on the substrate.

[0074] It should be understood that when the first insulating layer has a multilayer structure, a filler layer can also be disposed between the multiple film layers included in the first insulating layer, depending on production requirements. Furthermore, the film layer between the first signal line and the second signal line is not limited to just the first insulating layer; other film layers can also be disposed. Therefore, the placement of the filler layer is not limited to the two schemes provided in this embodiment, namely, being disposed between the first insulating layer and the first signal line or between the first insulating layer and the first signal line. It can be designed according to the specific film layer structure between the first signal line and the second signal line to achieve more other functions of the filler layer, such as using through-holes in the filler layer for positioning.

[0075] Regarding the design of the first insulating layer comprising a multilayer structure, in at least one embodiment, such as Figure 18 and Figure 19 As shown, the display panel also includes an encapsulation layer 7 located on the side of the filling layer 4 away from the substrate 1. The encapsulation layer 7 includes a first layer 71, a second layer 72, and a third layer 73 stacked sequentially. The first layer 71 and the third layer 73 are both inorganic film layers, while the second layer 72 is an organic film layer. The first insulating layer 5 includes the portions of the first layer 71 and the third layer 73 located in the non-display area DA. The first layer 71 of the encapsulation layer 7 faces the side away from the filling layer 4. Furthermore, the first layer 71 is in direct contact with the filling layer 4, protecting the filling layer 4, the first signal line 3, and other film layers on the substrate 1. At the same time, the film layer containing the second signal line 31 is located on the side of the encapsulation layer 7 away from the first signal line 21, reducing the damage to other film layers on the substrate 1 caused by the fabrication of the second signal line 31, and improving the quality of the display panel.

[0076] To meet market demand for display panels, at least one other functional layer of the display panel includes a touch layer. In at least some embodiments, such as Figure 20As shown, the display panel also includes a buffer layer 8 between the encapsulation layer 7 and the touch layer 3. The first insulating layer 5 also includes a portion of the buffer layer 8 located in the non-display area DA. The buffer layer 8 not only flattens the end face and mitigates the impact of the vias 41 provided on the filling layer 4 on the fabrication of the second signal line 31, but also prevents the etching solution from corroding the film layer between the second signal line and the substrate during the fabrication of the second signal line 31, thereby improving the quality of the display panel.

[0077] Based on the routing design of the display panel, which has both display and touch functions, the functions of the first and second signal lines are defined, specifically, as follows: Figure 12 and Figure 20 As shown, in at least one embodiment, the display panel further includes a display functional layer 2 and a touch layer 3 located in the display area AA. The substrate 1 includes a driving circuit layer 9 located in the display area AA for driving the display functional layer 2. Multiple first signal lines 21 are electrically connected to the driving circuit layer 9, and multiple second signal lines 31 are electrically connected to the touch layer 3. Multiple display electrodes in the driving circuit layer 9 extend to the non-display area DA and are electrically connected to the multiple first signal lines 21. The first signal lines 21 are also electrically connected to leads of a driving chip that controls the light emission of the display functional layer. Multiple touch electrodes in the touch layer 3 extend to the non-display area DA and are connected to the multiple second signal lines 31.

[0078] It should be understood that the display functional layer includes a first conductive layer, a pixel defining layer, an organic light-emitting layer, and a second electrode, sequentially stacked on the substrate in a direction away from the substrate. The driving circuit layer includes an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, and source / drain electrodes, sequentially stacked on the substrate in a direction away from the substrate. Multiple first signal lines are electrically connected to the source / drain electrodes and the gate electrode. The touch layer includes a touch structure and first and second touch electrodes connected to the touch structure for implementing touch functionality. The first and second touch electrodes are electrically connected to multiple second signal lines.

[0079] It should be understood that the display panel may also include other film layers to improve its quality. For example, a protective layer may be provided between the substrate and the driving circuit layer. This protective layer can be made of at least one material selected from silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiOxNy), and can be a single layer or multiple layers. This layer is used to prevent or reduce the penetration of impurities, moisture, and external air that can cause semiconductor degradation and can also planarize the surface. For example, a planarization layer may be provided between the driving circuit layer and the display functional layer, which can serve as a second insulating layer. For example, a passivation layer may be provided on the end face of the driving circuit layer away from the substrate, i.e., the interlayer insulating layer, which can serve as a second insulating layer. Various other options, such as providing other protective layers on the second electrode, will not be elaborated here.

[0080] In addition to providing touch and display functionality, the adaptability of the display panel can be improved through other designs, such as giving it flexible bending capabilities. In some embodiments, such as... Figure 1 and Figure 5 and Figure 10 As shown, the area of ​​the non-display area DA far from the display area AA is divided into a bending area BB. The display panel also includes a barrier dam 10 located between the bending area BB and the display area AA. The filling layer 4 is located between the barrier dam 10 and the bending area BB, that is, the filling layer 4 is located at the boundary between the barrier dam 10 and the bending area BB. In other words, the boundary lines of the barrier dam 10 and the bending area BB do not connect, and there is a width region between their boundary lines. The filling layer 4 is disposed within this width region. Further, as... Figure 5 and Figure 10 As shown, the filling layer 4 covers the entire width of the boundary between the barrier dam 10 and the bending area BB. Specifically, one side of the filling layer 4 connects to the boundary line of the barrier dam 10 away from the display area AA, and the other side of the filling layer 4 connects to the boundary line of the bending area BB near the display area AA. Since the intersection of the edge of the first signal line 21 and the second signal line 31 is located at the boundary between the barrier dam 10 and the bending area BB, the placement of the filling layer 4 effectively improves the short-circuit problem of the second signal line 31 while also simplifying the preparation process of the filling layer 4 to the greatest extent possible. This simplifies the manufacturing process of the display panel and reduces its production cost.

[0081] It should be understood that the choice of substrate material is crucial to whether a display panel has flexible bending capabilities. When the display panel does not have flexible bending capabilities, the substrate can be made of at least one material, such as glass or plastic. When the display panel has flexible bending capabilities, the substrate can be made of a flexible polyimide material. Furthermore, the substrate can be made of a transparent material, and when the display panel is a front-emitting type, the substrate can be made of an opaque material. The appropriate material can be selected to prepare the substrate according to production requirements.

[0082] Regarding the specific design of the barrier dam, in at least one embodiment, such as Figure 5 and Figure 10As shown, the display panel includes two barrier dams 10, and the height of the barrier dam 10 closer to the display area AA in the direction away from the substrate 1 is smaller than the height of the barrier dam 10 further away from the display area AA in the direction away from the substrate 1. The barrier dams 10 can prevent liquid from overflowing into the non-display area or display area during the fabrication of the organic film layer in the display area or non-display area, thereby improving the processing efficiency of the display panel. It should be understood that the location and number of barrier dams, as well as the parameters of each barrier dam, such as height and width, are not limited to the solution provided in this embodiment. Appropriate technical solutions can be designed and selected according to the functional requirements and processing conditions of the display panel.

[0083] This application also provides a display device. The display device includes any of the display panels provided in the first aspect described above.

[0084] For example, in some embodiments, the display device includes a display area, a non-display area, and a bent area located in the non-display area away from the display area, with a filling layer disposed in an area where the non-display area and the bent area do not intersect.

[0085] For example, at least one embodiment of the display device provided in this application further includes a touch sensor, a touch chip, and a flexible circuit board for implementing touch control. To achieve a thinner and lighter touch display panel, the touch sensor is disposed in the encapsulation layer of the display panel, the touch chip is disposed on the flexible circuit board, and signals are transmitted to the touch sensor via touch signal lines.

[0086] For example, the display device in the embodiments of this application can be any product or component with display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, navigator, circular wearable product, etc.

[0087] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, The display panel is divided into a display area and a non-display area, and includes: substrate; A first metal layer is stacked on the substrate and includes a plurality of first signal lines. The first signal lines are at least partially located in the non-display area. The first signal lines located in the non-display area include a first segment, and the sidewall of the first segment is formed with a groove. A second metal layer, stacked on the side of the first metal layer away from the substrate, includes a plurality of second signal lines, wherein at least a portion of the orthographic projection of two adjacent second signal lines onto the substrate overlaps with the orthographic projection of the first segment onto the substrate; and A filling layer, located within the non-display area, at least partially fills the groove of the first segment, and at least fills at least a portion of the edge of the first signal line located between two adjacent second signal lines, flattening the at least portion of the edge.

2. The display panel according to claim 1, characterized in that, The filler layer is located between the first metal layer and the second metal layer.

3. The display panel according to claim 2, characterized in that, The filling layer at least covers the sidewalls of the first segment.

4. The display panel according to claim 3, characterized in that, At least a portion of the filling layer also covers the first signal line.

5. The display panel according to claim 4, characterized in that, The first signal line further includes a second segment, and the sidewall of the second segment is formed with a groove. The orthographic projection of the second segment on the substrate is offset from the orthographic projection of at least two adjacent second signal lines on the substrate. At least a portion of the filling layer fills the groove of the second segment.

6. The display panel according to any one of claims 1 to 5, characterized in that, It also includes a first insulating layer, which is an inorganic film layer located between the first metal layer and the second metal layer, and the filling layer is an organic film layer.

7. The display panel according to claim 6, characterized in that, The thickness of the filler layer is greater than the thickness of the first insulating layer.

8. The display panel according to claim 7, characterized in that, The filler layer is located between the first insulating layer and the second metal layer.

9. The display panel according to claim 8, characterized in that, The display panel further includes an encapsulation layer located on the side of the filler layer away from the substrate. The encapsulation layer includes a first layer, a second layer, and a third layer stacked sequentially. The first layer and the third layer are both inorganic film layers, the second layer is an organic film layer, and the first insulating layer includes the portions of the first layer and the third layer located in the non-display area.

10. The display panel according to claim 6, characterized in that, The filler layer is located between the first insulating layer and the first metal layer.

11. The display panel according to claim 10, characterized in that, The filling layer has one or more through holes, and at least a portion of the first insulating layer fills the through holes.

12. The display panel according to claim 11, characterized in that, At least a portion of the through-hole's orthographic projection on the substrate lies within the orthographic projection of the first segment on the substrate, and the first insulating layer contacts the first segment.

13. The display panel according to claim 12, characterized in that, The substrate includes a second insulating layer, the first signal line is located between the second insulating layer and the first insulating layer, and the first insulating layer is in contact with the second insulating layer through the through hole.

14. The display panel according to claim 13, characterized in that, The second insulating layer is a planarization layer or a passivation layer.

15. The display panel according to claim 13, characterized in that, The display panel further includes an encapsulation layer located on the side of the second signal line facing the substrate. The encapsulation layer includes a first layer, a second layer, and a third layer stacked sequentially. The first layer and the third layer are both inorganic film layers, the second layer is an organic film layer, and the first insulating layer includes the portions of the first layer and the third layer located in the non-display area.

16. The display panel according to claim 15, characterized in that, It also includes a buffer layer and a touch layer stacked sequentially on the side of the encapsulation layer opposite to the substrate, and the first insulating layer also includes the portion of the buffer layer located in the non-display area.

17. The display panel according to claim 1, characterized in that, It also includes a display function layer and a touch layer located in the display area. The substrate includes a driving circuit layer located in the display area for driving the display function layer. The first signal line is electrically connected to the driving circuit layer, and the second signal line is electrically connected to the touch layer.

18. The display panel according to claim 1, characterized in that, The portion of the non-display area far from the display area is divided into a bend area, and the display panel further includes: A barrier is located between the bending area and the display area, and the filling layer is located between the barrier and the bending area.

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