Semiconductor failure analysis device and semiconductor failure analysis method

Abstract

The control section of the semiconductor failure analysis device of the present application outputs an alignment command that, after moving the chuck to a position at which the first light detecting section can detect the target, aligns the optical axis of the second optical system with the optical axis of the first optical system based on the target, and outputs an analysis command that, while maintaining the positional relationship between the optical axis of the first optical system and the optical axis of the second optical system, applies a stimulus signal to the semiconductor device and receives light emitted from the semiconductor device in accordance with the stimulus signal from at least one of the first light detecting section or the second light detecting section.

Description

Technical Field

[0001] This invention relates to a semiconductor fault analysis device and a semiconductor fault analysis method. Background Technology

[0002] Semiconductor device miniaturization is progressing. In the miniaturization of semiconductor devices, improvements in exposure or patterning techniques used to manufacture them are desired. Furthermore, technologies for determining whether semiconductor devices manufactured using these technologies operate correctly are important. Moreover, technologies for identifying the causes of defects in cases of abnormal operation are also important.

[0003] Patent documents 1 and 2 disclose apparatuses for inspecting semiconductor devices. These apparatuses illuminate a semiconductor device to which an electrical signal has been applied. The light illuminating the semiconductor device becomes reflected light corresponding to the state of the semiconductor device. Furthermore, these apparatuses utilize the reflected light to obtain information about the operating state of the semiconductor device. The apparatus of Patent Document 1 obtains information about the location of a semiconductor device operating at a defined frequency. The apparatus of Patent Document 2 obtains information about the heat source generated by a faulty location in the semiconductor device.

[0004] [Existing technical documents]

[0005] [Patent Literature]

[0006] Patent Document 1: Japanese Patent Application Publication No. 2014-92514

[0007] Patent Document 2: International Publication No. 2016 / 056110 Summary of the Invention

[0008] [The problem the invention aims to solve]

[0009] In the field of semiconductor fault analysis devices, there is a need for techniques that can effectively detect faulty components in semiconductor devices. Therefore, this invention provides a semiconductor fault analysis device and method for effectively detecting faulty components in semiconductor devices.

[0010] [Technical means to solve the problem]

[0011] One aspect of the semiconductor fault analysis apparatus of the present invention includes: a first analysis unit that receives light emitted by a semiconductor device via a first optical system from a first light detection unit, the first optical system being movable relative to the semiconductor device via a first driving unit; a second analysis unit that receives light emitted by the semiconductor device via a second optical system from a second light detection unit, the second optical system being movable relative to the semiconductor device via a second driving unit; a device placement unit disposed between the first and second analysis units, having a chuck that holds the semiconductor device and having a target for aligning the optical axes of the first and second optical systems, the chuck being movable relative to the first and second analysis units; a stimulation signal application unit that applies a stimulation signal to the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side of the target by the first analysis unit and from the other side of the target by the second analysis unit. The control unit outputs an alignment command to the second resolution unit and the device placement unit. After the chuck is moved to a position where the first photodetector can detect the target, the alignment command aligns the optical axis of the second optical system with the optical axis of the first optical system based on the target. The control unit also outputs a resolution command to the first resolution unit, the second resolution unit, the stimulation signal application unit, and the device placement unit. While maintaining the positional relationship between the optical axes of the first and second optical systems, the resolution command applies a stimulation signal to the semiconductor device. At least one of the first or second photodetector receives the light emitted from the semiconductor device based on the stimulation signal.

[0012] This semiconductor fault analysis device applies a stimulation signal to a semiconductor device while maintaining the positional relationship between the optical axes of the first and second optical systems. At least one of the first or second photodetector units receives the light emitted from the semiconductor device based on the stimulation signal. Therefore, since the first and second optical systems, which receive the light from the semiconductor device, are aligned on their optical axes, the fault location of the semiconductor device can be detected effectively.

[0013] The alignment command of a semiconductor fault analysis device can also cause the first optical detection unit to acquire a first image of a target from one side, and the second optical detection unit to acquire a second image of a target from the other side, and move the second optical system in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first image and the second image.

[0014] The analysis command of the semiconductor fault analysis device can also be performed after the chuck is moved by the third drive unit included in the device configuration unit in such a way that the semiconductor devices of the first optical system and the second optical system overlap.

[0015] The target of a semiconductor fault analysis device can also be set in a location different from the device holding part that holds the semiconductor device in the chuck.

[0016] The first photodetector of the semiconductor fault analysis device can also acquire a first image of the target observed from one side. The second photodetector can also acquire a second image of the target observed from the other side.

[0017] The target of a semiconductor fault analysis device may also include a light-transmitting section that can detect light through the first light detection section and the second light detection section.

[0018] Another embodiment of the semiconductor fault analysis apparatus of the present invention includes: a first analysis unit that irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit; a second analysis unit that irradiates the semiconductor device with light generated by a second light source via a second optical system having a second light scanning unit; a device placement unit disposed between the first and second analysis units, having a chuck that holds the semiconductor device and having a target positioned to align the center of the light scanning area of ​​the first optical system with the center of the light scanning area of ​​the second optical system, the chuck being movable relative to the first and second analysis units; an electrical signal acquisition unit that receives electrical signals output by the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the electrical signal acquisition unit. The target can be detected from one side of the target by the first analysis unit and from the other side of the target by the second analysis unit. The control unit outputs an alignment command to the second resolution unit and the device placement unit. After the chuck is moved to a position where the first resolution unit can detect the target, the alignment command uses the target as a reference to align the center of the light scanning area of ​​the second optical system with the center of the light scanning area of ​​the first optical system. The control unit also outputs a resolution command to the first resolution unit, the second resolution unit, the electrical signal acquisition unit, and the device placement unit. While maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, the control unit irradiates light onto the semiconductor device from at least one of the first and second resolution units, and receives an electrical signal from the semiconductor device through the electrical signal acquisition unit.

[0019] In other embodiments of the semiconductor fault analysis apparatus of the present invention, the first analysis unit may include a first light detection unit that receives light from one side of the semiconductor device, and the second analysis unit may include a second light detection unit that receives light from the other side of the semiconductor device. An alignment command causes the first light detection unit to acquire a first image of a target from one side, and causes the second light detection unit to acquire a second image of a target from the other side. Based on the first image and the second image, the optical axis of the second optical system is aligned with the optical axis of the first optical system, thereby aligning the center of the scanning area of ​​the first optical system with the center of the scanning area of ​​the second optical system.

[0020] In other forms of the semiconductor fault analysis apparatus of the present invention, the analysis command can also be performed after the chuck is moved by the third driving unit included in the device configuration unit in such a way that the semiconductor devices in the optical scanning areas of the first optical system and the optical scanning areas of the second optical system overlap.

[0021] Other embodiments of the semiconductor fault analysis apparatus of the present invention may also be located in a location different from the device holding section that holds the semiconductor device in the chuck.

[0022] In other embodiments of the semiconductor fault analysis apparatus of the present invention, the first analysis unit may include a first light detection unit that receives light from one side of the semiconductor device, and the second analysis unit may include a second light detection unit that receives light from the other side of the semiconductor device. The first light detection unit acquires a first image of the target observed from one side, and the second light detection unit acquires a second image of the target observed from the other side.

[0023] In other forms of the semiconductor fault analysis apparatus of the present invention, the first analysis unit may also include a first light detection unit that receives light from one side of the semiconductor device, and the second analysis unit may include a second light detection unit that receives light from the other side of the semiconductor device. The target includes a light transmission unit that can transmit light through the first light detection unit and the second light detection unit.

[0024] Further embodiments of the semiconductor fault analysis apparatus of the present invention include: a first analysis unit that irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit, and a first light detection unit that receives a first response light generated from the semiconductor device based on the light from the first light source; a second analysis unit that irradiates the semiconductor device with light generated by a second light source via a second optical system having a second light scanning unit, and a second light detection unit that receives a second response light generated from the semiconductor device based on the light from the second light source; a device placement unit disposed between the first analysis unit and the second analysis unit, having a chuck that holds the semiconductor device and having a target positioned to align the center of the light scanning area of ​​the first optical system with the center of the light scanning area of ​​the second optical system, the chuck being movable relative to the first analysis unit and the second analysis unit; a stimulation signal application unit that applies a stimulation signal to the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side of the target by the first analysis unit and from the other side of the target by the second analysis unit. The control unit outputs an alignment command to the second resolution unit and the device placement unit. After the chuck is moved to a position where the first photodetector can detect the target, the alignment command aligns the center of the light scanning area of ​​the second optical system with the center of the light scanning area of ​​the first optical system, using the target as a reference. The control unit also outputs a resolution command to the first resolution unit, the second resolution unit, the stimulation signal application unit, and the device placement unit. While maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, and while applying a stimulation signal to the semiconductor device, the control unit irradiates the semiconductor device with light from at least one of the first resolution unit and the second resolution unit. At least one of the first response light and the second response light from the semiconductor device is received by at least one of the first photodetector and the second photodetector.

[0025] The alignment command of the semiconductor fault analysis device of the present invention in other forms can also cause the first optical detection unit to acquire a first image of a target from one side, and the second optical detection unit to acquire a second image of a target from the other side. Based on the first image and the second image, the optical axis of the second optical system is aligned with the optical axis of the first optical system, thereby aligning the center of the scanning area of ​​the first optical system with the center of the scanning area of ​​the second optical system.

[0026] In other embodiments of the present invention, the analysis command of the semiconductor fault analysis device can also be performed after the chuck is moved by the third driving unit included in the device configuration unit in such a way that the semiconductor devices in the optical scanning areas of the first optical system and the optical scanning areas of the second optical system overlap.

[0027] Furthermore, other forms of the semiconductor fault analysis apparatus of the present invention may also be positioned in a location different from the device holding section that holds the semiconductor device in the chuck.

[0028] In further embodiments of the semiconductor fault analysis apparatus of the present invention, the first photodetector can also acquire a first image of the target observed from one side. The second photodetector can also acquire a second image of the target observed from the other side.

[0029] The target of other forms of the semiconductor fault analysis apparatus of the present invention may also include a light-transmitting section that can transmit light that can be detected by the first light detection section and the second light detection section.

[0030] Further embodiments of the present invention utilize a semiconductor fault analysis apparatus to analyze semiconductor devices and a semiconductor fault analysis method. The semiconductor fault analysis apparatus includes: a first analysis unit that receives light emitted from a semiconductor device via a first optical system through a first light detection unit, the first optical system being movable relative to the semiconductor device via a first driving unit; a second analysis unit that receives light emitted from a semiconductor device via a second optical system through a second light detection unit, the second optical system being movable relative to the semiconductor device via a second driving unit; a device placement unit disposed between the first and second analysis units, having a chuck that holds the semiconductor device and having a target for aligning the optical axes of the first and second optical systems, the chuck being movable relative to the first and second analysis units; a stimulation signal application unit that applies a stimulation signal to the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side of the target by the first light detection unit and from the other side of the target by the second light detection unit. The semiconductor fault analysis method includes the following steps: an alignment step, in which, after moving the chuck to a position where the first optical detection unit can detect the target, the optical axis of the second optical system is aligned with the optical axis of the first optical system with the target as a reference; and an analysis step, in which, while maintaining the positional relationship between the optical axes of the first and second optical systems, a stimulation signal is applied to the semiconductor device, and at least one of the first or second optical detection units receives light emitted from the semiconductor device according to the stimulation signal.

[0031] Other forms of the semiconductor fault analysis method of the present invention may further include, after the analysis process, a marking process of affixing the marks of the fault locations of the display semiconductor device obtained by the first analysis unit and the second analysis unit to the semiconductor device.

[0032] Further embodiments of the present invention utilize a semiconductor fault analysis apparatus to analyze semiconductor devices using a semiconductor fault analysis method. The semiconductor fault analysis apparatus includes: a first analysis unit that irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit; a second analysis unit that irradiates a semiconductor device with light generated by a second light source via a second optical system having a second light scanning unit; a device placement unit disposed between the first and second analysis units, having a chuck that holds the semiconductor device and is provided with a target for aligning the center of the light scanning area of ​​the first optical system with the center of the light scanning area of ​​the second optical system, the chuck being movable relative to the first and second analysis units; an electrical signal acquisition unit that receives electrical signals output by the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the electrical signal acquisition unit. The target can be detected from one side of the target by the first analysis unit and from the other side of the target by the second analysis unit. The semiconductor fault analysis method includes the following steps: an alignment step, in which, after moving the chuck to a position where the first analysis unit can detect the target, the center of the light scanning area of ​​the second optical system is aligned with the center of the light scanning area of ​​the first optical system, with the target as a reference; and a analysis step, in which, while maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, light is irradiated onto the semiconductor device from at least one of the first analysis unit and the second analysis unit, and an electrical signal is received from the semiconductor device through an electrical signal acquisition unit.

[0033] Other forms of the semiconductor fault analysis method of the present invention may further include, after the analysis process, a marking process of affixing the marks of the fault locations of the display semiconductor device obtained by the first analysis unit and the second analysis unit to the semiconductor device.

[0034] Further embodiments of the present invention utilize a semiconductor fault analysis apparatus to analyze semiconductor devices using a semiconductor fault analysis method. The semiconductor fault analysis apparatus includes: a first analysis unit that irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit, and a first light detection unit that receives a first response light generated from the semiconductor device based on the light from the first light source; a second analysis unit that irradiates a semiconductor device with light generated by a second light source via a second optical system having a second light scanning unit, and a second light detection unit that receives a second response light generated from the semiconductor device based on the light from the second light source; a device placement unit disposed between the first and second analysis units, having a chuck that holds the semiconductor device and is provided with a target for aligning the center of the light scanning area of ​​the first optical system with the center of the light scanning area of ​​the second optical system, the chuck being movable relative to the first and second analysis units; a stimulation signal application unit that applies a stimulation signal to the semiconductor device; and a control unit that outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side by the first photodetector and from the other side by the second photodetector. The semiconductor fault analysis method includes the following steps: an alignment step, in which, after moving the chuck to a position where the first photodetector can detect the target, the center of the light scanning area of ​​the second optical system is aligned with the center of the light scanning area of ​​the first optical system, using the target as a reference; and a analysis step, in which, while maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, and while applying a stimulus signal to the semiconductor device, light is irradiated onto the semiconductor device from at least one of the first and second analysis units, and at least one of the first and second response lights from the semiconductor device is received by at least one of the first and second photodetectors.

[0035] Other forms of the semiconductor fault analysis method of the present invention may further include, after the analysis process, a marking process of affixing the marks of the fault locations of the display semiconductor device obtained by the first analysis unit and the second analysis unit to the semiconductor device.

[0036] [The effects of the invention]

[0037] According to the present invention, a semiconductor fault analysis apparatus and a semiconductor fault analysis method are provided for effectively detecting faulty parts of semiconductor devices. Attached Figure Description

[0038] Figure 1 This is a configuration diagram of a semiconductor fault analysis apparatus according to an embodiment.

[0039] Figure 2 This is a diagram used to illustrate laser marking images on semiconductor devices. Figure 2(a) is a view showing the back of a laser-marked semiconductor device. Figure 2 (b) A diagram showing the surface of a laser-marked semiconductor device. Figure 2 (c) is along Figure 2 (b) Sectional view of II(c)-II(c).

[0040] Figure 3 For illustrative purposes Figure 1 The diagram showing the label control of the analytical device.

[0041] Figure 4 This is a top-down view of the target.

[0042] Figure 5 For display purposes Figure 1 The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device.

[0043] Figure 6 (a) is a diagram showing the analytical process. Figure 6 (b) A diagram showing one of the steps that constitutes the alignment process.

[0044] Figure 7 (a) To display immediately following Figure 6 (b) is a diagram of the process of aligning the process. Figure 7 (b) To display immediately following Figure 7 (a) is a diagram of the process of aligning the process.

[0045] Figure 8 To show immediately following Figure 7 (b) is a diagram of the process of aligning the process.

[0046] Figure 9 This is a configuration diagram of the semiconductor fault analysis apparatus according to the second embodiment.

[0047] Figure 10 For display purposes Figure 9 The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device.

[0048] Figure 11 This is a schematic diagram of a semiconductor fault analysis device as a variation example.

[0049] Figure 12 For display purposes Figure 11 The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device.

[0050] Figure 13 This is a configuration diagram of the semiconductor fault analysis apparatus according to the third embodiment.

[0051] Figure 14 For display purposes Figure 13The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device.

[0052] Figure 15 This is a configuration diagram of the semiconductor fault analysis apparatus according to the third embodiment.

[0053] Figure 16 For display purposes Figure 15 The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device. Detailed Implementation

[0054] However, one technique for analyzing semiconductor devices involves using laser irradiation to mark several points around the faulty area when the fault location is identified. In subsequent fault analysis processes, the fault location can be easily determined based on these marks. Therefore, this technique is extremely effective.

[0055] Japanese Patent Application Publication No. 2016-148550 discloses a semiconductor device analysis apparatus. The analysis apparatus disclosed in Patent Document 1 has a structure for analyzing faulty parts of a semiconductor device and a structure for adding markings around the faulty parts. The analysis apparatus first aligns the positions of the structure detecting the faulty parts and the structure adding markings. Then, the analysis apparatus analyzes the faulty parts while moving the structure detecting the faulty parts relative to the semiconductor device. When the structure detecting the faulty parts determines the location of the faulty part, the analysis apparatus moves the structure adding markings to the location of the faulty part.

[0056] Following fault analysis, the location of the faulty component is determined based on the markings. Therefore, it is desirable for the markings to accurately indicate the location of the faulty component. On the other hand, even highly precise moving mechanisms such as XY platforms that move the components of the device can introduce slight errors between the position displayed by the movement command value and the actual position. Even with these slight errors, there is a possibility that the position of the faulty component displayed by the markings may deviate from the actual position of the faulty component. In other words, the deviation between the actual position of the faulty component and the position displayed by the markings depends on the accuracy of the moving mechanism.

[0057] The purpose of this invention is to provide a semiconductor fault analysis device and a semiconductor fault analysis method that can reduce the offset between the location of the fault location and the location of the fault location indicated by the marking.

[0058] One aspect of the semiconductor fault analysis apparatus of the present invention includes: an analysis unit that receives first light from a semiconductor device via a first optical system by a first light detection unit, the first optical system being movable relative to the semiconductor device by a first driving unit; a marking unit that receives second light from the semiconductor device via a second optical system by a second light detection unit and irradiates the semiconductor device with laser light via the second optical system, the second optical system being movable relative to the semiconductor device by a second driving unit; a device placement unit disposed between the analysis unit and the marking unit, having a chuck that holds the semiconductor device and having a target for aligning the optical axes of the first and second optical systems, the chuck being movable relative to the analysis unit and the marking unit by a third driving unit; and a control unit that outputs commands to the analysis unit, the marking unit, and the device placement unit. The target can be detected from one side of the target by the first light detection unit and from the other side of the target by the second light detection unit. The control unit outputs an alignment command to the marking unit and the device configuration unit. After the chuck is moved to a position where the first optical detection unit can detect the target, the alignment command uses the target as a reference to align the optical axis of the second optical system with the optical axis of the first optical system, and outputs a marking command to the marking unit and the device configuration unit. The marking command irradiates the marking position set on the semiconductor device with laser while maintaining the positional relationship between the optical axes of the first optical system and the optical axes of the second optical system.

[0059] Other embodiments of the present invention utilize a semiconductor fault analysis apparatus to analyze semiconductor devices using a semiconductor fault analysis method. The semiconductor fault analysis apparatus includes: an analysis unit that receives first light from the semiconductor device via a first optical system from a first photodetector unit, the first optical system being movable relative to the semiconductor device via a first driving unit; a marking unit that receives second light from the semiconductor device via a second optical system from a second photodetector unit and irradiates the semiconductor device with laser light via the second optical system, the second optical system being movable relative to the semiconductor device via a second driving unit; a device placement unit disposed between the analysis unit and the marking unit, having a chuck that holds the semiconductor device and having a target for aligning the optical axes of the first and second optical systems, the chuck being movable relative to the analysis unit and the marking unit via a third driving unit; and a control unit that outputs commands to the analysis unit, the marking unit, and the device placement unit. The target can be detected from one side by the first photodetector unit and from the other side by the second photodetector unit. The semiconductor fault analysis method includes the following steps: an alignment step, in which, after moving the chuck to a position where the first optical detection unit can detect the target, the optical axis of the second optical system is aligned with the optical axis of the first optical system with the target as a reference; and a marking step, in which, while maintaining the positional relationship between the optical axes of the first and second optical systems, a laser is irradiated onto a marking position set on the semiconductor device.

[0060] In the semiconductor fault analysis apparatus and method, firstly, based on a target provided in the chuck, the optical axis of the second optical system of the marking unit is aligned with the optical axis of the first optical system of the analysis unit. Then, while maintaining the positional relationship between the optical axes of the first and second optical systems, a laser is irradiated onto the marking position set on the semiconductor device. That is, after aligning the optical axes of the first and second optical systems, neither the first nor the second optical system moves relative to the other. Therefore, no offset occurs between the position displayed by the movement command value and the actual position, which could potentially result from movement. As a result, the offset of the marked fault location position relative to the position of the fault location displayed by the analysis unit can be reduced.

[0061] In one type of semiconductor fault analysis apparatus, the control unit may output an analysis command to the analysis unit, which analyzes the faulty parts of the semiconductor device, before outputting an alignment command. Similarly, other types of semiconductor fault analysis methods may further include an analysis step, whereby the analysis unit analyzes the faulty parts of the semiconductor device, before the alignment step. With this configuration, a mark that displays the location of the faulty part with better accuracy can be added.

[0062] In one type of semiconductor fault analysis apparatus, the alignment command can be performed by irradiating the semiconductor device with laser after the chuck is moved to the marking position by the third drive unit. Similarly, in other types of semiconductor fault analysis methods, the marking process can also be performed by irradiating the semiconductor device with laser after the chuck is moved to the marking position by the third drive unit. According to this configuration, after aligning the optical axis of the second optical system with the optical axis of the first optical system, the absolute position of the semiconductor device can be maintained, in addition to the relative position of the first and second optical systems, while irradiating the desired position with laser. As a result, the offset of the fault location indicated by the marking unit can be further reduced.

[0063] In one type of semiconductor fault analysis apparatus, the alignment command can also cause the first photodetector to acquire a first image of a target from one side, and the second photodetector to acquire a second image of a target from the other side, and move the second optical system in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first and second images. Similarly, in other types of semiconductor fault analysis methods, the alignment process can also cause the first photodetector to acquire a first image of a target from one side, and the second photodetector to acquire a second image of a target from the other side, and move the second drive unit in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first and second images. With this configuration, the operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can be reliably performed.

[0064] In one type of semiconductor fault analysis apparatus, the target can also be located in a location different from the device holding section that holds the semiconductor device in the chuck. With this configuration, regardless of the type of semiconductor device, the optical axis of the second optical system can be aligned with the optical axis of the first optical system.

[0065] In one type of semiconductor fault analysis apparatus, the first optical detection unit can also acquire a first image of the target observed from one side. The second optical detection unit can also acquire a second image of the target observed from the other side. Even with this configuration, the operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can be reliably performed.

[0066] In one type of semiconductor fault analysis device, the target may also include a light-transmitting part that transmits light that can be detected by the first and second light detection units. Even with this configuration, the operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can be reliably performed.

[0067] According to the present invention, a semiconductor fault analysis apparatus and a semiconductor fault analysis method are provided that can reduce the offset between the location of the faulty part and the location of the marked display.

[0068] The following is a reference to the appendix. Figure 1 The following details the configurations used to implement the invention. In the description of the drawings, the same symbols are used for the same elements, and repeated descriptions are omitted.

[0069] like Figure 1 As shown, the semiconductor fault analysis apparatus of this embodiment analyzes the device under test (DUT), i.e., semiconductor device D. In the following description, the semiconductor fault analysis apparatus of this embodiment will be simply referred to as "analysis apparatus 1". Furthermore, the analysis of semiconductor device D includes, for example, determining the location of faulty parts contained in semiconductor device D. However, the analysis of semiconductor device D is not limited to determining the location of faulty parts. The analysis of semiconductor device D includes other analyses and inspections of semiconductor device D. Hereinafter, the analysis apparatus 1 of this embodiment will be described as an apparatus for determining the location of faulty parts contained in semiconductor device D.

[0070] Furthermore, the analysis device 1 determines the location of the fault and adds a mark (symbol) around the fault location to indicate it. This act of adding the mark is called "marking." The mark is used in subsequent fault analysis processes to easily identify the fault location determined by the analysis device 1.

[0071] Examples of semiconductor devices D include integrated circuits (ICs) with PN junctions, such as transistors; large-scale integrated circuits (LSIs), i.e., logic devices, memory devices, analog devices, and mixed-signal devices combining these; and high-current / high-voltage MOS (Metal Oxide Semiconductor) transistors, bipolar transistors, IGBTs (Insulated Gate Bipolar Transistors), and other power semiconductor devices (power devices). Semiconductor device D has a stacked structure including a substrate and metal layers. For example, a silicon substrate is used as the substrate of semiconductor device D.

[0072] The analysis apparatus 1 includes an analysis unit 10, a marking unit 20, a device placement unit 30, and a computer 40. The analysis unit 10 determines the fault location of the semiconductor device D. The marking unit 20 adds markings to display the location of the fault location. The semiconductor device D is placed in the device placement unit 30. The analysis apparatus 1 may also be, for example, an inverted emission microscope with laser marking function.

[0073] <Analysis Section>

[0074] The analysis unit 10 includes a test unit 11, a light source 12 (first light source), an observation optical system 13 (first optical system), an XYZ platform 14 (first drive unit), and a two-dimensional camera 15 (first light detection unit).

[0075] Test unit 11 is electrically connected to semiconductor device D via a cable. Test unit 11 is a stimulation signal application unit that applies stimulation signals to semiconductor device D. Test unit 11 is operated by a power supply (not shown). Test unit 11 repeatedly applies stimulation signals such as a defined test pattern to semiconductor device D. The stimulation signal output by test unit 11 can be a modulated current signal or a CW (continuous wave) current signal.

[0076] The test unit 11 is electrically connected to the computer 40 via a cable. The test unit 11 applies a stimulation signal specified by the computer 40 to the semiconductor device D. The test unit 11 is not necessarily electrically connected to the computer 40. When the test unit 11 is not electrically connected to the computer 40, it determines the stimulation signal, such as the test pattern, on its own. Alternatively, a power supply or a pulse generator may be used as the test unit 11.

[0077] Light source 12 outputs light to semiconductor device D. Light source 12 can be, for example, an LED (Light Emitting Diode) or an SLD (Super Luminescent Diode). Alternatively, light source 12 can be an incoherent light source such as a lamp or a coherent light source such as a laser. The light output from light source 12 passes through the substrate of semiconductor device D. For example, when the substrate of semiconductor device D is silicon, the wavelength of the light output from light source 12 is preferably 1064 nm or more. The light output from light source 12 is then provided to observation optical system 13.

[0078] The observation optical system 13 outputs light from the light source 12 to the semiconductor device D. For example, during marking, the light source 12 illuminates the back side D1 of the semiconductor device D. The observation optical system 13 includes an objective lens 13a and a beam splitter 13b. The objective lens 13a focuses the light onto the observation area.

[0079] The observation optical system 13 guides the light reflected from the semiconductor device D to the two-dimensional camera 15. Specifically, the light irradiated by the observation optical system 13 passes through the substrate SiE of the semiconductor device D (see reference). Figure 2 (c)). Next, light passing through the substrate SiE passes through the metal layer ME (refer to...). Figure 2 (c) Reflection. Next, the light reflected from the metal layer ME passes through the substrate SiE again. Then, the light passing through the substrate SiE is input to the two-dimensional camera 15 via the objective lens 13a and beam splitter 13b of the observation optical system 13. Additionally, the observation optical system 13 guides the light emitted by the semiconductor device D due to the application of a stimulus signal to the two-dimensional camera 15. Specifically, there is a case where the metal layer ME of the semiconductor device D emits light, such as emitted light, due to the application of a stimulus signal. The light emitted from the metal layer ME, after passing through the substrate SiE, is input to the two-dimensional camera 15 via the objective lens 13a and beam splitter 13b of the observation optical system 13.

[0080] The observation optical system 13 is mounted on an XYZ platform 14. The Z-axis direction is the optical axis direction of the objective lens 13a. The XYZ platform 14 can move along the Z-axis direction. Furthermore, the XYZ platform 14 can also move along the X-axis and Y-axis directions, which are orthogonal to the Z-axis direction. The XYZ platform 14 is controlled by the control unit 41b of the computer 40, which will be described later. The observation area is determined by the position of the XYZ platform 14. The observation optical system 13 guides the reflected light from the semiconductor device D, corresponding to the irradiated light, as light from the semiconductor device D to the two-dimensional camera 15.

[0081] The two-dimensional camera 15 receives light (first light) from the semiconductor device D. The two-dimensional camera 15 outputs image data based on the received light. The light from the semiconductor device D, as described in this specification, can be reflected light from illumination light reflected within the semiconductor device D. Alternatively, the light from the semiconductor device D, as described in this specification, can be emitted light generated based on a stimulus signal. For example, in the marking process, the two-dimensional camera 15 images the semiconductor device D from the substrate SiE side of the semiconductor device D. In other words, in the marking process, the two-dimensional camera 15 images the semiconductor device D from the back side D1 side of the semiconductor device D.

[0082] A two-dimensional camera 15 receives light reflected from the semiconductor device D. Based on the received light, the two-dimensional camera 15 outputs image data for creating a pattern image to the computer 40. The mark position can be determined based on the pattern image. Additionally, the two-dimensional camera 15 receives emitted light generated according to a stimulus signal. Based on the received light, the two-dimensional camera 15 outputs image data for generating a light-emitting image to the computer 40. Based on the light-emitting image, the light-emitting part of the semiconductor device D can be determined. By determining the light-emitting part, the faulty part of the semiconductor device D can be determined.

[0083] As the two-dimensional camera 15, an imaging device capable of detecting light of wavelengths transmitted through the substrate SiE of the semiconductor device D can be used. The two-dimensional camera 15 can be a camera equipped with a CCD (Charge Coupled Device) image sensor or a CMOS (Complementary Metal Oxide Semiconductor) image sensor. Alternatively, an InGaAs (Indium Gallium Arsenide) camera or an MCT (Mercury Cadmium Telluride) camera can be used. Furthermore, illumination light from the light source 12 is not required during light emission measurement. That is, the light source 12 does not need to be activated during light emission measurement.

[0084] <Marking Section>

[0085] Next, the marking unit 20 will be described. The marking unit 20 includes markings to indicate the location of the fault. The marking unit 20 includes a laser light source 21, a laser marking optical system 22 (second optical system), an XYZ platform 23 (second drive unit), a detection camera 24 (second light detection unit), and an illumination light source 25.

[0086] The marking unit 20 adds markings around the faulty area identified by the analysis unit 10. For example... Figure 2 (a) and Figure 2 As shown in (b), a marker location mp is set around the faulty location fp. Figure 2 (a) and Figure 2(b) The icon shows the four marked areas (mp). In the completed laser marking state, as shown... Figure 2 As shown in (c), a through-hole is formed in the metal layer ME that penetrates the semiconductor device D. Laser marking is performed through the through-hole to the boundary surface ss between the metal layer ME and the substrate SiE, until the surface of the substrate SiE in contact with the metal layer ME is exposed. That is, the term "mark" as used in this specification can mean a through-hole formed in the metal layer ME. Alternatively, the term "mark" as used in this specification can also mean the substrate SiE exposed from the through-hole.

[0087] Marking part 20 Figure 3 As shown, the laser emitted from the laser source 21 is irradiated onto the marking portion mp of the semiconductor device D via the laser marking optical system 22. The marking unit 20 irradiates the marking portion mp with laser light from the metal layer ME side of the semiconductor device D. Details of the marking unit 20 will be described below.

[0088] like Figure 1 As shown, laser source 21 outputs laser light that irradiates semiconductor device D. The laser light forms a through-hole in metal layer ME. If a start output command is input from computer 40, laser source 21 begins outputting laser light. Laser source 21 can be, for example, a solid-state laser source or a semiconductor laser source. The wavelength of the light output from laser source 21 is 250 nm or more and 2000 nm or less.

[0089] The laser marking optical system 22 irradiates the marking area mp of the semiconductor device D with laser light. Specifically, the laser marking optical system 22 irradiates the semiconductor device D from the metal layer ME side. In other words, the laser marking optical system 22 irradiates the semiconductor device D from the surface D2 side of the semiconductor device D. The laser marking optical system 22 has an objective lens 22a and a switching unit 22b. The switching unit 22b switches the optical paths of the laser source 21 and the detection camera 24. The objective lens 22a focuses the laser light onto the marking area mp. The objective lens 22a guides the light from the surface of the semiconductor device D to the detection camera 24.

[0090] The laser marking optical system 22 is mounted on an XYZ platform 23. The Z-axis of the XYZ platform 23 is the optical axis of the objective lens 22a. The XYZ platform 23 receives control commands from the computer 40. According to the control commands, the XYZ platform 23 moves the laser marking optical system 22 along the Z-axis. Additionally, according to the control commands, the XYZ platform 23 moves the laser marking optical system 22 along the X-axis and Y-axis, which are orthogonal to the Z-axis. Alternatively, the laser marking optical system 22 may have a light scanning unit instead of the XYZ platform 23, which focuses the laser light onto the marking area mp on the surface D2 of the semiconductor device D. As the light scanning unit, light scanning elements such as a galvano-mirror or a MEMS (Micro Electro Mechanical System) mirror can be used. Furthermore, the laser marking optical system 22 may also have a shutter. With this configuration, the shutter allows the laser light from the laser source 21 to pass through or be blocked by control from the control unit 41b. As a result, the laser output can be controlled.

[0091] The detection camera 24 captures an image of the metal layer ME of the semiconductor device D from the surface D2 side. The detection camera 24 outputs the captured image to the computer 40. By reviewing the image, the user can understand the condition of the laser markings observed from the surface D2 side of the semiconductor device D. The illumination source 25 illuminates the semiconductor device D with light during the capture by the detection camera 24.

[0092] <Device Configuration Department>

[0093] The device placement unit 30 holds the semiconductor device D. Furthermore, the device placement unit 30 changes the position of the semiconductor device D relative to the observation optical system 13. Similarly, the device placement unit 30 changes the position of the semiconductor device D relative to the laser marking optical system 22. The device placement unit 30 includes a sample platform 31, a wafer chuck 32, and an XY drive unit 33 (third drive unit).

[0094] Therefore, each of the observation optical system 13, the laser marking optical system 22, and the device placement unit 30 in the analysis device 1 has a drive mechanism. That is, the analysis device 1 has three degrees of freedom. With three degrees of freedom, for example, the laser marking optical system 22 and the device placement unit 30 can be moved while the observation optical system 13 is fixed. Furthermore, the device placement unit 30 can also be moved while the observation optical system 13 and the laser marking optical system 22 are fixed. "Fixed" means without changing the position. For example, "the state of fixing the observation optical system 13 and the laser marking optical system 22" means maintaining the relative position of the laser marking optical system 22 with respect to the observation optical system 13.

[0095] A wafer chuck 32 is slidably mounted on the sample platform 31. The wafer chuck 32 has a device holding section 32a for holding a semiconductor device D. The device holding section 32a includes a through hole provided in the wafer chuck 32 and a glass plate that physically blocks the through hole.

[0096] The wafer chuck 32 has an alignment target 50. Alignment target 50 (refer to...) Figure 4 The glass plate is used. A pattern extending radially from a reference point bp is provided on one side of the glass plate. This pattern is, for example, a metal film. As an example, the pattern is made of a thin film of aluminum. Therefore, the pattern constitutes an opaque portion 50b. The glass plate allows light of the wavelength that passes through the substrate SiE of the semiconductor device D to pass through. As a result, the glass plate also allows light output from the illumination source 25 and the light source 12 to pass through. Therefore, the area without the pattern constitutes a light-transmitting portion 50a. The wafer chuck 32 has a target hole 32b for arranging an alignment target 50. The alignment target 50 is arranged such that the target hole 32b is closed. According to this arrangement, the detection camera 24 and the two-dimensional camera 15 can acquire an image of the pattern provided on one side of the glass plate.

[0097] Alignment target 50 is disposed on wafer chuck 32. That is, the position of the device holding part 32a in wafer chuck 32 is different from the position of the alignment target 50. When the position of wafer chuck 32 is changed by XY drive part 33, the position of semiconductor device D and the position of alignment target 50 are changed simultaneously. That is, the position of alignment target 50 relative to semiconductor device D mounted on wafer chuck 32 remains unchanged.

[0098] The XY drive unit 33 moves the wafer chuck 32 along the X-axis or Y-axis direction according to control commands from the computer 40. As a result, the observation area can be changed without moving the observation optical system 13. Similarly, the laser irradiation position can be changed without moving the laser marking optical system 22.

[0099] Furthermore, the specific configuration of the device placement unit 30 is not limited to the configuration described above. The device placement unit 30 may be configured to effectively maintain the semiconductor device D and move the semiconductor device D in at least one of the X-axis and Y-axis directions. For example, it may also have an XY platform that replaces the sample platform 31 and the XY drive unit 33 to move the wafer chuck 32 in at least one of the X-axis and Y-axis directions.

[0100] <Computer>

[0101] Computer 40 is a personal computer or other computer. Physically, computer 40 is configured to include RAM (Random Access Memory) and ROM (Read Only Memory), a processor (processor circuit) such as a CPU (Central Processing Unit), a communication interface, and a storage unit such as a hard disk. Examples of computers 40 include personal computers, cloud servers, and smart devices (smartphones, tablets, etc.). Computer 40 functions by executing programs stored in memory using the computer system's CPU. Computer 40 has a condition setting unit 41a, a control unit 41b, and an image processing unit 41c as functional components.

[0102] <Condition Setting Department>

[0103] The condition setting unit 41a sets a marker position mp based on the information of the fault location fp displayed on the input unit 41e. Several marker positions mp are set around the identified fault location fp. For example, four positions. When, for example, information indicating the fault location fp is displayed is input, the condition setting unit 41a sets the fault location fp as the center and automatically sets the marker positions mp at four locations around the fault location fp. Specifically, the condition setting unit 41a sets the marker positions mp in a cross shape centered on the fault location fp, for example, from a top-down view (see reference). Figure 2 (a) and Figure 2 (b) Alternatively, the marker region mp can also be set by receiving information about the display marker region mp from a user who has viewed the resolved image displayed on the display unit 41d via the input unit 41e. In this case, the condition setting unit 41a does not automatically set the marker region mp. The condition setting unit 41a sets the marker region mp based on the information about the display marker region mp input from the input unit 41e. The condition setting unit 41a generates a reference image. The reference image adds a mark for the display fault region fp and a mark for the display marker region mp to the resolved image. The condition setting unit 41a saves the reference image in the memory of the computer 40.

[0104] <Control Department>

[0105] The control unit 41b controls the XYZ platform 14 of the resolution unit 10 so that the observation area of ​​the fault location falls within the field of view of the 2D camera 15. The control unit 41b controls the XYZ platform 23 of the marking unit 20 so that the optical axis of the laser marking optical system 22 is aligned with the optical axis of the observation optical system 13. The control unit 41b controls the XY drive unit 33 of the device placement unit 30 so that the optical axis of the laser marking optical system 22 overlaps with the marking location mp.

[0106] The control unit 41b also controls the laser source 21. When the image processing unit 41c determines that a mark image is to be displayed, the control unit 41b outputs a stop output signal to the laser source 21. When a stop output signal is input, the laser source 21 stops outputting laser light. Therefore, the laser source 21 continuously outputs laser light from the time the control unit 41b inputs a start output signal until it inputs a stop output signal. In this way, the control unit 41b controls the laser source 21 in a manner that laser marking is performed until the mark image formed by the laser marking is displayed on the pattern image. In addition, since a laser penetration threshold is set, the control unit 41b controls the laser source 21 in a manner that laser marking is performed until the laser penetrates the metal layer ME.

[0107] <Image Processing Department>

[0108] Computer 40 is electrically connected to 2D camera 15 via cable. Computer 40 uses image data input from 2D camera 15 to create a pattern image and a light emission image. Here, it is difficult to determine the light emission position of the pattern on the semiconductor device D using only the aforementioned light emission image. Therefore, computer 40 generates an overlay image as a resolution image, which overlaps the pattern image based on reflected light from semiconductor device D with the light emission image based on light emitted from semiconductor device D.

[0109] The image processing unit 41c creates a marker image. The marker image is overlaid with a pattern image containing the marker image and a luminous image. The created marker image is stored in the memory of the computer 40. Furthermore, the image processing unit 41c displays the marker image on the display unit 41d. Through the marker image, the user can accurately determine the marker position relative to the location of the faulty part in subsequent processes. Additionally, the image processing unit 41c acquires marker information. The marker information is the information needed to determine the marker position relative to the location of the faulty part. The marker information includes, for example, the distance from the marker position to the location of the faulty part, and the orientation of the marker position relative to the location of the faulty part. The acquired marker information can be displayed as a list. Furthermore, the marker information can be appended to the marker image display. Additionally, the marker information can also be output on paper media.

[0110] The computer 40 outputs the analyzed image to the display unit 41d. The display unit 41d is a display device such as a monitor for displaying the analyzed image to the user. The user can confirm the location of the faulty part from the analyzed image displayed on the display unit 41d. In addition, the user inputs information about the faulty part using the input unit 41e. The input unit 41e is an input device such as a keyboard and mouse that accepts input from the user. The input unit 41e outputs information about the faulty part to the computer 40. Alternatively, the computer 40, display unit 41d, and input unit 41e may also be a tablet terminal.

[0111] Additionally, the image processing unit 41c can also output a control command to stop laser irradiation to the control unit 41b. The control command to stop laser irradiation is generated using a mark image displayed on the pattern image. Specifically, the image processing unit 41c generates a pattern image in parallel with the laser mark output by the laser source 21. A hole is formed in the metal layer ME at the marked location mp by the laser mark. When the hole in the metal layer ME is shallow, the intensity change of the reflected light at the marked location is small, and the change of the optical reflection image is also small. In other words, when the hole formed by the laser mark is only formed in the metal layer ME and does not reach the substrate SiE, the intensity change of the reflected light at the marked location is small. Therefore, the change of the optical reflection image is also small. As a result, the effect of the laser mark is not displayed in the pattern image. On the other hand, if the hole in the metal layer ME becomes deeper, the change of at least one of the refractive index, transmittance, and reflectance of light on the back side D1 becomes larger. Specifically, if the aperture becomes deeper to the boundary surface ss between the metal layer ME and the substrate SiE, at least one of the changes in the refractive index, transmittance, and reflectivity of light on the back side D1 increases. Due to these changes, the intensity of reflected light at the marked location changes significantly. As a result, the marked image is displayed in the pattern image.

[0112] The image processing unit 41c compares, for example, the aforementioned reference image and the pattern image. Based on the comparison result, if the difference between the images is greater than a predetermined value, the image processing unit 41c determines that it is a display mark image. By presetting the predetermined value, the timing of determining that it is a display mark image can be determined.

[0113] Furthermore, the image processing unit 41c can also determine whether to display a mark image based on input from the user. Additionally, when the image processing unit 41c determines that a mark image should be displayed, it compares the reference image and the pattern image. Moreover, if the mark formation area in the pattern image is offset from the mark area mp in the reference image, the image processing unit 41c can determine that the mark formation position is offset. In this case, laser marking can be performed again by forming the mark at the correct mark area mp.

[0114] Next, use Figures 5-8 The marking process of the parsing device 1 will be explained. Figure 5 This is a flowchart showing the main steps of the marking process of the analysis device 1.

[0115] <Analysis Process S10>

[0116] First, the fault location of semiconductor device D is determined (S10). Control unit 41b outputs a parsing command for process S10 to parsing unit 10. Specifically, as follows... Figure 6As shown in (a), the XYZ platform 14 controls the X-axis and Y-axis directions to move the observation optical system 13 in a manner that captures the area to be observed within the field of view of the observation optical system 13. Next, the Z-axis direction of the XYZ platform 14 is controlled to move the observation optical system 13 so that the focal position of the objective lens 13a is aligned with the area to be observed. Next, the light source 12 illuminates the semiconductor device D. Then, the two-dimensional camera 15 receives the reflected light from the semiconductor device D. The two-dimensional camera 15 generates an optical reflection image based on the reflected light. Then, the two-dimensional camera 15 outputs the optical reflection image to the computer 40. After outputting the optical reflection image, the light source 12 stops illuminating the semiconductor device D. Next, the test unit 11 applies a stimulus signal to the semiconductor device D. Then, the two-dimensional camera 15 receives the light caused by the stimulus signal. The two-dimensional camera 15 generates a emission image based on the light caused by the stimulus signal. Then, the two-dimensional camera 15 outputs the emission image to the computer 40. The image processing unit 41c generates a resolved image that superimposes the optical reflection image and the emission image. Next, the faulty part fp is determined using the analyzed image.

[0117] As described above, during the analysis process, the positional relationship of the observation optical system 13 relative to the semiconductor device D is such that the field of view of the observation optical system 13 includes the observation area. Furthermore, the positional relationship of the observation optical system 13 relative to the semiconductor device D is maintained during the analysis process. On the other hand, the position of the laser marking optical system 22 relative to the semiconductor device D is not particularly limited during the analysis process. For example, the optical axis of the laser marking optical system 22 may or may not be aligned with the optical axis of the observation optical system 13. Generally, unless optical axis alignment is performed, the optical axis of the laser marking optical system 22 will not be aligned with the optical axis of the observation optical system 13. In the analysis method of this embodiment, although optical axis alignment may be performed before the analysis process, it is not mandatory. In the analysis method of this embodiment, optical axis alignment is performed after the analysis process is completed.

[0118] <Alignment process S20>

[0119] Next, the observation optical system 13 and the laser marking optical system 22 are aligned (S20). The control unit 41b outputs the alignment command for process S20 to the marking unit 20 and the device placement unit 30. In the following description, the state in which the optical axis of the observation optical system 13 intersects with the fault location of the semiconductor device D is illustrated before the alignment process is performed. First, as Figure 6As shown in (b), the XY drive unit 33 controls the movement of the wafer chuck 32 in the X-axis and Y-axis directions to capture the target 50 in the field of view of the observation optical system 13 (S21). This movement is also referred to as "retreat of the semiconductor device D". At this time, the control unit 41b stores the amount of movement of the semiconductor device D (wafer chuck 32).

[0120] Next, as Figure 7 As shown in (a), the XYZ platform 23 controls the X-axis and Y-axis directions to move the laser marking optical system 22 in order to capture the alignment target 50 within the field of view of the laser marking optical system 22 (S22). Next, the illumination source 25 outputs illumination light to the alignment target 50. The illumination light passes through the light-transmitting portion 50a of the alignment target 50 and is incident on the observation optical system 13. The incident illumination light is captured by the two-dimensional camera 15. The two-dimensional camera 15 outputs the transmitted image to the computer 40. Additionally, the illumination light is reflected by the opaque portion 50b of the alignment target 50. The reflected light is again incident on the laser marking optical system 22. Then, the incident reflected light is captured by the detection camera 24. The detection camera 24 outputs the reflected image to the computer 40. The image processing unit 41c uses the transmitted and reflected images to calculate the offset of the optical axis of the laser marking optical system 22 relative to the optical axis of the observation optical system 13. The movement of the laser marking optical system 22 and the confirmation of the offset are repeated until the offset falls within an acceptable range. When the offset is determined to be within the allowable range, the optical axis alignment is completed.

[0121] After the optical axis is aligned, as follows Figure 7As shown in (b), the XY drive unit 33 controls the movement of the wafer chuck 32 in the X-axis and Y-axis directions to capture the faulty part of the semiconductor device D in the field of view of the observation optical system 13 (S23). At this time, the control unit 41b can control the XY drive unit 33 based on the amount of movement stored when the semiconductor device D retracts. Alternatively, the relative position of the laser marking optical system 22 and the semiconductor device D can be controlled using image data output from the two-dimensional camera 15 and the detection camera 24. In this case, the object of movement is only the semiconductor device D. The movement of the semiconductor device D in this process is also referred to as "resetting of the semiconductor device D". That is, since the semiconductor device D retracts immediately after the optical axis alignment is completed, the semiconductor device D is not present in the field of view of the observation optical system 13 and the laser marking optical system 22. Therefore, after the optical axis alignment is completed, the semiconductor device D is placed in the field of view of the observation optical system 13 and the laser marking optical system 22. More specifically, the faulty part of the semiconductor device D is aligned with the optical axis of the observation optical system 13 and the optical axis of the laser marking optical system 22. That is, after the alignment is completed, it is the semiconductor device D that moves. In other words, after the alignment is completed, the observation optical system 13 and the laser marking optical system 22 are not moved. As a result, the relative positional relationship between the observation optical system 13 and the laser marking optical system 22 maintains the alignment result.

[0122] <Marking process S30>

[0123] like Figure 8 As shown, laser marking (S30) is performed on the marked areas mp. The control unit 41b outputs the marking command for process S30 to the marking unit 20 and the device placement unit 30. Specifically, the laser source 21 outputs laser light. Laser marking is performed on all the set marked areas mp. In addition, during the laser output operation on each marked area mp, the image processing unit 41c can also determine whether a mark image is displayed on the pattern image. If it is determined that no mark image is displayed on the pattern image, laser irradiation is performed again. In parallel with the laser irradiation operation, the image processing unit 41c generates a pattern image.

[0124] The effects of the analysis device 1 in this embodiment will be explained below.

[0125] In the analysis apparatus 1 and the semiconductor fault analysis method, firstly, based on the alignment target 50 provided on the wafer chuck 32, the optical axis of the laser marking optical system 22 of the marking unit 20 is aligned with the optical axis of the observation optical system 13 of the analysis unit 10. Then, while maintaining the positional relationship between the optical axis of the observation optical system 13 and the optical axis of the laser marking optical system 22, a laser is irradiated onto the marking position set on the semiconductor device D. That is, after aligning the optical axis of the observation optical system 13 with the optical axis of the laser marking optical system 22, neither the observation optical system 13 nor the laser marking optical system 22 moves relative to the other. Therefore, no offset occurs between the position displayed by the movement command value that could be caused by movement and the actual position. As a result, the offset of the position displayed by the mark attached to the marking unit 20 relative to the position of the fault location displayed by the analysis unit 10 can be reduced.

[0126] Before outputting the alignment command, the control unit 41b outputs a resolution command to the resolution unit 10, which resolves the faulty parts of the semiconductor device D. With this configuration, a mark that displays the location of the faulty part with better accuracy can be added.

[0127] The marking command can also be used to irradiate the semiconductor device D with laser after the wafer chuck 32 is moved to the marking position via the XY drive unit 33. According to this configuration, after aligning the optical axis of the laser marking optical system 22 with the optical axis of the observation optical system 13, the absolute position is maintained, except for the relative position of the observation optical system 13 and the laser marking optical system 22, while irradiating the desired position of the semiconductor device D with laser. As a result, the offset of the position displayed by the additional marking unit 20 can be further reduced.

[0128] The alignment command causes the 2D camera 15 to acquire a first image of the aligned target 50 from one side, and the detection camera 24 to acquire a second image of the aligned target 50 from the other side. The second drive unit is then moved in a manner that aligns the optical axis of the laser marking optical system 22 with the optical axis of the observation optical system 13 based on the first and second images. With this configuration, the operation of aligning the optical axis of the laser marking optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0129] The target 50 is positioned in a location within the wafer chuck 32 that is different from the device holding section 32a that holds the semiconductor device D. With this configuration, regardless of the type of semiconductor device D, the optical axis of the laser marking optical system 22 can be aligned with the optical axis of the observation optical system 13.

[0130] The two-dimensional camera 15 acquires a first image of the target 50 observed from one side. The detection camera 24 acquires a second image of the target observed from the other side. Even with this configuration, the operation of aligning the optical axis of the laser marking optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0131] The target alignment 50 includes a light-transmitting section 50a that transmits light that can be detected by the two-dimensional camera 15 and the detection camera 24. Even with this configuration, the operation of aligning the optical axis of the laser marking optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0132] In summary, the first semiconductor fault analysis apparatus includes: an analysis unit that receives first light from a semiconductor device via a first optical system from a first photodetector unit, the first optical system being movable relative to the semiconductor device via a first driving unit; a marking unit that receives second light from the semiconductor device via a second optical system from a second photodetector unit, and irradiates the semiconductor device with laser light via the second optical system, the second optical system being movable relative to the semiconductor device via a second driving unit; and a device placement unit disposed between the analysis unit and the marking unit, having a chuck that holds the semiconductor device and is provided with a target for aligning the optical axes of the first and second optical systems, the chuck being movable relative to the analysis unit and the marking unit via a third driving unit. The system includes a recording unit that moves relative to the marking unit, a control unit that outputs commands to the analysis unit, the marking unit, and the device placement unit; the target can be detected from one side by the first optical detection unit and from the other side by the second optical detection unit; the control unit outputs an alignment command to the marking unit and the device placement unit, which, after moving the chuck to a position where the first optical detection unit can detect the target, aligns the optical axis of the second optical system with the optical axis of the first optical system based on the target, and outputs a marking command to the marking unit and the device placement unit, which, while maintaining the positional relationship between the optical axis of the first optical system and the optical axis of the second optical system, irradiates the marking position set on the semiconductor device with laser light.

[0133] The second semiconductor fault analysis device is that, before the control unit of the first semiconductor fault analysis device outputs the analysis command, which analyzes the fault location of the semiconductor device through the analysis unit, to the analysis unit before outputting the alignment command.

[0134] The third semiconductor fault analysis device is one in which the marking command of the first or second semiconductor fault analysis device, after moving the chuck to the marking position via the third drive unit, irradiates the semiconductor device with the laser.

[0135] The alignment command of the semiconductor fault analysis device of any one of the first to third devices causes the first optical detection unit to acquire a first image of the target from one side, causes the second optical detection unit to acquire a second image of the target from the other side, and moves the second optical system in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first image and the second image.

[0136] The fourth semiconductor fault analysis device is one in which the target of any of the first to third semiconductor fault analysis devices is located in a location different from the device holding part that holds the semiconductor device in the chuck.

[0137] The fifth semiconductor fault analysis device is one in which the first photodetector of any one of the first to fourth semiconductor fault analysis devices acquires a first image of the target observed from one side, and the second photodetector acquires a second image of the target observed from the other side.

[0138] The sixth semiconductor fault analysis device is a semiconductor fault analysis device of any one of the first to fifth types, the target of which includes a light-transmitting part that can transmit light that can be detected by the first light detection unit and the second light detection unit.

[0139] A first semiconductor fault analysis method uses a semiconductor fault analysis apparatus to analyze a semiconductor device, the semiconductor fault analysis apparatus comprising: an analysis unit that receives first light from the semiconductor device via a first optical system from a first photodetector unit, the first optical system being movable relative to the semiconductor device via a first driving unit; a marking unit that receives second light from the semiconductor device via a second optical system from a second photodetector unit, and irradiates the semiconductor device with laser light via the second optical system, the second optical system being movable relative to the semiconductor device via a second driving unit; and a device placement unit disposed between the analysis unit and the marking unit, having a chuck that holds the semiconductor device and is provided with optical axes for the first optical system and the second optical system. The method comprises the following steps: an alignment step in which, after moving the chuck to a position where the first optical detection unit can detect the target, the chuck moves relative to the resolution unit and the marking unit via the third driving unit; a control unit outputs commands to the resolution unit, the marking unit, and the device placement unit; the target can be detected from one side of the target by the first optical detection unit and from the other side of the target by the second optical detection unit; and an alignment step in which, while maintaining the positional relationship between the optical axes of the first and second optical systems, the laser is irradiated at the marking position set on the semiconductor device.

[0140] The second semiconductor fault analysis method is an example of the first semiconductor fault analysis method that, prior to the alignment process, further includes an analysis process in which the analysis unit analyzes the fault location of the semiconductor device.

[0141] In the semiconductor fault analysis method of technical solution 8 or 9, the third semiconductor fault analysis method is that after the marking process of the first or second semiconductor fault analysis method moves the chuck to the marking position by the third driving unit, the semiconductor device is irradiated with the laser.

[0142] The fourth semiconductor fault analysis method involves the alignment process of the first to third semiconductor fault analysis methods, which causes the first photodetector to acquire a first image of the target from one side, causes the second photodetector to acquire a second image of the target from the other side, and moves the second drive unit in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first image and the second image.

[0143] While the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments.

[0144] For example, it has been explained that laser marking is performed until the laser penetrates the metal layer ME, exposing the surface of the substrate SiE that is in contact with the metal layer ME. However, this is not a limitation. The depth of the hole formed by the laser marking is only required to make the mark image visible in the pattern image. Specifically, for example, laser marking can be further performed after the metal layer ME has been penetrated and the surface of the substrate SiE that is in contact with the metal layer ME has been exposed. For example, when the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm, the hole can be formed by laser marking by deepening the laser mark by about 1 μm further from the surface of the substrate SiE that is in contact with the metal layer ME. In addition, laser marking does not necessarily have to penetrate the metal layer ME. For example, when the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm, the thickness of the metal layer ME at the location where the hole is formed by laser marking can be about 50 nm. That is, the hole may not reach the surface of the substrate SiE that is in contact with the metal layer ME.

[0145] It has been explained that a pattern image is generated during laser marking. However, this is not the only method. For example, a pattern image can also be generated when the laser output is stopped. In this case, the laser output and the stopping of the laser can be alternated at predetermined intervals to generate the pattern image.

[0146] When the wavelength of the laser emitted from the laser source 21 is 1000 nm or longer, the observation optical system 13 can also have an optical filter that only blocks lasers with wavelengths of 1000 nm or longer. Therefore, even when the laser emitted from the laser source 21 passes through the substrate SiE of the semiconductor device D, the laser is blocked in the observation optical system 13. As a result, damage to the photodetector by the laser can be suppressed.

[0147] The wavelength of the laser emitted from the laser source 21 can also be less than 1000 nanometers. In this case, for example, when the semiconductor device D is constructed from a substrate such as a silicon substrate, the laser is absorbed by the substrate. As a result, optical filters or the like are not required to prevent the photodetector of the two-dimensional camera 15 from being damaged by the laser.

[0148] The components for applying a stimulation signal to the semiconductor device D are not limited to the test unit 11. As a component for applying a stimulation signal to the semiconductor device D, namely the stimulation signal application unit, a device that applies voltage or current to the semiconductor device D can be used. Furthermore, these devices can also be used to apply a stimulation signal to the semiconductor device D.

[0149] <Semiconductor Fault Analysis Apparatus of the Second Embodiment>

[0150] like Figure 9As shown, the semiconductor fault analysis apparatus of the second embodiment (hereinafter referred to as "analysis apparatus 1A") includes a first analysis unit 10A, a second analysis unit 20A, a device placement unit 30, a computer 40, and a stimulation signal application unit 60.

[0151] The first analysis unit 10A includes a first light source 12A, a first observation optical system 13A (first optical system), an XYZ platform 14 (first drive unit), and a first camera 15A (first light detection unit). The first light source 12A has the same configuration as the light source 12 in the first embodiment. The first observation optical system 13A has the same configuration as the observation optical system 13 in the first embodiment. The first camera 15A has the same configuration as the two-dimensional camera 15 in the first embodiment.

[0152] The second analysis unit 20A includes a laser light source 21, a second observation optical system 22A (second optical system), an XYZ platform 23 (second drive unit), a second camera 24A (second light detection unit), and a second light source 25A. The second observation optical system 22A has the same configuration as the laser marking optical system 22 of the first embodiment. The second camera 24A has the same configuration as the detection camera 24 of the first embodiment. The second light source 25A has the same configuration as the illumination light source 25 of the first embodiment.

[0153] Alternatively, either the first analysis unit 10A or the second analysis unit 20A may also have the function of additionally displaying a mark indicating a fault location. That is, either the first analysis unit 10A or the second analysis unit 20A may also have a laser light source for marking, as provided with the marking unit 20 in the first embodiment. The laser light source 21 of the second analysis unit 20A may also be used as the laser light source for marking.

[0154] <Semiconductor Fault Analysis Method of Embodiment 2>

[0155] Next, the parsing process of the parsing device 1A will be explained. Figure 10 This is a flowchart showing the main steps of the parsing process using parsing device 1A.

[0156] <Alignment Process S100A>

[0157] First, the positions of the first observation optical system 13A and the second observation optical system 22A are aligned (S100A). The control unit 41b outputs the alignment command for process S100A to the second resolution unit 20A and the device placement unit 30. The XY drive unit 33 moves the wafer chuck 32 in such a way that the alignment target 50 is captured in the field of view of the first observation optical system 13A (S101). The control unit 41b stores the amount of movement of the semiconductor device D (wafer chuck 32).

[0158] Next, the optical axis of the first observation optical system 13A is aligned with the optical axis of the second observation optical system 22A (S102). First, the XYZ platform 23 moves the second observation optical system 22A so that the target 50 is captured in the field of view of the second observation optical system 22A. Next, the second light source 25A outputs illumination light to the target 50. The illumination light passes through the light-transmitting portion 50a of the target 50. The first camera 15A of the first observation optical system 13A obtains a transmitted image formed by the light passing through the light-transmitting portion 50a of the target 50. The first camera 15A outputs the transmitted image to the computer 40. The second camera 24A obtains a reflected image formed by the reflected light reflected from the opaque portion 50b of the target 50. The second camera 24A outputs the reflected image to the computer 40. The image processing unit 41c uses the transmitted image and the reflected image to calculate the offset of the optical axis of the second observation optical system 22A relative to the optical axis of the first observation optical system 13A. The movement and offset confirmation of the second observation optical system 22A are repeated until the offset falls within the allowable range. When it is determined that the offset falls within the allowable range, the optical axis alignment is completed. Furthermore, as an operation to ensure the offset falls within the allowable range, the second observation optical system 22A can be moved while the position of the first observation optical system 13A is fixed. Alternatively, the first observation optical system 13A can be moved while the position of the second observation optical system 22A is fixed. Furthermore, both the first observation optical system 13A and the second observation optical system 22A can be moved.

[0159] After the optical axis alignment is completed, the XY drive unit 33 moves the wafer chuck 32 to capture the semiconductor device D within the fields of view of the first observation optical system 13A and the second observation optical system 22A (S103). At this time, the control unit 41b can control the XY drive unit 33 based on the amount of movement stored when the semiconductor device D retracts. Alternatively, image data output from the first camera 15A and the second camera 24A can be used to control the relative position of the first observation optical system 13A and the second observation optical system 22A with respect to the semiconductor device D. In this case, only the semiconductor device D is moved. Since the semiconductor device D retracts immediately after the optical axis alignment is completed, it is not within the fields of view of the first observation optical system 13A and the second observation optical system 22A. Therefore, after the optical axis alignment is completed, the semiconductor device D is placed within the fields of view of the first observation optical system 13A and the second observation optical system 22A. More specifically, semiconductor devices D are positioned along the optical axes of the first observation optical system 13A and the second observation optical system 22A. That is, semiconductor device D moves after alignment is completed. In other words, the first observation optical system 13A and the second observation optical system 22A are not moved after alignment is completed. As a result, the relative positional relationship between the first observation optical system 13A and the second observation optical system 22A maintains the alignment result.

[0160] <Analysis Process S110A>

[0161] Next, the fault location of semiconductor device D is determined (S110A). In the analysis process S110A, so-called light emission analysis is performed. During light emission analysis, the first camera 15A and the second camera 24A are imaging devices capable of detecting light of the wavelength transmitted through the substrate SiE of semiconductor device D. For example, cameras equipped with a CCD (Charge Coupled Device) image sensor or a CMOS (Complementary Metal Oxide Semiconductor) image sensor can be used. Alternatively, InGaAs cameras or MCT cameras can also be used.

[0162] First, the computer 40 stops the illumination from the first light source 12A and the second light source 25A. Next, the computer 40 outputs a stimulation signal from the stimulation signal application unit 60 to the semiconductor device D. When the metal layer ME of the semiconductor device D contains a faulty area, emitted light is emitted from that faulty area. The light emitted from the metal layer ME is incident on one side of the substrate SiE to the first observation optical system 13A. As a result, the first camera 15A outputs an image corresponding to the incident light to the computer 40. Similarly, the light emitted from the metal layer ME is incident on the other side of the substrate SiE to the second observation optical system 22A. As a result, the second camera 24A outputs an image corresponding to the incident light to the computer 40. The computer 40 determines the faulty area by determining the emission position from these image data.

[0163] The imaging actions of the first camera 15A and the second camera 24A can achieve the first mode and the second mode. The imaging action refers to the action of outputting image data when light input is received. Therefore, "performing an imaging action" means setting the state where light can reach the camera and setting the state where the camera that receives light can output image data.

[0164] In the first configuration, the imaging actions of the first camera 15A and the second camera 24A can be performed in parallel over time. That is, the imaging action of the second camera 24A can be performed while the imaging action of the first camera 15A is being performed. More specifically, the computer 40 is configured such that light can reach the first camera 15A in the first observation optical system 13A and the first camera 15A, having received the light, can output image data. Furthermore, the computer 40 is configured such that light can reach the second camera 24A in the second observation optical system 22A and the second camera 24A, having received the light, can output image data.

[0165] In the first embodiment, when light is output from both one side and the other side of the semiconductor device D, image data is output from both the first camera 15A and the second camera 24A. However, when emitted light is generated, the emitted light may not be output from both one side and the other side of the semiconductor device D. For example, there may be a situation where the emitted light of one side is blocked in the wiring layer. That is, sometimes light is output from one side of the semiconductor device D, and no light is output from the other side. The first embodiment is a state in which both the first camera 15A and the second camera 24A can output image data. However, since only the first camera 15A receives incident light, only the first camera 15A outputs image data. Conversely, sometimes light is output from the other side of the semiconductor device D, and no light is output from one side. In this case, only the second camera 24A outputs image data.

[0166] Alternatively, as a second configuration, the recording actions of the first camera 15A and the second camera 24A can be performed alternately. That is, the recording action of the first camera 15A is performed during the first period, and the recording action of the second camera 24A is performed during the second period, which does not overlap with the first period.

[0167] More specifically, during the first period, the computer 40 is configured such that light can reach the first camera 15A in the first observation optical system 13A and the first camera 15A, having received the light, can output image data. Furthermore, the computer 40 is configured such that light does not reach the second camera 24A in the second observation optical system 22A, and / or, the second camera 24A, having received the light, does not output image data. During the second period, the computer 40 is configured such that light does not reach the first camera 15A in the first observation optical system 13A, and / or, the first camera 15A, having received the light, does not output image data. Furthermore, the computer 40 is configured such that light can reach the second camera 24A in the second observation optical system 22A and the second camera 24A, having received the light, can output image data.

[0168] <Marking process S120A>

[0169] Laser marking (S120A) is performed on the marked areas mp. The control unit 41b outputs the marking command for process S120A to the second analysis unit 20A and the device placement unit 30. Specifically, the laser source 21 outputs laser light. Laser marking is performed on all the set marked areas mp. In addition, during the laser output operation on each marked area mp, the image processing unit 41c can also determine whether a mark image appears on the pattern image. If it is determined that no mark image appears on the pattern image, laser irradiation is performed again. In parallel with the laser irradiation operation, the image processing unit 41c generates an image.

[0170] The analysis apparatus 1A includes: a first analysis unit 10A, which receives light emitted from a semiconductor device D via a first camera 15A and a first observation optical system 13A, wherein the first observation optical system 13A is movable relative to the semiconductor device D via a first driving unit; a second analysis unit 20A, which receives light emitted from the semiconductor device D via a second camera 24A and a second observation optical system 22A, wherein the second observation optical system 22A is movable relative to the semiconductor device D via a second driving unit; and a device placement unit 30, which is disposed between the first analysis unit 10A and the first analysis unit 10A. Between the two resolution units 20A, there is a wafer chuck 32 that holds a semiconductor device D and is equipped with an alignment target 50 for aligning the optical axes of the first observation optical system 13A and the second observation optical system 22A. The wafer chuck 32 moves relative to the first resolution unit 10A and the second resolution unit 20A. A stimulation signal application unit 60 applies a stimulation signal to the semiconductor device D. A control unit 41b outputs commands to the first resolution unit 10A, the second resolution unit 20A, the device placement unit 30, and the stimulation signal application unit 60. The alignment target 50 can be detected from one side of the alignment target 50 by the first resolution unit 10A and from the other side of the alignment target 50 by the second resolution unit 20A. The control unit 41b outputs an alignment command to the second resolution unit 20A and the device placement unit 30. This alignment command moves the wafer chuck 32 to a position where the first camera 15A can detect the alignment target 50, and aligns the optical axis of the second observation optical system 22A with the optical axis of the first observation optical system 13A, using the alignment target 50 as a reference. Furthermore, the control unit 41b outputs a resolution command to the first resolution unit 10A, the second resolution unit 20A, the stimulation signal application unit 60, and the device placement unit 30. This resolution command, while maintaining the positional relationship between the optical axes of the first observation optical system 13A and the second observation optical system 22A, applies a stimulation signal to the semiconductor device D, and at least one of the first camera 15A or the second camera 24A receives the light emitted from the semiconductor device D according to the stimulation signal.

[0171] The semiconductor fault analysis method using analysis apparatus 1A to analyze semiconductor device D includes: an alignment step (S100A), in which, after moving wafer chuck 32 to a position where the first camera 15A can detect alignment target 50, the optical axis of the second observation optical system 22A is aligned with the optical axis of the first observation optical system 13A with the alignment target 50 as a reference; and an analysis step (S110A), in which, while maintaining the positional relationship between the optical axis of the first observation optical system 13A and the optical axis of the second observation optical system 22A, a stimulation signal is applied to semiconductor device D, and light emitted from semiconductor device D according to the stimulation signal is received by at least one of the first camera 15A or the second camera 24A.

[0172] The analysis apparatus 1A and the semiconductor fault analysis method apply a stimulation signal to the semiconductor device D while maintaining the positional relationship between the optical axes of the first observation optical system 13A and the second observation optical system 22A. At least one of the first camera 15A or the second camera 24A receives the light emitted from the semiconductor device D according to the stimulation signal. Therefore, since the optical axes of the first observation optical system 13A and the second observation optical system 22A, which receive the light from the semiconductor device D, are aligned, the fault location of the semiconductor device D can be detected effectively.

[0173] <Example of Variation>

[0174] Alternatively, a different analysis process than the light-emitting analysis described above can be performed in the analysis process. For example, a heat-generating analysis can also be performed in the analysis process. In this case, the stimulation signal application unit 60 applies a relatively low-frequency modulation current as a stimulation signal. For example, when a short-circuit portion is contained inside the semiconductor device D, the short-circuit portion heats up due to the modulation current. As a result, a heat source is generated in the semiconductor device D. The temperature of the heat source, which is heated by the modulation current, changes periodically according to the frequency of the modulation current. The temperature change causes a change in the refractive index of the components around the heat source, i.e., the components through which the irradiated light and reflected light pass. Since this change in refractive index causes a change in the intensity of the reflected light, the intensity of the reflected light relative to the intensity of the irradiated light, i.e., the reflectivity, changes. The change in reflectivity caused by the temperature change of the heat source is used as a response to the stimulation signal. As a result, an example of a faulty portion, i.e., a short-circuit portion, contained in the semiconductor device D can be identified.

[0175] <A Semiconductor Fault Analysis Device (Variation Example)>

[0176] like Figure 11 As shown, the modified semiconductor fault analysis apparatus (hereinafter referred to as "analysis apparatus 1S") includes a first analysis unit 10S, a second analysis unit 20S, a device placement unit 30, a computer 40, and a stimulus signal application unit 60. The first analysis unit 10S has a first infrared camera 15S instead of a first camera 15A. In addition, the second analysis unit 20S has a second infrared camera 24S instead of a second camera 24A.

[0177] The first infrared camera 15S is a light detection unit that uses wavelengths different from visible light as the detection target. The first infrared camera 15S uses, for example, infrared light with wavelengths of 2 μm to 10 μm as the detection target. An InSb (indium antimonide) camera or the like can be used as the first infrared camera 15S. Based on the first infrared camera 15S, an image showing the emissivity distribution of the semiconductor device D can be obtained. The first infrared camera 15S outputs image data by capturing infrared light from the semiconductor device D. Using the infrared information corresponding to the image data, the heat-generating parts of the semiconductor device D can be determined. By determining the heat-generating parts, the faulty parts of the semiconductor device D can be determined. Furthermore, the second infrared camera 24S has the same configuration as the first infrared camera 15S.

[0178] The image processing unit 41c of the computer 40 generates an infrared image based on the aforementioned image data. Furthermore, the image processing unit 41c generates a pattern image based on a detection signal. Additionally, the image processing unit 41c generates an overlay image, which superimposes the infrared image onto the pattern image, as a parsed image.

[0179] Furthermore, when infrared light is used as the detection target, unlike when obtaining visible light images, illumination light is not required. Therefore, the first light source 12A and the second light source 25A can be omitted from the analysis device 1S. When the first light source 12A is omitted, the beam splitter 13b of the first observation optical system 13A can be omitted. Similarly, when the second light source 25A is omitted, the beam splitter, i.e., the switching unit 22b, of the second observation optical system 22A can be omitted.

[0180] <Semiconductor Fault Analysis Method in Variation Examples>

[0181] Next, the parsing process of the parsing device 1S will be explained. Figure 12 This is a flowchart showing the main steps of the parsing process using the parsing device 1S.

[0182] <Alignment Process S100S>

[0183] The alignment process S100S in the variation example is the same as the alignment process S100A in the second embodiment.

[0184] <Analysis Process S110S>

[0185] Next, the fault location of semiconductor device D is determined (S110S). First, infrared radiation from semiconductor device D is measured by the first infrared camera 15S, and an infrared image is generated in the image processing unit 41c. It is assumed that a stimulus signal, such as a test pattern, is applied by the stimulus signal application unit 60. The first infrared camera 15S acquires first image data containing the heat generated by semiconductor device D. The first infrared camera 15S sends multiple image data captured continuously at a determined exposure time to the computer 40 as the first image data. The image processing unit 41c adds these multiple image data. The first image data is generated through this addition process. The first image data contains information about the heat generated by semiconductor device D and the shape of the elements forming semiconductor device D. Next, the application of the stimulus signal by the stimulus signal application unit 60 is stopped. The first infrared camera 15S acquires image data containing only information about the shape of the elements forming semiconductor device D.

[0186] The first infrared camera 15S continuously captures multiple image data over a predetermined exposure time and outputs them to the computer 40. The image processing unit 41c adds these multiple image data together. Through addition processing, a second image data is generated. The second image data contains only information about the shape of the elements forming the semiconductor device D. Furthermore, the image processing unit 41c obtains the difference between the first image data and the second image data. As a result, an infrared image containing only the heat generated by the semiconductor device D is generated. The image processing unit 41c outputs an overlay image that superimposes the infrared image onto the second image data, or the first image data as a resolved image. In addition, the image processing unit 41c outputs the second image data as a pattern image.

[0187] Furthermore, in the second analysis section 20S, the same heat analysis operation as in the first analysis section 10S is performed. The heat analysis operations of the first analysis section 10S and the second analysis section 20S can also be performed in parallel. Alternatively, these operations can be performed alternately.

[0188] <Marking process S120S>

[0189] The marking process 120S in the variation example is the same as the marking process S120A in the second embodiment.

[0190] In the modified example, the analysis apparatus 1S and semiconductor fault analysis method are also performed with the optical axis of the first observation optical system 13S aligned with the optical axis of the second observation optical system 22S to detect the fault location. This allows for accurate detection of fault locations in the semiconductor device D.

[0191] <Semiconductor Fault Analysis Apparatus of the Third Embodiment>

[0192] like Figure 13As shown, the semiconductor fault analysis apparatus (hereinafter referred to as "analysis apparatus 1B") of the third embodiment includes a first analysis unit 10B, a second analysis unit 20B, a device placement unit 30, a computer 40, a stimulus signal application unit 60, and an electrical signal acquisition unit 61. The analysis apparatus 1B outputs light from the first analysis unit 10B and the second analysis unit 20B. The light output from the first analysis unit 10B irradiates one side of the substrate SiE of the semiconductor device D. The light output from the second analysis unit 20B irradiates the other side of the substrate SiE of the semiconductor device D. The analysis apparatus 1B analyzes the faulty parts of the semiconductor device D using the electrical signals generated by the irradiation of light. The semiconductor device D that is irradiated may receive the stimulus signal or may not receive the stimulus signal.

[0193] The first resolution unit 10B includes a first light source 12B, a first observation optical system 13B (first optical system), an XYZ platform 14 (first drive unit), and a first camera 15B (first light detection unit). The first light source 12B generates light that illuminates the semiconductor device D. The details of the first light source 12B are determined according to the resolution method.

[0194] For example, in the analysis of coherent light, such as laser light, irradiating a semiconductor device D, the first light source 12B can be a solid-state laser source or a semiconductor laser source. In the analysis of obtaining OBIRCH (Optical Beam Induced Resistance Change) images or SDL (Soft Defect Localization) images, the first light source 12B outputs laser light in a wavelength band where the semiconductor device D does not generate charge (charge carriers). For example, in the analysis of a silicon-based semiconductor device D, the first light source 12B outputs laser light in a wavelength band greater than 1200 nm. Preferably, the first light source 12B outputs laser light in a wavelength band of approximately 1300 nm. Furthermore, in the analysis of obtaining OBIC (Optical Beam Induced Current) images or LADA (Laser Assisted Device Alteration) images, the first light source 12B outputs light in a wavelength band where the semiconductor device D generates charge (charge carriers). In the analysis of OBIC or LADA images, the first light source 12B outputs light in the wavelength band below 1200 nm. For example, the first light source 12B outputs laser light in the wavelength band of approximately 1064 nm.

[0195] In addition, in the analysis of incoherent light irradiating semiconductor device D, SLD (Super Luminescent Diode), ASE (Amplified Spontaneous Emission), and LED (Light Emitting Diode) can be used as the first light source 12B.

[0196] Light emitted from the first light source 12B is guided to the first observation optical system 13B via a polarization-preserving single-mode optical coupler (not shown) and a polarization-preserving single-mode optical fiber for probe light. The first observation optical system 13B includes an object lens 13a, a beam splitter 13b, and a first optical scanning unit 13s. The first optical scanning unit 13s scans the illumination point on the back surface of the semiconductor device D. The first optical scanning unit 13s is constructed using optical scanning elements such as a galvanometer mirror or a MEMS mirror. The object lens 13a focuses the light guided by the first optical scanning unit 13s onto the illumination point. The first optical scanning unit 13s is controlled by the control unit 41b of the computer 40.

[0197] The first camera 15B detects the reflected light from the semiconductor device D corresponding to the laser. The first camera 15B outputs the detection signal to the computer 40. The first camera 15B is, for example, a photodiode, avalanche photodiode, photomultiplier tube, or surface image sensor.

[0198] The second analysis unit 20B includes a second light source 21B, a second observation optical system 22B (second optical system), and a second camera 24B (second light detection unit). The second light source 21B has the same configuration as the first light source 12B. The second observation optical system 22B includes an object lens 22a, a switching unit 22b (beam splitter), and a second light scanning unit 22s. The second light scanning unit 22s has the same configuration as the first light scanning unit 13s. The second camera 24B has the same configuration as the detection camera 24 in the first embodiment.

[0199] The electrical signal acquisition unit 61 is electrically connected to the semiconductor device D. The electrical signal acquisition unit 61 detects the electrical signal generated by the semiconductor device D based on the laser. The electrical signal acquisition unit 61 outputs the electrical signal characteristic value corresponding to the detected electrical signal to the computer 40.

[0200] The image processing unit 41c of the computer 40 outputs an electrical signal image based on the electrical signal characteristic values. The electrical signal image is an image formed by associating the electrical signal characteristic values ​​with the scanning positions of the lasers in the first optical scanning unit 13s and the second optical scanning unit 22s. Furthermore, the image processing unit 41c outputs an optical reflection image based on a detection signal. The image processing unit 41c then overlays the electrical signal image onto the optical reflection image. As a result, the image processing unit 41c outputs an overlay image of the electrical signal image overlaid on the optical reflection image as a resolution image.

[0201] Electrical signal images include, for example, photoelectric current images (OBIC images), electrical quantity change images (OBIRCH images), correct / incorrect information images (SDL images), and LADA images.

[0202] OBIC images are based on photocurrent generated by laser irradiation. An OBIC image is an image that visualizes the current value or current change value of the photocurrent as an electrical signal characteristic value.

[0203] An OBIRCH image is based on the resistance value generated at the location where a laser beam irradiates a semiconductor device D. A certain current is applied to the irradiated semiconductor device D. The change in resistance value can be obtained as a voltage value or a voltage change. An OBIRCH image is an image that visualizes the electrical signal characteristics showing the voltage value or voltage change. Alternatively, when obtaining an OBIRCH image, a certain voltage can also be applied to the irradiated semiconductor device D. In this case, the change in resistance value at the irradiated location of the semiconductor device D can be obtained as a current value change. An OBIRCH image is an image that visualizes the electrical signal characteristics showing the current change.

[0204] An SDL image is an image that visualizes information related to erroneous action states (such as PASS / FAIL signals). A laser is irradiated onto a semiconductor device D, to which a stimulus signal such as a test pattern is applied. This laser has a wavelength that does not excite charge carriers. By applying the stimulus signal and irradiating the device with the laser, erroneous action states can be detected. Furthermore, information related to the erroneous action is obtained as a brightness value. The SDL image is an image based on this brightness value.

[0205] LADA images are also images that visualize information related to erroneous action states (e.g., PASS / FAIL signals). However, the analysis of obtaining LADA images differs from the analysis of obtaining SDL images in terms of the points where a laser with a wavelength that excites charge carriers is irradiated onto the semiconductor device D. The points where erroneous action-related information is obtained as brightness values ​​through the application of a stimulus signal and laser irradiation, and the points where image data is generated based on these brightness values, are the same as in SDL images.

[0206] Alternatively, either the first analysis unit 10B or the second analysis unit 20B may also have the function of additionally displaying a mark indicating the fault location. That is, either the first analysis unit 10B or the second analysis unit 20B may also have a laser light source for marking, as provided with the marking unit 20 in the first embodiment.

[0207] <Semiconductor Fault Analysis Method of Embodiment 3>

[0208] Next, the parsing process of parsing device 1B will be explained. Figure 14 This is a flowchart showing the main steps of the parsing process using parsing device 1B.

[0209] <Alignment Process S100B>

[0210] First, the positions of the first observation optical system 13B and the second observation optical system 22B are aligned (S100B). Position alignment here means eliminating the offset between the center of the first optical scanning area of ​​the first observation optical system 13B and the center of the second optical scanning area of ​​the second observation optical system 22B by aligning the optical axes of the first observation optical system 13B and the second optical scanning area of ​​the second observation optical system 22B. The control unit 41b outputs the alignment command for process S100B to the second resolution unit 20B and the device placement unit 30. The XY drive unit 33 moves the wafer chuck 32 in such a way that the alignment target 50 is captured in the field of view of the first observation optical system 13B (S101). The control unit 41b stores the movement amount of the semiconductor device D. The movement amount can also be set as the movement amount of the wafer chuck 32.

[0211] Next, the first optical scanning area of ​​the first observation optical system 13B is aligned with the second optical scanning area of ​​the second observation optical system 22B (S102B). This means aligning the optical axis of the first observation optical system 13B with the optical axis of the second observation optical system 22B, thereby aligning the center of the first optical scanning area of ​​the first observation optical system 13B with the center of the second optical scanning area of ​​the second observation optical system 22B. First, the XYZ platform 23 moves the second observation optical system 22B to capture the aligned target 50 within the field of view of the second observation optical system 22B. Next, the second light source 25B outputs illumination light to the aligned target 50. The illumination light passes through the light transmission section 50a of the aligned target 50. The first camera 15B of the first observation optical system 13B obtains the transmitted image formed by the light passing through the light transmission section 50a of the aligned target 50. The first camera 15B outputs the transmitted image to the computer 40. The second camera 24B acquires a reflected image formed by reflected light reflected from the opaque portion 50b of the target 50. The second camera 24B outputs the reflected image to the computer 40. The image processing unit 41c uses the transmitted and reflected images to calculate the offset of the optical axis of the second observation optical system 22B relative to the optical axis of the first observation optical system 13B. The movement of the second observation optical system 22B and the confirmation of the offset are repeated until the offset falls within an acceptable range. When it is determined that the offset falls within the acceptable range, the optical axis alignment is completed. This allows the center of the first light scanning area of ​​the first observation optical system 13B to be aligned with the center of the second light scanning area of ​​the second observation optical system 22B. Furthermore, as an operation to ensure the offset falls within the acceptable range, the second observation optical system 22B can be moved while the position of the first observation optical system 13B is fixed. Additionally, the first observation optical system 13B can be moved while the position of the second observation optical system 22B is fixed. Furthermore, both the first observation optical system 13B and the second observation optical system 22B can be moved.

[0212] After the position alignment of the optical scanning area is completed, the XY drive unit 33 controls the movement of the wafer chuck 32 in the X-axis and Y-axis directions to capture the semiconductor device D in the field of view of the first observation optical system 13B and the second observation optical system 22B (S103). At this time, the control unit 41b can control the XY drive unit 33 based on the amount of movement stored when the semiconductor device D retracts. Alternatively, the relative position of the first observation optical system 13B and the second observation optical system 22B with the semiconductor device D can be controlled using image data output from the first camera 15B and the second camera 24B. In this case, only the semiconductor device D is moving. Since the semiconductor device D retracts immediately after the position alignment of the scanning area is completed, the semiconductor device D is not in the field of view of the first observation optical system 13B and the second observation optical system 22B. Therefore, after the position alignment of the scanning area is completed, the semiconductor device D is placed in the field of view of the first observation optical system 13B and the second observation optical system 22B. More specifically, a semiconductor device D is disposed in the first optical scanning area of ​​the first observation optical system 13B and the second optical scanning area of ​​the second observation optical system 22B. That is, the semiconductor device D moves after the position alignment is completed. In other words, the first observation optical system 13B and the second observation optical system 22B are not moved after the position alignment is completed. As a result, the relative positional relationship between the first optical scanning area of ​​the first observation optical system 13B and the second optical scanning area of ​​the second observation optical system 22B maintains the position alignment result.

[0213] <Analysis Process S110B>

[0214] Next, the fault location of semiconductor device D is determined (S110B). In the analysis step S110B, signal analysis using light irradiation is performed. The first observation optical system 13B irradiates one side of semiconductor device D with a first laser. Meanwhile, the second observation optical system 22B irradiates the other side of semiconductor device D with a second laser. The irradiation of the first and second lasers can also be performed in parallel. That is, the period of irradiation of the first laser can overlap with the period of irradiation of the second laser. Alternatively, the period of irradiation of the first laser may not overlap with the period of irradiation of the second laser. That is, the irradiation of the second laser can begin after the irradiation of the first laser has stopped. In the analysis step S110B, several electrical signal images can be obtained based on the characteristics of the first and second lasers and the state of the semiconductor device D receiving the laser irradiation. These electrical signal images include, for example, photocurrent images (OBIC images), electrical quantity change images (OBIRCH images), error information images (SDL images), and LADA images.

[0215] As a first analysis, a first laser and a second laser are irradiated onto a semiconductor device D. In this first analysis, the stimulation signal application unit 60 does not apply a stimulation signal to the semiconductor device D. The semiconductor device D, upon receiving the laser, sometimes generates a photocurrent. The electrical signal acquisition unit 61 outputs the current value or current change value of the photocurrent as an electrical signal characteristic value. The electrical signal image based on the electrical signal characteristic value obtained from the first analysis is an OBIC image.

[0216] As a second analysis, the first laser and the second laser are irradiated onto the semiconductor device D. In this second analysis, the stimulation signal application unit 60 applies a stimulation signal, i.e., a certain current, to the semiconductor device D. Alternatively, the stimulation signal may be a certain voltage. If the semiconductor device D, which receives the stimulation signal, is irradiated with laser, the resistance value at the irradiated position of the semiconductor device D changes. The electrical signal acquisition unit 61 outputs a voltage value or voltage change value corresponding to the change in resistance value as an electrical signal characteristic value. The electrical signal image based on the electrical signal characteristic value obtained from the second analysis is an OBIRCH image.

[0217] As a third analysis, the first and second lasers are irradiated onto the semiconductor device D. In this third analysis, lasers with wavelengths that do not excite charge carriers are used as the first and second lasers. Furthermore, in this third analysis, the stimulation signal application unit 60 applies a stimulation signal, such as a test pattern. If the semiconductor device D, which receives the stimulation signal, is irradiated with a laser of a wavelength that does not excite charge carriers, an erroneous operating state of the semiconductor device D can be detected. The electrical signal acquisition unit 61 outputs information related to the erroneous operating state (e.g., PASS / FAIL signals) as electrical signal characteristic values. The image obtained by converting the electrical signal characteristic values ​​obtained from the third analysis into brightness values ​​is an SDL image.

[0218] As a fourth analysis, the first and second lasers are irradiated onto the semiconductor device D. In this fourth analysis, lasers with wavelengths that excite charge carriers are used as the first and second lasers. Furthermore, in this fourth analysis, the stimulation signal application unit 60 applies a stimulation signal, such as a test pattern. If the semiconductor device D, which receives the stimulation signal, is irradiated with lasers of the wavelengths that excite charge carriers, an erroneous operating state of the semiconductor device D can be detected. The electrical signal acquisition unit 61 outputs information related to the erroneous operating state (e.g., PASS / FAIL signals) as electrical signal characteristic values. The image obtained by converting the electrical signal characteristic values ​​obtained from the fourth analysis into brightness values ​​is a LADA image.

[0219] <Marking process S120B>

[0220] The marking process S120B in the third embodiment is the same as the marking process S120A in the second embodiment. When marking is performed using the second observation optical system 22B, the second observation optical system 22B may also include a laser light source for marking, an XYZ platform, and an illumination light source.

[0221] The analysis apparatus 1B includes: a first analysis unit 10B, which irradiates a semiconductor device D with light generated by a first light source 12B via a first observation optical system 13B having a first light scanning unit 13s; a second analysis unit 20B, which irradiates the semiconductor device D with light generated by a second light source 21B via a second observation optical system 22B having a second light scanning unit 22s; and a device placement unit 30, which is disposed between the first analysis unit 10B and the second analysis unit 20B, holds the semiconductor device D, and has The system includes a wafer chuck 32 for aligning the optical scanning area of ​​the first observation optical system 13B with the optical scanning area of ​​the second observation optical system 22B to a target 50, and the wafer chuck 32 is movable relative to the first resolution unit 10B and the second resolution unit 20B; an electrical signal acquisition unit 61 that receives electrical signals output by the semiconductor device D; and a control unit 41b that outputs commands to the first resolution unit 10B, the second resolution unit 20B, the device placement unit 30, and the electrical signal acquisition unit 61. The target 50 can be detected from one side of the target 50 by the first resolution unit 10B and from the other side of the target 50 by the second resolution unit 20B. The control unit 41b outputs an alignment command to the second resolution unit 20B and the device placement unit 30. This alignment command moves the wafer chuck 32 to a position where the first resolution unit 10B can detect the alignment target 50, and aligns the light scanning area of ​​the second observation optical system 22B with the light scanning area of ​​the first observation optical system 13B, using the alignment target 50 as a reference. Furthermore, the control unit 41b outputs a resolution command to the first resolution unit 10B, the second resolution unit 20B, the electrical signal acquisition unit 61, and the device placement unit 30. This resolution command, while maintaining the positional relationship between the light scanning areas of the first observation optical system 13B and the second observation optical system 22B, irradiates the semiconductor device D with light from at least one of the first resolution unit 10B and the second resolution unit 20B, and receives the electrical signal from the semiconductor device D through the electrical signal acquisition unit 61.

[0222] The semiconductor fault analysis method for analyzing semiconductor device D using analysis apparatus 1B includes: an alignment process (S100B), in which, after moving wafer chuck 32 to a position where the first analysis unit 10B can detect alignment target 50, the light scanning area of ​​the second observation optical system 22B is aligned with the light scanning area of ​​the first observation optical system 13B based on alignment target 50; and an analysis process (S110B), in which, while maintaining the positional relationship between the light scanning areas of the first observation optical system 13B and the light scanning areas of the second observation optical system 22B, light is irradiated onto semiconductor device D from at least one of the first analysis unit 10B and the second analysis unit 20B, and an electrical signal is received from semiconductor device D by electrical signal acquisition unit 61.

[0223] The analysis device 1B illuminates the semiconductor device D while maintaining the positional relationship between the optical scanning areas of the first observation optical system 13B and the second observation optical system 22B. Therefore, since the optical scanning areas of the first observation optical system 13B and the second observation optical system 22B are aligned, fault locations in the semiconductor device D can be detected effectively.

[0224] <Semiconductor Fault Analysis Apparatus of the Fourth Embodiment>

[0225] The semiconductor fault analysis apparatus of the fourth embodiment determines the fault location using an optical detection technique called EOP (Electro-Optical Probing) or EOFM (Electro-Optical Frequency Mapping). Alternatively, EOFM can be used to perform optical probed thermo-reflectance image mapping (OPTIM). The optical detection technique determines the location of the circuit operating at the target frequency. In the optical detection technique, light emitted from a light source is irradiated onto the integrated circuit. The light reflected from the integrated circuit is detected by a photosensitive sensor. A signal component with the target frequency is extracted from the detection signal output from the photosensitive sensor. The amplitude energy of the extracted signal component is displayed as the elapsed time. Furthermore, the amplitude energy of the extracted signal component is displayed as a two-dimensional image.

[0226] In other words, photodetection technology analyzes faults in semiconductor device D based on the intensity modulation of light from the driven semiconductor device D. Therefore, the semiconductor fault analysis device applies an electrical signal with a defined modulation frequency to the semiconductor device D. In this case, the modulation frequency is often higher than the frequency of the stimulus signal used to determine the location of a heat source. For example, the semiconductor fault analysis device applies a drive current with the same frequency as the drive signal of the semiconductor device D as the stimulus signal.

[0227] like Figure 15 As shown, the semiconductor fault analysis apparatus of the fourth embodiment (hereinafter referred to as "analysis apparatus 1C") includes a first analysis unit 10C, a second analysis unit 20C, a device placement unit 30, a computer 40, and a stimulus signal application unit 60. That is, the analysis apparatus 1C of the fourth embodiment does not have the electrical signal acquisition unit 61 provided with the analysis apparatus 1B of the third embodiment.

[0228] The first resolution unit 10C includes a first light source 12C, a first observation optical system 13C (first optical system), an XYZ platform 14 (first drive unit), and a first camera 15C (first light detection unit). The first light source 12C is the same as the first light source 12B in the second embodiment. The first observation optical system 13C is the same as the first observation optical system 13B in the second embodiment. The first camera 15C is the same as the first camera 15B in the second embodiment.

[0229] The second analysis unit 20C includes a second light source 21C, a second observation optical system 22C (second optical system), and a second camera 24C (second light detection unit). The second light source 21C is the same as the second light source 21B in the second embodiment. The second observation optical system 22C is the same as the second observation optical system 22B in the second embodiment. The second camera 24C is the same as the second camera 24B in the second embodiment.

[0230] Furthermore, either the first analysis unit 10C or the second analysis unit 20C may have the function of additionally displaying a mark indicating the fault location. That is, either the first analysis unit 10C or the second analysis unit 20C may also have a laser light source for marking, as provided with the marking unit 20 in the first embodiment.

[0231] <Semiconductor Fault Analysis in Embodiment 4>

[0232] Next, the parsing process of the parsing device 1C will be explained. Figure 16 This is a flowchart showing the main steps of the parsing process using the parsing device 1C.

[0233] <Alignment Process S100C>

[0234] The alignment process S100C in the fourth embodiment is the same as the alignment process S100B in the third embodiment. Therefore, the process (S102C) for aligning the optical scanning area of ​​the alignment process S100C in the fourth embodiment is the same as the process S102B in the third embodiment.

[0235] <Analysis Process S110C>

[0236] Next, the fault location (S110C) of semiconductor device D is determined. The first resolution unit 10C irradiates semiconductor device D with light from the first light source 12C via the first light scanning unit 13s. The light output by the first light source 12C is, for example, light with a wavelength band of 530 nm or higher. Preferably, the light output by the first light source 12C has a wavelength band of 1064 nm or higher. The light is reflected from the surface of semiconductor device D. The reflected light is incident on the first resolution unit 10C. The incident light is detected by the first camera 15C. The first camera 15C outputs information based on the reflected light to the computer 40. The image processing unit 41c of the computer 40 uses the information output by the first camera 15C to generate an optical reflection image. During this operation, the stimulus signal application unit 60 does not output a stimulus signal.

[0237] Next, the stimulus signal application unit 60 outputs a stimulus signal, such as a test pattern, to the semiconductor device D. The first analysis unit 10C irradiates the semiconductor device D, which receives the stimulus signal, with light from the first light source 12C. In this operation, light from the first light source 12C is irradiated at the irradiation position selected by the user. The user can observe the optical reflection image displayed on the display unit 41d while inputting the irradiation position to the computer 40 using the input unit 41e. The first camera 15C detects the reflected light from the semiconductor device D that receives the stimulus signal. Furthermore, the first camera 15C outputs information based on the reflected light to the computer 40.

[0238] The semiconductor device D that receives the stimulus signal is activated by the components constituting the semiconductor device D. The reflected light from the activated semiconductor device D is modulated by the accompanying action of the components.

[0239] The image processing unit 41c of the computer 40 generates a signal waveform using the detection signal output from the first camera 15C. The image processing unit 41c displays this signal waveform on the display unit 41d. Furthermore, while changing the illumination position based on the aforementioned optical reflection image, the detection signal is acquired and a signal waveform is generated. By using the generated signal waveform, the location of the fault can be determined.

[0240] Additionally, the image processing unit 41c can also generate an electro-optical frequency image (EOFM image). An EOFM image is an image that correlates the phase difference information between the detection signal and the stimulus signal such as the test pattern with the illumination position and visualizes it. In this case, the phase difference information can be obtained from the AC component extracted from the detection signal. Furthermore, an optical reflection image can be obtained by correlating and visualizing the DC component extracted simultaneously with the AC component with the illumination position. Moreover, the overlaid image of the optical reflection image and the EOFM image can be used as a resolution image.

[0241] Furthermore, the second analysis unit 20C performs the same analysis operation as the first analysis unit 10C described above. The analysis operations of the first analysis unit 10C and the second analysis unit 20C can be performed in parallel. Alternatively, these operations can be performed alternately.

[0242] <Marking process S120C>

[0243] The marking process S120C in the fourth embodiment is the same as the marking process S120A in the second embodiment. When marking is performed using the second observation optical system 22C, the second observation optical system 22B may also include a laser light source for marking, an XYZ platform, and an illumination source.

[0244] The analysis apparatus 1C includes: a first analysis unit 10C, which illuminates a semiconductor device D with light generated by a first light source 12C via a first observation optical system 13C having a first light scanning unit 13s, and a first camera 15C receiving a first response light from the semiconductor device D generated by the light from the first light source 12C; a second analysis unit 20C, which illuminates the semiconductor device D with light generated by a second light source 21C via a second observation optical system 22C having a second light scanning unit 22s, and a second camera 24C receiving a second response light from the semiconductor device D generated by the light from the second light source 21C; and a device placement unit 30. It is disposed between the first resolution unit 10C and the second resolution unit 20C, and includes a wafer chuck 32 that holds a semiconductor device D and is provided with an alignment target 50 for aligning the optical scanning areas of the first observation optical system 13C and the second observation optical system 22C. The wafer chuck 32 moves relative to the first resolution unit 10C and the second resolution unit 20C; a stimulation signal application unit 60 that applies a stimulation signal to the semiconductor device D; and a control unit 41b that outputs commands to the first resolution unit 10C, the second resolution unit 20C, the device placement unit 30, and the stimulation signal application unit 60. The alignment target 50 can be detected from one side of the alignment target 50 by the first resolution unit 10C and from the other side of the alignment target 50 by the second resolution unit 20C. The control unit 41b outputs an alignment command to the second resolution unit 20C and the device placement unit 30. This alignment command moves the wafer chuck 32 to a position where the first camera 15C can detect the alignment target 50, and aligns the light scanning area of ​​the second observation optical system 22C with the light scanning area of ​​the first observation optical system 13C, using the alignment target 50 as a reference. Furthermore, the control unit 41b outputs a resolution command to the first resolution unit 10C, the second resolution unit 20C, the stimulation signal application unit 60, and the device placement unit 30. This resolution command maintains the positional relationship between the light scanning areas of the first observation optical system 13C and the second observation optical system 22C, and applies a stimulation signal to the semiconductor device D. Light is irradiated onto the semiconductor device D from at least one of the first resolution unit 10C and the second resolution unit 20C, and at least one of the first response light and the second response light from the semiconductor device D is received by at least one of the first camera 15C and the second camera 24C.

[0245] The semiconductor fault analysis method using analysis apparatus 1C includes: an alignment step (S100C), in which, after moving the wafer chuck 32 to a position where the first camera 15C can detect the alignment target 50, the light scanning area of ​​the second observation optical system 22C is aligned with the light scanning area of ​​the first observation optical system 13C based on the alignment target 50; and a analysis step (S110C), in which, while maintaining the positional relationship between the light scanning areas of the first observation optical system 13C and the light scanning areas of the second observation optical system 22C, and applying a stimulation signal to the semiconductor device D, light is irradiated onto the semiconductor device D from at least one of the first analysis unit 10C and the second analysis unit 20C, and at least one of the first response light and the second response light from the semiconductor device D is received from at least one of the first camera 15C and the second camera 24C.

[0246] The analytical apparatus 1C illuminates the semiconductor device D while maintaining the positional relationship between the optical scanning areas of the first observation optical system 13C and the second observation optical system 22C. Therefore, since the optical scanning areas of the first observation optical system 13C and the second observation optical system 22C are aligned, fault locations in the semiconductor device D can be detected effectively.

[0247] [Symbol Explanation]

[0248] 1, 1A, 1B, 1C, 1S: Analysis device (semiconductor fault analysis device)

[0249] 10: Analysis Section

[0250] 10A, 10B, 10C: First analytical section

[0251] 11: Test Unit

[0252] 12: Light source

[0253] 13: Observation optical system (first optical system)

[0254] 14: XYZ Platform (Driver Unit 1)

[0255] 15: Two-dimensional camera (First light detection unit)

[0256] 20: Marking section

[0257] 20A, 20B, 20C: Second analytical section

[0258] 21: Laser source

[0259] 22: Optical system for laser marking (second optical system)

[0260] 23: XYZ Platform (Second Drive Unit)

[0261] 24: Detection Camera (Second Light Detection Unit)

[0262] 25: Lighting source

[0263] 30: Device Configuration Department

[0264] 31: Sample Platform

[0265] 32: Wafer chuck

[0266] 33: XY Drive Unit (Third Drive Unit)

[0267] 32a: Device holding section

[0268] 32b: Target Hole

[0269] 40: Computer

[0270] 41a: Condition Setting Section

[0271] 41b: Control Department

[0272] 41c: Image Processing Unit

[0273] 41e: Input Section

[0274] 41d: Display Unit

[0275] 50: Aim at the target

[0276] 50a: Light-transmitting part

[0277] 50b: Opaque portion

[0278] D: Semiconductor devices

[0279] ME: Metal layer

[0280] fp: Fault location

[0281] mp: Marks the location.

Claims

1. A semiconductor fault analysis apparatus, comprising: The first resolution unit receives light emitted by the semiconductor device via the first light detection unit and the first optical system, which is moved relative to the semiconductor device by the first driving unit. The second resolution unit receives light emitted by the semiconductor device via the second light detection unit and the second optical system, which is moved relative to the semiconductor device by the second driving unit. A device placement unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the optical axis of the first optical system with the optical axis of the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. A stimulation signal application unit that applies a stimulation signal to the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side by the first parsing unit and from the other side by the second parsing unit. The control unit, The alignment command is output to the second resolution unit and the device configuration unit. After moving the chuck to a position where the first photodetector can detect the target, the alignment command uses the target as a reference to align the optical axis of the second optical system with the optical axis of the first optical system; and The analysis command is output to the first analysis unit, the second analysis unit, the stimulation signal application unit, and the device placement unit. The analysis command applies the stimulation signal to the semiconductor device while maintaining the positional relationship between the optical axis of the first optical system and the optical axis of the second optical system. At least one of the first light detection unit or the second light detection unit receives the light emitted from the semiconductor device according to the stimulation signal.

2. The semiconductor fault analysis apparatus as described in claim 1, wherein, The alignment command causes the first optical detection unit to acquire a first image of the target from one side, and the second optical detection unit to acquire a second image of the target from the other side. The second optical system is moved in such a way that the optical axis of the second optical system is aligned with the optical axis of the first optical system based on the first image and the second image.

3. The semiconductor fault analysis apparatus as described in claim 1, wherein, The analysis command performs analysis of the semiconductor device by moving the chuck through the third drive unit included in the device configuration unit, in a manner in which the semiconductor device overlaps with the optical axis of the first optical system and the optical axis of the second optical system.

4. The semiconductor fault analysis apparatus as described in claim 2, wherein, The analysis command performs analysis of the semiconductor device by moving the chuck through the third drive unit included in the device configuration unit, in a manner in which the semiconductor device overlaps with the optical axis of the first optical system and the optical axis of the second optical system.

5. The semiconductor fault analysis apparatus according to any one of claims 1 to 4, wherein, The target is located in a different location within the chuck than the device holding section that holds the semiconductor device.

6. The semiconductor fault analysis apparatus according to any one of claims 1 to 4, wherein, The first light detection unit acquires a first image of the target observed from one side. The second light detection unit acquires a second image of the target observed from the other side.

7. The semiconductor fault analysis apparatus as described in claim 5, wherein, The first light detection unit acquires a first image of the target observed from one side. The second light detection unit acquires a second image of the target observed from the other side.

8. The semiconductor fault analysis apparatus according to any one of claims 1 to 4 and 7, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

9. The semiconductor fault analysis apparatus as described in claim 5, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

10. The semiconductor fault analysis apparatus as claimed in claim 6, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

11. A semiconductor fault analysis apparatus, comprising: The first analysis unit irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit; The second analysis unit irradiates the semiconductor device with light generated by the second light source via a second optical system having a second light scanning unit; A device configuration unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the center of the optical scanning area of ​​the first optical system with the center of the optical scanning area of ​​the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. An electrical signal acquisition unit receives electrical signals output by the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device configuration unit, and the electrical signal acquisition unit. The target can be detected from one side of the target by the first parsing unit, and can be detected from the other side of the target by the second parsing unit; The control unit, The alignment command is output to the second resolution unit and the device configuration unit. After moving the chuck to a position where the first resolution unit can detect the target, the alignment command uses the target as a reference to align the center of the light scanning area of ​​the second optical system with the center of the light scanning area of ​​the first optical system; and The parsing command is output to the first parsing unit, the second parsing unit, the electrical signal acquisition unit, and the device placement unit. While maintaining the positional relationship between the center of the optical scanning area of ​​the first optical system and the center of the optical scanning area of ​​the second optical system, the parsing command illuminates the semiconductor device from at least one of the first parsing unit and the second parsing unit, and receives the electrical signal from the semiconductor device through the electrical signal acquisition unit.

12. The semiconductor fault analysis apparatus as claimed in claim 11, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The alignment command causes the first optical detection unit to acquire a first image of the target from one side, and causes the second optical detection unit to acquire a second image of the target from the other side. Based on the first image and the second image, the optical axis of the second optical system is aligned with the optical axis of the first optical system, thereby aligning the center of the scanning area of ​​the first optical system with the center of the scanning area of ​​the second optical system.

13. The semiconductor fault analysis apparatus of claim 11, wherein, The parsing command performs parsing of the semiconductor devices by moving the chuck via the third driving unit included in the device configuration unit, in a manner in which the semiconductor devices overlap in the light scanning areas of the first optical system and the light scanning areas of the second optical system.

14. The semiconductor fault analysis apparatus of claim 12, wherein, The parsing command performs parsing of the semiconductor devices by moving the chuck via the third driving unit included in the device configuration unit, in a manner in which the semiconductor devices overlap in the light scanning areas of the first optical system and the light scanning areas of the second optical system.

15. The semiconductor fault analysis apparatus according to any one of claims 11 to 14, wherein, The target is located in a different location within the chuck than the device holding section that holds the semiconductor device.

16. The semiconductor fault analysis apparatus according to any one of claims 12 to 14, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The first light detection unit acquires a first image of the target observed from one side. The second light detection unit acquires a second image of the target observed from the other side.

17. The semiconductor fault analysis apparatus as claimed in claim 15, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The first light detection unit acquires a first image of the target observed from one side. The second light detection unit acquires a second image of the target observed from the other side.

18. The semiconductor fault analysis apparatus according to any one of claims 12 to 14 and 17, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

19. The semiconductor fault analysis apparatus as claimed in claim 15, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

20. The semiconductor fault analysis apparatus as claimed in claim 16, wherein, The first resolution unit includes a first photodetector unit that receives light from one side of the semiconductor device. The second resolution unit includes a second photodetector unit that receives light from the other side of the semiconductor device. The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

21. A semiconductor fault analysis apparatus, comprising: The first analysis unit irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit, and the first light detection unit receives a first response light from the semiconductor device generated based on the light from the first light source; The second analysis unit irradiates the semiconductor device with light generated by the second light source via a second optical system having a second light scanning unit, and the second light detection unit receives a second response light from the semiconductor device generated based on the light from the second light source; A device configuration unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the center of the optical scanning area of ​​the first optical system with the center of the optical scanning area of ​​the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. A stimulation signal application unit that applies a stimulation signal to the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side by the first parsing unit and from the other side by the second parsing unit. The control unit, The alignment command is output to the second resolution unit and the device configuration unit. After moving the chuck to a position where the first photodetector can detect the target, the alignment command uses the target as a reference to align the center of the light scanning area of ​​the second optical system with the center of the light scanning area of ​​the first optical system. The parsing command is output to the first parsing unit, the second parsing unit, the stimulation signal application unit, and the device placement unit. The parsing command maintains the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, and applies the stimulation signal to the semiconductor device. Light is irradiated onto the semiconductor device from at least one of the first parsing unit and the second parsing unit, and at least one of the first response light and the second response light from the semiconductor device is received by at least one of the first light detection unit and the second light detection unit.

22. The semiconductor fault analysis apparatus as claimed in claim 21, wherein, The alignment command causes the first optical detection unit to acquire a first image of the target from one side, and causes the second optical detection unit to acquire a second image of the target from the other side. Based on the first image and the second image, the optical axis of the second optical system is aligned with the optical axis of the first optical system, thereby aligning the center of the scanning area of ​​the first optical system with the center of the scanning area of ​​the second optical system.

23. The semiconductor fault analysis apparatus as claimed in claim 21, wherein, The parsing command performs parsing of the semiconductor devices by moving the chuck via the third driving unit included in the device configuration unit, in a manner in which the semiconductor devices overlap in the light scanning areas of the first optical system and the light scanning areas of the second optical system.

24. The semiconductor fault analysis apparatus as claimed in claim 22, wherein, The parsing command performs parsing of the semiconductor devices by moving the chuck via the third driving unit included in the device configuration unit, in a manner in which the semiconductor devices overlap in the light scanning areas of the first optical system and the light scanning areas of the second optical system.

25. The semiconductor fault analysis apparatus according to any one of claims 21 to 24, wherein, The target is located in a different location within the chuck than the device holding section that holds the semiconductor device.

26. The semiconductor fault analysis apparatus according to any one of claims 21 to 24, wherein, The first light detection unit acquires a first image of the target observed from one side. The second light detection unit acquires a second image of the target observed from the other side.

27. The semiconductor fault analysis apparatus according to any one of claims 21 to 24, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

28. The semiconductor fault analysis apparatus as claimed in claim 25, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

29. The semiconductor fault analysis apparatus as claimed in claim 26, wherein, The target includes a light-transmitting part that can transmit light through the first light detection unit and the second light detection unit.

30. A semiconductor fault analysis method, wherein, It is a method of analyzing semiconductor devices using a semiconductor fault analysis device. The semiconductor fault analysis device includes: The first resolution unit receives light emitted by the semiconductor device via the first light detection unit and the first optical system, which is moved relative to the semiconductor device by the first driving unit. The second resolution unit receives light emitted by the semiconductor device via the second light detection unit and the second optical system, which is moved relative to the semiconductor device by the second driving unit. A device placement unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the optical axis of the first optical system with the optical axis of the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. A stimulation signal application unit that applies a stimulation signal to the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side by the first optical detection unit and from the other side by the second optical detection unit. The method includes the following steps: In the alignment process, after the chuck is moved to a position where the first optical detection unit can detect the target, the optical axis of the second optical system is aligned with the optical axis of the first optical system, using the target as a reference. and In the analysis process, while maintaining the positional relationship between the optical axis of the first optical system and the optical axis of the second optical system, a stimulation signal is applied to the semiconductor device, and at least one of the first photodetector or the second photodetector receives the light emitted from the semiconductor device according to the stimulation signal.

31. The semiconductor fault analysis method as described in claim 30, wherein, Following the analysis process, a further marking process is performed whereby a mark indicating the fault location of the semiconductor device, obtained through the first analysis unit and the second analysis unit, is affixed to the semiconductor device.

32. A semiconductor fault analysis method, wherein, It is a method of analyzing semiconductor devices using a semiconductor fault analysis device. The semiconductor fault analysis device includes: The first analysis unit irradiates the semiconductor device with light generated by the first light source via a first optical system having a first optical scanning unit; The second analysis unit irradiates the semiconductor device with light generated by the second light source via a second optical system having a second light scanning unit; A device placement unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the center of the optical scanning area of ​​the first optical system with the center of the optical scanning area of ​​the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. An electrical signal acquisition unit receives electrical signals output by the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device configuration unit, and the electrical signal acquisition unit. The target can be detected from one side by the first parsing unit and from the other side by the second parsing unit. The method includes the following steps: In the alignment process, after the chuck is moved to a position where the first resolution unit can detect the target, the center of the light scanning area of ​​the second optical system is aligned with the center of the light scanning area of ​​the first optical system, using the target as a reference. and In the analysis process, while maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, light is irradiated onto the semiconductor device from at least one of the first analysis unit and the second analysis unit, and an electrical signal is received from the semiconductor device by the electrical signal acquisition unit.

33. The semiconductor fault analysis method as described in claim 32, wherein, Following the analysis process, a further marking process is performed whereby a mark indicating the fault location of the semiconductor device, obtained through the first analysis unit and the second analysis unit, is affixed to the semiconductor device.

34. A semiconductor fault analysis method, wherein, It is a method of analyzing semiconductor devices using a semiconductor fault analysis device. The semiconductor fault analysis device includes: The first analysis unit irradiates a semiconductor device with light generated by a first light source via a first optical system having a first light scanning unit, and the first light detection unit receives a first response light from the semiconductor device generated based on the light from the first light source; The second analysis unit irradiates the semiconductor device with light generated by the second light source via a second optical system having a second light scanning unit, and the second light detection unit receives the second response light generated from the semiconductor device based on the light from the second light source; A device placement unit, disposed between the first resolution unit and the second resolution unit, has a chuck that holds the semiconductor device and is provided with a target for aligning the center of the optical scanning area of ​​the first optical system with the center of the optical scanning area of ​​the second optical system. The chuck is movable relative to the first resolution unit and the second resolution unit. A stimulation signal application unit that applies a stimulation signal to the semiconductor device; and The control unit outputs commands to the first analysis unit, the second analysis unit, the device placement unit, and the stimulation signal application unit. The target can be detected from one side by the first optical detection unit and from the other side by the second optical detection unit. The method includes the following steps: In the alignment process, after the chuck is moved to a position where the first optical detection unit can detect the target, the center of the optical scanning area of ​​the second optical system is aligned with the center of the optical scanning area of ​​the first optical system, using the target as a reference. and In the analysis process, while maintaining the positional relationship between the center of the light scanning area of ​​the first optical system and the center of the light scanning area of ​​the second optical system, and while applying the stimulation signal to the semiconductor device, light is irradiated onto the semiconductor device from at least one of the first analysis unit and the second analysis unit, and at least one of the first response light and the second response light from the semiconductor device is received by at least one of the first light detection unit and the second light detection unit.

35. The semiconductor fault analysis method as described in claim 34, wherein, Following the analysis process, a further marking process is performed whereby a mark indicating the fault location of the semiconductor device, obtained through the first analysis unit and the second analysis unit, is affixed to the semiconductor device.

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