Image sensor and method for forming an image sensor

Abstract

Various embodiments of this disclosure relate to an image sensor including pixels along a substrate. Each pixel includes a first semiconductor region having a first doping type. A second semiconductor region is located directly above the first semiconductor region. The second semiconductor region has a second doping type opposite to the first doping type and intersects with the first semiconductor region at a p-n junction. A ring-shaped third semiconductor region laterally surrounds the first and second semiconductor regions. The ring-shaped third semiconductor region has the first doping type. A ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. A ring-shaped fifth semiconductor region is located directly above the ring-shaped third semiconductor region and has the second doping type.

Description

Technical Field

[0001] The embodiments of the present invention relate to an image sensor and a method for forming an image sensor. Background Technology

[0002] Integrated circuits (ICs) with complementary metal-oxide-semiconductor (CMOS) image sensors are used in a wide variety of modern electronic devices, such as cameras and mobile phones. Some CMOS image sensors are based on avalanche photodiodes (APDs) and single-photon avalanche photodiodes (SPADs). Some types of CMOS image sensors include front-side illuminated (FSI) image sensors and back-side illuminated (BSI) image sensors. Summary of the Invention

[0003] Embodiments of the present invention provide an image sensor comprising pixels along a substrate. Each pixel includes a first semiconductor region, a second semiconductor region, a ring-shaped third semiconductor region, a ring-shaped fourth semiconductor region, and a ring-shaped fifth semiconductor region. The first semiconductor region has a first doping type. The second semiconductor region is located directly above the first semiconductor region. The second semiconductor region has a second doping type opposite to the first doping type and intersects with the first semiconductor region at a pn junction. The ring-shaped third semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region. The ring-shaped third semiconductor region has the first doping type. The ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. The ring-shaped fifth semiconductor region is located directly above the ring-shaped third semiconductor region and has the second doping type.

[0004] Embodiments of the present invention provide an image sensor. The image sensor includes a substrate, a semiconductor well, and a first single-photon avalanche diode (SPAD). The semiconductor well is located in the substrate along a first side and has a first doping type. The first single-photon avalanche diode (SPAD) is located in the semiconductor well along the first side of the substrate. The first single-photon avalanche diode includes a first semiconductor region, a second semiconductor region, a guard ring semiconductor region, a contact semiconductor region, and a photosensitivity enhancement semiconductor region. The first semiconductor region extends along the first side of the substrate and has a second doping type opposite to the first doping type. The second semiconductor region is located directly above the first semiconductor region and has the first doping type. The first semiconductor region intersects with the second semiconductor region at a pn junction. The guard ring semiconductor region extends along the first side of the substrate and has the second doping type. The guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region. The contact semiconductor region extends along the first side of the substrate and has the first doping type. The contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region by a first non-zero distance. The photosensitive enhancement semiconductor region is located directly above the guard ring semiconductor region and has the first doping type. The photosensitive enhancement semiconductor region is configured to expand the photon-sensitive region of the first single-photon avalanche diode.

[0005] Embodiments of the present invention provide a method for forming an image sensor. The method includes: forming a first semiconductor region and a second semiconductor region in a substrate. The first semiconductor region has a first doping type, and the second semiconductor region has a second doping type opposite to the first doping type. The first semiconductor region and the second semiconductor region intersect at a pn junction. A guard ring semiconductor region is formed in the substrate. The guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region. The guard ring semiconductor region has the first doping type. A contact semiconductor region is formed in the substrate. The contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region. The contact semiconductor region has the second doping type. A photosensitivity enhancement semiconductor region is formed in the substrate. The photosensitivity enhancement semiconductor region is located directly above the guard ring semiconductor region. The photosensitivity enhancement semiconductor region has the second doping type. Attached Figure Description

[0006] The best understanding of all aspects of this disclosure will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of explanation.

[0007] Figure 1 Cross-sectional views of some embodiments of a back-illuminated image sensor, including a photosensitive enhanced semiconductor region, are shown.

[0008] Figure 2 Show Figure 1 Top view of some embodiments of the image sensor.

[0009] Figure 3 Cross-sectional views of some embodiments of an image sensor in which the photosensitivity-enhancing semiconductor region is located in a semiconductor well are shown.

[0010] Figures 4 to 6 Show Figure 3 Cross-sectional views of some alternative embodiments of the image sensor.

[0011] Figure 7 Cross-sectional views of some embodiments of an image sensor in which the photosensitive enhancement semiconductor region is adjacent to the guard ring semiconductor region are shown.

[0012] Figure 8 Cross-sectional views of some embodiments of a front-illuminated image sensor, including a photosensitizing semiconductor region, are shown.

[0013] Figure 9 Cross-sectional views of some embodiments of an image sensor including multiple pixels arranged in a pixel array are shown.

[0014] Figure 10 Show Figure 9 Top view of some embodiments of the image sensor.

[0015] Figures 11 to 21 Cross-sectional views are shown of some embodiments of a method for forming an image sensor including a photosensitive enhancement semiconductor region.

[0016] Figure 22 Flowcharts illustrating some embodiments of a method for forming an image sensor including a photosensitive enhancement semiconductor region are shown. Detailed Implementation

[0017] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, forming a first feature above or on a second feature in the following description may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features so that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated throughout this disclosure. This repetition is for the purpose of brevity and clarity and is not intended to indicate any relationship between the various embodiments and / or configurations discussed.

[0018] Furthermore, for ease of explanation, spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper,” and similar expressions may be used herein to describe the relationship between one element or feature shown in the figures and another element or feature. In addition to the orientations illustrated in the figures, these spatially relative terms are also intended to encompass different orientations of the device during use or operation. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative descriptive terms used herein may be interpreted accordingly.

[0019] Some image sensors include single-photon avalanche diodes (SPADs) for detecting photons. For example, an image sensor includes multiple pixels along a substrate. One of the pixels includes a SPAD located in the substrate along the front side. The SPAD includes a first semiconductor region and a second semiconductor region directly above the first semiconductor region. The first semiconductor region has a first doping type, and the second semiconductor region has a second doping type opposite to the first doping type. Therefore, a pn junction exists at the interface where the first and second semiconductor regions meet. The pixel also includes a guard ring surrounding both the first and second semiconductor regions. The guard ring has a first doping type. Furthermore, a contact semiconductor region surrounds the guard ring and is laterally separated from the guard ring by the substrate. The guard ring is designed to relax the high electric field of the SPAD along its periphery to prevent premature edge breakdown.

[0020] One challenge in image sensors is that the guard ring must be large enough to relax the high electric field of the SPAD, but the carriers generated by photons absorbed directly above the guard ring often cannot trigger avalanche currents (i.e., the photons may not be detected). Therefore, the guard ring reduces the active area of ​​the SPAD, and consequently, the SPAD's fill factor and / or photon detection efficiency (PDE) also decrease. Consequently, the image sensor's performance may be low.

[0021] Another challenge is that the spacing between the guard ring and the contact area must be sufficient to prevent premature edge breakdown and a high dark count rate. This spacing further reduces the active area of ​​the SPAD because the carriers generated by photons absorbed in the spacing are generally not able to trigger avalanche. Therefore, a large pixel area may be ineffective (i.e., it may not be photosensitive). Consequently, the fill factor and / or PDE of the SPAD may be low.

[0022] Various embodiments of this disclosure relate to an image sensor including a photosensitivity enhancement (PE) semiconductor region for improving the performance of the image sensor. The image sensor includes pixels along a substrate. Each pixel includes a photodetector (e.g., a SPAD or the like) located in the substrate along the front side. The photodetector includes a first semiconductor region extending along the front side of the substrate and a second semiconductor region located directly above the first semiconductor region. The first semiconductor region includes a first doping type, and the second semiconductor region has a second doping type opposite to the first doping type. A pn ​​junction is present at the interface between the first and second semiconductor regions. A guard ring semiconductor region is located in the substrate and extends along the front side of the substrate. The guard ring semiconductor region surrounds the first and second semiconductor regions and has a first doping type. A contact semiconductor region is located in the substrate and extends along the front side of the substrate. The contact semiconductor region surrounds the guard ring and is separated from the guard ring. Furthermore, the contact semiconductor region has a second doping type. Additionally, a PE semiconductor region is located directly above the guard ring semiconductor region and has a second doping type. Furthermore, the PE semiconductor region has a ring-shaped top arrangement. The PE semiconductor region is configured to expand the active area of ​​the image sensor.

[0023] By including a PE semiconductor region directly above the guard ring semiconductor region, the active region of the image sensor can be expanded without changing the image sensor's layout. For example, the high electric field of the photodetector, capable of generating avalanche currents, can extend laterally toward the guard ring semiconductor region. Therefore, carriers generated by photons absorbed above the guard ring semiconductor region have a greater probability of triggering avalanche currents (i.e., a greater probability of detection). Furthermore, the PE semiconductor region reduces the depletion region of the photodetector above the guard ring semiconductor region, allowing carriers generated by photons absorbed above the guard ring semiconductor region to travel laterally toward the high electric field of the photodetector, and thus have a greater probability of triggering avalanche currents. Therefore, the active region of the image sensor can be expanded. Consequently, the performance of the image sensor (e.g., fill factor and / or photon detection efficiency) can be improved.

[0024] Simultaneously refer to Figure 1 and Figure 2 , Figure 1 A cross-sectional view 100 is shown for some embodiments of a back-illuminated image sensor including a photosensitive enhancement (PE) semiconductor region 106, and Figure 2 Show Figure 1 A top view 200 of some embodiments of an image sensor. For example, Figure 1 The sectional view 100 can be passed through Figure 2 The line A-A' is intercepted.

[0025] In such embodiments, the image sensor includes pixels 101 along a substrate 102. Pixel 101 includes a photodetector 103 located within the substrate 102. The photodetector 103 includes a first semiconductor region 110 extending along a front side 102f of the substrate 102. The photodetector 103 also includes a second semiconductor region 112 located directly above the first semiconductor region 110. The first semiconductor region 110 has a first doping type (e.g., n-type), and the second semiconductor region 112 has a second doping type opposite to the first doping type (e.g., p-type). The first semiconductor region 110 intersects with the second semiconductor region 112 at a pn junction 111. Due to the large reverse bias applied to the photodetector 103, a high electric field may exist along the pn junction 111.

[0026] The photodetector 103 also includes a guard ring semiconductor region 108 extending along the front side 102f of the substrate 102. The guard ring semiconductor region 108 laterally surrounds both the first semiconductor region 110 and the second semiconductor region 112. The guard ring semiconductor region 108 has an annular top arrangement. Furthermore, the guard ring semiconductor region 108 has a first doping type. In some embodiments, the guard ring semiconductor region 108 abuts the first semiconductor region 110 and the second semiconductor region 112 along the sidewalls of the first semiconductor region 110 and the second semiconductor region 112. The guard ring semiconductor region 108 relaxes the high electric field present along the periphery of the pn junction 111 to prevent premature edge breakdown in the image sensor.

[0027] Furthermore, the photodetector 103 includes a contact semiconductor region 116 extending along the front side 102f of the substrate 102. The contact semiconductor region 116 laterally surrounds the guard ring semiconductor region 108 at a first distance 117 from the guard ring semiconductor region 108. The contact semiconductor region 116 also has an annular top arrangement. The contact semiconductor region 116 has a second doping type and is separated from the guard ring semiconductor region 108 by the substrate 102.

[0028] Furthermore, the photodetector 103 includes an isolation semiconductor region 114 located directly above the contact semiconductor region 116. The isolation semiconductor region 114 has a second doping type and a ring-top layout similar to that of the contact semiconductor region 116. The isolation semiconductor region 114 may electrically and / or optically isolate the photodetector 103 along the boundary of the photodetector.

[0029] Furthermore, the photodetector 103 includes a photosensitive enhancement (PE) semiconductor region 106, which is located directly above the guard ring semiconductor region 108 and perpendicularly separated from the guard ring semiconductor region 108 by a non-zero distance 107. Additionally, the PE semiconductor region 106 has a second doping type and has an annular top layout that is approximately the same as or similar to that of the guard ring semiconductor region 108. In some embodiments, the guard ring semiconductor region 108 and the PE semiconductor region 106 are concentric about the center 103x (e.g., the central axis) of the photodetector 103. In some embodiments, the contact semiconductor region 116 may also be concentric about the center 103x of the photodetector 103. The PE semiconductor region 106 is configured to expand the photon-sensitive area of ​​the image sensor.

[0030] For example, the active region 105 of pixel 101 may extend beyond the inner sidewall of the guard ring semiconductor region 108. In some embodiments, the area of ​​the active region 105 may be, for example, greater than about 40% of the area of ​​the photodetector 103, such that the fill factor of the image sensor is greater than about 40%.

[0031] By including a PE semiconductor region 106 in the photodetector 103 and directly above the guard ring semiconductor region 108, the active region (e.g., 105) of the image sensor can be expanded. For example, the high electric field of the photodetector 103, which allows triggering avalanche currents, can extend laterally toward the guard ring semiconductor region 108. Therefore, carriers generated by photons absorbed above the guard ring semiconductor region 108 have a greater probability of triggering avalanche currents (i.e., a greater probability of being detected). Furthermore, the PE semiconductor region 106 can reduce the depletion region of the photodetector 103 above the guard ring semiconductor region 108, allowing carriers generated by photons absorbed above the guard ring semiconductor region 108 to travel laterally toward the high electric field of the photodetector 103, and thus have a greater probability of triggering avalanche currents. Therefore, the active region (e.g., 105) of the image sensor can be expanded. Consequently, the performance of the image sensor (e.g., fill factor and / or photon detection efficiency) can be improved.

[0032] In some embodiments, the image sensor further includes a trench isolation structure 120 surrounding pixel 101 along the boundary of the pixel. The trench isolation structure 120 electrically and / or optically isolates pixel 101 from adjacent pixels (not shown). In some embodiments, the trench isolation structure 120 may comprise, for example, silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, some other suitable dielectric, or any combination thereof.

[0033] Furthermore, in some embodiments, the image sensor includes a color filter 122 and a lens 124 extending along the back surface of the substrate 102. The lens 124 is located directly above the color filter 122. Photons can pass through the lens 124 into the pixel 101, thereby illuminating the image sensor from the back.

[0034] Furthermore, in some embodiments, the interconnect structure 118 extends along the front side 102f of the substrate 102. The interconnect structure 118 may include, for example, one or more contacts, metal lines, vias, solder bumps, bonding pads, or the like. Additionally, the interconnect structure 118 may be electrically connected to the photodetector 103.

[0035] In some embodiments, substrate 102 may, for example, comprise silicon or the like. Furthermore, substrate 102 may have a second doping type. Additionally, in some embodiments, any of the first semiconductor region 110, the second semiconductor region 112, the guard ring semiconductor region 108, the contact semiconductor region 116, the isolation semiconductor region 114, and the PE semiconductor region 106 may, for example, comprise doped silicon or the like.

[0036] In some embodiments, either the first semiconductor region 110 or the contact semiconductor region 116 may be heavily doped (e.g., n+ or p+ doped). For example, either the first semiconductor region 110 or the contact semiconductor region 116 may have a doping density greater than 1 × 10⁻⁶. 18 cm -3 The doping concentration.

[0037] Furthermore, in some embodiments, any of the second semiconductor region 112, the guard ring semiconductor region 108, and the PE semiconductor region 106 may be lightly doped (e.g., n- or p-doped). For example, any of the second semiconductor region 112, the guard ring semiconductor region 108, and the PE semiconductor region 106 may, for example, have a doping density of about 1 × 10⁻⁶. 16 cm -3 Up to approximately 1×10 18 cm -3 The doping concentration.

[0038] In some embodiments, the PE semiconductor region 106 may, for example, have a width 106w of about 0.2 micrometers to 5 micrometers. Furthermore, the PE semiconductor region 106 may, for example, have a thickness 106t of about 0.2 micrometers to about 2 micrometers. In some embodiments, the guard ring semiconductor region 108 may, for example, have a thickness 108t of about 0.3 micrometers to about 2 micrometers or some other suitable value. In some embodiments, the distance 107 between the PE semiconductor region 106 and the guard ring semiconductor region 108 may, for example, be about 0.1 micrometers to about 1 micrometer or some other suitable value. In some embodiments, the width 106w of the PE semiconductor region 106 is approximately equal to the width 108w of the guard ring semiconductor region 108. Furthermore, in some embodiments, the thickness 102t of the substrate 102 may, for example, be about 2 micrometers to about 7 micrometers or some other suitable value.

[0039] Figure 3 A cross-sectional view 300 is shown of some embodiments of an image sensor in which the photosensitive enhancement (PE) semiconductor region 106 is located in a semiconductor well 104.

[0040] In such embodiments, the semiconductor well 104 extends from the front side 102f of the substrate 102 into the substrate 102. Furthermore, in such embodiments, the substrate 102 has a first doping type, and the semiconductor well 104 has a second doping type. In some embodiments, the thickness 104t of the semiconductor well 104 may be, for example, from about 2 micrometers to about 7 micrometers or some other suitable value.

[0041] In some embodiments, when measured from the center 103x of the photodetector 103, the radius 106o of the outer wall of the PE semiconductor region 106 is approximately equal to the radius 108o of the outer wall of the guard ring semiconductor region 108 (i.e., when viewed in cross-section, the outer wall of the PE semiconductor region 106 is perpendicularly aligned to the outer wall of the guard ring semiconductor region 108). Furthermore, in some embodiments, when measured from the center 103x of the photodetector 103, the radius 106i of the inner wall of the PE semiconductor region 106 is approximately equal to the radius 108i of the inner wall of the guard ring semiconductor region 108 (i.e., when viewed in cross-section, the inner wall of the PE semiconductor region 106 is perpendicularly aligned to the inner wall of the guard ring semiconductor region 108). This may be a result of using a common mask when forming the PE semiconductor region 106 and the guard ring semiconductor region 108. By using a common mask to form the PE semiconductor region 106 and the guard ring semiconductor region 108, the cost of manufacturing the image sensor can be reduced and / or the time required to manufacture the image sensor can be reduced.

[0042] Figures 4 to 6 Show Figure 3 Cross-sectional views 400 to 600 of some alternative embodiments of the image sensor.

[0043] In some embodiments (see, for example) Figure 4 The second semiconductor region 112 is laterally separated from the sidewall of the guard ring semiconductor region 108 by a non-zero distance 112d. By including a non-zero distance 112d between the second semiconductor region 112 and the guard ring semiconductor region 108, the high electric field at the pn junction 111 of the photodetector 103 can be reduced along the periphery of the pn junction 111. Therefore, the dark count rate of the photodetector 103 can be reduced, thereby improving the performance of the image sensor.

[0044] In some embodiments (see, for example) Figure 5 and Figure 6 The width (unmarked) of the PE semiconductor region 106 is greater than the width (unmarked) of the guard ring semiconductor region 108. By increasing the width of the PE semiconductor region 106, the active area of ​​the photodetector 103 can be further increased. Therefore, the performance of the image sensor can be further enhanced.

[0045] In some embodiments (see, for example) Figure 5The inner sidewall of the PE semiconductor region 106 is closer to the center 103x of the photodetector 103 than the inner sidewall of the guard ring semiconductor region 108, and the outer sidewall of the PE semiconductor region 106 is farther from the center 103x of the photodetector 103 than the outer sidewall of the guard ring semiconductor region 108. In other words, the radius 106o of the outer sidewall of the PE semiconductor region 106 is greater than the radius 108o of the outer sidewall of the guard ring semiconductor region 108, while the radius 106i of the inner sidewall of the PE semiconductor region 106 is smaller than the radius 108i of the inner sidewall of the guard ring semiconductor region 108.

[0046] In some embodiments (see, for example) Figure 6 The inner sidewall of the PE semiconductor region 106 and the inner sidewall of the guard ring semiconductor region 108 are at the same distance from the center 103x of the photodetector 103 (i.e., when viewed in cross-section, the inner sidewall of the PE semiconductor region 106 can be perpendicularly aligned with the inner sidewall of the guard ring semiconductor region 108), while the outer sidewall of the PE semiconductor region 106 is further away from the center 103x of the photodetector 103 than the outer sidewall of the guard ring semiconductor region 108. In other words, the radius 106o of the outer sidewall of the PE semiconductor region 106 is greater than the radius 108o of the outer sidewall of the guard ring semiconductor region 108, while the radius 106i of the inner sidewall of the PE semiconductor region 106 is approximately equal to the radius 108i of the inner sidewall of the guard ring semiconductor region 108.

[0047] Furthermore, in some embodiments (see, for example) Figure 6 Alternatively, trench isolation structure 120 can extend from the back side 102b of substrate 102 into isolation semiconductor region 114. In such embodiments, trench isolation structure 120 can electrically and / or optically isolate pixel 101 from adjacent pixels (not shown) along the boundary of photodetector 103.

[0048] Figure 7 A cross-sectional view 700 is shown of some embodiments of an image sensor in which the photosensitive enhancement (PE) semiconductor region 106 is adjacent to the guard ring semiconductor region 108.

[0049] In such embodiments, the diffusion region 702 exists in the semiconductor well 104 adjacent to the PE semiconductor region 106 at the guard ring semiconductor region 108. In some embodiments, the guard ring semiconductor region 108 intersects with the PE semiconductor region 106 at the diffusion region 702. In some other embodiments, the guard ring semiconductor region 108 and the PE semiconductor region 106 overlap at the diffusion region 702, such that the diffusion region includes atoms from both the guard ring semiconductor region 108 and the PE semiconductor region 106. This may be because, over time, the guard ring semiconductor region 108 diffuses toward the PE semiconductor region 106 into the semiconductor well 104, and the PE semiconductor region 106 diffuses toward the guard ring semiconductor region 108 into the semiconductor well 104, until the two regions intersect or overlap.

[0050] Figure 8 A cross-sectional view 800 is shown of some embodiments of a front-illuminated image sensor including a photosensitive enhancement (PE) semiconductor region 106.

[0051] In such embodiments, the color filter 122 and lens 124 extend along the front side 102f of the substrate 102 and are located above the interconnect structure 118. Radiation (e.g., photons or the like) can enter the image sensor through the lens 124, thereby illuminating the image sensor from the front.

[0052] Simultaneously refer to Figure 9 and Figure 10 , Figure 9 A cross-sectional view 900 is shown, illustrating some embodiments of an image sensor including a plurality of pixels arranged in a pixel array. Figure 10 Show Figure 9 Top view 1000 of some embodiments of the image sensor.

[0053] In such embodiments, the image sensor may, for example, include a 2×2 pixel array (e.g., first pixel 101a, second pixel 101b, third pixel 101c, and fourth pixel 101d). Pixel arrays of other dimensions are also feasible. In some embodiments, the first pixel 101a is adjacent to the second pixel 101b. A first photodetector 103a of the first pixel 101a is adjacent to and separated from a second photodetector 103b of the second pixel 101b by a trench isolation structure 120 extending along the boundary between the first pixel 101a and the second pixel 101b. In some embodiments, the trench isolation structure 120 surrounds and separates each of the photodetectors of the image sensor (e.g., first photodetector 103a, second photodetector 103b, third photodetector 103c, and fourth photodetector 103d).

[0054] Furthermore, in such embodiments, the PE semiconductor region 106 of the first pixel 101a is laterally adjacent to the PE semiconductor region 106 of the second pixel 101b. In some embodiments, the four PE semiconductor regions 106 may be arranged in a 2×2 array according to a 2×2 pixel array.

[0055] Figures 11 to 21 Cross-sectional views 1100 to 2100 show some embodiments of an image sensor including a photosensitive enhancement (PE) semiconductor region. Although Figures 11 to 21 It is about a method described, but it should be understood that, Figures 11 to 21 The structure disclosed herein is not limited to this method, but can exist independently as a structure independent of the method described herein.

[0056] like Figure 11 As shown in cross-sectional view 1100, a substrate 102 is provided. The substrate 102 may, for example, contain silicon or some other suitable material. Furthermore, the substrate 102 has a first doping type.

[0057] like Figure 12 As shown in cross-sectional view 1200, a semiconductor well 104 is formed in the substrate 102 along the front side 102f of the substrate 102. The semiconductor well 104 may be formed, for example, by an ion implantation process (e.g., indicated by arrow 1202), a diffusion process, or some other suitable process. Furthermore, the semiconductor well 104 has a second doping type opposite to the first doping type.

[0058] like Figure 13 As shown in the cross-sectional view 1300, a mask 1302 is formed above the substrate 102 along the front side 102f of the substrate 102, and with the mask 1302 in place, a PE semiconductor region 106 is formed at a first depth 1306 in the semiconductor well 104. The PE semiconductor region 106 may be formed, for example, by an ion implantation process (e.g., indicated by arrow 1304), a diffusion process, or some other suitable process. Furthermore, the PE semiconductor region 106 has a second doping type.

[0059] In some embodiments, mask 1302 may comprise photoresist, silicon oxide, silicon nitride, titanium oxide, titanium nitride, or some other suitable material.

[0060] like Figure 14 As shown in cross-sectional view 1400, a guard ring semiconductor region 108 is formed in the semiconductor well 104 along the front side 102f of the substrate 102. The guard ring semiconductor region 108 may be formed, for example, by an ion implantation process (e.g., indicated by arrow 1402), a diffusion process, or some other suitable process. Furthermore, the guard ring semiconductor region 108 has a first doping type.

[0061] In some embodiments, the guard ring semiconductor region 108 may be formed with the mask 1302 in place, such that the guard ring semiconductor region 108 and the PE semiconductor region 106 have the same top layout. In some other embodiments, the guard ring semiconductor region 108 may be formed with different masks (not shown) in place, such that the guard ring semiconductor region 108 and the PE semiconductor region 106 have different top layouts (see, for example, see...). Figure 5 and Figure 6 ).

[0062] like Figure 15 As shown in the cross-sectional view 1500, a mask 1502 is formed above the substrate 102 along the front side 102f of the substrate 102. Furthermore, a first semiconductor region 110 and a second semiconductor region 112 are formed in a semiconductor well 104 between the inner sidewalls of the guard ring semiconductor region 108 to establish a pn junction 111 in the semiconductor well 104. The first semiconductor region 110 is formed directly above the second semiconductor region 112. The first semiconductor region 110 and the second semiconductor region 112 may be formed, for example, by one or more ion implantation processes (e.g., indicated by arrow 1504), diffusion processes, or some other suitable processes. Furthermore, the first semiconductor region 110 has a first doping type, and the second semiconductor region 112 has a second doping type.

[0063] In some embodiments, mask 1502 may comprise photoresist, silicon oxide, silicon nitride, titanium oxide, titanium nitride, or some other suitable material.

[0064] In some embodiments, a common mask (e.g., mask 1502) may be used when forming both the first semiconductor region 110 and the second semiconductor region 112, such that both the first semiconductor region 110 and the second semiconductor region 112 have the same top layout. In some other embodiments, different masks (not shown) may be used when forming the first semiconductor region 110 and the second semiconductor region 112 to form a gap between the second semiconductor region 112 and the guard ring semiconductor region 108 (e.g., Figure 4 (112d). In such embodiments, the first semiconductor region 110 and the second semiconductor region 112 have different top layouts.

[0065] although Figures 13 to 15 It is shown that the PE semiconductor region 106 and the guard ring semiconductor region 108 are formed before the formation of the first semiconductor region 110 and the second semiconductor region 112. However, it should be understood that in some embodiments (not shown), the first semiconductor region 110 and the second semiconductor region 112 may be formed before the formation of the PE semiconductor region 106 and the guard ring semiconductor region 108 as another option.

[0066] like Figure 16As shown in cross-sectional view 1600, a mask 1602 is formed above substrate 102 along the front side 102f of substrate 102. Furthermore, with mask 1602 in place, an isolation semiconductor region 114 and a contact semiconductor region 116 are formed in semiconductor well 104. The isolation semiconductor region 114 and the contact semiconductor region 116 may be formed, for example, by one or more ion implantation processes (e.g., indicated by arrow 1604), diffusion processes, or some other suitable processes. The isolation semiconductor region 114 and the contact semiconductor region 116 have a second doping type.

[0067] In some embodiments, the formation of the contact semiconductor region 116 may be the final step in forming the photodetector 103.

[0068] like Figure 17 As shown in the cross-sectional view 1700, an interconnect structure 118 is formed above the substrate 102 along the front side 102f of the substrate 102. The interconnect structure can be formed, for example, by any of a deposition process, an etching process, a planarization process, or some other suitable process.

[0069] like Figure 18 As shown in the cross-sectional view 1800, the substrate 102 is rotated such that the back side 102b of the substrate 102 is above the front side 102f.

[0070] like Figure 19 As shown in the cross-sectional view 1900, a mask 1902 is formed above the substrate 102 along the back surface 102b of the substrate 102. Furthermore, with the mask 1902 in place, the substrate 102 and the semiconductor well 104 are patterned to form an isolation opening 1904 surrounding the photodetector 103.

[0071] like Figure 20 As shown in the cross-sectional view 2000, a dielectric material is deposited in the isolation opening 1904, and the dielectric material is planarized to form a trench isolation structure 120 in the isolation opening 1904. The dielectric material may, for example, comprise silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, some other suitable dielectric, or any combination thereof, and may be deposited by any of chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), spin coating, or some other suitable deposition process. Furthermore, the planarization process may, for example, include chemical mechanical planarization (CMP) or some other suitable planarization process.

[0072] Although the trench isolation structure 120 is shown as being formed from the back side 102b of the substrate, it should be understood that in some alternative embodiments, the trench isolation structure 120 may be formed from the front side 102f of the substrate 102 as another option before the interconnect structure 118 is formed along the front side 102f of the substrate 102.

[0073] like Figure 21 As shown in the cross-sectional view 2100, a color filter 122 is formed above the substrate 102 along the back surface 102b of the substrate 102. In addition, a lens 124 is formed above the color filter 122.

[0074] Although the color filter and lens 124 are shown as formed along the back surface 102b of the substrate 102, it should be understood that in some other embodiments (see, for example, see...) Figure 8 Alternatively, the color filter and lens 124 can be formed along the front side 102f of the substrate 102.

[0075] Figure 22 Flowcharts illustrating some embodiments of a method 2200 for forming an image sensor including a photosensitive enhancement (PE) semiconductor region are provided. Although method 2200 is shown and described below as a series of actions or events, it will be understood that the order in which these actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all actions shown may be necessary to implement one or more aspects or embodiments described herein. Additionally, one or more of the actions depicted herein may be performed in one or more separate actions and / or stages.

[0076] At 2202, a semiconductor well is formed in a first side of a substrate, the substrate having a first doping type, and the semiconductor well having a second doping type opposite to the first doping type. Figure 12 A cross-sectional view 1200 is shown, corresponding to some embodiments of action 2202.

[0077] At position 2204, a photosensitive enhancement semiconductor region is formed in the semiconductor well, the photosensitive enhancement semiconductor region having a second doping type. Figure 13 A cross-sectional view 1300 is shown, corresponding to some embodiments of action 2204.

[0078] At position 2206, a guard ring semiconductor region is formed in the semiconductor well directly above the photosensitive enhancement semiconductor region, and the guard ring semiconductor region has a first doping type. Figure 14 A cross-sectional view 1400 is shown, corresponding to some embodiments of action 2206.

[0079] At 2208, a first semiconductor region and a second semiconductor region are formed in a semiconductor well between the inner sidewalls of the guard ring semiconductor region to establish a pn junction in the semiconductor well. The first semiconductor region has a first doping type, and the second semiconductor region has a second doping type. Figure 15 A cross-sectional view 1500 is shown, corresponding to some embodiments of action 2208.

[0080] At 2210, a contact semiconductor region is formed in the semiconductor well and laterally around the guard ring semiconductor region, the contact semiconductor region having a second doping type. Figure 16 A cross-sectional view 1600 is shown, corresponding to some embodiments of action 2210.

[0081] Therefore, this disclosure relates to an image sensor including a photosensitive enhancement (PE) semiconductor region for improving the performance of the image sensor.

[0082] Therefore, in some embodiments, this disclosure relates to an image sensor comprising pixels along a substrate. Each pixel includes a first semiconductor region having a first doping type. A second semiconductor region is located directly above the first semiconductor region. The second semiconductor region has a second doping type opposite to the first doping type and intersects with the first semiconductor region at a pn junction. A ring-shaped third semiconductor region laterally surrounds the first and second semiconductor regions. The ring-shaped third semiconductor region has the first doping type. A ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. A ring-shaped fifth semiconductor region is located directly above the ring-shaped third semiconductor region and has the second doping type. In one embodiment, the ring-shaped fifth semiconductor region is perpendicularly separated from the ring-shaped third semiconductor region. In one embodiment, the doping concentration of the ring-shaped fifth semiconductor region is lower than the doping concentration of the first semiconductor region. In one embodiment, the ring-shaped third semiconductor region and the ring-shaped fifth semiconductor region are centered on a common axis. In one embodiment, a first distance between the outer wall of the annular fifth semiconductor region and the common axis is approximately equal to a second distance between the outer wall of the annular third semiconductor region and the common axis, and a third distance between the inner wall of the annular fifth semiconductor region and the common axis is approximately equal to a fourth distance between the inner wall of the annular third semiconductor region and the common axis. In one embodiment, the first distance between the outer wall of the annular fifth semiconductor region and the common axis is greater than the second distance between the outer wall of the annular third semiconductor region and the common axis. In one embodiment, the second semiconductor region is laterally separated from the annular third semiconductor region. In one embodiment, the annular fifth semiconductor region intersects with the annular third semiconductor region at a diffusion region. In one embodiment, the annular fourth semiconductor region is laterally separated from the annular third semiconductor region.

[0083] In other embodiments, this disclosure relates to an image sensor including a substrate. A semiconductor well is located in the substrate along a first side and has a first doping type. A first single-photon avalanche diode (SPAD) is located in the semiconductor well along the first side of the substrate. The first single-photon avalanche diode includes a first semiconductor region extending along the first side of the substrate and having a second doping type opposite to the first doping type. A second semiconductor region is located directly above the first semiconductor region and has the first doping type. The first semiconductor region intersects with the second semiconductor region at a pn junction. A guard ring semiconductor region extends along the first side of the substrate and has the second doping type. The guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region. A contact semiconductor region extends along the first side of the substrate and has the first doping type. The contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region by a first non-zero distance. A photosensitivity enhancement semiconductor region is located directly above the guard ring semiconductor region and has the first doping type. The photosensitivity enhancement semiconductor region is configured to expand the photon-sensitive region of the first single-photon avalanche diode. In one embodiment, the second semiconductor region is laterally separated from the guard ring semiconductor region by a non-zero distance. In one embodiment, the guard ring semiconductor region is adjacent to the first semiconductor region and the second semiconductor region along the sidewalls of the first semiconductor region and the second semiconductor region. In one embodiment, the photosensitive enhancement semiconductor region has an annular top arrangement and is perpendicularly separated from the guard ring semiconductor region by a non-zero distance, wherein the photosensitive enhancement semiconductor region and the guard ring semiconductor region are concentric. In one embodiment, the width of the photosensitive enhancement semiconductor region is approximately equal to the width of the guard ring semiconductor region. In one embodiment, the width of the photosensitive enhancement semiconductor region is greater than the width of the guard ring semiconductor region. In one embodiment, the image sensor further includes a second single-photon avalanche diode. The second single-photon avalanche diode is adjacent to the first single-photon avalanche diode and is laterally separated from the first single-photon avalanche diode by a trench isolation structure extending along the boundary between the first single-photon avalanche diode and the second single-photon avalanche diode, the second single-photon avalanche diode including another photosensitive enhancement semiconductor region.

[0084] In other embodiments, this disclosure relates to a method for forming an image sensor. The method includes forming a first semiconductor region and a second semiconductor region in a substrate. The first semiconductor region has a first doping type, and the second semiconductor region has a second doping type opposite to the first doping type. The first semiconductor region and the second semiconductor region intersect at a pn junction. A guard ring semiconductor region is formed in the substrate. The guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region. The guard ring semiconductor region has the first doping type. A contact semiconductor region is formed in the substrate. The contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region. The contact semiconductor region has the second doping type. A photosensitive enhancement semiconductor region is formed in the substrate. The photosensitive enhancement semiconductor region is located directly above the guard ring semiconductor region. The photosensitive enhancement semiconductor region has the second doping type. In one embodiment, the photosensitive enhancement semiconductor region is formed with a first mask in place, and the guard ring semiconductor region is subsequently formed with the first mask in place. In one embodiment, the photosensitive enhancement semiconductor region is formed with the first mask in place, and the guard ring semiconductor region is subsequently formed with a second mask in place, different from the first mask. In another embodiment, the first semiconductor region is formed with the first mask in place, and the second semiconductor region is formed with a second mask in place, different from the first mask, such that the first semiconductor region and the second semiconductor region have different top layouts.

[0085] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art will recognize that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or realize the same advantages as the embodiments described herein. Those skilled in the art should also recognize that these equivalent constructions do not depart from the spirit and scope of this disclosure, and that they can make various changes, substitutions, and modifications thereto without departing from the spirit and scope of this disclosure.

Claims

1. An image sensor comprising pixels along a substrate, said pixels including: The first semiconductor region has a first doping type; The second semiconductor region is located directly above the first semiconductor region. The second semiconductor region has a second doping type opposite to the first doping type and intersects with the first semiconductor region at the pn junction to form a single-photon avalanche diode. A ring-shaped protective ring semiconductor region, which laterally surrounds the first semiconductor region and the second semiconductor region, has the first doping type; A ring-shaped contact semiconductor region, which laterally surrounds the ring-shaped protective ring semiconductor region, the ring-shaped contact semiconductor region having the second doping type; as well as The annular photosensitive enhancement semiconductor region is located directly above the annular protective ring semiconductor region and has the second doping type.

2. The image sensor according to claim 1, wherein the annular photosensitive enhancement semiconductor region is perpendicularly separated from the annular protective ring semiconductor region.

3. The image sensor according to claim 1, wherein the doping concentration of the annular photosensitive enhancement semiconductor region is lower than the doping concentration of the first semiconductor region.

4. The image sensor according to claim 1, wherein the annular protective ring semiconductor region and the annular photosensitive enhancement semiconductor region are centered on a common axis.

5. The image sensor of claim 4, wherein the first distance between the outer wall of the annular photosensitive enhancement semiconductor region and the common axis is approximately equal to the second distance between the outer wall of the annular protective ring semiconductor region and the common axis, and wherein the third distance between the inner wall of the annular photosensitive enhancement semiconductor region and the common axis is approximately equal to the fourth distance between the inner wall of the annular protective ring semiconductor region and the common axis.

6. The image sensor of claim 4, wherein the first distance between the outer wall of the annular photosensitive enhancement semiconductor region and the common axis is greater than the second distance between the outer wall of the annular protective ring semiconductor region and the common axis.

7. The image sensor of claim 1, wherein the second semiconductor region is laterally separated from the annular protective ring semiconductor region.

8. The image sensor of claim 1, wherein the annular photosensitive enhancement semiconductor region intersects with the annular protective ring semiconductor region at the diffusion region.

9. The image sensor of claim 1, wherein the annular contact semiconductor region is laterally separated from the annular protective ring semiconductor region.

10. An image sensor, comprising: Substrate; A semiconductor well, located in the substrate along a first side of the substrate, and having a first doping type; as well as A first single-photon avalanche diode (SPAD), located in the semiconductor well along the first side of the substrate, comprises: A first semiconductor region extends along the first side of the substrate and has a second doping type opposite to the first doping type; A second semiconductor region is located directly above the first semiconductor region and has the first doping type, wherein the first semiconductor region intersects with the second semiconductor region at a pn junction; A guard ring semiconductor region extends along the first side of the substrate and has the second doping type, wherein the guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region; A contact semiconductor region extending along the first side of the substrate and having the first doping type, wherein the contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region by a first non-zero distance; and A photosensitive enhancement semiconductor region, located directly above the guard ring semiconductor region and having the first doping type, wherein the photosensitive enhancement semiconductor region is configured to expand the photon-sensitive region of the first single-photon avalanche diode.

11. The image sensor of claim 10, wherein the second semiconductor region is separated from the guard ring semiconductor by a non-zero distance in the lateral direction.

12. The image sensor of claim 10, wherein the guard ring semiconductor region is adjacent to the first semiconductor region and the second semiconductor region along the sidewall of the first semiconductor region and the sidewall of the second semiconductor region.

13. The image sensor of claim 10, wherein the photosensitive enhancement semiconductor region has an annular top arrangement and is perpendicularly separated from the guard ring semiconductor region by a non-zero distance, and wherein the photosensitive enhancement semiconductor region and the guard ring semiconductor region are concentric.

14. The image sensor of claim 13, wherein the width of the photosensitive enhancement semiconductor region is approximately equal to the width of the guard ring semiconductor region.

15. The image sensor of claim 13, wherein the width of the photosensitive enhancement semiconductor region is greater than the width of the guard ring semiconductor region.

16. The image sensor of claim 10, further comprising: A second single-photon avalanche diode is adjacent to the first single-photon avalanche diode and is laterally separated from the first single-photon avalanche diode by a trench isolation structure extending along the boundary between the first single-photon avalanche diode and the second single-photon avalanche diode, the second single-photon avalanche diode including another photosensitivity-enhancing semiconductor region.

17. A method for forming an image sensor, the method comprising: A first semiconductor region and a second semiconductor region are formed in a substrate, wherein the first semiconductor region has a first doping type and the second semiconductor region has a second doping type opposite to the first doping type, and wherein the first semiconductor region and the second semiconductor region intersect at a pn junction to form a single-photon avalanche diode. A guard ring semiconductor region is formed in the substrate, wherein the guard ring semiconductor region laterally surrounds the first semiconductor region and the second semiconductor region, and wherein the guard ring semiconductor region has the first doping type; A contact semiconductor region is formed in the substrate, wherein the contact semiconductor region laterally surrounds the guard ring semiconductor region and is laterally separated from the guard ring semiconductor region, and wherein the contact semiconductor region has the second doping type; as well as A photosensitive enhancement semiconductor region is formed in the substrate, wherein the photosensitive enhancement semiconductor region is located directly above the guard ring semiconductor region, and wherein the photosensitive enhancement semiconductor region has the second doping type.

18. The method of claim 17, wherein the photosensitive enhancement semiconductor region is formed with the first mask in place, and the guard ring semiconductor region is subsequently formed with the first mask in place.

19. The method of claim 17, wherein the photosensitive enhancement semiconductor region is formed with the first mask in place, and the guard ring semiconductor region is subsequently formed with a second mask in place, different from the first mask.

20. The method of claim 17, wherein the first semiconductor region is formed with the first mask in place, and the second semiconductor region is formed with a second mask in place, different from the first mask, such that the first semiconductor region and the second semiconductor region have different top layouts.

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