Single-die design for different polarizations

By using a mirror-symmetric design for the die and feeder configuration, the problems of RF loss and increased cost caused by polarization differences in millimeter-wave signal beamforming are solved, enabling efficient antenna array manufacturing and capacity expansion.

CN115149281BActive Publication Date: 2026-08-04NXP BV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NXP BV
Filing Date
2022-02-15
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

Existing millimeter-wave signal beamforming antenna arrays suffer from increased RF loss, manufacturing time, and cost due to polarization differences, and there are asymmetries and irregularities between dies or packages with different polarizations.

Method used

The die with a mirror symmetry design is divided into quadrants, each containing orthogonal receiver and transmitter ends, and orthogonal receiver and transmitter feed lines are used in combination with different polarization configurations to achieve mirror symmetry rotation and reduce asymmetry.

Benefits of technology

It reduces RF loss, improves manufacturing efficiency and lowers costs, while allowing the same die to be used to adapt to different polarization requirements, thus increasing the capacity of the antenna array.

✦ Generated by Eureka AI based on patent content.

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Abstract

An integrated circuit includes a package, a phased antenna array, and a die. The die includes a plurality of unit cells, where each unit cell is divided into quadrants. Each quadrant includes a receiver end on a first axis and a transmitter end on a second axis, where the first axis is orthogonal to the second axis, and there is mirror symmetry between nearest neighboring quadrants in the unit cell. The package includes a plurality of pairs of feed lines, each pair of feed lines including a receiver feed line and a transmitter feed line. The receiver feed line is connected to one of the receiver ends, and the transmitter feed line is connected to the transmitter end in the same die quadrant. The receiver feed line is orthogonal to the transmitter feed line. Each antenna element is coupled to a respective pair of feed lines.
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Description

Technical Field

[0001] This specification relates to integrated circuits, which include packages, phased antenna arrays, and dies, wherein the same die can be used in combination with different antenna polarizations. Background Technology

[0002] For beamforming millimeter-wave signals, the required antenna array may be too large to be contained within a single die. Therefore, packages containing multiple dies are known to control the antenna array. It is also known to place two or more packages close together on a printed circuit board, each package including an antenna subarray, to form a larger antenna array. To increase capacity, some antenna subarrays can operate in horizontal polarization, while others can operate in vertical polarization.

[0003] Typically, antenna arrays or subarrays operating under vertical polarization require different dies than those operating under horizontal polarization. This is because the layout of connections within the package, such as antenna feed lines and transmission lines, varies depending on the antenna polarization, which in turn requires different die-end layouts.

[0004] Any asymmetry or irregularity between dies or packages in an array can lead to RF loss and reduced array performance. Additionally, differences in the dies or packages required for different polarizations increase manufacturing time and cost. Summary of the Invention

[0005] According to one aspect of this disclosure, an integrated circuit is provided, the integrated circuit comprising: a package, a phased antenna array including a plurality of antenna elements, and a die housed within the package. The die includes a plurality of unit cells, wherein each unit cell is divided into quadrants, and each quadrant includes a receiver end located on a first axis of the quadrant and a transmitter end located on a second axis of the quadrant, wherein the first axis is orthogonal to the second axis, and wherein the positions of the receiver end and the transmitter end in the nearest adjacent quadrant of a given unit cell are mirror-symmetric. The package includes multiple pairs of feeds, each pair of feeds including a receiver feed and a transmitter feed, wherein the receiver feed is connected to one of the receiver ends, and the transmitter feed is connected to the transmitter end in the same quadrant of the die, wherein the receiver feed and the transmitter feed are orthogonal. Each antenna element of the phased antenna array is coupled to a corresponding pair of feeds to drive a receiver channel and a transmitter channel.

[0006] It should be understood that the quadrant of each unit cell of the die can be of any shape. The quadrant is not limited to square or rectangular.

[0007] The nearest neighbor quadrant of a given quadrant is the quadrant that is adjacent to the given quadrant, excluding those quadrants that are diagonally adjacent.

[0008] The first and second axes in the nearest neighbor quadrant of a given unit cell can have mirror symmetry.

[0009] Throughout this disclosure, the term 'package' is used interchangeably with 'integrated circuit package'.

[0010] The phased antenna array can be housed within a package, therefore the package can be an antenna-in-package (AiP) package or a launcher-in-package (LiP) package. In other embodiments, the phased antenna array can be provided outside the package. The package can be an antenna-on-package (AoP) package, or the antenna array can be attached to the package as a package-on-package (PoP).

[0011] Optionally, the phased antenna array may include a patch antenna array, such that each antenna element may include a patch antenna. However, any type of phased antenna array may be used.

[0012] Optionally, each antenna element is aligned with a corresponding quadrant in the die.

[0013] Each receiver feeder can be connected to the corresponding receiver terminal on the die via a stripline connection or other electrical connection. Each transmitter feeder can be connected to the corresponding transmitter terminal on the die via a stripline connection or other electrical connection.

[0014] The multiple pairs of feeders may have a first configuration and a second configuration. The feeder configuration may be fixed during package manufacturing so that the feeders cannot be reconfigured during the use of the integrated circuit. Optionally, in the first configuration, the receiver channel may have horizontal polarization and the transmitter channel may have vertical polarization. In the second configuration, the receiver channel may have vertical polarization and the transmitter channel may have horizontal polarization.

[0015] Therefore, the die end remains in the same fixed position, regardless of whether the antenna feed line in the package is in the first configuration or the second configuration.

[0016] Optionally, each pair of feeders is rotated relative to the second configuration in the first configuration. In some embodiments, each pair of feeders may be rotated 90° between the first and second configurations.

[0017] In the first configuration, each receiver feeder can be rotated 90° relative to the position of the receiver feeder in the second configuration about the corresponding receiver die end. In the first configuration, each transmitter feeder can be rotated 90° relative to the position of the transmitter feeder in the second configuration about the corresponding transmitter die end.

[0018] Optionally, in the first configuration, each receiver feeder may be horizontally oriented, and each transmitter feeder may be vertically oriented. Optionally, in the second configuration, each receiver feeder may be vertically oriented, and each transmitter feeder may be horizontally oriented.

[0019] Optionally, the package includes multiple unit cells, and each unit cell is divided into quadrants. Each quadrant may include one pair of feed lines from the plurality of feed pairs, and each unit cell of the package may cover a corresponding unit cell of the die.

[0020] The orientation of the pair of feed lines in the nearest neighbor quadrant of each unit cell of the package may have mirror symmetry.

[0021] Each pair of feeders can rotate around the center of the quadrant between the first and second configurations.

[0022] In the first configuration, each pair of feeders can be rotated 90° relative to the second configuration in a direction opposite to the nearest adjacent quadrant in the unit cell of the package.

[0023] For example, a pair of feeds in the first and third quadrants of a given unit cell of the package may be rotated 90° counterclockwise relative to the first configuration in the second configuration. A pair of feeds in the second and fourth quadrants of the same unit cell may be rotated 90° clockwise relative to the first configuration in the second configuration.

[0024] Optionally, the first axis and the second axis are each axes of symmetry of the core quadrant. Optionally, the first axis and the second axis are each diagonal axes.

[0025] Optionally, in each quadrant of the die, the receiver end and the transmitter end are aligned along a third axis. In some embodiments, the third axis may be at a 45° angle relative to the first axis and the second axis.

[0026] Each unit cell of the die may include a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant. The layout (or numbering) of the quadrants follows standard mathematical conventions, as shown in the attached diagram. Figure 1 As shown in the diagram. Within each unit cell, mirror symmetry may exist between the following: the first quadrant and the second quadrant; the second quadrant and the third quadrant; the third quadrant and the fourth quadrant; and the fourth quadrant and the first quadrant.

[0027] Optionally, the die is configured to apply a phase shift, such as a 180-degree phase shift, to the signal processed by the receiver channel and / or transmitter channel of the antenna array. The die may include phase shifter circuitry.

[0028] In some embodiments, a plurality of dies may be housed in or mounted in a package. Each die includes at least one unit cell, wherein each unit cell is divided into quadrants, and each quadrant includes a receiver end located on a first axis of the quadrant and a transmitter end located on a second axis of the quadrant, wherein the first axis is orthogonal to the second axis, and wherein the positions of the receiver end and the transmitter end in the nearest adjacent quadrant of the unit cell are mirror-symmetric.

[0029] Optionally, the multiple dies may be identical. In any embodiment of this disclosure, each of the dies may be as described above.

[0030] Optionally, in each pair of feeders, the receiver feeder has the same dimensions as the transmitter feeder.

[0031] Optionally, each receiver feeder has the same dimensions as each transmitter feeder.

[0032] Optionally, the integrated circuit may include multiple packages, wherein the packages are as described in any embodiment of this disclosure.

[0033] In a second aspect, this disclosure provides a semiconductor device comprising a plurality of integrated circuits arranged to form an array, wherein each integrated circuit is as defined in any embodiment or example of the first aspect of the invention.

[0034] Alternatively, each integrated circuit may be referred to as a multi-package module, wherein each multi-package module comprises multiple packages.

[0035] An array of integrated circuits may include multiple columns and multiple rows.

[0036] In some embodiments, in each integrated circuit in the first column of the array, each pair of antenna feed lines may be in a first configuration such that the antenna array has a first polarization. In each integrated circuit in the second column of the array adjacent to the first column, each pair of antenna feed lines may be in a second configuration such that the antenna array has a second polarization.

[0037] In some embodiments, in each integrated circuit in the first row of the array, each pair of antenna feed lines may be in a first configuration such that the antenna array has a first polarization. In each integrated circuit in the second row of the array adjacent to the first row, each pair of antenna feed lines may be in a second configuration such that the antenna array has a second polarization.

[0038] In a third aspect, this disclosure provides a method of manufacturing an integrated circuit. The method includes providing a die comprising a plurality of unit cells, wherein each unit cell is divided into quadrants, and each quadrant includes a receiver end located on a first axis of the quadrant and a transmitter end located on a second axis of the quadrant, wherein the first axis is orthogonal to the second axis, and wherein the positions of the receiver end and the transmitter end in the nearest adjacent quadrant of the unit cell are mirror-symmetric. The method further includes providing a phased antenna array comprising a plurality of antenna elements and assembling a package, wherein assembling the package includes: encasing the die in the package; providing a plurality of pairs of feeds, each pair of feeds including a receiver feed and a transmitter feed; connecting the receiver feed to one of the receiver ends and connecting the transmitter feed to the transmitter end in the same quadrant of the die, wherein the receiver feed and the transmitter feed are orthogonal; and coupling each antenna element of the phased antenna array to a corresponding pair of feeds to drive a receiver channel and a transmitter channel.

[0039] Optionally, the method may include providing a plurality of dies and encapsulating the plurality of dies in the package, wherein each of the dies is as described above. The plurality of dies may be identical.

[0040] Optionally, the method may be a method of manufacturing an integrated circuit according to any embodiment of this disclosure.

[0041] In another aspect, this disclosure provides a semiconductor die configured for beamforming a phased antenna array, the die comprising a plurality of unit cells, wherein each unit cell is divided into quadrants, and each quadrant includes: a receiver end located on a first axis of the quadrant; and a transmitter end located on a second axis of the quadrant, wherein the first axis is orthogonal to the second axis, wherein the receiver end and the transmitter end are configured to be connected to antenna elements of the phased antenna array; and wherein the positions of the receiver end and the transmitter end in adjacent quadrants of the unit cell have mirror symmetry.

[0042] The term 'nearest neighbor' can be used interchangeably with 'neighbor'.

[0043] Optionally, the first axis and the second axis are each axes of symmetry of the core quadrant. Optionally, the first axis and the second axis are each diagonal axes.

[0044] Optionally, in each quadrant of the die, the receiver end and the transmitter end are aligned along a third axis. In some embodiments, the third axis may be at a 45° angle relative to the first axis and the second axis.

[0045] Each unit cell of the die may include a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant. The layout (or numbering) of the quadrants follows standard mathematical conventions, as shown in the attached diagram. Figure 1 As shown in the diagram. Within each unit cell, mirror symmetry may exist between the following: the first quadrant and the second quadrant; the second quadrant and the third quadrant; the third quadrant and the fourth quadrant; and the fourth quadrant and the first quadrant.

[0046] Optionally, the die is configured to apply a phase shift, such as a 180-degree phase shift, to the signal processed by the receiver channel and / or transmitter channel of the antenna array. The die may include phase shifter circuitry.

[0047] It should be understood that the die may be as defined in any of the examples or embodiments above in this disclosure. Attached Figure Description

[0048] The illustrative embodiments of this disclosure will be described below by way of example only with reference to the accompanying drawings, in which the same reference numerals refer to the same elements, and wherein:

[0049] Figure 1 It is a prior art drawing showing circles and squares divided into quadrants, illustrating the standard conventions for numbering quadrants;

[0050] Figure 2 A schematic illustration shows a die divided into multiple unit cells according to an embodiment of the present disclosure;

[0051] Figure 3 Show Figure 2 A schematic diagram of a single unit of the die in the process;

[0052] Figure 4 A schematic illustration of a package comprising multiple unit cells according to an embodiment of the present disclosure is shown;

[0053] Figure 5 Showing the first configuration Figure 4 A unit of encapsulation in the package;

[0054] Figure 6 Show coverage Figure 3 die unit Figure 5 The packaging unit;

[0055] Figure 7 Showing the second configuration Figure 4 A unit of encapsulation in the package;

[0056] Figure 8 Show coverage Figure 3 die unit Figure 7 The packaging unit;

[0057] Figure 9 Schematic illustrations of a first package and a second package according to embodiments of the present disclosure are shown;

[0058] Figure 10 A schematic illustration of a 4×2 array of integrated circuits according to embodiments of the present disclosure; and

[0059] Figure 11 A schematic illustration of a 2×3 array of integrated circuits according to an embodiment of the present disclosure is shown. Detailed Implementation

[0060] Embodiments of this disclosure are described below with reference to the accompanying drawings. It should be understood that the drawings are schematic illustrations and are not drawn to scale.

[0061] Figure 1 This diagram illustrates circles and squares dividing quadrants by two orthogonal axes. Therefore, as shown, the shape of a quadrant does not necessarily have to be a square. This diagram is provided to illustrate the standard quadrant numbering convention. By convention, the upper right quadrant is designated as Quadrant 1, the upper left quadrant as Quadrant 2, the lower left quadrant as Quadrant 3, and the lower right quadrant as Quadrant 4. This numbering convention will be followed throughout this disclosure.

[0062] Figure 2 This is a schematic representation of a die 10 according to an embodiment of the present disclosure. The die 10 may be a beamforming chip. The die 10 is divided into a plurality of unit cells 15. Each unit cell 15 may be the same size and shape. It should be understood that, although... Figure 2 The die 10 is shown as a 4×4 array of unit cells, but this is not limiting. The die 10 may include any number of unit cells 15.

[0063] Figure 3 This is a close-up view of a unit cell 15 of the die 10. Unit cell 15 can be considered as being divided into four quadrants: Quadrant 11, Quadrant 12, Quadrant 13, and Quadrant 14. It should be understood that the lines dividing unit cell 15 into quadrants can be mathematically constructed, as there may be no physical barriers or divisions. The nearest neighbor quadrant within a unit cell is the quadrant immediately adjacent to a given quadrant. For example, for Quadrant 11, the nearest neighbor quadrants are Quadrant 12 and Quadrant 14, but not Quadrant 13.

[0064] like Figure 3 As shown, each quadrant includes a receiver end 16 and a transmitter end 18. Each receiver end 16 is a coaxial input connection for a receiver channel of an antenna element, and each transmitter end 18 is a coaxial output connection for a transmitter channel of an antenna element.

[0065] In each quadrant 11 to 14, receiver end 16 is located on a first axis A and transmitter end 18 is located on a second axis B. The first axis A and the second axis B are orthogonal. In this embodiment, the first axis A and the second axis B are diagonal axes. In each quadrant 11 to 14, receiver end 16 and transmitter end 18 are also aligned along a third axis C of the quadrant, where the third axis C intersects the first axis A and the second axis B. In this embodiment, the third axis C may form an angle of approximately 45° relative to the first axis A and the second axis B. It should be understood that the first axis A, the second axis B, and the third axis C are mathematically constructed.

[0066] like Figure 3 As shown, the receiver end 16 and the transmitter end 18 are not in the same position in each quadrant 11 to 14 of the unit cell 15. In other words, the orientation of the first axis A and the second axis B is not the same in all quadrants of the unit cell 15.

[0067] The positions of the receiver 16 and transmitter 18 in the first quadrant 11 of unit 15 are mirror-symmetric with the positions of the receiver 16 and transmitter 18 in the nearest adjacent second quadrant 12 and fourth quadrant 14. The positions of the receiver 16 and transmitter 18 in the second quadrant 12 of unit 15 are mirror-symmetric with the positions of the receiver 16 and transmitter 18 in the nearest adjacent third quadrant 13 and first quadrant 11. The positions of the receiver 16 and transmitter 18 in the third quadrant 13 of unit 15 are mirror-symmetric with the positions of the receiver 16 and transmitter 18 in the nearest adjacent second quadrant 12 and fourth quadrant 14. The positions of the receiver 16 and transmitter 18 in the fourth quadrant 14 of unit 15 are mirror-symmetric with the positions of the receiver 16 and transmitter 18 in the nearest adjacent third quadrant 13 and first quadrant 11.

[0068] Therefore, the orientation of the first axis A and the second axis B in the nearest neighbor quadrant of unit cell 15 has mirror symmetry.

[0069] Figure 4 This is a schematic representation of a first package 20. In this embodiment, the package includes, for example, a chip 27 of a up / down converter (UDC) and a plurality of unit cells 25. To form an integrated circuit, at least one die 10 is mounted in the first package 20. The first package 20 may include an antenna array, or an antenna array may be attached to the first package 20. When the die 10 is mounted in the first package 20, each unit cell 15 of the die may be aligned with a unit cell 25 of the package. Alternatively, the first package 20 may be configured to accommodate a plurality of dies 10. Each die 10 may include a plurality of unit cells 15. For example, see reference... Figure 2Instead of a single die 10 comprising sixteen unit cells, a package may comprise an array of four dies 10 (e.g., a 2×2 array), each die 10 comprising four unit cells 15. Each unit cell 25 of the package may be aligned with one die unit cell 15.

[0070] Figure 5 A close-up view of a package unit cell 25 in the first configuration is shown. Figure 5 The diagram shows the first axis A and the second axis B of the die quadrant to illustrate how the package unit 25 is aligned with the corresponding die unit 15. The package unit 25 can be considered as being divided into four quadrants: first quadrant 21, second quadrant 22, third quadrant 23, and fourth quadrant 24. It should be understood that the lines dividing the unit 25 into quadrants can be mathematically constructed, as there may be no physical barriers or divisions between the quadrants.

[0071] Each quadrant 21 to 24 of unit cell 25 includes a pair of feed lines, wherein each pair of feed lines includes a receiver feed line 26 and a transmitter feed line 28. In each pair, the receiver feed line 26 is orthogonal to the transmitter feed line 28.

[0072] Each receiver feeder 26 is configured to connect to one of the receiver ends 16 of the die, and each transmitter feeder 28 is configured to connect to one of the transmitter ends 18 of the die. Figure 5 As shown, each feeder is coupled to a connector 29, such as a stripline connector 29. Connector 29 connects receiver feeder 26 and transmitter feeder 28 to the receiver end 16 and transmitter end 18 of the respective die.

[0073] In use, a phased antenna array comprising multiple antenna elements 32 is embedded in or connected to the first package 20. The phased antenna array may be a patch antenna array. When the integrated circuit is fully assembled, each antenna element 32 (e.g., a patch antenna) may be aligned with one quadrant of the package unit cell 25, and therefore also with one quadrant of the die unit cell 15. Figure 5 The outline of antenna element 32 is shown to illustrate how the antenna array aligns to cover the package unit cell 25. Each pair of receiver feed lines 26 and transmitter feed lines 28 is arranged to connect to a corresponding one of the antenna elements 32. Thus, receiver feed line 26 drives the receiver channel of the phased antenna array, and transmitter feed line 28 drives the transmitter channel of the phased antenna array.

[0074] exist Figure 5 In the diagram, receiver feed 26 and transmitter feed 28 are shown in a first configuration, wherein receiver feed 26 is oriented with respect to the horizontal polarization of the antenna array receiver channel, and transmitter feed 28 is oriented with respect to the vertical polarization of the antenna array transmitter channel.

[0075] There is a mirror symmetry between the orientations of a pair of receiver feed lines 26 and transmitter feed lines 28 in the nearest neighbor quadrant of unit cell 25. Therefore, as Figure 5 As shown, mirror symmetry exists between the following quadrants: first quadrant 21 and second quadrant 22; second quadrant 22 and third quadrant 23; third quadrant 23 and fourth quadrant 24; and fourth quadrant 24 and first quadrant 21. Receiver feed 26, transmitter feed 28, and connector 29 are preferably of the same size in each quadrant 21 to 24 of the unit element 25. This provides symmetry and reduces irregularities, thereby improving the performance of the antenna array.

[0076] It should be understood that Figure 5 For illustrative purposes only, and therefore the receiver feed 26, transmitter feed 28, and connector 29 may not be housed in a single layer of the first package 20.

[0077] Figure 6 The unit cell 15 covering the die 10 is shown. Figure 5 The package unit 25 (i.e., when each die 10 is mounted in the first package 20). As shown, each receiver feed 26 is connected to a corresponding one in the receiver end 16 via a connector 29. Each transmitter feed 28 is connected to a corresponding one in the transmitter end 18 via a connector 29.

[0078] Figure 7 The package unit 25 in a second configuration is shown. In this second configuration, the receiver feed 26 is oriented with respect to the vertical polarization of the antenna array receiver channel, and the transmitter feed 28 is oriented with respect to the horizontal polarization of the antenna array transmitter channel.

[0079] In the second configuration, the orientation of each pair of receiver feeders 26 and transmitter feeders 28 has been relative to the first configuration. Figure 5 (As shown in the diagram) The feed lines have been rotated 90° clockwise from the center of the first configuration around the quadrant in the first configuration to reach the second configuration. In the second quadrant 22 and the fourth quadrant 24, the feed lines have been rotated 90° counterclockwise from the center of the first configuration around the quadrant to reach the second configuration. However, in the second configuration, mirror symmetry still exists between the nearest adjacent quadrants, just as it does in the first configuration.

[0080] In some embodiments, rotating the receiver feed line 26 and the transmitter feed line 28 may only require altering a single-layer structure in the first package 20 during the package manufacturing process. This is a very simple and therefore efficient and relatively inexpensive modification for the package.

[0081] Figure 8The unit cell 15 covering the die 10 is shown. Figure 7 The package unit 25 (i.e., when each die 10 is mounted in the first package 20). As shown, each receiver feed 26 is connected to a corresponding one in the receiver end 16 via a corresponding connector 29. Each transmitter feed 28 is connected to a corresponding one in the transmitter end 18 via a corresponding connector 29.

[0082] Figure 6 and 8 The comparison shows that the receiver end 16 and transmitter end 18 of the die are in the same position, so the same die can be used when the package feed is in either the first or second configuration. This improves the cost and efficiency of manufacturing integrated circuits or packages because the same die can be used for different antenna polarizations.

[0083] Optionally, die 10 includes a phase shifter circuit (not shown). The phase shifter circuit can be configured to selectively apply a phase shift to a signal processed by the receiver channel (i.e., receiver feed) and / or transmitter channel (i.e., transmitter feed) of the antenna array. In some embodiments, the phase shifter circuit can be activated only in one of a first configuration or a second configuration. For example, in such a configuration... Figure 8 In the second configuration shown, die 10 can apply a 180° phase shift to the signal processed by the transmitter channel.

[0084] Figure 9 The diagram shows multiple unit cells 25 and UDC 27 (as shown). Figure 4 The diagram shows a first package 20 and a second package 120 comprising multiple unit cells 125 and UDC 127. The second package 125 may be identical to the first package 20. The first package 20 is mounted adjacent to the second package 120 to form a multi-package module. The second package 120 may be rotated 180° relative to the first package 20. Similarly, the multi-package module may be referred to as integrated circuit 100, which includes the first package 20 and the second package 120. Therefore, the antenna arrays (not shown) of the first package 20 and the second package 120 may be subarrays that together form a larger antenna array.

[0085] A method for forming an integrated circuit 100 from at least a first package and a second package is described in detail in European Patent Application No. EP21157067.6. The method taught therein is incorporated herein by reference.

[0086] The receiver feed 26 and transmitter feed 28 of the first package 20 and the second package 120 can be in the same configuration. For example, both packages can be in either the first or the second configuration.

[0087] Figure 10A schematic illustration shows a semiconductor device 50 comprising a 4×2 array of integrated circuits 100 to 800. Each integrated circuit 100 to 800 may include a first package 20, at least one die 10, and a phased antenna array (not shown) as described above. It should be understood that the array may have any size. In some embodiments, each integrated circuit 100, 300, 500, 700 in the first column of the array may have a first polarization, and each integrated circuit 200, 400, 600, 800 in the second column of the array may have a second polarization. For example, in each integrated circuit 100, 300, 500, 700 in the first column, each pair of receiver feed lines 26 and transmitter feed lines 28 in the package may be in a first configuration (e.g., Figure 5 In the second column, for each integrated circuit 200, 400, 600, 800, the respective pairs of receiver feeds 26 and transmitter feeds 28 in the package can be in a second configuration (e.g., ...). Figure 7 (In the middle), or vice versa. This can increase the overall capacity of the antenna array. Multiple dies 10 in each integrated circuit can be identical.

[0088] Alternatively, each integrated circuit 100 to 800 can be a multi-package module including at least a first package and a second package, such as Figure 9 As shown in the image.

[0089] Figure 11 A schematic illustration shows another embodiment of the semiconductor device 50. The semiconductor device 50 includes a 2×3 array of integrated circuits 100 to 600.

[0090] In some embodiments, each integrated circuit 100, 200, 300 in the first row of the array may have a first polarization, and each integrated circuit 400, 500, 600 in the second row of the array may have a second polarization. For example, in each integrated circuit 100, 200, 300 in the first row, each pair of receiver feed lines 26 and transmitter feed lines 28 in the package may be in a first configuration (e.g., Figure 5 In the second row, for each integrated circuit 400, 500, 600, the receiver feed 26 and transmitter feed 28 in the package can be in a second configuration (e.g., ...). Figure 7 (In the middle), or vice versa. This can increase the overall capacity of the antenna array. Multiple dies 10 in each integrated circuit can be identical.

[0091] This disclosure can reduce, for example, Figure 10 and 11 The irregularities and asymmetries in the array of multiple integrated circuits shown are due to the fact that the same die can be used in the integrated circuits regardless of the required polarization of the antenna array. Furthermore, allowing the use of the same die in different package configurations reduces costs and improves the efficiency of the manufacturing process.

[0092] Therefore, an integrated circuit has been described comprising a package, a phased antenna array including multiple antenna elements, and a die housed within the package. The die includes multiple unit cells, each unit cell being divided into quadrants, and each quadrant including a receiver end located on a first axis of the quadrant and a transmitter end located on a second axis of the quadrant, wherein the first axis is orthogonal to the second axis, and wherein there is mirror symmetry between the nearest adjacent quadrants in the unit cells. The package includes multiple pairs of feeds, each pair including a receiver feed and a transmitter feed, wherein the receiver feed is connected to one of the receiver ends, and the transmitter feed is connected to the transmitter end in the same quadrant of the die, wherein the receiver feed and the transmitter feed are orthogonal. Each antenna element of the phased antenna array is coupled to a corresponding pair of feeds to drive a receiver channel and a transmitter channel of the phased antenna array.

Claims

1. An integrated circuit, characterized in that, include: Encapsulation; A phased antenna array, which includes multiple antenna elements; as well as A die, which is housed within the package; The die comprises multiple unit cells, each unit cell being divided into quadrants, and each quadrant comprising: The receiver end is located on the first axis of the quadrant; and The transmitter end is located on the second axis of the quadrant, wherein the first axis is orthogonal to the second axis. Among them, there is mirror symmetry between the nearest neighbor quadrants in the unit cell; The package includes: Multiple pairs of feed lines, each pair including a receiver feed line and a transmitter feed line, wherein the receiver feed line is connected to one of the receiver ends, and the transmitter feed line is connected to the transmitter end in the same quadrant of the die, wherein the receiver feed line is orthogonal to the transmitter feed line; and Each antenna element of the phased antenna array is coupled to a corresponding pair of feed lines to drive the receiver channel and the transmitter channel.

2. The integrated circuit according to claim 1, characterized in that, The multiple pairs of feeders have a first configuration and a second configuration, wherein: In the first configuration, the receiver channel has horizontal polarization and the transmitter channel has vertical polarization; and In the second configuration, the receiver channel has vertical polarization and the transmitter channel has horizontal polarization.

3. The integrated circuit according to claim 2, characterized in that, Each pair of feeders is rotated 90° relative to the second configuration in the first configuration.

4. The integrated circuit according to claim 2 or claim 3, characterized in that, The package comprises multiple unit cells, and each unit cell is divided into quadrants, wherein: Each quadrant includes one pair of feed lines from the plurality of feed lines; Each unit cell of the package covers the corresponding unit cell of the die; and Each pair of feeders in the first configuration is rotated 90° relative to the second configuration in a direction opposite to the nearest neighbor quadrant in the unit cell.

5. The integrated circuit according to any one of claims 1 to 3, characterized in that, The package comprises multiple unit cells, and each unit cell is divided into quadrants, wherein: Each quadrant includes one pair of feed lines from the plurality of feed lines; and Each unit cell of the package covers the corresponding unit cell of the die.

6. The integrated circuit according to claim 5, characterized in that, The orientation of the pair of feed lines in the nearest neighbor quadrant of each unit cell of the package is mirror symmetric.

7. The integrated circuit according to claim 1, characterized in that, The die includes a phase shifter circuit, wherein the phase shifter circuit is configured to apply a 180-degree phase shift to the signal processed by the receiver channel and / or the transmitter channel.

8. The integrated circuit according to claim 1, characterized in that, Additionally, the package includes a plurality of dies, each die comprising at least one unit cell, each unit cell being divided into quadrants, and each quadrant comprising: The receiver end is located on the first axis of the quadrant; and The transmitter end is located on the second axis of the quadrant, wherein the first axis is orthogonal to the second axis. The positions of the receiver end and the transmitter end in the nearest neighbor quadrant of the unit cell are mirror-symmetric.

9. A semiconductor device, characterized in that, include: A plurality of integrated circuits arranged to form an array, wherein each integrated circuit is as defined in any of the preceding claims.

10. A method for manufacturing an integrated circuit, characterized in that, include: A die is provided, wherein the die comprises a plurality of unit cells, wherein each unit cell is divided into quadrants, and each quadrant comprises: The receiver end is located on the first axis of the quadrant; and The transmitter end is located on the second axis of the quadrant, wherein the first axis is orthogonal to the second axis. The positions of the receiver end and the transmitter end in the nearest neighbor quadrant of the unit cell are mirror-symmetric. Provide a phased antenna array comprising multiple antenna elements; and Assemble the package, wherein assembling the package includes: The die is encapsulated in the package; Multiple feeder pairs are provided, each pair including a receiver feeder and a transmitter feeder. The receiver feed line is connected to one of the receiver terminals and the transmitter feed line is connected to the transmitter terminal in the same quadrant of the die, wherein the receiver feed line and the transmitter feed line are orthogonal; and Each antenna element of the phased antenna array is coupled to a corresponding pair of feed lines to drive the receiver channel and the transmitter channel.