System in the loop testing of adas socs
Patent Information
- Application Number
- CN202180016429.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-03-04
- Filing Date
- 2021-03-05
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2041-03-05
Smart Images

Figure CN115152185B_ABST
Abstract
Description
Background Technology
[0001] Advanced Driver Assistance Systems (ADAS) are vehicle-based systems that collect information about the vehicle's surroundings to provide safety and comfort for the driver. The information collected can help warn the driver or automatically take appropriate actions, such as emergency braking, collision warning, object detection, lane departure warning, lane keeping assist, traffic sign recognition, and autonomous driving. ADAS can include electronic control units (ECUs), various system-on-a-chip (SoCs), microcontrollers (MCUs), monolithic microwave integrated circuits (MMICs), processors, memory, data storage systems, and other components.
[0002] Testing the SoC, integrated circuits (ICs), or other systems within ADAS is crucial for ensuring the reliability and safety of ADAS. Performing System-in-the-Loop (SIL) testing tests some or all of the components of an ADAS in operation to ensure that these components work together without failure. SIL testing is also known as hardware-in-the-loop testing or software-in-the-loop testing. SIL testing reduces the time and cost of testing complex systems in their actual use field. To perform SIL testing, data is captured from sensors in a real-world environment and stored in memory. The data is then used in a test environment to determine if the ADAS and its algorithms (including hardware and software aspects) are functioning correctly and to identify any system faults within the ADAS. Summary of the Invention
[0003] In some examples, a system includes an interface configured to communicate via a group of virtual channels. The interface is also configured to store a table containing entries mapping virtual channel groups to address groups. The interface is configured to use this table to provide packets received via a first virtual channel of the virtual channel group for storage at a first address in the address group. The system also includes a data modification module (DMM) coupled to the interface and configured to cause the interface to modify the entries in the table.
[0004] In some examples, a system includes a playback system comprising a controller. The system also includes a microcontroller for the ADAS. The microcontroller includes an interface configured to communicate via a virtual channel group. The interface is also configured to store a table containing entries mapping virtual channel groups to address groups. The interface is configured to use this table to provide packets received via a first virtual channel of the virtual channel group for storage at a first address in the address group. The microcontroller includes a DMM coupled to the interface and configured to cause the interface to modify entries in the table.
[0005] In some examples, one method includes receiving first data at the ADAS controller via a first virtual channel of the Camera Serial Interface 2 (CSI-2) data interface. The method also includes receiving second data at the ADAS controller via a second virtual channel of the CSI-2 data interface. The method includes storing the first data at a first address in memory, the first address being specified by the first virtual channel. The method also includes storing the second data at a second address in a control register, the control register being specified by the second data. The method includes performing a test using the first and second data. Attached Figure Description
[0006] For detailed descriptions of the various examples, please refer to the accompanying drawings, in which:
[0007] Figure 1A It is a block diagram of ADAS components based on various examples.
[0008] Figure 1B This is a block diagram of the components of a SIL test system for ADAS, based on various examples.
[0009] Figure 2 This is a block diagram of a SIL test system for ADAS based on various examples.
[0010] Figure 3 It updates packets based on various examples of virtual channel mappings.
[0011] Figure 4 This is a flowchart illustrating various methods for SIL testing, based on different examples.
[0012] Figure 5 This is a flowchart illustrating various methods for SIL testing, based on different examples. Detailed Implementation
[0013] Testing the SoC, IC, or other systems within ADAS using SIL testing is crucial for ensuring the reliability and safety of ADAS. During real-world operating conditions, data samples (such as data from radar systems) are captured and processed by the ADAS. To perform SIL testing, these data samples are stored in a database and used in the SIL test environment (e.g., playback using a playback system). The SIL test environment attempts to recreate the operating environment of the ADAS. As an example, SIL testing is performed at the actual performance speed of the system. The SIL test environment receives, reads, and processes data samples at the same rate as receiving and processing samples under real-world operating conditions to determine whether the ADAS can adequately process, manage, and react to data samples in real time. For this purpose, the SIL test environment uses the same or similar software and hardware as actually deployed in the ADAS. This avoids the complexity of adding additional interfaces (such as Serial Peripheral Interface (SPI), Universal Asynchronous Receiver-Transmitter (UART), or Joint Test Action Group (JTAG) interfaces) and supporting software.
[0014] In ADAS, a data interface called Camera Serial Interface 2 (CSI-2) is used to send captured data (such as captured radar sensor data) from the MMIC to the MCU. CSI-2 is a high-speed data interface capable of transmitting large amounts of data. During SIL testing, it is advantageous to use CSI-2 to transfer data to the ADAS MCU in the test environment, just as it is in the operating environment. Both unprocessed and processed data can be transferred to the MCU using CSI-2. Passing other types of data (such as control data) to the MCU during SIL testing is also desirable. However, the CSI-2 protocol itself does not support transferring control data to specific memory addresses or control registers within the MCU. In some alternative systems, interfaces other than the CSI-2 interface can be used to transfer captured data and other types of data to the MCU during SIL testing. However, adding additional interfaces to the MCU increases its cost.
[0015] In the examples presented in this article, the Data Modification Module (DMM) in the MCU is able to use the CSI-2 interface to write data to a wide range of addresses and registers throughout the MCU's data, during the MCU's SIL test. More specifically, in the examples, the CSI-2 interface is used in conjunction with the DMM in the MCU for SIL testing. The DMM, combined with the CSI-2 interface, enables access to memory and control registers during the MCU's SIL test. Specific addresses within the MCU can be accessed using Virtual Channels (VCs). The CSI-2 protocol supports up to four VCs, which can be used to identify different data streams. For each type of data, different CSI-2 VCs can be used to direct these individual data streams toward different destinations within the MCU. The destination can be a control register or a specific location in memory. In various examples, one or more DMMs can direct data to a destination via interconnects based on VCs. Therefore, the DMM and VCs can be used to enable the CSI-2 interface to transfer both data and other types of information during SIL testing.
[0016] Figure 1A This is a block diagram of the components of ADAS 100 based on various examples. ADAS 100 may include... Figure 1A Many other components are not explicitly shown. In one example, ADAS 100 includes MMIC 102. In one example, MMIC 102 may be a frequency modulated continuous wave (FMCW) radar transceiver. In one example, MMIC 102 is a sensor on the vehicle that uses radar to detect the position and / or motion of objects around the vehicle. The detected radar information is transmitted to other components within ADAS 100, and this information is used by ADAS 100 to provide feedback to the driver of the vehicle or to take automatic actions, such as emergency braking. MMIC 102 may include one or more radar transmitters and one or more radar receivers (…). Figure 1A (Not shown in the image). In other examples, ADAS 100 may include other types of sensors besides radar sensors. For example, ADAS 100 may include cameras, LiDAR (laser imaging, detection, and ranging), or ultrasonic sensors to be attached to or replace the radar transceiver.
[0017] In one example, the MMIC 102 can be a radar front-end that transmits and receives radio frequency (RF) radar signals. The MMIC 102 can receive RF signals and use an analog-to-digital converter (ADC). Figure 1A(Not shown) converts it into a digital signal. The MMIC 102 can process the RF signal, for example, by performing one or more Fast Fourier Transforms (FFTs) on the RF signal. The result of the FFT can then be transmitted to the MCU 104. In another example, the RF signal can be provided to the MCU 104 without being processed by the MMIC 102. In yet another example, the RF signal can be partially processed by the MMIC 102, with additional processing performed by other components in the ADAS 100, such as the MCU 104.
[0018] MMIC 102 can be coupled to MCU 104 via CSI-2 interface 106. MCU 104 is the main control unit of ADAS 100. MCU 104 can receive unprocessed or partially processed data and perform further processing. MCU 104 can also send raw or partially processed data to a storage device and / or electronic control unit (ECU) 108, or take appropriate action based on the data. For example, MMIC 102 can be a radar front-end chip that sends raw ADC samples captured to MCU 104 so that MCU 104 can process the data to determine the range, angle, and velocity of an object. In this way, MCU 104 can use algorithms based on data received from MMIC 102 to detect objects and determine appropriate actions.
[0019] MCU 104 sends data to ECU 108 via connector 110. ECU 108 may include a combination of hardware (such as a processor, controller, data interface, and memory) and software that enables ECU 108 to process data streams quickly and reliably. ECU 108 processes sensor data, interprets sensor data, and may take actions based on the sensor data to prevent accidents or provide other safety features. Connector 110 may be any suitable type of bus, such as an Ethernet connector or a Controller Area Network (CAN) bus.
[0020] Figure 1BThis is a block diagram of the components of a SIL test system 150 for ADAS, based on various examples. As described above, the SIL test system 150 recreates the operating environment of ADAS 100. In this example, the SIL test system 150 includes a playback system 152. The playback system 152 may include any suitable hardware and software to store captured data from ADAS 100 (e.g., captured data from the output of MMIC 102 and / or semi-processed data from MCU 104). After data is captured during real-world operation of ADAS 100, the operator of the SIL test system 150 loads the captured data into the playback system 152. The playback system 152 is configured to transfer the captured data to MCU 104 for testing. In this example, the playback system 152 includes a processor 154, a controller 156, and a memory 158, but in other examples, one or more of these components may be absent. Playback system 152 stores the captured data in memory 158 and can perform any processing and transmission of the captured data using processor 154 and controller 156. Playback system 152 transmits the captured data to MCU 104 via CSI-2 interface 106, just as it would in ADAS 100. In this example, playback system 152 uses the VC of CSI-2 interface 106 to transmit the captured data to MCU 104, as described below. In one example, the captured data may include captured radar data. In some examples, the data transmitted on the VC includes not only the captured data but also header data. The header data may indicate radar chirp profiles or chirp information used by MCU 104. MCU 104 can read the header data and take any appropriate action on the captured data. For example, MCU 104 can process the captured data, store the processed data in an appropriate location, and generate output data derived from the processed data. MCU 104 can also transmit the processed data to storage device 160 via connector 162. In one example, connector 162 could be a Controller Area Network (CAN) bus. Storage device 160 could include any device capable of receiving and storing data from MCU 104. The data stored in storage device 160 could then be used for SIL testing to analyze whether the hardware and software in ADAS 100 are operating correctly. Connector 162 could be any suitable connector, such as an Ethernet connector or another high-speed connector.
[0021] The SIL test system 150 supports deploying the test system using the same or similar software and hardware as actually deployed in ADAS 100. This allows the SIL test system 150 to test ADAS 100 at the data transfer and processing speeds encountered by ADAS during real-world operation. For example, if data is transferred to the MCU 104 in ADAS 100 at a rate of 600 megabits per second, the SIL test system 150 can test the system at the same throughput. The CSI-2 interface 106 provides a high-speed interface for transferring data to the MCU 104. The protocol itself does not support accessing the control registers in the MCU 104 using the CSI-2 protocol. However, as described below, the VC of the CSI-2 interface 106 can be used to access the control registers in the MCU 104. The DMM (in...) in the MCU 104... Figure 1A and Figure 1B Not shown in the image, but referenced below. Figure 2 (Description) The system receives sensor data and other data recorded in a specific format (interpreted by the DMM) from playback system 152 via a specific VC, and directs various types of data to their appropriate destinations in memory, control registers, etc., based on the identity of the VC. In some such examples, the DMM may receive a mapping indicating where (e.g., address) the data for a given VC should be stored.
[0022] Figure 2 This is a block diagram of a SIL test system 200 for ADAS 100, based on various examples. The SIL test system 200 includes a playback system 152, an MCU 104, and a storage device 160. These components are... Figure 1B The playback system 152 is described in the document and, in one example, is operated as described above. The playback system 152 includes a processor 154, a controller 156, and a memory 158.
[0023] MCU 104 includes a CSI-2 interface 214 that couples MCU 104 to SIL test system 200. CSI-2 interface 214 uses virtual channel groups (e.g., virtual channels 212A-212D) to receive data from any other CSI-2 device (such as playback system 152 or MMIC 102). CSI-2 interface 214 includes a virtual channel-to-address table 216 (described in further detail below) for directing communication to various locations within MCU 104. Therefore, CSI-2 interface 214 is coupled to interconnect 202 to send and receive data to and from various components within MCU 104.
[0024] For example, interconnect 202 is coupled to control register (CR) 204, data modification module (DMM) 206, and memory 208. Interconnect 202 may also be coupled to... Figure 2Other components not shown include sensors, controllers, processors, etc. CR204 includes a storage register that alters or controls the behavior of other components (such as processors or other controllers) within MCU 104. When ADAS 100 is in use, data can be written to CR204 to control the operation of MCU 104. Data written to CR204 can change one or more settings within MCU 104. For example, in some examples, data written to CR204 can turn certain functions of ADAS 100 on or off, or otherwise alter the operation of ADAS 100. In other examples, data written to CR204 can alter the operation of sensors in ADAS 100.
[0025] DMM 206 stores control data in CR 204. In one example, DMM 206 transfers data from an external device (such as playback system 152) to CR 204. In another example, DMM 206 can perform direct writes to memory 208 without intervention from the processor in MCU 104. DMM 206 can write to locations in memory 208 specified by data packets received from external devices, and can also write data to locations in memory 208 specified by DMM 206. In some examples, DMM 206 is separate from CSI-2 interface 214, but in other examples, DMM 206 is incorporated into CSI-2 interface 214.
[0026] Interconnect 202 is coupled to CR 204 via link 210A. Interconnect 202 is coupled to DMM 206 via link 210B. Interconnect 202 is coupled to memory 208 via link 210C. Interconnect 202 is coupled to CSI-2 interface 214 via link 218. Interconnect 202 can also be coupled to any other component in MCU 104 to allow communication and data transfer between components of MCU 104.
[0027] In the example, a data stream from an external device (such as playback system 152) is transmitted to the CSI-2 interface 214 of MCU 104 via virtual channels 212A, 212B, 212C, and / or 212D (collectively referred to as VC 212) of the CSI-2 protocol. The header data transmitted to MCU 104 identifies which of the four VCs is associated with a given data stream. VC 212 is configured to transmit certain types of data to MCU 104. In one example, the first VC 212 sends unprocessed or partially processed captured data to MCU 104. The captured data is acquired by a sensor (such as MMIC 102). CSI-2 transmits the captured data at the speed used during operation of ADAS 100. The second VC 212 is configured to send different types of data to MCU 104, such as control data stored in CR 204. Each VC 212 (including the third and fourth VC 212) can be used to send either captured data or control data. For example, one type of test might use one VC 212 for controlling the data and three VC 212s for capturing the data. Another type of test might use three VC 212s for controlling the data and one VC 212 for capturing the data. In some examples, some VC 212s might be idle during the test. Any number of VC 212s or any combination of VC 212s can be used in the examples presented here.
[0028] When data is received, CSI-2 interface 214 determines the virtual channel associated with the data and then uses table 216 to determine the data's destination. In some examples, the destination specified by table 216 for a given virtual channel is an address within memory (e.g., memory 208). When the destination is a memory address, CSI-2 interface 214 can provide data to memory via interconnect 202. Table 216 can also map virtual channels to control registers (e.g., control register 204). When the destination is a control register, CSI-2 interface 214 can provide data directly to the control register via interconnect 202, or it can provide data to another component for writing to the control register. Table 216 can also map virtual channels to non-memory components (e.g., DMM 206). In some examples, table 216 maps a given virtual channel to DMM 206, which is used to write data to the control register and can also be used to update table 216. In this way, CSI-2 interface 214 and DMM 206 can provide access to the full address space of MCU 104 and can route data to the appropriate address.
[0029] Figure 3The VC mapping update packet 300 is based on various examples. In some examples, the playback system 152 may provide the VC mapping update packet 300 to the MCU 104 to modify the virtual channel to the address table 216. The VC mapping update packet 300 may include a destination field 302, a status field 304, a size field 306, an address field 308, and / or a data field 310. The VC mapping update packet 300 is sent via the virtual channel associated with the DMM 206 in the current table 216 and received by the CSI-2 interface 214. The CSI-2 interface 214 determines that the destination is the DMM 206 based on the virtual channel and table 216, and forwards the update packet 300 to the DMM 206 via interconnect 202.
[0030] DMM 206 receives and parses update packet 300, and identifies the value of address field 308 mapped to the address of an entry in table 216 for a specific virtual channel. The virtual channel used to send update packet 300 may be different from the virtual channel associated with the table entry in address field 308. For example, update packet 300 sent via VC0 may be used to update a table entry for VC1. The value in data field 310 of update packet 300 indicates the new address to be stored in the table entry. Therefore, DMM 206 may provide the value in data field 310 back to the CSI-2 interface for writing to table 216 at the entry indicated by the value in address field 308. In this way, subsequent data received via the virtual channel associated with address field 308 of update packet 300 is written to the address specified in data field 310 of update packet 300.
[0031] Playback system 152 can also provide data to MCU 104 for writing to memory 208 and / or control register 204. Specifically, playback system 152 can provide packets for writing to control register 204 using a virtual channel mapped to DMM 206. This packet is received by CSI-2 interface 214, which determines the destination is DMM 206 based on the virtual channel and table 216, and forwards update packet 300 to DMM 206 via interconnect 202. Packet 300 may include control information and the address of a specific CR 204 to which the control information should be written. DMM 206 parses the data received via packet 300 and writes the control information to the correct CR 204 based on the address included in the control information. In this example, one VC 212 may be dedicated to sending control information to CR 204 via DMM 206, while one or more of the other three VCs 212 may be dedicated to sending captured data to memory 208. DMM 206 uses the address information included in the control information to store the control information in the correct CR 204, and the captured data is stored in memory 208.
[0032] In another example, tests can be performed using captured data stored in playback system 152 to test the algorithms in ADAS 100. The algorithms in ADAS 100 are used to process radar data collected by MMIC 102. Radar data is collected by radar sensors (such as MMIC 102) and then processed. First-dimensional, second-dimensional, and third-dimensional FFTs can be performed on the radar data to generate FFT data and determine the range, rate, and angle of the radar data. Range indicates the distance of an object from the radar sensor. Rate indicates the speed at which the object approaches, and angle indicates the angle between the object and the radar sensor. The classification algorithm in ADAS 100 uses the range, rate, and angle data generated by performing one or more FFTs to determine whether the object is a person, vehicle, obstacle, etc. Based on the results of the classification algorithm, appropriate actions can then be taken, such as providing a warning to the driver or applying emergency braking.
[0033] Radar data is transmitted to memory 208 via one or more VCs 212. The VCs 212 used indicate the addresses in memory 208 where specific radar data should be written. For example, data from a first VC 212 may be stored starting at a first location in memory 208, while data from a second VC 212 may be stored starting at a second location in memory 208. During operation, the algorithm providing driver assistance services in ADAS 100 expects specific types of data to reside at specific addresses in memory 208. If the correct and expected data is written to those locations in memory 208, the algorithm retrieves the correct data from the expected locations in memory 208 and processes the data. The algorithm can then take appropriate action based on the result of processing the data. The algorithm used in the SIL test system 200 is the same algorithm used when deploying ADAS 100 under real-world operating conditions. Therefore, the SIL test system 200 allows testing of the algorithms in ADAS 100 under operating conditions similar to those of real-world ADAS deployment. These operating conditions include high-speed transmission of captured data using the CSI-2 protocol.
[0034] As described above, data transmitted via VC 212 can be sent directly to an address in memory 208 with or without DMM 206. Therefore, in some examples, CSI-2 interface 214 is configured to send data via interconnect 202 to the address in memory 208 where the captured data should be stored. In this example, interconnect 202 directs the data to memory 208, where the captured data is stored in the appropriate location. In another example, data can be transferred from CSI-2 interface 214 to DMM 206, and then DMM 206 transfers the data to memory 208.
[0035] In some examples, different types of data can be written to different locations in memory 208. For example, unprocessed data captured by MMIC 102 can be written to a first address, while processed or partially processed data from MMIC 102 can be written to a second address. To change the address to which data, indicated by VC 212A, is to be written, playback system 152 can send a command via VC 212A to update the base address indicating where VC 212A will send the data. Thus, the examples herein allow data to be written to either memory 208 or any address in CR 204.
[0036] Data transmitted via VC 212 can indicate the size of the data to be stored and the address where the data should be stored. For example, the data size can be bytes, words, double words, 64 bits, etc. DMM 206 parses the size and address information found in the header data to store the captured data at the appropriate location in memory 208 or CR 204. DMM 206 issues an appropriate command to write the captured data to the appropriate address, and this command can also include the size of the captured data. As an example, DMM 206 can issue a word write command to indicate that the captured data is word-sized. If the captured data is double-word-sized, DMM 206 can issue a double-word write command. Other data sizes and other write commands can be used in other examples.
[0037] Figure 4 This is a flowchart of example method 400 for SIL testing, based on various examples. The steps of method 400 can be performed in any suitable order. The hardware and / or software for performing the steps of method 400 in one example are described above. Figure 1B and Figure 2 As described in [the document]. Any suitable hardware and / or software may be used in other examples.
[0038] Method 400 begins at 410, where the ADAS controller (such as MCU 104) receives first data via a first virtual channel of the CSI-2 data interface. As described above. Figure 2 As described, a VC (such as VC 212A) can be used to transfer captured data from playback system 152 to MCU 104 to perform SIL testing of ADAS. The goal of SIL testing is to recreate the real-world operating conditions that ADAS will encounter in order to test the software and hardware of ADAS in response to incoming data from various sources, such as sensors. The received data may include data captured from various sources as well as header data indicating the size, storage address, etc., of the captured data.
[0039] Method 400 continues at 420, where the ADAS controller (such as MCU 104) receives second data via a second virtual channel of the CSI-2 data interface. A VC such as VC 212B can be used to transmit the second data. Transmitting different types of data via different VC 212s allows MCU 104 to process data from different VCs in different ways. Data from different VCs can be stored in different locations or routed to different components within MCU 104.
[0040] Method 400 continues at 430, where MCU 104 stores the first data at a first address in memory, where the first address is specified by the first virtual channel. The memory can be a memory such as memory 208. In one example, the first virtual channel stores the data directly at the correct address in memory 208. In another example, DMM 206 can store the captured data in memory 208.
[0041] Method 400 continues at 440, where MCU 104 stores the second data in a control register, which is specified by the second data. As described above, DMM 206 can receive the second data via the second VC 212B, and DMM 206 can read the address included in the second data, which indicates where the second data should be stored. DMM 206 has access to CR 204 in MCU 104 and can write control data to any control register of CR 204.
[0042] Method 400 continues at step 450, where tests are performed on MCU 104 using the first and second data. Therefore, using this technique, control data from playback system 152 can be transferred to MCU 104 using the CSI-2 protocol, and DMM 206 can store the control data in the appropriate control register of CR 204. Furthermore, the CSI-2 protocol allows for high-speed transmission of captured data (such as radar data), enabling SIL testing to be performed under conditions simulating real-world operating conditions of ADAS 100.
[0043] Figure 5 This is a flowchart of example method 500 for SIL testing, based on various examples. The steps of method 500 can be performed in any suitable order. The hardware and / or software for performing the steps of method 500 in one example are described above. Figure 1B and Figure 2 As described in [the document]. Any suitable hardware and / or software may be used in other examples.
[0044] Method 500 begins at 510, where MCU 104 receives a VC mapping update packet. The VC mapping update packet specifies a new destination (such as an address or entity within MCU 104) to be associated with a given virtual channel. In some examples, the VC mapping update packet 300 includes an address field 308 specifying a table entry associated with the given virtual channel and a data field 310 specifying the new destination. The VC mapping update packet is transmitted via virtual channel 212 associated with DMM 206 of MCU 104 and received by CSI-2 interface 214 of MCU 104.
[0045] Method 500 continues at 520, where CSI-2 interface 214 determines that the destination is DMM 206 based on virtual channel 212 and the current virtual channel to address table 216, and forwards update packet 300 to DMM 206.
[0046] Method 500 continues at 530, where DMM 206 receives and parses update packet 300 and identifies the value of address field 308 mapped to the entry for a given virtual channel 212 in virtual channel to address table 216.
[0047] Method 500 continues at 540, where DMM 206 provides the value in data field 310 representing the new destination to CSI-2 interface 214 for writing the virtual channel to address table 216. At 550, the virtual channel to address table is updated. Thus, subsequent data received via virtual channel 212 associated with address field 308 of update packet 300 is written to the address specified in data field 310 of update packet 300. In the example presented herein, the same CSI-2 interface on MCU 104 that sends sensor data to MCU 104 during ADAS 100 operation is also used to send captured data and control information to MCU 104 during SIL testing. Using the same CSI-2 interface for both applications saves the cost of adding an additional interface to MCU 104. Furthermore, using the same CSI-2 interface during SIL testing allows SIL testing to more closely reproduce the actual real-world operating conditions of ADAS 100, such as the speed at which sensor data is transmitted to MCU 104.
[0048] The term "coupling" is used in this specification. This term can encompass a connection, communication, or signaling path that enables a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action, in the first example, device A is coupled to device B; or in the second example, if the intervening component C does not substantially alter the functional relationship between device A and device B, device A is coupled to device B via the intervening component C, such that device B is controlled by the control signal generated by device A.
[0049] A device "configured" to perform a task or function can be configured by the manufacturer at manufacturing time (e.g., programmed and / or hardwired) to perform that function, and / or can be configured (or reconfigurable) by the user after manufacturing to perform that function and / or other additional or alternative functions. Configuration can be achieved through the device's firmware and / or software programming, through the construction and / or layout of the device's hardware components and interconnects, or a combination thereof.
[0050] Unless otherwise stated, "about," "approximately," or "basically" preceding a value means + / - 10% of that value. Modifications may be made in the described examples within the scope of the claims, and other examples are possible.
Claims
1. A communication system comprising: Multiple destination components, including a data modification module, i.e., DMM; as well as An interface, including a table containing entries that map each virtual channel of a virtual channel group to a specific destination component of the plurality of destination components, is configured to: Communication is conducted through the virtual channel group; The table is used to store the first packet received via the first virtual channel of the virtual channel group at the first destination component of the plurality of destination components; and Update packets are received via a second virtual channel of the virtual channel group, wherein the second virtual channel is associated with the DMM in the current version of the table; The DMM is configured as follows: The update packet is received from the interface and parsed to determine that, in the current version of the table, a first value of the update packet maps to a destination component associated with a specific virtual channel of the virtual channel group, and a second value of the update packet represents a new destination component to be associated with the specific virtual channel; and The interface modifies the current version of the table to generate an updated version of the table, wherein the second value is written in place of the first value to associate the specific virtual channel with the new destination component, such that the system is configured to process subsequent packets received via the specific virtual channel associated with the first value of the updated packet by storing the subsequent packets at the new destination component associated with the second value of the updated packet.
2. The communication system of claim 1, wherein the interface is further configured to be coupled to a playback component for testing the system.
3. The communication system according to claim 1, wherein the interface is a camera serial interface 2 data interface, i.e., a CSI-2 data interface.
4. The communication system according to claim 1, further comprising a memory coupled to the interface and the DMM.
5. The communication system of claim 1, wherein the first packet is radar data captured from an advanced driver assistance system, i.e., ADAS.
6. The communication system of claim 1, wherein the interface is further configured to write the first packet to the first destination component.
7. The communication system of claim 1, wherein the DMM is further configured to write the first packet to the first destination component.
8. The communication system of claim 1, wherein the plurality of destination components includes a control register configured to store the first packet.
9. The communication system of claim 8, wherein the DMM is further configured to store the first packet in the control register.
10. The communication system of claim 1, wherein the DMM is further configured to provide the second value to the interface.
11. The communication system according to claim 1, The specific virtual channel is the third virtual channel in the virtual channel group. The third virtual channel is different from the second virtual channel.
12. A communication system comprising: A microcontroller, the microcontroller comprising: Multiple destination components, including memory, control registers, and a data modification module (DMM); and An interface, including a table containing entries that map each virtual channel of a virtual channel group to a specific destination component of the plurality of destination components, is configured to: Communication is conducted through the virtual channel group; The table is used to store the first packet received via the first virtual channel of the virtual channel group in the memory of the plurality of destination components; and Update packets are received via a second virtual channel of the virtual channel group, wherein the second virtual channel is associated with the DMM in the current version of the table; The DMM is configured as follows: The update packet is received from the interface and parsed to determine that, in the current version of the table, a first value of the update packet maps to a destination component associated with a specific virtual channel of the virtual channel group, and a second value of the update packet represents a new destination component to be associated with the specific virtual channel; and The interface modifies the current version of the table to generate an updated version of the table, wherein the second value is written in place of the first value to associate the specific virtual channel with the new destination component, such that the system is configured to process subsequent packets received via the specific virtual channel associated with the first value of the updated packet by storing the subsequent packets at the new destination component associated with the second value of the updated packet.
13. The communication system of claim 12, wherein the interface is further configured to be coupled to a playback component for testing the system.
14. The communication system of claim 13, wherein the DMM is further configured to: Determine that the first value in the updated group maps to the destination component associated with the second virtual channel in the current version of the table.
15. The communication system according to claim 12, wherein the interface is a camera serial interface 2 data interface, i.e., a CSI-2 data interface.
16. The communication system of claim 12, wherein each of the memory and the control register is coupled to the interface.
17. The communication system of claim 12, wherein the interface is further configured to write the first packet to the specific destination component.
18. The communication system according to claim 12, The specific virtual channel mentioned above is a third virtual channel. The third virtual channel is different from the second virtual channel.
19. A communication method, comprising: The first packet received via a first virtual channel of a virtual channel group is stored at a first destination component of a plurality of destination components through an interface and using a table, the table containing entries that map each virtual channel including the first virtual channel of the virtual channel group to a specific destination component of the plurality of destination components; Update packets are received via the interface through a second virtual channel of the virtual channel group, wherein the second virtual channel is associated with the data modification module (DMM) in the current version of the table, and the update packets have a first value and a second value. The update packets are provided to the DMM of the plurality of destination components through the interface; The DMM parses the update group to determine, in the current version of the table, the first value maps to the destination component associated with a specific virtual channel of the virtual channel group in the current version of the table, and the second value represents the new destination component to be associated with the specific virtual channel; Receive the second value extracted by the DMM from the update group through the interface; The second value is written into the table to modify the current version of the table, thereby generating an updated version of the table to associate the specific virtual channel with the new destination component; as well as In response to receiving a subsequent packet via the specific virtual channel associated with the first value of the updated packet, the subsequent packet is stored at the new destination component associated with the second value of the updated packet.
20. The communication method according to claim 19, The specific virtual channel is the third virtual channel in the virtual channel group, and The third virtual channel is different from the second virtual channel.
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