A method and apparatus for repairing uncorrectable errors in memory

CN115168088BActive Publication Date: 2026-10-23HENAN KUNLUN TECH CO LTD
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Patent Information

Application Number
CN202210797617.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-08
Publication Date
2026-10-23
Estimated Expiration
2042-07-08

AI Technical Summary

Technical Problem

内存通常会由于UCE而产生故障,进而导致服务器宕机

Benefits of technology

[0006]本申请实施例提供的针对内存的不可纠正错误的修复方法,考虑了系统业务负载情况,使巡检UCE的修复时机更加合理,减少因自愈资源的欠合理使用而造成系统宕机的概率。

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Abstract

The application provides a repair method for uncorrectable errors of a memory, comprising: obtaining fault information of the memory, wherein the fault information comprises information of uncorrectable errors of the memory; based on the information of uncorrectable errors, when it is determined that the fault is an uncorrectable error storm; obtaining service load information, wherein the service load information comprises a service load and / or a service load growth; and based on the service load and / or the service load growth, determining to repair the fault of the memory. The repair method for uncorrectable errors of the memory provided by the application considers the system service load, so that the repair time of the inspection UCE is more reasonable, and the probability of system downtime caused by unreasonable use of self-healing resources is reduced.
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Description

Technical Field

[0001] This application relates to the field of server technology, and in particular to a method and apparatus for repairing uncorrectable errors in memory. Background Technology

[0002] Dynamic random access memory (DRAM) is a type of random access memory widely used in storage and IT fields. As DRAM integration density increases and manufacturing processes shrink, its basic failure rate also increases. Memory failure has become one of the major causes of server downtime.

[0003] Mainstream server systems typically incorporate reliability, availability, and serviceability (RAS) mechanisms for memory inspection. However, with the increasing rate of basic memory failures, the probability of encountering either Patrol Scrubbing Corrected Error (CE) or Patrol Scrubbing Uncorrected Error (UCE) is also rising. Memory failures due to UCEs often lead to server downtime. Summary of the Invention

[0004] The embodiments of this application provide a method for repairing uncorrectable errors in memory. In addition to solving the problem of inspection UCE failure, it also considers the system's business load, making the repair timing of inspection UCE more reasonable and reducing the probability of system downtime caused by the unreasonable use of self-healing resources.

[0005] In a first aspect, embodiments of this application provide a method for repairing uncorrectable errors in memory, comprising: acquiring memory fault information, the fault information including uncorrectable error information in memory; based on the uncorrectable error information, when it is determined that the fault is an uncorrectable error storm, acquiring service load information, the service load information including service load volume and / or service load growth; and determining to repair the fault of the memory based on the service load volume and / or service load growth.

[0006] The method for repairing uncorrectable memory errors provided in this application takes into account the system's business load, making the timing of UCE (Uncorrectable Memory Error) inspections more reasonable and reducing the probability of system downtime caused by the unreasonable use of self-healing resources.

[0007] In one possible implementation, determining to repair the fault based on the load information includes: determining to repair the fault when the service load is greater than or equal to a first threshold.

[0008] In another possible implementation, determining to repair the fault based on the load information includes: determining to repair the fault when the increase in business load is greater than or equal to a second threshold.

[0009] In the above possible implementations, when the workload or workload increase exceeds a preset value, a decision is made to repair the fault. For example, a self-healing mechanism request for the fault corresponding to the inspected UCE is executed, so that the BIOS can repair the fault. Implementing self-healing for inspected UCE faults in conjunction with real-time workload or workload increase can repair identified potentially serious memory faults at a more appropriate time, allowing self-healing resources to be used more appropriately and reducing the probability of subsequent system downtime.

[0010] In another possible implementation, the workload is determined based on CPU utilization and / or memory utilization.

[0011] In another possible implementation, the workload increase is determined based on the increase in CPU utilization and / or memory utilization.

[0012] In another possible implementation, the fault includes a first type of fault, which is repaired when the number of first type faults exceeds a third threshold. The first type of fault includes at least one of Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, or Dimm fault.

[0013] In other words, only faults that occur more than a certain threshold during the inspection UCE storm will be repaired to ensure that the fault is a real fault. This can effectively avoid the unreasonable use of self-healing resources due to occasional inspection soft faults and further reduce the probability of subsequent system downtime.

[0014] In another possible implementation, the faults include one or more of the following: Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, and Dimm fault.

[0015] In another possible implementation, it is also included that an uncorrectable error occurring more than or equal to a preset number of times within a preset time period is defined as the inspection uncorrectable error storm, that is, the inspection UCE storm is defined as the phenomenon of UCE occurring more than a certain number of times within a certain time period.

[0016] Secondly, embodiments of this application provide a processing apparatus, including,

[0017] An acquisition module is used to acquire memory fault information, including information about uncorrectable errors in the memory;

[0018] Based on the information about the uncorrectable error, when it is determined that the fault is an uncorrectable error storm;

[0019] Obtain service load information, which includes service load amount and / or service load growth.

[0020] The determination module is used to determine whether to repair the fault based on the business load and / or the business load growth.

[0021] In one possible implementation, the determining module is specifically used for:

[0022] When the service load is greater than or equal to the first threshold, it is determined that the fault should be repaired.

[0023] In another possible implementation, the determining module is specifically used for:

[0024] When the increase in the business load is greater than or equal to the second threshold, it is determined that the fault should be repaired.

[0025] In another possible implementation, the workload is determined based on CPU utilization and / or memory utilization.

[0026] In another possible implementation, the increase in workload is determined based on the increase in CPU utilization and / or the increase in memory utilization.

[0027] In another possible implementation, the fault includes a first type of fault, which is repaired when the number of first type faults exceeds a third threshold. The first type of fault includes at least one of Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, or Dimm fault.

[0028] In another possible implementation, the fault includes one or more of the following: Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, and Dimm fault.

[0029] In another possible implementation, the processing device also includes:

[0030] The setting module is used to identify uncorrectable errors that occur more than or equal to a preset number of times within a preset time period as the inspection uncorrectable error storm.

[0031] Thirdly, embodiments of this application provide a computing device, including a memory and a processor, wherein the memory stores instructions that, when executed by the processor, cause the method described in the first aspect to be implemented.

[0032] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, causes the method described in the first aspect to be implemented.

[0033] Fifthly, embodiments of this application also provide a computer program or computer program product, the computer program or computer program product including instructions that, when executed, cause a computer to perform the method described in the first aspect.

[0034] In a sixth aspect, embodiments of this application also provide a chip including at least one processor and a communication interface, wherein the processor is used to execute the method described in the first aspect. Attached Figure Description

[0035] Figure 1a A schematic diagram of the hardware structure of a computing device is shown, which can execute the method for repairing uncorrectable errors in memory provided in the embodiments of this application.

[0036] Figure 1b A schematic diagram of the hardware structure of another computing device is shown, which can perform the method for repairing uncorrectable errors in memory provided in the embodiments of this application.

[0037] Figure 2 for Figure 1b The diagram shows the signaling interaction of the computing device in implementing the method for repairing uncorrectable errors in memory provided in the embodiments of this application;

[0038] Figure 3a A flowchart illustrating a method for repairing uncorrectable errors in memory, provided as an embodiment of this application;

[0039] Figure 3b A flowchart illustrating another method for repairing uncorrectable memory errors provided in an embodiment of this application;

[0040] Figure 4 This is a schematic diagram of a processing device provided in an embodiment of this application. Detailed Implementation

[0041] The technical solution of this application will be further described in detail below with reference to the accompanying drawings and embodiments.

[0042] To facilitate understanding, the meanings of the technical terms used in the text are briefly explained below.

[0043] Patrol Scrubbing: A Reactive Information System (RAS) technology in computer operating systems. When the CPU is idle, it reads the contents of memory. If the read data contains correctable errors, the corrected data is rewritten into memory. By correcting single-bit errors in a timely manner, the probability of uncorrectable errors is reduced.

[0044] Storm: A behavior that produces a specific quantity within a specific time period.

[0045] Patrol Scrubbing Corrected Error (CE): Correctable errors identified through the patrol inspection mechanism.

[0046] Patrol Scrubbing Uncorrected Error (UCE): Uncorrectable errors identified through the patrol mechanism. These errors generally do not cause interruption of server services or system crashes.

[0047] Patrol Scrubbing Corrected Error Storm: A specific number of correctable errors identified through a patrol mechanism within a specific time period.

[0048] Patrol Scrubbing Uncorrected Error Storm: A specific number of uncorrectable errors identified by the patrol mechanism within a certain period of time. These errors generally do not directly cause interruption of server services or system crashes.

[0049] Read Corrected Error (CE): A correctable error that occurs when the CPU consumes data from memory.

[0050] True Uncorrected Error (UCE): An uncorrectable error that occurs when the CPU consumes memory data, including Uncorrected No Action (UCNA) and Software Recoverable Action Required (SRAR). Such uncorrectable errors generally lead to server service interruption.

[0051] Fault (pattern): refers to some fault modes or fault behavior manifestations.

[0052] To resolve server downtime caused by memory failure, the first solution is to have the out-of-band management board controller (BMC) collect memory inspection UCE information and record it in the FDM log.

[0053] However, this solution only records the memory inspection UCE information and does not perform fault repair on the memory. The actual fault still exists in the memory. When the business load increases, if the faulty address of the memory is used, it will increase the risk of interrupting the server system's business.

[0054] The second approach involves the out-of-band management BMC collecting fault information, defining fault characteristic modes and repair requests based on partial information of inspection errors, and sending them to the BIOS to execute the corresponding isolation mechanism, thereby achieving the prediction and self-healing of inspection errors.

[0055] This solution does not take into account the system's workload. When a fault during inspection causes a large number of self-healing actions in the memory, there will be no self-healing resources available when the memory addresses occupied by the service subsequently fail, increasing the risk of service interruption.

[0056] In other words, the first solution, the second solution, and the existing memory fault self-healing solutions all suffer from the problem of unreasonable utilization of self-healing resources when dealing with UCE faults detected during inspection.

[0057] This application addresses the aforementioned problems by proposing a method for repairing uncorrectable memory errors. It defines UCE storm inspection rules, collects UCE storm information and real-time business load information, and extracts fault type information from the UCE storms. When the real-time business load or load increase exceeds a preset value, for fault types in the UCE storm where the number of errors exceeds a certain threshold, a corresponding self-healing mechanism request is executed. On one hand, by combining real-time business load information, the timing of UCE repair is made more reasonable, reducing the probability of system downtime due to the unreasonable utilization of self-healing resources. On the other hand, repair is performed only for UCE fault types in the UCE storm where the number of errors meets the preset value, avoiding the unreasonable utilization of self-healing resources due to occasional inspection soft faults, which could lead to subsequent memory failures resulting in a lack of available self-healing resources and ultimately system downtime.

[0058] Figure 1a A schematic diagram of the hardware structure of a computing device capable of implementing the method for repairing uncorrectable memory errors provided in the embodiments of this application is shown. Figure 1aAs shown, the computing device 100 includes a processor 101, memory 102, and a BIOS chip 103. The processor 101 is the control center of the computing device, and may be, for example, a central processing unit (CPU). The processor 101 executes program code to implement the operating system of the computing device 100. The memory 102 is used to store the data required for the processor 101's operations and can also exchange data with external storage devices such as hard disks in the computing device. For example, the memory 102 can cache the operating system and software applications. The BIOS chip 103 is used to detect various hardware components in the computing device 100, such as the CPU, memory, and motherboard. The processor 101 can call program code to implement the method for repairing uncorrectable errors in memory provided in this application embodiment; the specific implementation can be found in the description below.

[0059] Figure 1b A schematic diagram of the hardware structure of another computing device is shown, which can execute the method for repairing uncorrectable errors in memory provided in the embodiments of this application. Figure 1b As shown, the computing device 200 includes a processor 201, memory 202, a BIOS chip 203, and a BMC 204. The processor 201 is the control center of the computing device, and may be, for example, a central processing unit (CPU). The processor 201 executes program code to implement the operating system of the computing device 200. The memory 202 is used to store data required for the processor 201's operations and can also exchange data with external storage devices such as hard disks in the computing device. For example, the memory 202 can cache the operating system and software applications. The BIOS chip 203 is used to detect various hardware components in the computing device 200, such as the CPU, memory, and motherboard. At least one of the BMC 204 or the processor 201 can call program code to implement the method for repairing uncorrectable errors in memory provided in this embodiment of the application; the specific implementation can be found in the description below.

[0060] It should be understood that Figure 1a and Figure 1b The processor shown can be a central processing unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0061] Memory that is volatile can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0062] It should be understood that the computing device according to the embodiments of this application can execute the memory fault repair method provided in the embodiments of this application below. A detailed description of the implementation of the method is provided below, and for the sake of brevity, it will not be repeated here.

[0063] The computing device can be a terminal device, such as a personal computer, smartphone, or smart wearable device.

[0064] The computing device can also be a server, such as an x86 architecture server, specifically a blade server, a high-density server, a rack server, or a high-performance server.

[0065] It should be noted that a BIOS chip can be a memory that stores binary code. In the manual, the functions implemented by the BIOS chip can be executed by the BIOS chip itself, or by the processor calling the program stored in the BIOS chip.

[0066] Figure 1a and Figure 1b The computing device shown is merely a schematic diagram of the hardware structure of a computing device capable of executing the method for repairing uncorrectable errors in memory provided in the embodiments of this application. It does not constitute a limitation on the computing devices to which the embodiments of this application apply. For example, the computing device may also include persistent storage media, communication interfaces, etc. Figure 1a and Figure 1b None of them are shown in the text.

[0067] The following is based on Figure 1b The solution provided in this application is illustrated using the computing device shown as an example. Other computing devices are similar and will not be described in detail here.

[0068] Figure 2 for Figure 1b The diagram shows the signaling interaction of the computing device in implementing the method for repairing uncorrectable memory errors provided in the embodiments of this application. Figure 2 As shown, the server includes memory, a basic input output system (BIOS), and a server out-of-band management BMC. The BIOS has a patrol module and a fault repair module. The patrol module is used to collect patrol UCEs in memory and report the patrol UCEs to the patrol UCE fault collection module in the BMC. The patrol UCE fault collection module in the BMC is used to define patrol UCE storm rules and define preset values ​​for the number of patrol UCE errors. When this module receives a UCE storm from the BIOS, it defines the fault types in the storm, extracts fault types with an error count greater than the preset value for the number of UCE errors, and sends these fault types to the fault prediction and self-healing module. The service monitoring module in the BMC monitors the real-time service load of the operating system. When the service load or service growth exceeds the preset value, it sends service change information to the fault prediction and self-healing module. When the fault prediction and self-healing module in the BMC receives the signal from the service monitoring module, it selects the self-healing mechanism for the UCE address based on the fault type information. The command interaction module in the BMC sends the UCE fault type address information and self-healing mechanism to the BIOS, and the fault repair module in the BIOS performs the repair of the corresponding UCE fault cluster address in memory.

[0069] Figure 3a This is a flowchart illustrating a method for repairing uncorrectable memory errors provided in an embodiment of this application. The method can... Figure 1b The process is executed in the shown computing device 200 to repair uncorrectable memory errors. For example... Figure 3a As shown in the embodiment of this application, a method for repairing uncorrectable errors in memory is provided, which includes at least steps S301 to S303.

[0070] In step S301, the BIOS obtains information about uncorrectable errors detected during memory inspection.

[0071] The BIOS collects inspection UCEs in memory to obtain inspection UCE information. For example, the inspection UCE information may include the number of UCEs found during inspection, the time information of each UCE, the location information, etc.

[0072] In step S302, the BIOS sends information about uncorrectable errors to the BMC.

[0073] The BIOS can periodically send the acquired UCE information to the BMC. For example, the BIOS can send the acquired UCE information to the BMC every 30 minutes. This period can be the default or a user setting.

[0074] The BIOS can also send the acquired UCE information to the BMC in real time. For example, the BIOS reports the acquired UCE information to the BMC.

[0075] Alternatively, the BIOS can receive a request from the BMC and then send the acquired UCE information to the BMC. In this example, the BMC can periodically send a request to the BIOS, for example, every 20 minutes. The BIOS responds to this request by sending the acquired UCE information to the BMC. The BMC can also send a request to the BIOS in real time. The BIOS responds to this request, and if it has acquired UCE information, it sends it to the BMC; if it has not acquired UCE information, it reports to the BMC that no UCE exists in memory.

[0076] In step S303, the BMC determines the inspection UCE storm rules.

[0077] For example, a UCE storm rule is defined as a storm of uncorrectable errors occurring within a certain time period when the number of UCEs reaches a certain threshold. In other words, the out-of-band management BMC will identify uncorrectable errors occurring more than or equal to a preset number of times within a preset time period as the uncorrectable error storm. The out-of-band management BMC can define the UCE storm rule by setting this preset time period (e.g., 1 minute) and preset number of occurrences (e.g., 10 times). This preset time period and preset number of occurrences can be set by the user based on actual conditions, or they can be the default settings for the out-of-band management BMC.

[0078] For example, the BIOS collects information on UCEs in memory during the inspection process, including the time and number of UCEs that occur in memory during the inspection. When the number of UCEs that occur in memory within a preset time length (e.g., 1 minute) reaches a preset number (e.g., 10 times), the phenomenon is defined as an inspection UCE storm.

[0079] In step S304, the BMC acquires UCE storm information during inspection.

[0080] Based on the obtained inspection UCE information and inspection UCE storm rules, BMC obtains inspection UCE storm information, which includes the types of faults in the inspection UCE storm. For example, the types of faults that occur in the inspection UCE storm may include cell faults, row faults, and bank faults.

[0081] For example, inspection UCE storm information can be obtained through statistical methods. For instance, the time and number of inspection UCEs sent can be statistically analyzed. If the number of inspection UCEs that appear within a certain time period reaches a certain threshold, that is, if the inspection UCE storm rule is met, then the inspection UCE information within that time period can be used to determine the fault type of the inspection UCEs within that time period.

[0082] In another example, the inspection UCE storm information also includes the number of each fault type. For example, the number of Cell faults, Row faults, and Bank faults in the inspection UCE storm are 16, 18, and 10, respectively.

[0083] Fault types can include Cell faults, Row faults, Col faults, Bank faults, Device faults, Rank faults, Dimm faults, etc.

[0084] In step S305, the BMC obtains service load information, which includes the amount of service load and / or the amount of service load growth.

[0085] When the service load information is CPU utilization, the out-of-band management BMC collects the CPU utilization in the operating system in real time and determines the service load through the CPU utilization. For example, there is a mapping relationship between CPU utilization and service load, and the service load can be known by knowing the CPU utilization.

[0086] Alternatively, when the service load information is memory occupancy, the out-of-band management BMC collects the memory occupancy in the operating system in real time and determines the service load based on the memory occupancy. For example, there is a mapping relationship between memory occupancy and service load, and the service load can be known by knowing the memory occupancy.

[0087] In another example, the out-of-band management BMC collects CPU and memory usage data in the operating system in real time and uses these data to determine the workload. For instance, by weighting and summing the CPU and memory usage, the workload is determined.

[0088] Out-of-band management (BMC) obtains the CPU utilization rate in the operating system, calculates the increase in CPU utilization, and determines the increase in service load based on the increase in CPU utilization. For example, there is a mapping relationship between the increase in CPU utilization and the amount of service load; by knowing the increase in CPU utilization, the increase in service load can be determined.

[0089] Out-of-band management (BMC) obtains the memory usage rate in the operating system, calculates the increase in memory usage, and determines the increase in workload based on the increase in memory usage. For example, there is a mapping relationship between the increase in memory usage and the workload; knowing the increase in memory usage allows us to know the increase in workload.

[0090] Out-of-band management (BMC) obtains CPU and memory utilization rates from the operating system, and further calculates the increase in CPU and memory utilization. Based on these increases, it determines the increase in workload. For example, a weighted sum of the CPU and memory utilization increases is performed. This weighted sum has a mapping relationship with the workload; therefore, the workload increase can be determined by knowing this weighted sum.

[0091] In step S306, the BMC determines to repair the fault based on the service load and / or the service load increase.

[0092] When the out-of-band management BMC determines that the service load is greater than or equal to a first threshold, it determines to repair the faults in the UCE storm. For example, the out-of-band management BMC sends a self-healing request to the BIOS for the faults in the UCE storm, and the BIOS responds to the self-healing request to repair the faults in the UCE storm.

[0093] In another example, the self-healing request also carries a self-healing strategy for inspecting various types of faults in a UCE storm. The BIOS responds to the self-healing request and repairs each type of fault based on the self-healing strategy for each type of fault.

[0094] Self-healing resources are classified according to their granularity, which can be divided into PCLS self-healing resources, PPR self-healing resources, ADDDC Sparing self-healing resources, Device Sparing self-healing resources, Rank Sparing self-healing resources, etc., from smallest to largest.

[0095] In another example, the out-of-band management BMC determines to repair faults in the UCE storm when it determines that the workload increase is greater than or equal to a second threshold. For example, the out-of-band management BMC sends a self-healing request to the BIOS for faults in the UCE storm, and the BIOS responds to the self-healing request to repair the faults in the UCE storm.

[0096] In another example, the out-of-band management BMC determines to repair faults in the UCE storm when it determines that traffic volume is greater than or equal to a fourth threshold and traffic load growth is greater than or equal to a fifth threshold. For example, the out-of-band management BMC sends a self-healing request to the BIOS for faults in the UCE storm, and the BIOS responds to the self-healing request to repair the faults in the UCE storm.

[0097] The method for repairing uncorrectable memory errors provided in this application takes into account system workload, making the timing of UCE (Uncorrectable Memory Error) inspections more reasonable and reducing the probability of system downtime due to inappropriate use of self-healing resources. For example, when the workload or workload increase exceeds a preset value, a decision is made to repair the fault, such as executing a self-healing mechanism request for the fault corresponding to the inspected UCE, so that the BIOS can repair the fault. By combining the self-healing of inspected UCE faults with real-time workload or workload increase, identified potentially serious memory faults can be repaired at a more appropriate time, allowing for more suitable use of self-healing resources and reducing the probability of subsequent system downtime.

[0098] In another example, to further improve the rational utilization of self-healing resources, the severity of the fault was also considered when determining whether to repair the memory fault. For example, only faults that occurred more than or equal to the third threshold during the inspection UCE storm were repaired to ensure that the fault was a real fault. This can effectively avoid the unreasonable utilization of self-healing resources due to occasional inspection soft faults and further reduce the probability of subsequent system downtime.

[0099] For example, such as Figure 3b As shown, the aforementioned methods for repairing uncorrectable memory errors also include:

[0100] Step S307: BMC determines the first type of fault among multiple fault types in the inspection uncorrectable error storm. The first type of fault is a fault that occurs more than or equal to the third threshold.

[0101] In step S306, the BMC determines the type of fault to be repaired based on the business load and / or the increase in business load. This refers to the first type of fault. In other words, the first type of fault requiring repair is first identified from the UCE storm inspection, and then step S306 is executed to determine the type of fault to be repaired based on the business load and / or the increase in business load.

[0102] Understandably, there can be multiple Type 1 faults or just one; the number of Type 1 faults depends on the number of fault types greater than or equal to the third threshold among the corresponding fault types in the inspection UCE storm. In another example, Figure 3aStep S306, determining the fault to be repaired based on service load and / or service load growth, refers to faults whose transmission count during UCE storm inspection is greater than or equal to the third threshold. In other words, after determining that the service load and / or service load growth exceeds the threshold, the fault types greater than or equal to the third threshold are identified from multiple fault types during UCE storm inspection. If a fault type greater than or equal to the third threshold exists, a request to repair that type of fault is sent to the BIOS; if no fault greater than the third threshold exists, no fault repair request is sent to the BIOS.

[0103] Understandably, memory soft failures are those caused by non-hardware reasons, such as bit flips due to cosmic rays or crosstalk on data lines. We generally refer to these as soft memory failures. Failures caused by hardware reasons are called real memory failures. Soft memory failures are generally not reproducible, while real hardware failures are generally reproducible. Therefore, by extracting failure types that have occurred a certain number of times during inspections (the third threshold), these types of failures are generally real failures and require repair.

[0104] For example, the out-of-band management BMC collects inspection UCE information. When the number of inspection UCE information collected within a certain period of time meets the inspection UCE storm rules, the faults that occur more than or equal to the third threshold (e.g., 5 times) in the inspection UCE storm are extracted as target faults. The out-of-band management BMC only sends a self-healing request for the target fault to the BIOS, so that the BIOS can repair the target fault and achieve self-healing of the target fault.

[0105] For example, the faults that occur during the inspection of a UCE storm include Cell faults, Row faults, Col faults, Bank faults, Device faults, Rank faults, and Dimm faults. Among them, the number of occurrences of Cell faults is 16, Row faults are 10, Col faults are 8, Bank faults are 2, Device faults are 0, Rank faults are 0, and Dimm faults are 0. The third threshold is 5. Therefore, faults that occur more than 5 times during the inspection of a UCE storm are identified as target faults, that is, Cell faults, Row faults, and Col faults. The out-of-band management BMC only needs to determine the self-healing strategy for Cell faults, Row faults, and Col faults, and send self-healing requests for Cell faults, Row faults, and Col faults to the BIOS so that the BIOS can repair Cell faults, Row faults, and Col faults, thereby achieving self-healing of Cell faults, Row faults, and Col faults.

[0106] The thresholds mentioned above (such as the first threshold, the second threshold, the third threshold, the fourth threshold, and the fifth threshold) can be system defaults, can be set through external input, or can be determined based on fault analysis models and intelligent analysis. This application does not limit the specific method of determining the thresholds, and an appropriate method can be selected according to the actual situation.

[0107] As can be seen from the above description, the execution entity for the repair method for uncorrectable memory errors introduced above is the out-of-band management BMC (Band Control Center). Figure 1b In another example, the execution entity of the method for repairing uncorrectable errors in memory provided in this application embodiment can also be the processor (e.g., in the BMC) of a computing device (terminal device or server). Figure 1a The processor 101 in the process is implemented in a similar way to the out-of-band management BMC, as described above. For the sake of brevity, it will not be repeated here.

[0108] Based on the same concept as the aforementioned embodiments of methods for repairing uncorrectable errors in memory, this application also provides a processing apparatus 400, which includes components for implementing... Figure 3a and / or Figure 3b The units or modules for each step in the method for repairing uncorrectable errors in memory, as shown.

[0109] Figure 4 This is a schematic diagram of the processing apparatus provided in an embodiment of this application. The apparatus is applied to… Figure 1a or Figure 1b The computing device shown may be, for example, Figure 1a Processor 101 in, or Figure 1b The processing unit in BMC204, such as Figure 4 As shown, the processing apparatus 400 includes at least:

[0110] The acquisition module 401 is used to acquire information about the uncorrectable error storm in memory inspection, the information about the uncorrectable error storm including the fault corresponding to the uncorrectable error storm.

[0111] Obtain service load information, which includes service load amount and / or service load growth.

[0112] The determination module 402 is used to determine, based on the service load and / or the service load growth, how to repair the fault.

[0113] In one possible implementation, the determining module 402 is specifically used for:

[0114] When the service load is greater than or equal to the first threshold, it is determined that the fault should be repaired.

[0115] In another possible implementation, the determining module 402 is specifically used for:

[0116] When the increase in the business load is greater than or equal to the second threshold, it is determined that the fault should be repaired.

[0117] In another possible implementation, the workload is determined based on CPU utilization and / or memory utilization.

[0118] In another possible implementation, the increase in workload is determined based on the increase in CPU utilization and / or the increase in memory utilization.

[0119] In another possible implementation, the fault includes a first type of fault, which is repaired when the number of first type faults exceeds a fourth threshold.

[0120] In another possible implementation, the fault includes one or more of the following: Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, and Dimm fault.

[0121] In another possible implementation, the processing device 400 also includes:

[0122] The setting module 403 is used to determine the uncorrectable error storm that occurs more than or equal to a preset number of times within a preset time length.

[0123] The processing apparatus 400 according to the embodiments of this application can correspond to executing the methods described in the embodiments of this application, and the above and other operations and / or functions of each module in the processing apparatus 400 are respectively for implementing Figure 3a and / or Figure 3b For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0124] It should be explained that the method for repairing uncorrectable memory errors provided in this application embodiment can be derived from... Figure 1a The processor 101 in the computing device executes, for example, the processor 101 calls program code, which includes one or more software modules, and the computing device executes the program code through the processor 101 to implement a method for repairing uncorrectable errors in memory provided in the embodiments of this application.

[0125] The method for repairing uncorrectable memory errors provided in this application embodiment can be derived from... Figure 1bThe processing unit in the out-of-band management BMC204 executes the program code, which, for example, stores the program code corresponding to the method for repairing uncorrectable memory errors provided in the embodiments of this application. The program code includes one or more software modules. The computing device executes the program code through the processing unit in the out-of-band management BMC to implement the method for repairing uncorrectable memory errors provided in the embodiments of this application.

[0126] Embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, wherein when the computer instructions are executed by a processor, the aforementioned method for repairing uncorrectable errors in memory is implemented.

[0127] An embodiment of this application provides a chip including at least one processor and an interface, wherein the at least one processor determines program instructions or data through the interface; the at least one processor is used to execute the program instructions to implement the aforementioned method for repairing uncorrectable errors in memory.

[0128] Embodiments of this application provide a computer program or computer program product that includes instructions that, when executed, cause a computer to perform the aforementioned method for repairing uncorrectable errors in memory.

[0129] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0130] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented in hardware, processor-executed software modules, or a combination of both. The software modules can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the art.

[0131] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this application. It should be understood that the above description is only a specific embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for repairing uncorrectable errors in memory, characterized in that, include: Obtain memory fault information, including information about uncorrectable errors in the memory; Send information about the uncorrectable memory error to the BMC; When the BMC determines that the fault is an uncorrectable error storm based on the information about the uncorrectable error: Obtain service load information, which includes service load amount and / or service load growth. When the service load is greater than or equal to the first threshold and / or When the increase in the service load is greater than or equal to the second threshold, it is determined that the fault should be repaired. The method further includes: Obtain the target fault type of the uncorrectable error storm that is greater than or equal to the third threshold; Repair is performed only for the target fault type.

2. The method according to claim 1, characterized in that, The fault types of the uncorrectable error storm include at least one of the following: Cell fault, Row fault, Col fault, Bank fault, Device fault, Rank fault, or Dimm fault.

3. The method according to any one of claims 1-2, characterized in that, It also includes that the fault information includes the time of occurrence of the fault, and the uncorrectable error storm is an uncorrectable error that occurs more than or equal to the first occurrence within a first time length.

4. A computer program product comprising instructions that, when executed, cause a computer to perform the method as described in any one of claims 1-3.

5. A computing device, comprising a memory, a processor, and a BMC, characterized in that, The processor and the BMC can be used to perform the method as described in any one of claims 1-3.

Citation Information

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