Spiking neural network circuits and computational methods based on spiking neural networks

Abstract

A spiking neural network circuit and a computational method based on the spiking neural network are disclosed. The circuit includes multiple decompression modules and a computation module. The multiple decompression modules are used to obtain multiple weight values ​​and corresponding identifiers of multiple output neurons in a compressed weight matrix based on information from multiple input neurons. Each decompression module is used to obtain, in parallel, the weight values ​​of the same row in the compressed weight matrix and the identifiers of the multiple output neurons corresponding to the weight values ​​of the same row. The number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, and each row of weight values ​​corresponds to one input neuron. The computation module is used to determine the membrane voltage of the corresponding multiple output neurons based on the multiple weight values. This spiking neural network circuit can improve computational efficiency.

Description

[0001] This application claims priority to Chinese Patent Application No. 202110363578.3, filed on April 2, 2021, entitled "A Pulse Neural Network Compression Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of image processing, and more specifically, to a spiking neural network circuit and a computational method based on a spiking neural network. Background Technology

[0003] Spiking neural networks (SNNs), as an emerging type of neural network, are often hailed as the third generation of artificial neural networks. They are closer to real biological processing systems in terms of information processing methods and biological models than traditional artificial neural networks.

[0004] In spiking neural networks, neurons transmit information via pulses. The generation of a pulse is determined by differential equations representing various biological processes, the most important of which is the neuron's membrane voltage. Each neuron accumulates the pulse sequences from its preceding neurons, and its membrane voltage changes with each input pulse. When a neuron's membrane voltage reaches a preset value, the neuron is activated, generating a new signal (e.g., firing a pulse), and transmitting this signal to other neurons connected to it. However, the efficiency of calculating neuron membrane voltages in spiking neural network circuits is relatively low. Summary of the Invention

[0005] This application provides a spiking neural network circuit and a computational method based on a spiking neural network, which can improve computational efficiency.

[0006] In a first aspect, a spiking neural network circuit is provided, comprising: multiple decompression modules and a calculation module. The multiple decompression modules are used to obtain multiple weight values ​​and corresponding identifiers of multiple output neurons in a compressed weight matrix based on information from multiple input neurons. Each decompression module is used to obtain, in parallel, the weight values ​​of the same row number in the compressed weight matrix and the identifiers of the multiple output neurons corresponding to the weight values ​​of the same row number. The number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, and each row of weight values ​​corresponds to one input neuron. The calculation module is used to determine the membrane voltage of the corresponding multiple output neurons based on the multiple weight values.

[0007] In the above technical solution, since the number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, each decompression module of the multiple decompression modules in the spiking neural network circuit is used to obtain the weight values ​​of the same number of rows in the compressed weight matrix and the identifiers of multiple output neurons corresponding to the weight values ​​of the same number of rows in parallel. In this way, multiple decompression modules perform parallel decompression at the same time, which increases the computing speed of the spiking neural network chip, thereby improving computing efficiency and achieving the effect of reducing latency and power consumption.

[0008] In conjunction with the first aspect, in some implementations of the first aspect, the input neurons in the spiking neural network circuit include a first input neuron and a second input neuron, and the plurality of decompression modules include a first decompression module and a second decompression module. The first decompression module is used to obtain the first row weight value corresponding to the first input neuron in the compressed weight matrix and the identifiers of one or more output neurons corresponding to the first row weight value, respectively. The second decompression module is used to obtain the second row weight value corresponding to the second input neuron in the compressed weight matrix and the identifiers of one or more output neurons corresponding to the second row weight value, respectively.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the first decompression module is specifically used to: obtain from the first storage space the base address storing the first row weight value, wherein the first storage space stores the base address of each row weight value in the compressed weight matrix and the number of non-zero weight values ​​in each row; obtain from the second storage space the first row weight value and the identifier of the output neuron corresponding to the first row weight value respectively, wherein the second storage space stores the first row weight value and the identifier of the output neuron corresponding to the first row weight value.

[0010] In conjunction with the first aspect, in some implementations of the first aspect, the spiking neural network circuit further includes: a compression module, used to prune some weight values ​​in the initial weight matrix according to a pruning ratio to obtain the compressed weight matrix.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the compressed weight matrix includes multiple weight reassemblies, and the number of non-zero weight values ​​in each row of each weight reassembly is the same.

[0012] In conjunction with the first aspect, in some implementations of the first aspect, the computation module includes multiple computation sub-modules, each of which is responsible for calculating the membrane voltage of an output neuron in a weighted reassembly in parallel.

[0013] In the above technical solution, since the number of non-zero weight values ​​in each row of each weight reassembly in the compressed weight matrix is ​​the same, multiple computational submodules can be used. Each computational submodule is responsible for calculating the membrane voltage of the output neuron in one weight reassembly in parallel. In this way, multiple computational submodules perform parallel calculations simultaneously, increasing the computing speed of the spiking neural network chip, thereby improving computational efficiency and achieving the effect of reducing latency and power consumption.

[0014] In conjunction with the first aspect, in some implementations of the first aspect, the plurality of computational submodules include a first computational submodule and a second computational submodule. The first computational submodule includes a first accumulation engine and a first computational engine. The second computational submodule includes a second accumulation engine and a second computational engine. The first accumulation engine is used to determine the weight accumulation value corresponding to the output neuron in the first weighted reassembly corresponding to the first computational submodule. The first computational engine is used to determine the membrane voltage of the output neuron in the first weighted reassembly at the current time based on the weight accumulation value output by the first accumulation engine. The second accumulation engine is used to determine the weight accumulation value corresponding to the output neuron in the second weighted reassembly corresponding to the second computational submodule. The second computational engine is used to determine the membrane voltage of the output neuron in the second weighted reassembly at the current time based on the weight accumulation value output by the second accumulation engine.

[0015] Secondly, a computational method based on a spiking neural network is provided, comprising: obtaining multiple weight values ​​in a compressed weight matrix and corresponding identifiers of multiple output neurons based on information from multiple input neurons, wherein the multiple weight values ​​include weight values ​​of the same row number in the compressed weight matrix obtained in parallel, and the identifiers of the multiple output neurons include identifiers of multiple output neurons corresponding to the weight values ​​of the same row number obtained in parallel, wherein the number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, and each row of weight values ​​corresponds to one input neuron; and determining the membrane voltage of the corresponding multiple output neurons based on the multiple weight values.

[0016] In conjunction with the second aspect, in some implementations of the second aspect, the input neurons of the spiking neural network circuit include a first input neuron and a second input neuron. The first row of weight values ​​in the compressed weight matrix corresponding to the first input neuron is obtained, as well as the identifiers of one or more output neurons corresponding to the first row of weight values. The second row of weight values ​​in the compressed weight matrix corresponding to the second input neuron is obtained, as well as the identifiers of one or more output neurons corresponding to the second row of weight values.

[0017] In conjunction with the second aspect, in some implementations of the second aspect, before obtaining the multiple weight values ​​in the compressed weight matrix and the corresponding identifiers of the multiple output neurons, the method further includes: pruning a portion of the weight values ​​in the initial weight matrix according to a pruning ratio to obtain the compressed weight matrix.

[0018] In conjunction with the second aspect, in some implementations of the second aspect, the compressed weight matrix includes multiple weight reassemblies, and the number of non-zero weight values ​​in each row of each weight reassembly is the same.

[0019] In conjunction with the second aspect, in some implementations of the second aspect, the membrane voltage of the corresponding plurality of output neurons is determined in parallel based on the plurality of weight values ​​in each weighted reassembly.

[0020] In conjunction with the second aspect, in some implementations of the second aspect, the plurality of weighted reassemblies include a first weighted reassembly and a second weighted reassembly; determining the weight accumulation value corresponding to the output neuron in the first weighted reassembly, and determining the membrane voltage of the output neuron in the first weighted reassembly at the current time based on the weight accumulation value corresponding to the output neuron in the first weighted reassembly; and determining the weight accumulation value corresponding to the output neuron in the second weighted reassembly, and determining the membrane voltage of the output neuron in the second weighted reassembly at the current time based on the weight accumulation value corresponding to the output neuron in the second weighted reassembly.

[0021] The beneficial effects of the second aspect and any possible implementation of the second aspect correspond to the beneficial effects of the first aspect and any possible implementation of the first aspect, which will not be elaborated further.

[0022] Thirdly, a spiking neural network system is provided, including a memory and a neural network circuit as described in the first aspect and any possible implementation thereof, wherein the memory is used to store a plurality of compressed weight values.

[0023] In conjunction with the third aspect, in some implementations of the third aspect, the memory is also used to store information of multiple input neurons.

[0024] Fourthly, a spiking neural network system is provided, including a processor and a neural network circuit as described in the first aspect and any possible implementation thereof, the processor including an input buffer for caching information of the plurality of input neurons.

[0025] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the system further includes a memory for storing the compressed weight values.

[0026] Fifthly, an apparatus for determining the membrane voltage of a spiking neuron is provided, comprising a communication interface and a processor. The processor is configured to control the communication interface to send and receive information, is connected to the communication interface, and is used to execute the method for determining the membrane voltage of a spiking neuron as described in the second aspect or any possible implementation thereof.

[0027] Optionally, the processor can be a general-purpose processor, which can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc.; when implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. This memory can be integrated into the processor or located outside the processor and exist independently.

[0028] In a sixth aspect, a computer program product is provided, comprising: computer program code, which, when run on a computing device, causes the computing device to perform the methods described in the second aspect or any possible execution thereof.

[0029] In a seventh aspect, a computer-readable medium is provided that stores program code, which, when executed on a computing device, causes the computing device to perform the methods described in the second aspect or any possible execution method described in the second aspect. Such computer-readable storage includes, but is not limited to, one or more of the following: read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), flash memory, electrically EPROM (EEPROM), and hard drive. Attached Figure Description

[0030] Figure 1 A schematic diagram of a spiking neural network is shown.

[0031] Figure 2 This is a schematic flowchart of a method for weight compression of a spiking neural network provided in an embodiment of this application.

[0032] Figure 3 This is a schematic diagram of the initial weight matrix of a spiking neural network provided in an embodiment of this application.

[0033] Figure 4 This is a schematic diagram of a semi-structured pruning of the initial weight matrix of a spiking neural network provided in an embodiment of this application.

[0034] Figure 5This is a schematic diagram of a spiking neural network after semi-structured pruning, provided in an embodiment of this application.

[0035] Figure 6 This is a schematic diagram of a grouped semi-structured pruning of the initial weight matrix of a spiking neural network provided in an embodiment of this application.

[0036] Figure 7 This is a schematic diagram of a spiking neural network after grouped semi-structured pruning, as provided in an embodiment of this application.

[0037] Figure 8 This is a schematic diagram of the architecture of a spiking neural network circuit provided in an embodiment of this application.

[0038] Figure 9 This is a schematic block diagram of an associated compressed weighted storage space 240 provided in an embodiment of this application.

[0039] Figure 10 This is a schematic block diagram illustrating a decompression engine that obtains weight values ​​and corresponding output neurons, as provided in an embodiment of this application.

[0040] Figure 11 This is a schematic block diagram illustrating an accumulation engine for obtaining the weight accumulation value of an output neuron, as provided in an embodiment of this application.

[0041] Figure 12 This is a schematic block diagram illustrating a computational engine for determining the membrane voltage of a spiking neuron, as provided in an embodiment of this application.

[0042] Figure 13 This is a schematic flowchart illustrating a method for calculating the membrane voltage of a spiking neuron, as provided in an embodiment of this application.

[0043] Figure 14 This is a schematic diagram of another spiking neural network circuit provided in an embodiment of this application.

[0044] Figure 15 This is a schematic block diagram of a spiking neural network system 1500 provided in an embodiment of this application. Detailed Implementation

[0045] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0046] Artificial intelligence (AI) is the theory, methods, technology, and application systems that use digital computers or machines controlled by digital computers to simulate, extend, and expand human intelligence, perceive the environment, acquire knowledge, and use that knowledge to achieve optimal results. In other words, AI is a branch of computer science that attempts to understand the essence of intelligence and produce a new kind of intelligent machine that can react in a way similar to human intelligence. AI studies the design principles and implementation methods of various intelligent machines, enabling them to have perception, reasoning, and decision-making capabilities. Research in the field of AI includes robotics, natural language processing, computer vision, decision-making and reasoning, human-computer interaction, recommendation and search, and fundamental AI theories.

[0047] In the field of AI, a neural network (NN) is a mathematical or computational model that mimics the structure and function of biological neural networks (the central nervous system of animals, especially the brain) to estimate or approximate functions. The biological brain is composed of a large number of neurons connected in different ways, with information transmitted between neurons via synapses. Spiking neural networks (SNNs), as an emerging type of neural network, are often hailed as the third generation of artificial neural networks because they are closer to real biological processing systems in terms of information processing methods and biological models than traditional artificial neural networks. Specifically, on the one hand, artificial neural networks transmit multi-valued signals, while spiking neural networks transmit binary pulse information; therefore, their input and output information is sparse, and spiking neural networks have low power consumption characteristics. On the other hand, the neuron model of spiking neural networks is similar to that of brain neurons, exhibiting a dynamic accumulation process, providing an additional time dimension of information compared to traditional artificial neural networks, making them more suitable for processing intelligent tasks with temporal information.

[0048] Figure 1 A schematic diagram of a spiking neural network is shown. See also Figure 1 This spiking neural network can contain three layers: an input layer, a hidden layer, and an output layer. The hidden layer itself contains multiple layers, with parallel logic within each layer and serial logic between layers. The computational results between layers are interdependent and influence each other. For ease of description, Figure 1 The following example illustrates the concept of a hidden layer containing a single neuron.

[0049] See Figure 1Each layer of a spiking neural network can include multiple nodes, each simulating a spiking neuron that performs a specific operation, such as an activation function. The connection between one neuron (also called an input neuron) and the next neuron (also called an output neuron) simulates a synapse. It should be understood that a synapse is the carrier of information between two neurons, and the weight of the synapse represents the strength of the connection between the two neurons. Figure 1 The labels in each node shown are only for identifying or distinguishing different nodes.

[0050] In spiking neural networks, neurons transmit information via pulses, based on discrete-valued activities occurring at specific points in time, rather than continuous values. The generation of a pulse is determined by differential equations representing various biological processes, the most important of which is the neuron's membrane voltage. Each neuron accumulates pulse sequences from its preceding neurons, and its membrane voltage changes with each input pulse. When a neuron's membrane voltage reaches a predetermined value, it is activated, generating a new signal (e.g., firing a pulse), and transmitting this signal to other neurons connected to it. After firing a pulse, the neuron's membrane voltage resets and continues to change by accumulating pulse sequences from its preceding neurons. Neurons in spiking neural networks transmit and process information in this manner, exhibiting nonlinear, adaptive, and fault-tolerant information processing capabilities.

[0051] It should be noted that two neurons in a spiking neural network can be connected by a single synapse or by multiple synapses; this application does not impose any specific limitations on this. Each synapse has a modifiable synaptic weight (also called a weight value), and multiple pulses transmitted by the neuron before the synapse can generate different postsynaptic membrane voltages depending on the magnitude of the synaptic weight.

[0052] While spiking neural networks (SNNs) possess characteristics such as sparsity and low power consumption during operation, their accuracy is not high. To improve network accuracy, the number of weights is often very large, leading to excessive weight storage in SNN chips. This, in turn, increases chip area, latency, and power consumption, hindering the hardware development and commercialization of SNNs. Therefore, weight compression in SNNs is of great significance.

[0053] In view of this, embodiments of this application provide a method for compressing weights in a spiking neural network. This method can make the number of non-zero values ​​in each row of the weight matrix or the number of non-zero values ​​in each group of each row the same. In this way, while saving weight storage resources at the hardware level of the spiking neural network, it can also realize parallel decompression and parallel computation at the hardware level of the spiking neural network, increase the operation speed, thereby improve the computational efficiency at the hardware level of the spiking neural network, and achieve the effect of reducing latency and power consumption.

[0054] Figure 2 This is a schematic flowchart illustrating a method for weight compression in a spiking neural network according to an embodiment of this application. Figure 2 As shown, the method may include steps 210-270, which will be described in detail below.

[0055] Step 210: Load the pre-trained spiking neural network and obtain the initial weights.

[0056] by Figure 1 Taking the hidden layer of the spiking neural network shown as an example, the initial weight matrix of the hidden layer is as follows: Figure 3 As shown in the diagram. Each row in this initial weight matrix represents an input neuron, for example, a neuron in the input layer connected to the hidden layer. Each column represents an output neuron, for example, a neuron in the hidden layer.

[0057] For example, Figure 3 In the initial weight matrix shown, the weights W in the first column are... 11 ~W 41 express Figure 1 The weight value corresponding to neuron 1 in the middle hidden layer; the weight W in the second column. 12 ~W 42 express Figure 1 The weight value corresponding to neuron 2 in the middle hidden layer; the weight W in the third column. 13 ~W 43 express Figure 1 The weight value corresponding to neuron 3 in the middle hidden layer; the weight W in the fourth column. 14 ~W 44 express Figure 1 The weight value corresponding to neuron 4 in the middle hidden layer; the weight W in the fifth column. 15 ~W 45 express Figure 1 The weight value corresponding to neuron 5 in the middle hidden layer; the weight W in the sixth column. 16 ~W 46 express Figure 1 The weight values ​​corresponding to neuron 6 in the middle hidden layer. The weight W in the first row. 11 ~W 16 express Figure 1The weight values ​​corresponding to neuron 7 in the input layer; the weights W in the second row. 21 ~W 26 express Figure 1 The weight value corresponding to neuron 8 in the input layer; the weight W in the third row. 31 ~W 36 express Figure 1 The weight value corresponding to neuron 9 in the input layer; the weight W in the fourth row. 41 ~W 46 express Figure 1 The weight value corresponding to neuron number 10 in the input layer.

[0058] Step 220: Select different weight matrix pruning schemes according to requirements.

[0059] As an example, if it is necessary to ensure that the number of non-zero weights in each row of the weight matrix is ​​the same, the semi-structured pruning in step 230 can be performed; if it is necessary to group the weight matrix and ensure that the number of non-zero weights in each row and each group of the weight matrix is ​​the same, the grouped semi-structured pruning in step 240 can be performed.

[0060] Step 230: Semi-structured pruning.

[0061] The semi-structured pruning in this embodiment refers to pruning weights at the granular level of each row of the weight matrix to obtain a semi-structured pruned weight matrix. Specifically, the weight values ​​of each row in the original weight matrix can be sorted according to their weight size, and then the last s% (sparseness) of the sorted matrix can be set to 0. This results in a semi-structured pruned weight matrix where each row has the same length.

[0062] For example, taking a sparsity of 66.6% as an example, it can be... Figure 3 The weight values ​​in each row of the initial weight matrix shown are sorted, and then the last 66.6% of the weight values ​​are set to 0. For example... Figure 4 In the weight matrix shown, dashed lines represent pruned weight values, and the weight matrix composed of solid lines is the pruned weight matrix. In this pruned weight matrix, each row has the same number of non-zero weight values ​​(each row includes two weight values). For example, as shown... Figure 4 As shown, the first row of the weight matrix after semi-structured pruning includes W. 11 W 14 Two weights, namely Figure 1 Neuron 7 in the input layer is connected to neurons 1 and 4 in the hidden layer, with connection weights W and W, respectively. 11 W 14 The second line includes W. 22 W24 Two weights, namely Figure 1 Neuron 8 in the input layer is connected to neurons 2 and 6 in the hidden layer, with connection weights W and W, respectively. 22 W 26 The third line includes W. 31 W 35 Two weights, namely Figure 1 Neuron 9 in the input layer is connected to neurons 1 and 5 in the hidden layer, with connection weights W and W, respectively. 31 W 35 The fourth line includes W. 43 W 44 Two weights, namely Figure 1 Neuron 10 in the input layer is connected to neurons 3 and 4 in the hidden layer, with connection weights W and W, respectively. 43 W 44 Specific details regarding the structure of a spiking neural network after semi-structured pruning include: Figure 5 As shown.

[0063] In other words, the length of each row in the pruned weight matrix is ​​the same, and the number of connections between each neuron in the same layer and the neurons in the next layer is the same.

[0064] Step 240: Grouped semi-structured pruning.

[0065] The grouped semi-structured pruning in this embodiment refers to dividing each row into several equal-number weight groups, and performing weight pruning at the granularity of each group in each row of the weight matrix, resulting in a grouped semi-structured pruned weight matrix. Specifically, the weight values ​​of each row and each group in the original weight matrix can be sorted according to their weight size, and then the last s% (sparseness) of the sorted matrix can be set to 0. This results in a grouped semi-structured pruned weight matrix where each row and each group has the same length.

[0066] For example, taking a sparsity of 66.6% for each group as an example, we can... Figure 1 The neurons in the hidden layer shown are divided into two groups, each containing three neurons. For example, the first group contains neurons numbered 1-3, and the second group contains neurons numbered 4-6. This can be further analyzed... Figure 3 The weight values ​​of each group in each row of the initial weight matrix are sorted, and then the last 66.6% of the weight values ​​are set to 0. For example... Figure 6In the weight matrix shown, dashed lines represent pruned weight values, and the weight matrix composed of solid lines is the pruned weight matrix. In this pruned weight matrix, each row and each group has the same number of non-zero weight values ​​(each group includes one weight value). That is, the length of each row and each group in the grouped pruned weight matrix is ​​the same. The specific structure of the spiking neural network after grouped semi-structured pruning is as follows... Figure 7 As shown.

[0067] Step 250: Calculate the loss function based on the pruned weights.

[0068] It should be understood that the loss function is used to optimize the parameters of a spiking neural network by calculating the error between the actual (target) value and the predicted value. As an example, in this embodiment, the loss function of the spiking neural network can be calculated based on the pruned weights to obtain the error between the actual (target) value and the predicted value, so as to optimize or update the pruned weight matrix based on this error.

[0069] Step 260: Retrain the spiking neural network and update the pruned weight matrix.

[0070] As an example, the parameters (weights) of a spiking neural network can be optimized based on the loss function described above to minimize the network's loss. For instance, gradient descent can be used to optimize the spiking neural network's parameters (weights) and update the pruned weight matrix to minimize the network's loss.

[0071] Step 270: Determine whether the spiking neural network has converged.

[0072] If the spiking neural network converges, the process ends; if the spiking neural network does not converge, continue with step 230 or step 240 until the spiking neural network converges.

[0073] In the above technical solutions, semi-structured pruning ensures that the number of rows in each layer of the weight matrix is ​​consistent, while grouped semi-structured pruning ensures that the number of rows and groups in each layer of the weight matrix is ​​consistent. This helps save weight storage resources at the hardware level while also facilitating parallel decompression and parallel computation, increasing hardware-level processing speed, thereby improving computational efficiency and reducing latency and power consumption.

[0074] The following is based on Figure 1 Taking the spiking neural network shown as an example, combined with Figures 8-12 This application provides a detailed description of the hardware aspects of a spiking neural network according to embodiments. It should be understood that... Figures 8-12The examples provided are merely to help those skilled in the art understand the embodiments of this application, and are not intended to limit the embodiments to the specific numerical values ​​or specific scenarios illustrated. Those skilled in the art will understand based on the following... Figures 8-12 The examples can obviously be modified or changed in various ways, and such modifications and changes also fall within the scope of the embodiments of this application.

[0075] Figure 8 This is a schematic diagram of the architecture of a spiking neural network circuit provided in an embodiment of this application. Figure 8 As shown, the spiking neural network circuit may include: 1 to n decompression engines (also called decompression modules or depressurization modules) and a calculation module 210. In this spiking neural network circuit, the calculation module 210 may include an accumulation engine 250 and a calculation engine 260. Optionally, the spiking neural network circuit may also include: an input buffer 205, a compression module 220, an associated compression weight address information storage space 230, an associated compression weight storage space 240, a weight accumulation storage space 270, a neuron parameter storage space 280, and a membrane voltage storage space 290. The functions of each of the above modules are described in detail below.

[0076] Input buffer 205 is used to store information about the pre-neuron (input neuron) that sends the input pulse (this information can be the neuron's number or index). In this embodiment, the input neuron can be... Figure 1 The neurons in the input layer are shown. As an example, the input buffer 205 could be a processor cache.

[0077] Compression module 220 is used to perform the above. Figure 2 The method shown obtains a pruned weight matrix, which includes pruned weights and the corresponding output neuron numbers. The pruned weights and their corresponding output neuron numbers can also be stored in the associated compressed weight storage space 240.

[0078] The associated compressed weight storage space 240 is used to store the pruned weights and the corresponding output neuron numbers. In this embodiment, the output neuron can be... Figure 1 The neurons in the hidden layer are shown. As an example, one could... Figure 4 The pruned weights obtained through the semi-structured pruning and the corresponding output neuron numbers are correlated according to a certain correspondence to form associated compressed weight data, and the associated compressed weight data is hardened into the associated compressed weight storage space 240 of the spiking neural network chip.

[0079] Specifically, such as Figure 9As shown, the associated compression weight storage space 240 stores compression weights and associated indexes. This association method can employ either a direct indexing method or an indirect indexing method; this embodiment does not specifically limit the method. For example, a direct indexing method adds a corresponding index before each compression weight, where the index content is the neuron number. Similarly, an indirect indexing method adds a corresponding index before each compression weight, where the index content is the distance between the neuron number of the current compression weight and the neuron number of the previous compression weight.

[0080] It should be understood that Figure 9 The diagram shows the storage format of the associated compressed weight storage space 240 for semi-structured pruning. This diagram only shows the format of a single layer (e.g., a hidden layer) of the spiking neural network; other layers are similar. Each row represents an input neuron, and each column represents an output neuron. It can be seen that after semi-structured sparsity, the number of compressed weights in each row is consistent. After obtaining the associated compressed weights, this weight matrix is ​​hardened into the associated compressed weight storage space 240 of the chip.

[0081] For example, with Figure 4 Taking the pruned weights obtained through semi-structured pruning, where the index contains the neuron number associated with that weight, as an example, the first row of the associated compressed weight storage space 240 stores 1-W. 11 4—W 14 The second line stores 2-W 22 6—W 26 The third line stores 1 through W. 31 5-W 35 The fourth line stores 3-W 43 4—W 44 The first row stores 1 through W. 11 Corresponding to one of the associated compression weights mentioned above, it represents the compression weight W. 11 and the index corresponding to the compression weight, where the output neuron associated with the compression weight is neuron number 1, 4—W 14 Corresponding to one of the associated compression weights mentioned above, it represents the compression weight W. 14 The index corresponding to the compression weight is 4, which is the output neuron associated with the compression weight.

[0082] The associated compression weight address information storage space 230 is used to store the address resolution information of the aforementioned associated compression weights. As an example, this address resolution information could be the base address of each row of associated compression weights and the number of compression weights in each row. Figure 4In the semi-structured pruning scheme shown, since the number of associated compression weights is the same for each row, only one number of weights per row needs to be stored. The address of the corresponding associated compression weight in the associated compression weight storage space 240 can then be calculated based on the base address of each row's associated compression weight. Compared to the unstructured pruning scheme, where the number of associated compression weights varies for each row and requires separate storage of each row's associated compression weight, this scheme saves weight storage resources.

[0083] It should be understood that Figure 9 The diagram shows the storage format of the associated compression weight address information storage space 230 for semi-structured pruning. This diagram only shows the format of a certain layer (e.g., a hidden layer) of the spiking neural network; other layers are similar. After obtaining the address resolution information of the associated compression weights, this address resolution information is hardened into the associated compression weight address information storage space 230 of the chip.

[0084] For example, with Figure 4 Taking the pruned weights obtained through semi-structured pruning as an example, the associated compressed weight address information storage space 230 can store the base address of each row of associated compressed weights and the number of associated compressed weights in each row, for example, 2.

[0085] The decompression engine is used to deassociate the associated compressed weights stored in the associated compressed weight storage space 240 based on information from multiple input neurons. For details, see [link to details]. Figure 10 The decompression engine can obtain the input neuron number from the input buffer 205, and parse the address information of the associated compressed weights from the associated compressed weight address information storage space 230 based on this number. It then obtains the associated compressed weights from the associated compressed weight storage space 240 based on this address information, and deassociates them through the deassociation module 1010 to obtain the corresponding output neuron number and weight. As an example, if the index format is direct index, the output neuron number and weight information can be obtained directly; if the index format is indirect index, the neuron number and weight information can be obtained through a shift operation.

[0086] Since the weight compression in this embodiment uses a semi-structured pruning scheme, the number of weights in each row is consistent after pruning. One to n decompression engines can be used, each responsible for decompressing the associated compressed weights in one row of the associated compressed weight storage space 240 based on information from multiple input neurons. In this way, the 1 to n decompression engines perform parallel decompression simultaneously, increasing the computational speed of the spiking neural network chip, thereby improving computational efficiency and reducing latency and power consumption.

[0087] For example, with Figure 4Taking the semi-structured pruning scheme in the example, the spiking neural network chip may include four decompression engines. Each decompression engine is responsible for decompressing the associated compressed weights in one row of the associated compressed weight storage space 240. For example, decompression engine 1 is responsible for decompressing the associated compressed weights (e.g., 1-W) stored in the first row of the associated compressed weight storage space 240. 11 4—W 14 The decompression engine 2 is responsible for decompressing the associated compression weights (e.g., 2-W) stored in the second row of the associated compression weight storage space 240. 22 6—W 26 The decompression engine 3 is responsible for decompressing the associated compression weights (e.g., 1-W) stored in the third row of the associated compression weight storage space 240. 31 5-W 35 The decompression engine 4 is responsible for decompressing the associated compression weights (e.g., 3-W) stored in the fourth line of the associated compression weight storage space 240. 43 4—W 44 Decompress the file.

[0088] The computation module 210, as an example, may include an accumulation engine 250 and a computation engine 260. The accumulation engine 250 is used to accumulate the weights of the corresponding output neurons. For details, see... Figure 11 The accumulation engine 250 can read the weight accumulation value corresponding to the neuron number output by 1 to n decompression engines from the weight accumulation storage space 270, accumulate the weights corresponding to the neuron number output by the 1 to n decompression engines with the weight accumulation value, and then write the accumulated value back into the weight accumulation storage space 270. The calculation engine 260 is used to calculate the neuron membrane voltage. For details, see [link to details]. Figure 12 After all neurons in the current layer have completed decompression and accumulation, the computation engine 260 reads the membrane voltage, neuron parameter configuration, and weight accumulation value from the membrane voltage storage space 290, the neuron parameter space 280, and the weight accumulation storage space 270, respectively, and performs membrane voltage accumulation through the neuron computation module 1201. If the membrane voltage exceeds the threshold voltage, a pulse is emitted, and the membrane voltage is cleared and written back to the membrane voltage storage space 290. If the membrane voltage does not exceed the threshold voltage, the accumulated membrane voltage is written back to the membrane voltage storage space 290.

[0089] The weight accumulation storage space is 270, which is used to store the weight accumulation value corresponding to each output neuron.

[0090] The neuron parameter space 280 is used to store the neuron parameter configuration information of the spiking neural network.

[0091] The membrane voltage storage space 290 is used to store the accumulated membrane voltage of neurons.

[0092] The following is based on Figure 8 Taking the spiking neural network circuit shown as an example, combined with Figure 13 The specific implementation process for calculating the membrane voltage of the spiking neuron in this circuit is described in detail. It should be understood that... Figure 13 The examples provided are merely to help those skilled in the art understand the embodiments of this application, and are not intended to limit the embodiments to the specific numerical values ​​or specific scenarios illustrated. Those skilled in the art will understand based on the following... Figure 13 The examples can obviously be modified or changed in various ways, and such modifications and changes also fall within the scope of the embodiments of this application.

[0093] Figure 13 This is a schematic flowchart illustrating a method for calculating the membrane voltage of a spiking neuron, provided in an embodiment of this application. Figure 13 As shown, the method may include steps 1310-1350, which will be described in detail below.

[0094] It should be understood that, for ease of description, Figure 13 This example illustrates the calculation of membrane voltages for neurons 1-6 in the hidden layer. The calculation of membrane voltages for neurons in other layers is similar. Figure 13 The method shown is similar.

[0095] Step 1310: The four decompression engines obtain the corresponding input neuron numbers from the input buffer 205 in parallel.

[0096] As an example, the four decompression engines (decompression engine 1 to decompression engine 4) respectively obtain the input neurons numbered 7 to 10 of the input layer from the input buffer 205.

[0097] Step 1320: The four decompression engines obtain the associated compression weights based on the input neuron numbers in parallel, and then deassociate them to obtain the output neuron numbers and their corresponding weights.

[0098] As an example, Figure 8The system can include four decompression engines (decompression engine 1 to decompression engine 4). Each decompression engine is responsible for deassociating the associated compressed weights in the corresponding row of the associated compressed weight storage space 240. The four decompression engines (decompression engine 1 to decompression engine 4) can complete the deassociation of the four rows of associated compressed weights in the associated compressed weight storage space 240 in parallel. Specifically, each decompression engine parses the address information of the associated compressed weight in the corresponding row in the associated compressed weight address information storage space 230 according to the input neuron number, retrieves the associated compressed weight in the associated compressed weight storage space 240 in parallel according to the address information, and deassociates the associated compressed weight to obtain the corresponding output neuron number and weight. For example, decompression engine 1 is responsible for deassociating the associated compressed weights (e.g., 1-W) stored in the first row of the associated compressed weight storage space 240. 11 4—W 14 Decompress the output to obtain the weight value W corresponding to output neuron 1. 11 The weight value corresponding to output neuron number 4 is W. 14 Simultaneously, decompression engine 2 is responsible for processing the associated compression weights (e.g., 2-W) stored in the second row of the associated compression weight storage space 240 in parallel. 22 6—W 26 Decompress the output to obtain the weight value W for output neuron #2. 22 The weight value corresponding to output neuron number 6 is W. 26 Similarly, other decompression engines deassociate the associated compression weights of other rows in the associated compression weight storage space 240 in parallel.

[0099] Step 1330: Accumulation engine 250 accumulates weights based on the output neuron number and the corresponding weight.

[0100] The accumulation engine 250 can read the weight accumulation value corresponding to the neuron number in the weight accumulation storage space 270 according to the above output neuron number, and accumulate the weight corresponding to the neuron number output by the four decompression engines (decompression engine 1 to decompression engine 4) with the weight accumulation value, and then write the accumulation value into the weight accumulation storage space 270.

[0101] Step 1340: Determine whether the single-layer accumulation is complete.

[0102] As an example, we can determine whether all neurons in this layer have completed decompression and accumulation. If not, return to continue execution 1310; if yes, continue execution 1350.

[0103] Step 1350: Computation engine 260 calculates the membrane voltage of the neuron.

[0104] After all neurons in the current layer have completed decompression and accumulation, the computation engine 260 reads the membrane voltage, neuron parameter configuration, and weight accumulation value from the membrane voltage storage space 290, the neuron parameter space 280, and the weight accumulation storage space 270, respectively, and accumulates the membrane voltage through the neuron computation module 1201. If the membrane voltage exceeds the threshold voltage, a pulse is emitted, and the membrane voltage is cleared and written back to the membrane voltage storage space 290. If the membrane voltage does not exceed the threshold voltage, the accumulated membrane voltage is written back to the membrane voltage storage space 290.

[0105] In the above technical solution, since the embodiment of this application uses a semi-structured pruning scheme, the number of weights in each row is consistent. Multiple decompression engines can be used to deassociate in parallel. Each decompression engine is responsible for decompressing the associated compressed weights of one row in the associated compressed weight storage space 240. In this way, multiple decompression engines perform parallel decompression simultaneously, increasing the computing speed of the spiking neural network chip, thereby improving computing efficiency and achieving the effect of reducing latency and power consumption.

[0106] The following is based on Figure 1 Taking the spiking neural network shown as an example, combined with Figure 14 This application provides a detailed description of another spiking neural network at the hardware level, as described in an embodiment. It should be understood that... Figure 14 The examples provided are merely to help those skilled in the art understand the embodiments of this application, and are not intended to limit the embodiments to the specific numerical values ​​or specific scenarios illustrated. Those skilled in the art will understand based on the following... Figure 14 The examples can obviously be modified or changed in various ways, and such modifications and changes also fall within the scope of the embodiments of this application.

[0107] Figure 14 This is a schematic diagram of another spiking neural network circuit architecture provided in an embodiment of this application. Figure 14 As shown, the circuit may include: 1 to kn decompression engines (decompression engine 11 to decompression engine kn) and a calculation module 210. In this spiking neural network circuit, the calculation module 210 may include multiple 1 to k calculation sub-modules, for example, calculation sub-module 1 to calculation sub-module k, each calculation sub-module may include an accumulation engine and a corresponding calculation engine. Optionally, the spiking neural network circuit also includes: an input buffer 205, a compression module 220, an associated compression weight address information storage space 230, an associated compression weight storage space 240, a weight accumulation storage space 270, a neuron parameter storage space 280, and a membrane voltage storage space 290.

[0108] It should be understood that the functions of input buffer 205, associated compressed weight storage space 240, associated compressed weight address information storage space 230, weight accumulation storage space 270, neuron parameter storage space 280, and membrane voltage storage space 290 are as follows: Figure 8 The architecture shown has the same functionality; please refer to [link / reference] for details. Figure 8 The description in the text will not be repeated here.

[0109] and Figure 8 Unlike the spiking neural network circuit in [the text], Figure 14 In the illustrated spiking neural network circuit, the computation module 210 may include multiple computation sub-modules of 1 to k. Each computation sub-module is responsible for determining the membrane voltage of multiple output neurons by determining the weight values ​​in a corresponding set of weighted reassemblies. As an example, each computation sub-module includes an accumulation engine and a corresponding computation engine. The accumulation engine is responsible for determining the accumulated weight value corresponding to the output neurons in the set of weighted reassemblies corresponding to the computation sub-module. The computation engine is responsible for determining the membrane voltage of the output neurons in the weighted reassemblies at the current time based on the accumulated weight value output by the accumulation engine.

[0110] Specifically, since the weight compression in this embodiment uses a grouped semi-structured pruning scheme, ensuring that the number of weights in each row and group is consistent after pruning, 1 to k accumulation engines can be used for parallel accumulation, with each accumulation engine responsible for accumulating the weights corresponding to a group of output neurons. Similarly, 1 to k computation engines can be used for parallel computation, with each computation engine responsible for calculating the membrane voltage of the output neuron based on the weight accumulation value output by the corresponding accumulation engine. In decompression engines 01 to kn, since the number of weights in each group of a row is consistent, decompression engines 11 to 1n can deassociate the associated compressed weights in each row of the group corresponding to accumulation engine 1 in parallel. Similarly, decompression engines k1 to kn are responsible for deassociating the associated compressed weights in each row of the group corresponding to accumulation engine k, and so on.

[0111] For example, with Figure 7 The hidden layers of the spiking neural network shown are divided into two groups, for example. Figure 14It can include two accumulation engines (accumulation engine 1 and accumulation engine 2), two calculation engines (calculation engine 1 and calculation engine 2), decompression engines 11-14, and decompression engines 21-24. Each decompression engine in decompression engines 11-14 is responsible for deassociating the associated compression weights of the corresponding rows in the first group; accumulation engine 1 is responsible for accumulating the weights of the neurons in the first group; and calculation engine 1 is responsible for calculating the membrane voltage of the neurons in the first group. Each decompression engine in decompression engines 21-24 is responsible for deassociating the associated compression weights of the corresponding rows in the second group; accumulation engine 2 is responsible for accumulating the weights of the neurons in the second group; and calculation engine 2 is responsible for calculating the membrane voltage of the neurons in the second group.

[0112] For example, decompression engine 11 is responsible for decompressing the associated compression weights (e.g., 1-W) stored in the first group of the first row of the associated compression weight storage space 240. 11 Decompress the output to obtain the weight value W corresponding to output neuron 1. 11 The decompression engine 12 is responsible for decompressing the associated compression weights (e.g., 2-W) stored in the first group of the second row of the associated compression weight storage space 240 in parallel. 22 Decompress the output to obtain the weight value W for output neuron #2. 22 The decompression engine 13 is responsible for decompressing the associated compression weights (e.g., 1-W) stored in the first group of the third row of the associated compression weight storage space 240 in parallel. 31 Decompress the output to obtain the weight value W corresponding to output neuron 1. 31 The decompression engine 14 is responsible for decompressing the associated compression weights (e.g., 3-W) stored in the first group of the fourth row of the associated compression weight storage space 240. 43 Decompress the output to obtain the weight value W for output neuron #3. 43 Accumulation engine 1 is responsible for reading the weight accumulation value corresponding to the neuron number in the weight accumulation storage space 270 according to the number of neurons 1 to 3, and accumulating the weight corresponding to the neuron number output by the four decompression engines (decompression engine 11 to decompression engine 14) with the weight accumulation value, and then writing the accumulation value into the weight accumulation storage space 270.

[0113] For example, the decompression engine 21 is responsible for the associated compression weights (e.g., 4-W) stored in the second group of the first row of the associated compression weight storage space 240. 14 Decompress the output to obtain the weight value W for output neuron #4. 14 The decompression engine 22 is responsible for decompressing the associated compression weights (e.g., 6-W) stored in the second group of the second row of the associated compression weight storage space 240 in parallel. 26 Decompress the output to obtain the weight value W corresponding to output neuron number 6. 26The decompression engine 23 is responsible for decompressing the associated compression weights (e.g., 5-W) stored in the second group of the third row of the associated compression weight storage space 240 in parallel. 35 Decompress the output to obtain the weight value W corresponding to output neuron #5. 35 The decompression engine 24 is responsible for decompressing the associated compression weights (e.g., 4-W) stored in the second group of the fourth row of the associated compression weight storage space 240. 44 Decompress the output to obtain the weight value W for output neuron #4. 44 Accumulation Engine 1 can work in parallel with Accumulation Engine 270. It is responsible for reading the weight accumulation value corresponding to the neuron number in the weight accumulation storage space 270 according to the number of neurons 4 to 6, and accumulating the weight corresponding to the neuron number output by the four decompression engines (decompression engine 21 to decompression engine 24) with the weight accumulation value, and then writing the accumulation value into the weight accumulation storage space 270.

[0114] It should be understood that the above example illustrates the concept of dividing a layer of a spiking neural network into two groups. In reality... Figure 14 The number of accumulation engines and computation engines included in the chip shown is determined by how many groups a layer is divided into. Alternatively, the n neurons in a layer can be divided into n groups, with each neuron forming a group. In this case, n accumulation engines and n computation engines would be needed. Each accumulation engine is responsible for accumulating the weights of one neuron, and each computation engine is responsible for calculating the membrane voltage of one neuron.

[0115] In the aforementioned spiking neural network chip, because the weight compression uses a grouped semi-structured pruning scheme, the number of weights in each row and group is consistent after pruning. Multiple decompression engines can be used for parallel deassociation, multiple accumulation engines for parallel accumulation, and multiple computation engines for parallel computation. This further increases the computing speed of the spiking neural network chip, thereby improving computational efficiency and achieving the effect of reducing latency and power consumption.

[0116] Figure 15 This is a schematic block diagram of a spiking neural network system 1500 provided in an embodiment of this application. Figure 15 As shown, the spiking neural network system 1500 may include a memory 1510 and a neural network circuit 1520.

[0117] The memory 1510 can be used to store multiple compressed weight values. For example, the memory 1510 can correspond to the associated compressed weight storage space 240 mentioned above. Optionally, the memory 1510 can also be used to store information about the input neurons. For example, the memory 1510 can correspond to the input buffer 205 mentioned above.

[0118] There are various ways to implement the neural network circuit 1520, and this application embodiment does not limit this. For example, the neural network circuit 1520 can be... Figure 8 The pulse neural network circuit shown, for example, neural network circuit 1520 can also be... Figure 14 The spiking neural network circuit shown is described in detail above; please refer to the description of the spiking neural network circuit for more information. It will not be repeated here.

[0119] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0120] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0121] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0122] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0123] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0124] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0125] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0126] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A pulse neural network circuit, characterized in that, include: The compression module is used to sort the weight values ​​of each row in the initial weight matrix according to the weight size, and set the last s% of the sorted value to 0 to obtain the compressed weight matrix. Multiple decompression modules are used to obtain multiple weight values ​​and corresponding identifiers of multiple output neurons in the compressed weight matrix based on information from multiple input neurons. Each decompression module is used to obtain the weight values ​​of the same row number in the compressed weight matrix and the identifiers of multiple output neurons corresponding to the weight values ​​of the same row number in parallel. The number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, and each row of weight values ​​corresponds to one input neuron. The calculation module is used to determine the membrane voltage of the corresponding plurality of output neurons based on the plurality of weight values.

2. The circuit according to claim 1, characterized in that, The input neurons in the spiking neural network circuit include a first input neuron and a second input neuron, and the plurality of decompression modules include a first decompression module and a second decompression module. The first decompression module is used to obtain the first row weight value corresponding to the first input neuron in the compressed weight matrix and the identifiers of one or more output neurons corresponding to the first row weight value respectively; The second decompression module is used to obtain the weight values ​​of the second row corresponding to the second input neuron in the compressed weight matrix, and the identifiers of one or more output neurons corresponding to the weight values ​​of the second row respectively.

3. The circuit according to claim 1 or 2, characterized in that, The compression module is specifically used to divide each row of the initial weight matrix into several weight groups of equal number. Taking each group in each row of the initial weight matrix as the granularity, the weight values ​​in each group in the initial weight matrix are sorted according to the weight size. The last s% of the sorted value is set to 0, so that the compressed weight matrix includes multiple weight groups, and the number of non-zero weight values ​​in each row of each weight group is the same.

4. The circuit according to claim 3, characterized in that, The computation module includes multiple computation sub-modules, each of which is responsible for calculating the membrane voltage of the output neuron in a weighted reassembly in parallel.

5. The circuit according to claim 4, characterized in that, The plurality of computational submodules include a first computational submodule and a second computational submodule. The first computational submodule includes a first accumulation engine and a first computational engine, and the second computational submodule includes a second accumulation engine and a second computational engine. The first accumulation engine is used to determine the weight accumulation value corresponding to the output neuron in the first weight reorganization corresponding to the first calculation submodule; The first computing engine is used to determine the membrane voltage of the output neuron in the first weighted reorganization at the current moment based on the weighted accumulation value output by the first accumulation engine. The second accumulation engine is used to determine the weight accumulation value corresponding to the output neuron in the second weight reassembly corresponding to the second calculation submodule; The second calculation engine is used to determine the membrane voltage of the output neuron in the second weighted reassembly at the current time based on the weighted accumulation value output by the second accumulation engine.

6. A computational method based on a spiking neural network, characterized in that, include: Sort the weight values ​​of each row in the initial weight matrix according to their weight size, and set the last s% of the sorted values ​​to 0 to obtain the compressed weight matrix. Multiple weight values ​​and corresponding identifiers of multiple output neurons are obtained from the information of multiple input neurons in the compressed weight matrix. The multiple weight values ​​include weight values ​​of the same row number in the compressed weight matrix obtained in parallel. The identifiers of multiple output neurons include the identifiers of multiple output neurons corresponding to the weight values ​​of the same row number obtained in parallel. The number of non-zero weight values ​​in each row of the compressed weight matrix is ​​the same, and each row of weight values ​​corresponds to one input neuron. The membrane voltage of the corresponding output neurons is determined based on the multiple weight values.

7. The method according to claim 6, characterized in that, The input neurons of the spiking neural network include a first input neuron and a second input neuron. The step of obtaining multiple weight values ​​in the compressed weight matrix and the corresponding identifiers of multiple output neurons based on information from multiple input neurons includes: Obtain the weight values ​​of the first row corresponding to the first input neuron in the compressed weight matrix, and the identifiers of one or more output neurons corresponding to the weight values ​​of the first row respectively; Obtain the weight values ​​of the second row corresponding to the second input neuron in the compressed weight matrix, and the identifiers of one or more output neurons corresponding to the weight values ​​of the second row.

8. The method according to claim 6 or 7, characterized in that, The step of sorting the weight values ​​of each row in the initial weight matrix according to their weight magnitude, and setting the last s% of the sorted value to 0, to obtain the compressed weight matrix includes: Each row of the initial weight matrix is ​​divided into several weight groups of equal number. Taking each group in each row of the initial weight matrix as the granularity, the weight values ​​in each group in the initial weight matrix are sorted according to the weight size. The last s% of the sorted value is set to 0, so that the compressed weight matrix includes multiple weight groups, and the number of non-zero weight values ​​in each row of each weight group is the same.

9. The method according to claim 8, characterized in that, The step of determining the membrane voltage of the corresponding plurality of output neurons based on the plurality of weight values ​​includes: The membrane voltage of the corresponding multiple output neurons is determined in parallel based on the multiple weight values ​​in each weighted reassembly.

10. The method according to claim 9, characterized in that, The multiple rights restructurings include a first rights restructuring and a second rights restructuring. The parallel determination of the membrane voltage of the corresponding plurality of output neurons based on the plurality of weight values ​​in each weighted reassembly includes: Determine the weight accumulation value corresponding to the output neuron in the first weighted reassembly, and determine the membrane voltage of the output neuron in the first weighted reassembly at the current time based on the weight accumulation value corresponding to the output neuron in the first weighted reassembly; and determine the weight accumulation value corresponding to the output neuron in the second weighted reassembly, and determine the membrane voltage of the output neuron in the second weighted reassembly at the current time based on the weight accumulation value corresponding to the output neuron in the second weighted reassembly.

11. A spiking neural network system, characterized in that, It includes a memory and a spiking neural network circuit as described in any one of claims 1 to 5, wherein the memory is used to store a plurality of compressed weight values.

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