Charging pile protection circuit and phase sequence detection method

Abstract

The application provides a charging pile protection grounding and phase sequence detection method, the charging pile protection circuit comprises a signal acquisition module, a signal conversion module and a main control module connected in sequence; the signal acquisition module is used for acquiring input voltage signals of a zero line and a live line respectively, the signal conversion module is used for converting the input voltage signal of the zero line into a first output voltage signal and converting the input voltage signal of the live line into a second output voltage signal; the main control module determines whether the input phase sequence of the live line input end and the zero line input end is correct and whether the input ground wire is connected according to the first output voltage signal and the second output voltage signal, controls the charging pile to stop charging in the case that the input ground wire is disconnected, and gives a relevant warning when the input phase sequence is incorrect; the application only needs to judge whether the input phase sequence is reversed and whether the input ground wire is connected through high and low levels, realizes simple logic, and is beneficial to protecting the charging safety of the charging pile.

Description

Technical Field

[0001] This invention relates to the field of charging pile technology, and more specifically, to a charging pile protection circuit and a phase sequence detection method. Background Technology

[0002] Electric vehicles are becoming increasingly popular, leading to a significant increase in the use of charging stations. As high-voltage equipment, charging stations have stringent safety requirements. Continuity detection of the grounding conductor is a crucial element, protecting not only the electric vehicle but also the safety of passengers.

[0003] The charging pile input includes a live wire (L wire), a neutral wire (N wire), and a PE (ground wire). The PE wire ensures the safety of the charging pile and the electric vehicle's casing under various conditions (including fault conditions) during charging, preventing harm to the electric vehicle and people. While a charging pile can work normally with the live and neutral wires reversed, it still poses a safety hazard.

[0004] Existing technologies typically employ the following two methods to detect reverse phase sequence of live and neutral wires and to detect the connection status of the grounding wire:

[0005] Option 1: Use an insulation resistance detection circuit. This option employs a complex circuit involving optocouplers and control chips, and the control timing is also relatively complex. This type of circuit is generally expensive and bulky, making it impractical. Furthermore, this circuit only detects ground wire detachment and does not detect reverse phase sequence connection.

[0006] Option 2: Detect the voltage after rectification of the live and neutral wires and transmit it via an optocoupler. The signal from the optocoupler is then used for judgment. This circuit is highly sensitive to parasitic voltage after rectification, making the selection of relevant parameters for the detection circuit extremely prone to false detections. Furthermore, this circuit requires the customer to ensure the live and neutral wires are not reversed, imposing certain constraints on the customer's application. Additionally, the circuit lacks the function of detecting reverse phase sequence. Summary of the Invention

[0007] In view of this, the present invention provides a charging pile protection circuit and a phase sequence detection method for detecting reverse connection of the neutral and live wires of the charging pile.

[0008] According to one aspect of the present invention, a charging pile protection circuit is provided, comprising a signal acquisition module, a signal conversion module and a main control module connected in sequence;

[0009] The signal acquisition module is used to acquire the input voltage signals of the neutral wire and the live wire respectively. The signal conversion module is used to convert the input voltage signal of the neutral wire into a first output voltage signal and the input voltage signal of the live wire into a second output voltage signal. The main control module determines whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct based on the first output voltage signal and the second output voltage signal, and outputs a warning message when the input phase sequence is incorrect.

[0010] Optionally, the main control module further determines whether there is a PE access anomaly based on the first output voltage signal and the second output voltage signal, and controls the charging pile to stop charging when there is a PE access anomaly.

[0011] Optionally, the main control module determines that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct when the combination formed by the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination; and determines that the input phase sequence is incorrect when the combination formed by the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination.

[0012] Optionally, the main control module determines that there is a PE access anomaly when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to a third preset mapping combination.

[0013] Optionally, the signal conversion module includes a transistor, which is used to convert the input signal into a low level or a high level. The base of the transistor is connected to the signal acquisition module, the emitter of the transistor is grounded, and the collector of the transistor is connected to the main control module.

[0014] Optionally, the signal conversion module further includes a first resistor, a second resistor, a first capacitor, and a live wire output terminal. The emitter of the transistor is also connected to the first terminal of the first capacitor. The collector of the transistor is connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is connected to the power supply voltage. The second terminal of the second resistor is connected to the live wire output terminal and the second terminal of the first capacitor, respectively.

[0015] Optionally, the signal acquisition module includes a live wire input terminal, a first diode, a third resistor, a fourth resistor, and a second capacitor. The positive terminal of the first diode is connected to the live wire input terminal, and the negative terminal of the first diode is connected to the first end of the third resistor. The first end of the fourth resistor and the second capacitor connected in parallel is connected to the second end of the third resistor, and the second end is grounded.

[0016] According to another aspect of the present invention, a phase sequence detection method is provided, which uses any of the above-mentioned charging pile protection circuits for detection, the method comprising the steps of:

[0017] S110, which collects the input voltage signals of the neutral wire and the live wire respectively;

[0018] S120, converting the input voltage signal of the neutral wire into a first output voltage signal, and converting the input voltage signal of the live wire into a second output voltage signal; and

[0019] S130: Based on the first output voltage signal and the second output voltage signal, determine whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct, and output a warning message when the input phase sequence is incorrect.

[0020] Optionally, step S130 further includes:

[0021] Based on the first output voltage signal and the second output voltage signal, determine whether there is a PE access anomaly, and control the charging pile to stop charging when there is a PE access anomaly.

[0022] Optionally, step S130 includes:

[0023] When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination, it is determined that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct; when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination, it is determined that the input phase sequence is incorrect.

[0024] Optionally, step S130 includes:

[0025] When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the third preset mapping combination, it is determined that there is a PE access anomaly.

[0026] The advantages of this invention compared to the prior art are as follows:

[0027] The charging pile protection circuit and phase sequence detection method provided by this invention obtains the output level status of the live wire and the output level status of the neutral wire respectively. It only needs to determine whether the input phase sequence is reversed by high and low levels. The logic is simple and conducive to protecting the charging safety of the charging pile. Attached Figure Description

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0029] Figure 1 This is a schematic diagram of a portion of the circuit structure in a charging pile protection circuit according to an embodiment of the present invention;

[0030] Figure 2 This is a schematic diagram of another part of the circuit structure in a charging pile protection circuit disclosed in an embodiment of the present invention;

[0031] Figure 3 This is a schematic diagram of the wiring of a charging pile according to an embodiment of the present invention;

[0032] Figure 4 This is a schematic flowchart of a phase sequence detection method for charging piles disclosed in an embodiment of the present invention. Detailed Implementation

[0033] Example embodiments will now be described more fully with reference to the accompanying drawings. However, these example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the invention will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced without one or more of the specific details described, or other methods, materials, apparatus, etc., can be employed. In other instances, well-known technical solutions are not shown or described in detail to avoid obscuring aspects of this disclosure. The same reference numerals in the figures denote the same or similar structures, and therefore their detailed descriptions are omitted.

[0034] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including,” “having,” and “have” are used to indicate an open-ended inclusion meaning and that other elements / components / etc. may exist in addition to the listed elements / components / etc.

[0035] This invention discloses a charging pile protection circuit and a phase sequence detection method. The charging pile protection circuit includes a signal acquisition module, a signal conversion module, and a main control module connected in sequence. That is, the signal conversion module is connected to both the signal acquisition module and the main control module.

[0036] In this embodiment, the signal acquisition module is used to acquire the input voltage signals of the neutral wire and the live wire, respectively. The signal conversion module is used to convert the input voltage signal of the neutral wire into a first output voltage signal and the input voltage signal of the live wire into a second output voltage signal.

[0037] Specifically, the aforementioned signal acquisition module includes a first acquisition module and a second acquisition module. The first acquisition module is used to acquire the input voltage signal of the live wire. The second acquisition module is used to acquire the input voltage signal of the neutral wire. The first acquisition module may include a live wire input terminal, which is used to connect to the live wire of the power supply. The second acquisition module may include a neutral wire input terminal, which is used to connect to the neutral wire of the power supply. The aforementioned charging pile protection circuit also includes a PE wire input terminal, which is used to connect to the grounding wire. In this embodiment, the circuit structures of the first acquisition module and the second acquisition module are the same, but this application is not limited thereto.

[0038] The signal conversion module may include a first conversion module and a second conversion module, with the first conversion module connected to the aforementioned first acquisition module. The first conversion module converts the input voltage signal of the live wire into a second output voltage signal. The second conversion module converts the input voltage signal of the neutral wire into a first output voltage signal. In this embodiment, the circuit structures of the first and second conversion modules are the same, but this application is not limited thereto.

[0039] In this embodiment, both the first conversion module and the second conversion module include transistors. These transistors are used to convert the input signal to a low or high level. The base of the transistor in the first conversion module is connected to the first acquisition module. The base of the transistor in the second conversion module is connected to the second acquisition module. The emitter of the transistor is grounded. The collector of each transistor is connected to the main control module.

[0040] This application uses transistors to convert the acquired signal into high and low levels, making the subsequent main control module's detection of phase sequence misconnections more accurate and improving overall accuracy. Compared to existing technologies that may use operational amplifiers to implement the aforementioned signal acquisition or signal conversion modules, the transistor-based solution in this application offers faster power-on speed and a better user experience. Because the input voltage fluctuates, the corresponding output needs to accommodate these fluctuations, causing the circuit to require a period of stabilization during startup, resulting in slower power-on speed. Furthermore, using operational amplifiers would increase the circuit size, hindering miniaturization design and increasing cost. In contrast, the solution in this application occupies less space and is less expensive. Additionally, compared to existing technologies that rely on specific voltage values ​​or even pulse detection, which involve complex logic implementation, this application offers a simpler implementation and greater practicality.

[0041] like Figure 1 As shown, in this embodiment, the first conversion module includes not only a first transistor Q1, but also a first resistor R1, a second resistor R2, a first capacitor C1, and a live wire output terminal. The emitter of the first transistor Q1 is connected to the first terminal of the first capacitor C1. The collector of the first transistor Q1 is connected to the first terminals of both the first resistor R1 and the second resistor R2. The second terminal of the first resistor R1 is connected to the power supply voltage. The second terminal of the second resistor R2 is connected to both the live wire output terminal and the second terminal of the first capacitor C1. The power supply voltage is VDD, which can be 3.3V. The second terminal of the first capacitor C1 is also connected to the live wire output terminal.

[0042] The aforementioned first acquisition module includes a first diode D1, a third resistor R3, a fourth resistor R4, and a second capacitor C2. The anode of the first diode D1 is connected to the live wire input terminal. The cathode of the first diode D1 is connected to the first terminal of the third resistor R3. The first terminal of the parallel connection of the fourth resistor R4 and the second capacitor C2 is connected to the second terminal of the third resistor R3, and the second terminal of the parallel connection of the fourth resistor R4 and the second capacitor C2 is grounded. The first terminal of the parallel connection of the fourth resistor R4 and the second capacitor C2 is also connected to the base of a first transistor Q1. The second terminal of the parallel connection of the fourth resistor R4 and the second capacitor C2 is also connected to the emitter of the first transistor Q1 and the first terminal of the first capacitor C1, respectively.

[0043] Figure 1 In this context, L_input is the live wire input terminal, and PE_loss_L is the live wire output terminal. The live wire output terminal outputs the first output voltage signal. (See reference) Figure 1 In the charging pile circuit, the protective grounding wire PE and the secondary ground SGND are connected as a reference ground for the CP signal (control and guidance function signal) and the low-voltage terminal voltage.

[0044] Since the structures of the first acquisition module and the first conversion module for the live wire are the same as those of the second acquisition module and the second conversion module for the neutral wire, refer to... Figure 2 This embodiment illustrates the structure of the second acquisition module and the second conversion module corresponding to the neutral line. It includes a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a second transistor Q2, a seventh resistor R7, an eighth resistor R8, a fourth capacitor C4, and a second diode D2. This embodiment... Figure 2 The circuit structure will not be described in detail here. Figure 2 In this context, N_input is the neutral input terminal, and PE_loss_N is the neutral output terminal. This neutral output terminal outputs the second output voltage signal.

[0045] The signal acquisition module and signal conversion module described in this application are composed of ordinary resistors, capacitors and semiconductor transistors, which occupy a small size and have low cost.

[0046] The main control module determines whether the phase sequence of the live wire input terminal and the neutral wire input terminal is correct based on the first output voltage signal and the second output voltage signal, and outputs a warning message when the phase sequence is incorrect; it also determines whether there is a PE connection abnormality based on the first output voltage signal and controls the charging pile to stop charging when a PE connection abnormality is found. A PE connection abnormality means that the PE line input terminal is not grounded, which could be due to the PE line being disconnected.

[0047] In practice, when an incorrect phase sequence is input, a warning message can be output on the charging pile's display screen, i.e., a relevant alert can be given. Alternatively, a warning message can be sent to the user's terminal device. This application does not impose any restrictions on this.

[0048] Specifically, Table 1 shows the judgment logic of the main control module. Referring to Table 1, the main control module determines that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination. When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination, the main control module determines that the input phase sequence is incorrect.

[0049] The main control module determines that a PE connection abnormality exists when the combination of the values ​​of the first output voltage signal and the second output voltage signal matches a third preset mapping combination. This main control module can be an MCU unit.

[0050] Table 1. Logic Table for Main Control Module

[0051] PE grounding Connect L Connect N L H PE ungrounded Connect L Connect N L L PE grounding Connect N Connect L H L PE ungrounded Connect N Connect L L L

[0052] Referring to Table 1, in this embodiment, when the phase sequence of the live and neutral wires is normal (i.e., L_input is connected to the L line and N_input is connected to the N line) and the PE line is grounded normally, the PE line is at the same potential as SGND. At the same time, the live input wire is connected to L_input and the neutral input wire is connected to N_input.

[0053] L_input is rectified by the first diode D1, and then divided by resistors R3 and R4 and capacitor C2 to generate a drive current that drives the first transistor Q1. Q1 is in a saturated conducting state, and after being filtered by resistor R2 and capacitor C1, it outputs a first output voltage signal, which is a low level, via PE_LOSS_L. N_input is at the same potential as SGND, so no current is generated there, and the second transistor Q2 is in the cutoff state, with PE_LOSS_N outputting a high level. Therefore, the above first preset mapping combination can be: PE_LOSS_L is mapped to the low level L, and PE_LOSS_N is mapped to the high level H.

[0054] When the phase sequence of the live and neutral wires is normal (i.e., L_input is connected to the L line and N_input is connected to the N line), and the PE line grounding is abnormal (i.e., not grounded), the potentials of SGND and PE line are not equal. However, due to the Y capacitor (not shown in the attached diagram), both N_input and L_input have a higher voltage relative to the reference ground SGND. This voltage will drive the first transistor Q1 and the second transistor Q2 to be in the conducting state, causing both PE_LOSS_L and PE_LOSS_N to output a low level. Therefore, the above third preset mapping combination can be: PE_LOSS_L mapped to low level L, and PE_LOSS_N mapped to low level L.

[0055] When the phase sequence of the live and neutral wires is reversed (i.e., L_input is connected to the N wire, and N_input is connected to the L wire), and the PE wire is properly grounded, the PE wire and SGND are at the same potential. Simultaneously, the live wire is connected to N_input, and the neutral wire is connected to L_input. N_input is rectified by the second diode D2 and then divided by resistors R7, R8, and capacitor C4 to generate a driving current that drives transistor Q2. Transistor Q2 is in a saturated conducting state. After being filtered by resistor R6 and capacitor C3, the current is filtered by PE_LOSS_N to output the second output voltage signal, which is a low level. Since L_input and SGND are at the same potential, no current is generated, the first transistor Q1 is in the off state, and PE_LOSS_L outputs a high level. Therefore, the above second preset mapping combination can be: PE_LOSS_L mapped to a high level H, and PE_LOSS_N mapped to a low level L.

[0056] When the phase sequence of the live and neutral wires is reversed (i.e., L_input is connected to the N wire and N_input is connected to the L wire), and the PE wire is abnormally grounded (i.e., not grounded), the potentials of the PE wire and SGND are not equal. Due to the effect of the Y capacitor in the circuit, N_input and L_input have an induced voltage relative to the reference ground SGND. This voltage is rectified and drives the second transistor Q2 and the first transistor Q1 respectively, causing both PE_LOSS_L and PE_LOSS_N to output a low level.

[0057] For example, the low level can be 0.6V and the high level can be 3.3V, but this application is not limited thereto.

[0058] Figure 3 This is a wiring diagram of an AC charging pile according to an embodiment of the present invention. K1 and K2 are both switches, and the AC / DC converter is a switching power supply that achieves AC input and DC output. The charging pile protection circuit disclosed in any of the above embodiments of the present invention is applied to the control unit in this diagram. OBC is an on-board charger.

[0059] An embodiment of the present invention also discloses a phase sequence detection method for charging piles. This phase sequence detection method uses the charging pile protection circuit disclosed in any of the above embodiments for detection. Detailed structural features and advantages of the charging pile protection circuit can be found in the descriptions of the above embodiments, and will not be repeated here. Figure 4 As shown, the phase sequence detection method includes the following steps:

[0060] S110 collects the input voltage signals of the neutral and live wires respectively.

[0061] S120 converts the input voltage signal of the neutral wire into a first output voltage signal and the input voltage signal of the live wire into a second output voltage signal.

[0062] S130: Based on the first output voltage signal and the second output voltage signal, determine whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct, and output a warning message when the input phase sequence is incorrect.

[0063] In one embodiment of this application, step S130 further includes:

[0064] Based on the first and second output voltage signals, it is determined whether a PE connection abnormality exists, and the charging pile is stopped from charging if a PE connection abnormality exists. Specifically, this step involves: based on the first and second output voltage signals, determining whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct and whether a PE connection abnormality exists; outputting a warning message if the input phase sequence is incorrect, and stopping the charging pile from charging if a PE connection abnormality exists.

[0065] In one embodiment of this application, step S130 includes:

[0066] When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination, it is determined that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct; when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination, it is determined that the input phase sequence is incorrect.

[0067] In one embodiment of this application, step S130 includes:

[0068] When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the third preset mapping combination, it is determined that there is a PE access anomaly.

[0069] In summary, the charging pile protection circuit and phase sequence detection method of the present invention have at least the following advantages:

[0070] The charging pile protection circuit and phase sequence detection method disclosed in this embodiment obtains the output level status of the live wire and the neutral wire respectively. By simply checking the high and low levels, it can determine whether the input phase sequence is reversed and whether the grounding wire is correctly grounded. The logic is simple and beneficial for protecting the charging safety of the charging pile. Furthermore, this invention only involves commonly used resistors, capacitors, and transistors, resulting in low cost and small footprint. The design only requires a current-driven transistor, simplifying parameter design.

[0071] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A charging pile protection circuit, characterized in that, It includes a signal acquisition module, a signal conversion module, and a main control module connected in sequence; The protective grounding wire PE is connected to the secondary ground SGND as a reference ground; The signal acquisition module includes a live wire input terminal, a neutral wire input terminal, a first diode, a second diode, a third resistor, a fourth resistor, a seventh resistor, an eighth resistor, a second capacitor, and a fourth capacitor. The anode of the first diode is connected to the live wire input terminal, and the cathode of the first diode is connected to the first end of the third resistor. The fourth resistor and the second capacitor are connected in parallel, with the first end connected to the second end of the third resistor, and the second end connected to the reference ground. The anode of the second diode is connected to the neutral wire input terminal, and the cathode of the second diode is connected to the first end of the seventh resistor. The eighth resistor and the fourth capacitor are connected in parallel, with the first end connected to the second end of the seventh resistor, and the second end connected to the reference ground. The signal conversion module includes a first transistor and a second transistor. The base of the first transistor is connected to the first end of the fourth resistor, the emitter of the first transistor is connected to the reference ground, and the collector of the first transistor is connected to the main control module. This module converts the input voltage signal from the live wire input terminal into a second output voltage signal. The base of the second transistor is connected to the first end of the eighth resistor, the emitter of the second transistor is connected to the reference ground, and the collector of the second transistor is connected to the main control module. This module converts the input voltage signal from the neutral wire input terminal into a first output voltage signal. The main control module determines whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct based on the first output voltage signal and the second output voltage signal, and outputs a warning message when the input phase sequence is incorrect; The main control module determines whether there is a PE access anomaly based on the first output voltage signal and the second output voltage signal, and controls the charging pile to stop charging when a PE access anomaly is found.

2. The charging pile protection circuit as described in claim 1, characterized in that, When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination, the main control module determines that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct; when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination, the main control module determines that the input phase sequence is incorrect.

3. The charging pile protection circuit as described in claim 1, characterized in that, The main control module determines that there is a PE access anomaly when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the third preset mapping combination.

4. The charging pile protection circuit as described in claim 1, characterized in that, The signal conversion module further includes a first resistor, a second resistor, a first capacitor, and a live wire output terminal. The emitter of the first transistor is also connected to the first terminal of the first capacitor. The collector of the first transistor is connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is connected to the power supply voltage. The second terminal of the second resistor is connected to the live wire output terminal and the second terminal of the first capacitor, respectively.

5. A phase sequence detection method, characterized in that, The method of using the charging pile protection circuit as described in any one of claims 1-4 for detection includes the following steps: S110, which collects the input voltage signals of the neutral wire and the live wire respectively; S120, convert the input voltage signal of the neutral wire into a first output voltage signal and the input voltage signal of the live wire into a second output voltage signal respectively; as well as S130: Based on the first output voltage signal and the second output voltage signal, determine whether the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct, and output a warning message when the input phase sequence is incorrect; based on the first output voltage signal and the second output voltage signal, determine whether there is a PE access abnormality, and control the charging pile to stop charging when there is a PE access abnormality.

6. The phase sequence detection method as described in claim 5, characterized in that, Step S130 includes: When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the first preset mapping combination, it is determined that the input phase sequence of the live wire input terminal and the neutral wire input terminal is correct; when the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the second preset mapping combination, it is determined that the input phase sequence is incorrect.

7. The phase sequence detection method as described in claim 5, characterized in that, Step S130 includes: When the combination of the values ​​of the first output voltage signal and the second output voltage signal conforms to the third preset mapping combination, it is determined that there is a PE access anomaly.

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