Data stream processing method and device, storage medium and electronic device

Abstract

Embodiments of the present application provide a data stream processing method and device, a storage medium and an electronic device, wherein the method comprises: receiving a data stream by an Ethernet PHY; in the case that a currently received block in a currently received data stream is a sync header error block, determining whether a plurality of blocks after the currently received block are all sync header error blocks; in the case that the plurality of blocks are all sync header error blocks, marking the currently received block and N continuous blocks after the currently received block as special marks, or replacing the currently received block and the N continuous blocks after the currently received block with special blocks, or first marking the currently received block and the N continuous blocks after the currently received block as special marks, and then replacing the blocks with the special marks with special blocks, wherein N is an integer greater than or equal to 1.

Description

Technical Field

[0001] This invention relates to the field of communications, and more specifically, to a data stream processing method and apparatus, a storage medium, and an electronic device. Background Technology

[0002] In existing Ethernet technologies, Figure 2 This is a schematic diagram of some functions of FEC. Figure 2 Only the FEC function related to this invention is shown in the figure. Other FEC functions are not shown in the figure. Among them, the 50G and 100G physical layer devices (PHYSICAL LAYER DEVICE, PHY) with forward error correction (FEC) function perform 64B / 66B to 256B / 257B transcoding and FEC encoding at the transmitting end and FEC decoding and 256B / 257B to 64B / 66B transcoding at the receiving end.

[0003] Figure 3 This is a diagram illustrating 50G PHY FEC error markings. Figure 3 The image shows a 50G PHY FEC encoded payload, which consists of a set of 257B code blocks, and each 257 code block consists of four 66-bit blocks. Figure 3 An FEC codeword consists of 80 66-bit blocks. When the receiver decodes FEC, it uses a certain algorithm (such as the Reed-Solomon algorithm) to calculate whether there are any errors in the FEC codeword. If there are errors (or if error correction is performed but there are errors that cannot be corrected), then a portion of the 66-bit blocks of the FEC codeword is marked as an error. Figure 3 In the diagram, each small square represents a 66-bit block, and the black squares represent blocks that are detected as erroneous by the FEC receiver during FEC decoding.

[0004] Figure 4 This is a diagram illustrating the error markings for a 100G PHY FEC. Figure 4 The image shows a 100G PHY FEC encoded payload, which consists of a set of 257B code blocks, and each 257 code block consists of four 66-bit blocks. Figure 4 An FEC codeword consists of 80 66-bit blocks. During FEC decoding at the receiving end, a certain algorithm (such as the Reed-Solomon algorithm) is used to calculate whether there are any errors in the FEC codeword. If there are errors (or if FEC error correction is performed but there are errors that cannot be corrected), then a portion of the 66-bit blocks of the FEC codeword is marked as an error. Figure 4In the diagram, each small square represents a 66-bit block, and the black squares represent blocks that are detected as erroneous by the FEC receiver during FEC decoding.

[0005] from Figure 3 and Figure 4 As can be seen, when FEC decoding detects an error (or an uncorrectable error) in an FEC codeword, only the 66-bit block related to that FEC codeword is marked as faulty. This causes other potentially faulty 66-bit data to be sent to the Ethernet MAC layer, resulting in a degraded Ethernet performance.

[0006] Regarding the 50G and 100GPHY technologies with forward error correction (FEC) capabilities, when an error is detected during FEC decoding at the receiving end, only a portion of the 64B / 66B blocks involved in the erroneous FEC codeword are marked as errors. This results in the erroneous 66-bit data being sent to the Ethernet MAC layer, leading to a decrease in Ethernet performance. Currently, no effective solution has been proposed for these issues. Summary of the Invention

[0007] This invention provides a data stream processing method and apparatus, storage medium and electronic device to at least solve the problem that when a 50G or 100GPHY with forward error correction (FEC) function detects an error during FEC decoding at the receiving end, it only marks a portion of the 64B / 66B blocks involved in the erroneous FEC codeword as erroneous, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer, resulting in a decrease in Ethernet performance.

[0008] According to one aspect of the present invention, a data stream processing method is provided, comprising: a receiving end receiving a data stream via an Ethernet PHY; if the currently received block in the currently received data stream is a block with a synchronization header error, determining whether a predetermined number of blocks following the currently received block are all blocks with synchronization header errors; if all are blocks with synchronization header errors, marking the currently received block and N consecutive blocks following the currently received block as special markers, or replacing the currently received block and N consecutive blocks following the currently received block with special blocks, or first marking the currently received block and N consecutive blocks following the currently received block as special markers, and then replacing the blocks with the special markers with special blocks, wherein N is an integer greater than or equal to 1.

[0009] Furthermore, the method further includes: in the case that not all blocks are blocks with synchronization header errors, detecting whether the next block after the currently received block is a block with a synchronization header error, wherein, in the case that the next block is a block with a synchronization header error, determining whether a preset number of blocks after the next block are all blocks with synchronization header errors; in the case that the next block and the preset number of blocks after the next block are all blocks with synchronization header errors, marking the next block and the N consecutive blocks after the next block as special markers, or replacing the next block and the N consecutive blocks after the next block with special blocks, or first marking the next block and the N consecutive blocks after the next block as special markers, and then replacing the blocks with the special markers with special blocks.

[0010] Furthermore, the method further includes: continuing to detect whether the first block after the first group of blocks is a block with a synchronization header error, wherein the first group of blocks includes: the currently received block, and N consecutive blocks after the currently received block; if the first block after the first group of blocks is a block with a synchronization header error, determining whether a preset number of blocks after the first block are blocks with synchronization header errors; if all of them are blocks with synchronization header errors, marking the first block and the N consecutive blocks after the first block as special markers, or replacing the first block and the N consecutive blocks after the first block with special blocks, or first marking the first block and the N consecutive blocks after the first block as special markers, and then replacing the blocks with the special markers with special blocks; if the first block after the first group of blocks is not a block with a synchronization header error, sequentially detecting the blocks after the first group of blocks until the first block with a synchronization header error after the first group is determined.

[0011] Furthermore, after the receiving end receives the data stream via the Ethernet PHY, the method further includes: if the currently received block in the currently received data stream is not a block with a synchronization header error, detecting whether the next block after the currently received block is a block with a synchronization header error, wherein, if the next block is a block with a synchronization header error, determining whether a preset number of blocks after the next block are all blocks with synchronization header errors; if the next block and the preset number of blocks after the next block are all blocks with synchronization header errors, marking the next block and the N consecutive blocks after the next block as special markers, or replacing the next block and the N consecutive blocks after the next block with special blocks, or first marking the next block and the N consecutive blocks after the next block as special markers, and then replacing the blocks with the special markers with special blocks; if the next block is not a block with a synchronization header error, sequentially detecting the blocks after the next block until the first block with a synchronization header error after the currently received block is determined.

[0012] Furthermore, the special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

[0013] According to another aspect of the present invention, a data stream processing method is also provided, comprising: a receiving end receiving a data stream via an Ethernet PHY; when the receiving end performs forward error correction (FEC) decoding on the data stream and an FEC codeword error occurs in the data stream, marking the first block of the erroneous FEC codeword as a first identifier, and marking the last block of the erroneous FEC codeword as a second identifier; marking the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special identifiers, or replacing the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier with special blocks, or first marking the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special identifiers, and then replacing the block with the special identifier with special blocks.

[0014] Furthermore, the special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

[0015] According to another aspect of the present invention, a data stream processing method is also provided, comprising: a receiving end receiving a data stream via an Ethernet PHY; and, if the receiving end performs forward error correction (FEC) decoding on the data stream and the FEC codeword in the data stream is incorrect, marking all blocks corresponding to the FEC codeword as special marks, or replacing all blocks with special blocks, or first marking all blocks as special marks and then replacing the blocks with the special marks with special blocks.

[0016] Furthermore, the special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

[0017] According to another aspect of the present invention, a data stream processing apparatus is also provided, comprising: a first receiving module, configured to receive a data stream via an Ethernet PHY; a determining module, configured to determine whether a predetermined number of blocks following the currently received block are all blocks with synchronization header errors when the currently received block in the currently received data stream is a block with a synchronization header error; and a first processing module, configured to, when all blocks are blocks with synchronization header errors, mark the currently received block and N consecutive blocks following the currently received block as special markers, or replace the currently received block and N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and N consecutive blocks following the currently received block as special markers, and then replace the block with the special marker with a special block, wherein N is an integer greater than or equal to 1.

[0018] According to another aspect of the present invention, a data stream processing apparatus is also provided, comprising: a second receiving module, configured to receive a data stream via an Ethernet PHY; a marking module, configured to, when the receiving end performs forward error correction (FEC) decoding on the data stream and an FEC codeword error occurs in the data stream, mark a first block of the erroneous FEC codeword as a first identifier and mark the last block of the erroneous FEC codeword as a second identifier; and a second processing module, configured to mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special identifiers, or replace the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier with special blocks, or first mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special identifiers, and then replace the block with the special identifier with a special block.

[0019] According to another aspect of the present invention, a data stream processing apparatus is also provided, comprising: a third receiving module, configured to receive a data stream via an Ethernet PHY; and a third processing module, configured to, when the receiving end performs forward error correction (FEC) decoding on the data stream and the FEC codeword in the data stream is incorrect, mark all blocks corresponding to the FEC codeword as special marks, or replace all blocks with special blocks, or first mark all blocks as special marks and then replace the blocks with the special marks with special blocks.

[0020] According to another aspect of the present invention, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer program, and the computer program is configured to execute the above-described data stream processing method at runtime.

[0021] According to another aspect of the present invention, an electronic device is also provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the data stream processing method via the computer program.

[0022] This invention provides a data stream processing method. A receiving end receives a data stream via an Ethernet PHY. If the currently received block in the data stream is a block with a synchronization header error, it determines whether a predetermined number of blocks following the currently received block are also blocks with synchronization header errors. If all blocks are blocks with synchronization header errors, the currently received block and the N consecutive blocks following it are marked with a special marker, or the currently received block and the N consecutive blocks following it are replaced with special blocks, or the currently received block and the N consecutive blocks following it are first marked with a special marker, and then the block with the special marker is replaced with a special block, wherein N is an integer greater than or equal to 1. By adopting the above technical solution, the problem of 50G and 100GPHYs with forward error correction (FEC) function failing to detect errors during FEC decoding at the receiving end, only marking a portion of the 64B / 66B blocks of the erroneous FEC codeword, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer and resulting in Ethernet performance degradation, is solved. Instead, when the receiving end detects errors during FEC decoding, all 64B / 66B blocks of the erroneous FEC codeword are marked, preventing the erroneous 66-bit data from being sent to the Ethernet MAC layer and thus avoiding Ethernet performance degradation. Attached Figure Description

[0023] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with the description thereof, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:

[0024] Figure 1 This is a hardware structure block diagram of a computer terminal for a data stream processing method according to an embodiment of the present invention.

[0025] Figure 2 This is a schematic diagram of some of the functions of FEC;

[0026] Figure 3 This is a diagram illustrating the error markings for a 50G PHY FEC.

[0027] Figure 4 This is a schematic diagram of a 100G PHY FEC error marking;

[0028] Figure 5 This is a flowchart (I) of a data stream processing method according to an embodiment of the present invention;

[0029] Figure 6 This is a schematic diagram of the data stream processing method according to an embodiment of the present invention in 64B / 66B block format;

[0030] Figure 7 This is a schematic diagram of the Ethernet error block format of the data stream processing method according to an embodiment of the present invention;

[0031] Figure 8 This is a flowchart (II) of the data stream processing method according to an embodiment of the present invention;

[0032] Figure 9 This is a flowchart (III) of the data stream processing method according to an embodiment of the present invention;

[0033] Figure 10 This is a flowchart (IV) of the data stream processing method according to an embodiment of the present invention;

[0034] Figure 11 This is a structural block diagram (I) of a data stream processing device according to an embodiment of the present invention;

[0035] Figure 12 This is a structural block diagram (II) of the data stream processing device according to an embodiment of the present invention;

[0036] Figure 13 This is a structural block diagram (III) of the data stream processing device according to an embodiment of the present invention;

[0037] Figure 14 This is a schematic diagram of a specific pattern of a data stream processing method according to an embodiment of the present invention;

[0038] Figure 15This is a schematic diagram illustrating the relationship between the MTN and Ethernet protocol stack in the data stream processing method of this embodiment of the invention. Detailed Implementation

[0039] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0041] The methods and embodiments provided in this application can be executed on a computer terminal or similar computing device. Taking running on a computer terminal as an example, Figure 1 This is a hardware structure block diagram of a computer terminal for a data stream processing method according to an embodiment of the present invention. For example... Figure 1 As shown, a computer terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. In one exemplary embodiment, the computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1 The more or fewer components shown, or having the same Figure 1 Equivalent functions or ratios shown Figure 1 The functions shown have more different configurations.

[0042] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the data flow processing method in this embodiment of the invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thereby implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0043] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the computer terminal. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0044] In existing Ethernet technologies, 50G and 100G PHYs with Forward Error Correction (FEC) only mark a portion of the 64B / 66B block containing the erroneous FEC codeword when an error is detected during FEC decoding at the receiving end. This may result in the erroneous 66-bit data being sent to the Ethernet MAC layer, leading to a degraded Ethernet performance.

[0045] To address the aforementioned technical problems, this embodiment provides a data stream processing method. Figure 5 This is a flowchart (I) of a data stream processing method according to an embodiment of the present invention, which includes the following steps:

[0046] Step S502: The receiving end receives the data stream through the Ethernet PHY;

[0047] Step S504: If the receiving end performs forward error correction (FEC) decoding on the data stream and the FEC codeword in the data stream is incorrect, mark all blocks corresponding to the FEC codeword as special marks, or replace all blocks with special blocks, or first mark all blocks as special marks and then replace the blocks with the special marks with special blocks.

[0048] Through the above steps S502-S504, a data stream processing method is provided. The receiving end receives the data stream through an Ethernet PHY, and then performs forward error correction (FEC) decoding on the data stream. If the FEC codeword in the data stream is incorrect, all blocks corresponding to the erroneous FEC codeword are marked with a special marker, or all blocks are replaced with special blocks, or all blocks are marked with special markers first, and then the blocks with the special markers are replaced with special blocks. This technical solution solves the problem that in 50G and 100GPHYs with forward error correction, when an error is detected during FEC decoding at the receiving end, only a portion of the 64B / 66B blocks related to the erroneous FEC codeword are marked with an error marker, causing erroneous 66-bit data to be sent to the Ethernet MAC layer, leading to Ethernet performance degradation. Therefore, when an error is detected during FEC decoding at the receiving end, all 64B / 66B blocks of the erroneous FEC codeword are marked with an error marker, avoiding the sending of erroneous 66-bit data to the Ethernet MAC layer, thus preventing Ethernet performance degradation.

[0049] It should be noted that step S504 above can be executed in multiple ways. In one optional embodiment, all blocks corresponding to the erroneous FEC codeword are marked with special tags, or all blocks are replaced with special blocks, or all blocks are marked with special tags first, and then the blocks with the special tags are replaced with special blocks. In actual execution, all 80 66-bit blocks in the erroneous FEC codeword can be marked with special tags, or all 80 66-bit blocks in the erroneous FEC codeword can be replaced with special blocks, or all 80 66-bit blocks in the erroneous FEC codeword can be marked with special tags first, and then the blocks with the special tags are replaced with special blocks. In this embodiment, the specific method for marking the 80 66-bit blocks in the erroneous FEC codeword with special tags is to transmit the FEC codeword containing the erroneous tags to the adaptation function between the MTN (or SPN) segment layer and the optical medium layer, where the adaptation function marks all 66-bit blocks in the FEC codeword with erroneous tags and / or replaces them with special blocks; or the adaptation function between the MTN (or SPN) channel layer and the segment layer marks all 66-bit blocks in the FEC codeword with erroneous tags and / or replaces them with special blocks.

[0050] To better understand the special markers and special blocks described above, in an optional embodiment, the special markers include at least one of the following: an incorrect synchronization header, a specific pattern; the special blocks include: an error block. In this embodiment, Figure 6 This is a schematic diagram of the 64B / 66B block format of the data stream processing method of this invention embodiment. Specifically, the method of marking the 66-bit block in the FEC codeword that has an error is to set the synchronization header of the error block to 0b11 or 0b00. Figure 7 This is a schematic diagram of the Ethernet error block format of the data stream processing method according to an embodiment of the present invention. The 66-bit block in the erroneous FEC codeword is replaced with a special block, wherein the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6 In the payload area, certain bits have specific values, such as... Figure 14 The 0x2E in the example is, of course, a special marker in this embodiment of the invention that may be an incorrect type field value or an undefined type field value. This embodiment of the invention does not limit this.

[0051] To better address the aforementioned technical problems, this embodiment also provides a data stream processing method. Figure 8 This is a flowchart (II) of a data stream processing method according to an embodiment of the present invention, which includes the following steps:

[0052] Step S802: The receiving end receives the data stream through the Ethernet PHY;

[0053] Step S804: When the receiving end performs forward error correction (FEC) decoding on the data stream, and an FEC codeword error occurs in the data stream, the first block of the erroneous FEC codeword is marked as a first identifier, and the last block of the erroneous FEC codeword is marked as a second identifier.

[0054] Step S806: Mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, or replace the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier with special blocks, or first mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, and then replace the block with the special marker with a special block.

[0055] Through the above steps S802-S806, the receiving end receives the data stream through the Ethernet PHY, performs forward error correction (FEC) decoding on the data stream at the receiving end, and if an FEC codeword error occurs in the data stream, the first block of the erroneous FEC codeword is marked as a first identifier, and the last block of the erroneous FEC codeword is marked as a second identifier. The block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are marked as special identifiers, or the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are replaced with special blocks, or the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are first marked as special identifiers, and then the block with the special identifier is replaced with a special block. This technical solution addresses the problem in 50G and 100GPHYs with forward error correction (FEC) that, when an error is detected during FEC decoding at the receiver, only a portion of the 64B / 66B blocks related to the erroneous FEC codeword is marked as an error, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer, resulting in Ethernet performance degradation. Instead, when an error is detected during FEC decoding at the receiver, all 64B / 66B blocks of the erroneous FEC codeword are marked as errors, preventing the erroneous 66-bit data from being sent to the Ethernet MAC layer and thus avoiding Ethernet performance degradation.

[0056] It should be noted that in step S804 above, if an error occurs in the FEC codeword during the FEC decoding process of the receiving end's PHY, the receiving end first marks the first block involved in the erroneous FEC codeword as the first identifier and the last block as the second identifier. For better understanding, the first identifier is denoted as A and the second identifier as B. That is to say, in subsequent processing, step S804 will mark A, B and all blocks between A and B as special identifiers, or replace A, B and all blocks between A and B with special blocks, or first mark A, B and all blocks between A and B as special identifiers, and then replace the specially marked blocks between A, B and A with special blocks. In actual execution, you can either mark all blocks A, B, and between A and B with special tags, or replace all blocks A, B, and between A and B with special tags, or first mark all blocks A, B, and between A and B with special tags, and then replace all blocks A, B, and between A and B with special tags.

[0057] Meanwhile, for better understanding, markers A and B are used to identify FEC codeword boundaries. After the data stream is processed by the FEC decoding module, it becomes a continuous 64B / 66B block data stream after exiting the FEC decoding module. Therefore, it is not easy to determine which 64B / 66B blocks belong to the same FEC codeword.

[0058] To better understand the special markers and special blocks described above, in an optional embodiment, the special markers include at least one of the following: an incorrect synchronization header, a specific pattern; the special blocks include: an error block. In this embodiment, Figure 6 This is a schematic diagram of a data stream processing method according to an embodiment of the present invention in 64B / 66B block format. Figure 14 This is a specific schematic diagram of the data stream processing method according to an embodiment of the present invention. Specifically, the method of marking a 66-bit block in the FEC codeword that has an error can be to set the synchronization header of the error block to 0b11 or 0b00. Figure 7 This is a schematic diagram of the Ethernet error block format of the data stream processing method according to an embodiment of the present invention. The 66-bit block in the erroneous FEC codeword is replaced with a special block, wherein the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6 In the payload area, certain bits have specific values, such as... Figure 14 0x2E in the middle.

[0059] Furthermore, this embodiment provides a data stream processing method. Figure 9 This is a flowchart (III) of a data stream processing method according to an embodiment of the present invention, which includes the following steps:

[0060] Step S902: The receiving end receives the data stream through the Ethernet PHY;

[0061] Step S904: If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks after the currently received block are all blocks with synchronization header errors.

[0062] Step S906: In the case that all blocks have synchronization header errors, mark the currently received block and the N consecutive blocks following the currently received block as special marks, or replace the currently received block and the N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and the N consecutive blocks following the currently received block as special marks, and then replace the block with the special mark with a special block, where N is an integer greater than or equal to 1.

[0063] Through the above steps S902-S906, the receiving end receives a data stream through the Ethernet PHY; if the currently received block in the currently received data stream is a block with a synchronization header error, it is determined whether several preset blocks after the currently received block are all blocks with synchronization header errors; if they are all blocks with synchronization header errors, the currently received block and the N consecutive blocks after the currently received block are marked with a special mark, or the currently received block and the N consecutive blocks after the currently received block are replaced with special blocks, or the currently received block and the N consecutive blocks after the currently received block are first marked with a special mark, and then the block with the special mark is replaced with a special block, wherein N is an integer greater than or equal to 1. By adopting the above technical solution, the problem of 50G and 100GPHYs with forward error correction (FEC) function failing to detect errors during FEC decoding at the receiving end, only marking a portion of the 64B / 66B blocks of the erroneous FEC codeword, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer and resulting in Ethernet performance degradation, is solved. Instead, when the receiving end detects errors during FEC decoding, all 64B / 66B blocks of the erroneous FEC codeword are marked, preventing the erroneous 66-bit data from being sent to the Ethernet MAC layer and thus avoiding Ethernet performance degradation.

[0064] It should be noted that sometimes the receiving end does not know which 64B / 66B blocks in the received consecutive 64B / 66B blocks belong to the same complete FEC codeword. Therefore, it is necessary to perform a detection. First, a 64B / 66B block with a synchronization header error is obtained and designated as block 1. Then, it is checked whether the preset number of blocks after block 1 are all blocks with synchronization header errors. Specifically, these could be blocks 9, 17, 25, 33, 41, 49, 57, 65, 73, and 80 after block 1. If the preset number of blocks after block 1 are all blocks with synchronization header errors, then block 1 and the N consecutive blocks after block 1 (N is an integer greater than or equal to 1) are marked with a special mark, or replaced with special blocks. Alternatively, these 80 blocks (when N=79) can be marked with a special mark first, and then replaced with special blocks. In actual execution, the following methods can be used: Mark the first block and the N (where N is an integer greater than or equal to 1) consecutive blocks with a special mark; replace the first block and the N consecutive blocks with the special mark; or mark the first block and the N consecutive blocks with the special mark, and then replace the first block and the N consecutive blocks with the special mark. Then, starting from the 81st block (when N = 79), the process repeats.

[0065] In an optional implementation, if the preset blocks following the first block are not all blocks with synchronization header errors, it is detected whether the next block after the first block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether the preset blocks following the next block are all blocks with synchronization header errors. If the next block and the preset blocks following it are all blocks with synchronization header errors, the next block and the N (N is an integer greater than or equal to 1) consecutive blocks following the next block are marked with a special mark, or the next block and the N consecutive blocks following the next block are replaced with special blocks, or the next block and the N consecutive blocks following the next block are marked with a special mark first, and then the blocks with the special mark are replaced with special blocks.

[0066] In an optional implementation, after step S906, the method further includes: continuing to detect whether the first block after the first group of blocks is a block with a synchronization header error, wherein the first group of blocks includes: the currently received block, and N (N is an integer greater than or equal to 1) consecutive blocks after the currently received block; if the first block after the first group of blocks is a block with a synchronization header error, determining whether a preset number of blocks after the first block are blocks with synchronization header errors; if all of them are blocks with synchronization header errors, marking the first block and the N consecutive blocks after the first block as special markers, or replacing the first block and the N consecutive blocks after the first block with special blocks, or first marking the first block and the N consecutive blocks after the first block as special markers, and then replacing the blocks with special markers with special blocks; if the first block is not a block with a synchronization header error, sequentially detecting the blocks after the first group of blocks until the first block with a synchronization header error after the first group is determined, and then continuing to perform the above operations.

[0067] In this embodiment, for better illustration, the first group of blocks is first defined as the currently received block and the N consecutive blocks following the currently received block, i.e., the first block described above and the 79 consecutive blocks following the first block (when N=79). After marking all the blocks in the first group as special blocks, or replacing them with special blocks, or marking them as special blocks and then replacing them with special blocks, it is necessary to continuously detect the blocks following the first group of blocks, i.e., continue to detect whether the first block following the first group of blocks is a block with a synchronization header error. If the first block following the first group of blocks is a block with a synchronization header error, determine whether a preset number of blocks following the first block following the first group of blocks are blocks with synchronization header errors. If all of them are blocks with synchronization header errors, mark the first block and the N consecutive blocks following the first block as special blocks. Alternatively, the first block and the N consecutive blocks following it can be replaced with special blocks, or the first block and the N consecutive blocks following it can be marked as special blocks first, and then the blocks with the special marks can be replaced with special blocks. It should be noted that if the first block after the first group of blocks is not a block with a synchronization header error, the blocks after the first group of blocks need to be checked sequentially until the first block with a synchronization header error after the first group is identified. Then, the predetermined number of blocks following the first block with a synchronization header error are checked to see if they are blocks with synchronization header errors. If all the predetermined number of blocks following the first block with a synchronization header error after the first group of blocks are blocks with synchronization header errors, the second group of blocks is determined, namely the first block with a synchronization header error after the first group of blocks and the N consecutive blocks following the first block with a synchronization header error. The blocks in the second group are all marked as special blocks, or replaced with special blocks, or marked as special blocks first and then replaced with special blocks.

[0068] It should be noted that the blocks following the second group need to be continuously checked, following the same checking method used to determine the second group, to determine the third group. Similarly, after determining the third group, the fourth to Mth groups are continuously checked. While determining the third, fourth, and Mth groups, they are all marked as special blocks, either by replacing them with special blocks or by first marking them as special blocks and then replacing them with special blocks. Here, M is an integer greater than 1.

[0069] In an optional embodiment, after the receiving end receives the data stream via the Ethernet PHY in step S902, the method further includes: if the currently received block in the currently received data stream is not a block with a synchronization header error, detecting whether the next block after the currently received block is a block with a synchronization header error, wherein, if the next block is a block with a synchronization header error, determining whether a preset number of blocks after the next block are all blocks with synchronization header errors; if the next block and the preset number of blocks after the next block are all blocks with synchronization header errors, marking the next block and the N consecutive blocks after the next block as special markers, or replacing the next block and the N consecutive blocks after the next block with special blocks, or first marking the next block and the N consecutive blocks after the next block as special markers, and then replacing the blocks with the special markers with special blocks; if the next block is not a block with a synchronization header error, sequentially detecting the blocks after the next block until the first block with a synchronization header error after the currently received block is determined.

[0070] To better understand the special markers and special blocks described above, in an optional embodiment, the special markers include at least one of the following: an incorrect synchronization header, a specific pattern; the special blocks include: an error block. In this embodiment, Figure 6 This is a schematic diagram of a data stream processing method according to an embodiment of the present invention in 64B / 66B block format. Figure 14 This is a specific schematic diagram of the data stream processing method according to an embodiment of the present invention. Specifically, the method of marking a 66-bit block in the FEC codeword that has an error can be to set the synchronization header of the error block to 0b11 or 0b00. Figure 7 This is a schematic diagram of the Ethernet error block format of the data stream processing method according to an embodiment of the present invention. The 66-bit block in the erroneous FEC codeword is replaced with a special block, wherein the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6In the payload area, certain bits have specific values, such as... Figure 14 0x2E in the middle.

[0071] Obviously, the embodiments described above are merely some embodiments of the present invention, and not all embodiments. To better understand the above data stream processing method, the process is described below with reference to embodiments, but this is not intended to limit the technical solutions of the embodiments of the present invention. Specifically:

[0072] In an optional embodiment, for Ethernet, if there is an error in the FEC codeword during FEC decoding at the receiving end, the following steps are taken:

[0073] Step 1: In Ethernet or Ethernet-based Metro Transport Network (MTN) or Slicing Packet Network (SPN) networks, the sending end transmits data streams through a PHY with FEC.

[0074] Step 2: The receiving end receives the data stream through a PHY with FEC;

[0075] Step 3: When the FEC module at the receiving end performs FEC decoding, if an error is found (or FEC error correction is performed, but there are errors that cannot be corrected), the receiving end will send the FEC codeword containing partial error markers to the adaptation function between the MTN (or SPN) segment layer and the optical medium layer. The adaptation function will mark all 66-bit blocks in the FEC codeword with error markers or replace them with special blocks.

[0076] It should be noted that error flags can be... Figure 6 The synchronization header of the 66-bit block can be set to 0b11 or 0b00, or it can be... Figure 14 In 0x2E, special blocks can be like Figure 7 As shown.

[0077] To better understand step 3, Figure 15 This is a schematic diagram illustrating the relationship between the MTN and Ethernet protocol stacks in the data stream processing method of this invention. Metro Transport Network (MTN) or Slicing Packet Network (SPN) technology is an Ethernet-based bearer network technology. It adds a path layer and a segment layer to Ethernet and reuses the underlying Ethernet PHY technology as the optical medium layer (service layer), such as... Figure 15As shown. The adaptation function between the MTN (or SPN) segment layer and the optical medium layer can solve the above-mentioned error marking problem. The specific method is as follows: In Ethernet or Ethernet-based MTN / SPN networks, the transmitting end sends a data stream through a 50G or 100G PHY with FEC, and the receiving end receives the data stream through a 50G or 100G PHY with FEC. When the receiving end's FEC module performs FEC decoding, if an error is found (or FEC error correction is performed, but there are uncorrectable errors), the 66-bit block involved in the FEC codeword is marked as an error. The FEC codeword containing the error mark is transmitted to the adaptation function between the MTN (or SPN) segment layer and the optical medium layer, where the adaptation function marks all 66-bit blocks in the FEC codeword as errors. Alternatively, the adaptation function between the MTN (or SPN) channel layer and the segment layer can mark all 66-bit blocks in the FEC codeword as errors. Error flags can be set to 0b11 or 0b00 in the synchronization header of a 66-bit block.

[0078] In an optional embodiment, for Ethernet, if there is an error in the FEC codeword during FEC decoding at the receiving end, the following steps may also be taken:

[0079] Step (1): The sending end sends a data stream through the Ethernet PHY;

[0080] Step (2): The receiving end receives the data stream through the Ethernet PHY;

[0081] Step (2.1): When the receiver performs FEC decoding, if an error is found (or the receiver performs FEC error correction, but there is an error that cannot be corrected), the receiver marks the first block involved in the FEC codeword with error as A and the last block as B.

[0082] Step (2.2): In subsequent processing, mark A, B and all blocks between A and B with special marks or replace them with special blocks.

[0083] It should be noted that the special marker can be an incorrect synchronization header and / or an incorrect or undefined type field value, or a specific pattern. The special block shown can be an error block, and the special marker can be... Figure 6 The synchronization header of the 66-bit block can be set to 0b11 or 0b00, or it can be... Figure 14 In 0x2E, special blocks can be like Figure 7As shown. Markers A and B are used to identify FEC codeword boundaries. After the data stream is processed by the FEC decoding module, it becomes a continuous 64B / 66B block data stream after exiting the FEC decoding module. It is not easy to determine which 64B / 66B blocks belong to the same FEC codeword.

[0084] In an optional embodiment, Figure 10 This is a flowchart (four) of the data stream processing method according to an embodiment of the present invention. Specifically, in Ethernet, when FEC decoding is performed at the receiving end, if there is an error in the FEC codeword, it is also possible to... Figure 10 The following steps:

[0085] Step S1002: Receive 64B / 66B blocks from the data stream;

[0086] Step S1004: Determine whether the 64B / 66B block is a synchronization header error. If so, proceed to step S1008; otherwise, proceed to step S1006.

[0087] Step S1006: Detect the next 64B / 66B block;

[0088] Step S1008: Mark this block as the first block, and check whether the 9th, 17th, 25th, 33rd, 41st, 49th, 57th, 65th, 73rd, and 80th blocks are all blocks with synchronization header errors. If yes, proceed to step S1010; otherwise, proceed to step S1009.

[0089] Step S1009: Detect the second 64B / 66B block;

[0090] Step S10010: Mark blocks 1 through 80 with special marks or replace them with special blocks;

[0091] Step S10012: Detect the 81st 64B / 66B block.

[0092] In step S1002 above, the receiving end needs to continuously receive 64B / 66B blocks from the data stream. Then, step S1004 is executed to determine if the currently received 64B / 66B block has a synchronization header error. If the currently received 64B / 66B block does not have a synchronization header error, then step S1006 is executed to detect the next 64B / 66B block, and step S1004 is continued to determine if it is a block with a synchronization header error. If not, the next block is detected until a synchronization header error is detected. If a 64B / 66B block with a synchronization header error is detected, step S1008 is executed to mark this block as the first block. Then, it is checked whether the subsequent blocks 9, 17, 25, 33, 41, 49, 57, 65, 73, and 80 are also blocks with synchronization header errors. If they are, step S10010 is executed. If not, step S1009 is executed to check the next 64B / 66B block after the one marked as the first block, and the subsequent operations continue from step S1004. If, in step S1008, blocks 9, 17, 25, 33, 41, 49, 57, 65, 73, and 80 are detected to be blocks with synchronization header errors, then step S10010 is executed to mark blocks 1 through 80 (a total of 80 blocks) with a special mark or replace them with special blocks. Then, step S10012 is executed to detect the 81st 64B / 66B block, and the subsequent operations continue from step S1004.

[0093] It should be noted that the special markers in step S1010 above can be incorrect synchronization headers and / or incorrect or undefined type field values ​​or special patterns, the special blocks shown can be error blocks, and the special markers can be... Figure 6 The synchronization header of the 66-bit block can be set to 0b11 or 0b00, or it can be... Figure 14 In 0x2E, special blocks can be like Figure 7 As shown. Steps S1002-S1012 above do not change the existing FEC module. By adding a module with the functions of steps S1002-S1012 above outside the FEC module, it is possible to mark all blocks of the erroneous FEC codeword.

[0094] Furthermore, in Ethernet or Ethernet-based MTN or SPN networks, when the receiving end is a 50G or 100GPHY with FEC, and an error is detected in the FEC codeword in the FEC module, all 66-bit blocks in the FEC codeword are marked with a special flag or replaced with a special block. The special flag can be setting the synchronization header of the 64B / 66B block to 0b11 or 0b00, or it can be... Figure 14 In 0x2E, special blocks can be like Figure 7 As shown.

[0095] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods of the various embodiments of the present invention.

[0096] This embodiment also provides a data stream processing apparatus for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, hardware implementations, or a combination of software and hardware, are also possible and contemplated.

[0097] Figure 11 This is a structural block diagram (I) of a data stream processing device according to an embodiment of the present invention.

[0098] The first receiving module 112 is used to receive data streams via Ethernet PHY at the receiving end;

[0099] The determination module 114 is used to determine whether several preset blocks after the currently received block are all blocks with synchronization header errors when the currently received block in the currently received data stream is a block with a synchronization header error.

[0100] The first processing module 116 is configured to, when all blocks are blocks with synchronization header errors, mark the currently received block and the N consecutive blocks following the currently received block as special marks, or replace the currently received block and the N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and the N consecutive blocks following the currently received block as special marks, and then replace the block with the special marks with special blocks, wherein N is an integer greater than or equal to 1.

[0101] According to this invention, the receiving end receives a data stream via an Ethernet PHY; if the currently received block in the currently received data stream is a block with a synchronization header error, it determines whether a preset number of blocks following the currently received block are all blocks with synchronization header errors; if all are blocks with synchronization header errors, the currently received block and the N consecutive blocks following the currently received block are marked with a special marker, or the currently received block and the N consecutive blocks following the currently received block are replaced with special blocks, or the currently received block and the N consecutive blocks following the currently received block are first marked with a special marker, and then the block with the special marker is replaced with a special block, wherein N is an integer greater than or equal to 1. By adopting the above technical solution, the problem of 50G and 100GPHYs with forward error correction (FEC) function failing to detect errors during FEC decoding at the receiving end, only marking a portion of the 64B / 66B blocks of the erroneous FEC codeword, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer and resulting in Ethernet performance degradation, is solved. Instead, when the receiving end detects errors during FEC decoding, all 64B / 66B blocks of the erroneous FEC codeword are marked, preventing the erroneous 66-bit data from being sent to the Ethernet MAC layer and thus avoiding Ethernet performance degradation.

[0102] The first receiving module 112 is used when the receiving end does not know which 64B / 66B blocks in the received consecutive 64B / 66B blocks belong to the same complete FEC codeword, so it needs to be detected. First, it obtains a 64B / 66B block with a synchronization header error, and marks this block as the first block. The determining module 114 is used to detect whether the preset number of blocks after the first block are all blocks with synchronization header errors. Specifically, it can be the 9th, 17th, 25th, 33rd, 41st, 49th, 57th, 65th, 73rd, and 80th blocks after the first block. If the preset number of blocks after the first block are all blocks with synchronization header errors, then the first block and the N (N is an integer greater than or equal to 1) consecutive blocks after the first block are marked with a special mark, or replaced with a special block, or the 80 blocks (when N=79) are marked with a special mark first, and then the 80 blocks (when N=79) are replaced with special blocks. In actual execution, the following methods can be used: Mark the first block and the N (where N is an integer greater than or equal to 1) consecutive blocks with a special mark; replace the first block and the N consecutive blocks with the special mark; or mark the first block and the N consecutive blocks with the special mark, and then replace the first block and the N consecutive blocks with the special mark. Then, starting from the 81st block (when N = 79), the process repeats.

[0103] In an optional implementation, the first processing module 116 is further configured to, if not all of the preset blocks following the first block are blocks with synchronization header errors, detect whether the next block after the first block is a block with a synchronization header error, and if the next block is a block with a synchronization header error, determine whether all of the preset blocks following the next block are blocks with synchronization header errors; if the next block and the preset blocks following it are all blocks with synchronization header errors, mark the next block and the N (N is an integer greater than or equal to 1) consecutive blocks following the next block as special marks, or replace the next block and the N consecutive blocks following the next block with special blocks, or first mark the next block and the N consecutive blocks following the next block as special marks, and then replace the blocks with the special marks with special blocks.

[0104] In an optional implementation, the first processing module 116 is further configured to continue detecting whether the first block after the first group of blocks is a block with a synchronization header error, wherein the first group of blocks includes: the currently received block, and N (N is an integer greater than or equal to 1) consecutive blocks after the currently received block; if the first block after the first group of blocks is a block with a synchronization header error, determine whether a preset number of blocks after the first block are blocks with synchronization header errors; if all of them are blocks with synchronization header errors, mark the first block and the N consecutive blocks after the first block as special markers, or replace the first block and the N consecutive blocks after the first block with special blocks, or first mark the first block and the N consecutive blocks after the first block as special markers, and then replace the blocks with special markers with special blocks; if the first block is not a block with a synchronization header error, detect the blocks after the first group of blocks sequentially until the first block with a synchronization header error after the first group is determined.

[0105] In this embodiment, for better illustration, the first group of blocks is first defined as the currently received block and the N consecutive blocks following the currently received block, i.e., the first block described above and the 79 consecutive blocks following the first block (when N=79). After marking all the blocks in the first group with a special marker, or replacing them with special blocks, or marking them with special blocks first and then replacing them with special blocks, it is necessary to continuously detect the blocks following the first group of blocks, that is, to continue to detect whether the first block following the first group of blocks is a block with a synchronization header error. If the first block following the first group of blocks is a block with a synchronization header error, it is determined whether a preset number of blocks following the first block following the first group of blocks are blocks with synchronization header errors. If all of them are blocks with synchronization header errors, the first block and the N consecutive blocks following the first block are all marked with a special marker. The process involves either replacing the first block and the N consecutive blocks following it with special blocks, or first marking the first block and the N consecutive blocks following it as special blocks, and then replacing the blocks with the special marks with special blocks. It should be noted that if the first block after the first group of blocks is not a block with a synchronization header error, the blocks after the first group of blocks need to be checked sequentially until the first block with a synchronization header error after the first group is identified. Then, the process continues to check if a predetermined number of blocks following the first block with a synchronization header error are also blocks with synchronization header errors. If all the predetermined number of blocks following the first block with a synchronization header error after the first group of blocks are blocks with synchronization header errors, a second group of blocks is determined, consisting of the first block with a synchronization header error after the first group of blocks and the N consecutive blocks following the first block with a synchronization header error. All blocks in the second group are marked as special blocks, or replaced with special blocks, or marked as special blocks first and then replaced with special blocks.

[0106] It should be noted that the blocks following the second block need to be continuously checked, following the same checking method used to determine the second block, to determine the third block. Similarly, after determining the third block, the fourth to Mth blocks are continuously checked. While determining the third, fourth, and Mth blocks, they are all marked as special blocks, either by replacing them with special blocks or by first marking them as special blocks and then replacing them with special blocks. M is an integer greater than 1.

[0107] In an optional embodiment, the determining module 114 is further configured to, if the currently received block in the currently received data stream is not a block with a synchronization header error, detect whether the next block after the currently received block is a block with a synchronization header error, wherein, if the next block is a block with a synchronization header error, determine whether a preset number of blocks after the next block are all blocks with synchronization header errors; the first processing module 116 is further configured to, if the next block and the preset number of blocks after the next block are all blocks with synchronization header errors, mark the next block and the N consecutive blocks after the next block as special markers, or replace the next block and the N consecutive blocks after the next block with special blocks, or first mark the next block and the N consecutive blocks after the next block as special markers, and then replace the blocks with the special markers with special blocks; if the next block is not a block with a synchronization header error, detect the blocks after the next block sequentially until the first block with a synchronization header error after the currently received block is determined, and continue to perform the above operations.

[0108] To better understand the special markers and special blocks described above, in an optional embodiment, the special markers include at least one of the following: an incorrect synchronization header, a specific pattern; the special blocks include: an error block. In this embodiment, Figure 6 This is a schematic diagram of a data stream processing method according to an embodiment of the present invention in 64B / 66B block format. Figure 14 This is a schematic diagram of a specific pattern of the data stream processing method according to an embodiment of the present invention. Specifically, the method of marking the 66-bit data of the 66-bit block in the FEC codeword that has an error can be to set the synchronization header of the error block to 0b11 or 0b00. Figure 7 This is a schematic diagram of the Ethernet error block format in the data stream processing method of this invention embodiment. The 66-bit block of data in the erroneous FEC codeword is replaced with a special block, wherein the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6 In the payload area, certain bits have specific values, such as... Figure 14 0x2E in the middle.

[0109] Figure 12 This is a structural block diagram (II) of the data stream processing device according to an embodiment of the present invention.

[0110] The second receiving module 122 is used for receiving data streams via Ethernet PHY at the receiving end;

[0111] The marking module 124 is used to mark the first block of the erroneous FEC codeword as a first identifier and the last block of the erroneous FEC codeword as a second identifier when the data stream is decoded by the receiving end through forward error correction (FEC) decoding and an FEC codeword error occurs in the data stream.

[0112] The second processing module 126 is used to mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, or to replace the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier with special blocks, or to first mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, and then replace the block with the special marker with a special block.

[0113] This invention allows for the following: When a data stream is received via an Ethernet PHY at the receiving end, and forward error correction (FEC) decoding is performed on the data stream at the receiving end, and an FEC codeword error occurs in the data stream, the first block of the erroneous FEC codeword is marked as a first identifier, and the last block of the erroneous FEC codeword is marked as a second identifier. The block with the first identifier, the block with the second identifier, and all blocks between the first and second identifiers are marked as special identifiers. Alternatively, the block with the first identifier, the block with the second identifier, and all blocks between the first and second identifiers can be replaced with special blocks. Or, the block with the first identifier, the block with the second identifier, and all blocks between the first and second identifiers can be marked as special identifiers first, and then the block with the special identifier can be replaced with a special block. This technical solution addresses the problem in 50G and 100GPHYs with forward error correction (FEC) that, when an error is detected during FEC decoding at the receiver, only a portion of the 64B / 66B blocks related to the erroneous FEC codeword is marked as an error, causing the erroneous 66-bit data to be sent to the Ethernet MAC layer, resulting in Ethernet performance degradation. Instead, when an error is detected during FEC decoding at the receiver, all 64B / 66B blocks of the erroneous FEC codeword are marked as errors, preventing the erroneous 66-bit data from being sent to the Ethernet MAC layer and thus avoiding Ethernet performance degradation.

[0114] The marking module 124 is used by the receiving end's PHY during FEC decoding. If an error occurs in the FEC codeword, the receiving end first marks the first block involved in the erroneous FEC codeword as a first identifier and the last block as a second identifier. For better understanding, the first identifier is denoted as A, and the second identifier as B. That is, in subsequent processing, A, B, and all blocks between A and B will be marked with special identifiers, or the blocks between A, B, and A and B will be replaced with special blocks, or the blocks between A, B, and A and B will be marked with special identifiers first, and then the specially marked blocks between A, B, and A and B will be replaced with special blocks. In actual execution, it is possible to mark all blocks between A, B, and A and B with special identifiers, or to replace all blocks between A, B, and A and B with special blocks, or to mark all blocks between A, B, and A and B with special identifiers first, and then replace all blocks between A, B, and A and B with special blocks.

[0115] Meanwhile, in this embodiment, markers A and B are used to identify FEC codeword boundaries. After the data stream is processed by the FEC decoding module, it becomes a continuous 64B / 66B block data stream after exiting the FEC decoding module. It is not easy to determine which 64B / 66B blocks belong to the same FEC codeword.

[0116] To better understand the aforementioned special markers and special blocks, special markers include at least one of the following: incorrect synchronization headers, specific patterns; special blocks include: error blocks. In this embodiment, the specific method for marking a 66-bit block in the erroneous FEC codeword with a special marker is to set the synchronization header of the error block to 0b11 or 0b00. The 66-bit block in the erroneous FEC codeword is then replaced with a special block, where the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6 In the payload area, certain bits have specific values, such as... Figure 14 0x2E in the middle.

[0117] Figure 13 This is a structural block diagram (III) of a data stream processing apparatus according to an embodiment of the present invention. The apparatus includes:

[0118] The third receiving module 132 is used for the receiving end to receive data streams via Ethernet PHY;

[0119] The third processing module 134 is used to perform forward error correction (FEC) decoding on the data stream at the receiving end, and if the FEC codeword in the data stream is incorrect, mark all blocks corresponding to the FEC codeword as special marks, or replace all blocks with special blocks, or first mark all blocks as special marks and then replace the blocks with the special marks with special blocks.

[0120] This invention provides a data stream processing apparatus. The receiving end receives a data stream via an Ethernet PHY, and then performs Forward Error Correction (FEC) decoding on the data stream. If an error occurs in the FEC codeword within the data stream, all blocks corresponding to the erroneous FEC codeword are marked with a special marker, or all such blocks are replaced with special blocks, or all such blocks are marked with special markers first, and then the blocks with the special markers are replaced with special blocks. This technical solution solves the problem in 50G and 100GPHY systems with forward error correction functionality. When an error is detected during FEC decoding at the receiving end, only a portion of the 64B / 66B blocks related to the erroneous FEC codeword are marked with an error marker, resulting in erroneous 66-bit data being sent to the Ethernet MAC layer and causing Ethernet performance degradation. Therefore, when an error is detected during FEC decoding at the receiving end, all 64B / 66B blocks of the erroneous FEC codeword are marked with an error marker, avoiding the sending of erroneous 66-bit data to the Ethernet MAC layer and thus preventing Ethernet performance degradation.

[0121] In an optional embodiment, the third processing module 134 is used to mark all blocks corresponding to the erroneous FEC codeword as special marks, or replace all blocks with special blocks, or first mark all blocks as special marks and then replace the blocks with the special marks with special blocks. In actual execution, it is possible to mark all 80 66-bit blocks in the erroneous FEC codeword as special marks, or to replace all 80 66-bit blocks in the erroneous FEC codeword with special blocks, or to mark all 80 66-bit blocks in the erroneous FEC codeword as special marks and then replace the blocks with the special marks with special blocks. In this embodiment, the specific method for marking the 80 66-bit blocks in the erroneous FEC codeword with special tags is to transmit the FEC codeword containing the erroneous tags to the adaptation function between the MTN (or SPN) segment layer and the optical medium layer, where the adaptation function marks all 66-bit blocks in the FEC codeword with erroneous tags and / or replaces them with special blocks; or the adaptation function between the MTN (or SPN) channel layer and the segment layer marks all 66-bit blocks in the FEC codeword with erroneous tags and / or replaces them with special blocks.

[0122] In this embodiment, the special markers include at least one of the following: an incorrect synchronization header, a specific pattern; the special blocks include: error blocks. In this embodiment, Figure 6 This is a schematic diagram of the 64B / 66B block format of the data stream processing method according to an embodiment of the present invention. Specifically, the method for marking a special 66-bit block in the erroneous FEC codeword is to set the synchronization header of the erroneous block to 0b11 or 0b00. The 66-bit block in the erroneous FEC codeword is then replaced with a special block, wherein the special block is... Figure 7 The error blocks described herein, but special blocks are not limited to those specified in the text. Figure 7 The error block shown. The specific pattern can be that certain bits in the 64 bits following the synchronization header (first 2 bits) in a 64B / 66B block have specific values, such as... Figure 6 In the payload area, certain bits have specific values, such as... Figure 14 0x2E in the middle.

[0123] Embodiments of the present invention also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to perform the steps in any of the above method embodiments when executed.

[0124] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0125] S1, the receiving end receives the data stream through the Ethernet PHY;

[0126] S2, if the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks after the currently received block are all blocks with synchronization header errors;

[0127] S3, in the case that all blocks have synchronization header errors, mark the currently received block and the N consecutive blocks following the currently received block as special marks, or replace the currently received block and the N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and the N consecutive blocks following the currently received block as special marks, and then replace the block with the special mark with a special block, where N is an integer greater than or equal to 1.

[0128] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0129] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0130] Embodiments of the present invention also provide an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0131] Optionally, in this embodiment, the processor can be configured to perform the following steps via a computer program:

[0132] S1, the receiving end receives the data stream through the Ethernet PHY;

[0133] S2, if the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks after the currently received block are all blocks with synchronization header errors;

[0134] S3, in the case that all blocks have synchronization header errors, mark the currently received block and the N consecutive blocks following the currently received block as special marks, or replace the currently received block and the N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and the N consecutive blocks following the currently received block as special marks, and then replace the block with the special mark with a special block, where N is an integer greater than or equal to 1.

[0135] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0136] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0137] It is obvious to those skilled in the art that the modules or steps of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0138] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for processing data streams, characterized in that, include: The receiving end receives the data stream via an Ethernet PHY; If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset blocks after the currently received block are all blocks with synchronization header errors. In the case of blocks all having synchronization header errors, the currently received block and the N consecutive blocks following it are marked with a special marker, or the currently received block and the N consecutive blocks following it are replaced with special blocks, or the currently received block and the N consecutive blocks following it are first marked with a special marker, and then the block with the special marker is replaced with a special block, wherein N is an integer greater than or equal to 1; the method further includes: In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with synchronization header errors. In the case where the next block is a block with synchronization header errors, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the next block and several blocks following it are all blocks with synchronization header errors, the next block and the N consecutive blocks following it are marked with a special mark, or the next block and the N consecutive blocks following it are replaced with special blocks, or the next block and the N consecutive blocks following it are first marked with a special mark, and then the blocks with the special mark are replaced with special blocks.

2. The method according to claim 1, characterized in that, The method further includes: Continue to check whether the first block after the first group of blocks is a block with a synchronization header error, wherein the first group of blocks includes: the currently received block, and N consecutive blocks after the currently received block; If the first block after the first group of blocks is a block with a synchronization header error, determine whether a preset number of blocks after the first block are blocks with synchronization header errors. If all of them are blocks with synchronization header errors, mark the first block and the N consecutive blocks after the first block as special blocks, or replace the first block and the N consecutive blocks after the first block with special blocks, or first mark the first block and the N consecutive blocks after the first block as special blocks, and then replace the blocks with the special blocks. If the first block after the first group of blocks is not a block with a synchronization header error, the blocks after the first group of blocks are checked sequentially until the first block with a synchronization header error after the first group is identified.

3. The method according to claim 1, characterized in that, After the receiving end receives the data stream via the Ethernet PHY, the method further includes: If the currently received block in the currently received data stream is not a block with a synchronization header error, it is detected whether the next block after the currently received block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the next block and several preset blocks following the next block are all blocks with synchronization header errors, mark the next block and the N consecutive blocks following the next block as special marks, or replace the next block and the N consecutive blocks following the next block with special blocks, or first mark the next block and the N consecutive blocks following the next block as special marks, and then replace the blocks with the special marks with special blocks; If the next block is not a block with a synchronization header error, the blocks after the next block are checked sequentially until the first block with a synchronization header error after the currently received block is identified.

4. The method according to any one of claims 1 to 3, characterized in that, The special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

5. A method for processing a data stream, characterized in that, include: The receiving end receives the data stream via an Ethernet PHY; When the receiving end performs forward error correction (FEC) decoding on the data stream, and an FEC codeword error occurs in the data stream, the first block of the erroneous FEC codeword is marked as a first identifier, and the last block of the erroneous FEC codeword is marked as a second identifier. The block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are marked as special identifiers, or the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are replaced with special blocks, or the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier are first marked as special identifiers, and then the block with the special identifier is replaced with a special block; The erroneous FEC codeword is determined in the following way: If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks following the currently received block are all blocks with synchronization header errors; if the preset number of blocks following the currently received block are all blocks with synchronization header errors, then the currently received block and the preset number of blocks following the currently received block belong to the same FEC codeword that has an error. In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the preset number of blocks after the next block are all blocks with synchronization header errors, then the next block and the preset number of blocks after the next block belong to the same FEC codeword that has an error.

6. The method according to claim 5, characterized in that, The special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

7. A method for processing a data stream, characterized in that, include: The receiving end receives the data stream via an Ethernet PHY; When the receiving end performs forward error correction (FEC) decoding on the data stream, and the FEC codeword in the data stream is incorrect, all blocks corresponding to the FEC codeword are marked as special marks, or all blocks are replaced with special blocks, or all blocks are marked as special marks first, and then the blocks with the special marks are replaced with special blocks. FEC codeword errors in the data stream are determined in the following manner: If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks following the currently received block are all blocks with synchronization header errors; if the preset number of blocks following the currently received block are all blocks with synchronization header errors, then the currently received block and the preset number of blocks following the currently received block belong to the same FEC codeword that has an error. In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the preset number of blocks after the next block are all blocks with synchronization header errors, then the next block and the preset number of blocks after the next block belong to the same FEC codeword that has an error.

8. The method according to claim 7, characterized in that, The special markers include at least one of the following: incorrect synchronization headers, specific patterns; the special blocks include: error blocks.

9. A data stream processing apparatus, characterized in that, include: The first receiving module is used for the receiving end to receive data streams via Ethernet PHY; The determination module is used to determine whether several preset blocks after the currently received block are all blocks with synchronization header errors, provided that the currently received block in the currently received data stream is a block with a synchronization header error. The first processing module is configured to, in the case that all blocks are blocks with synchronization header errors, mark the currently received block and the N consecutive blocks following the currently received block as special marks, or replace the currently received block and the N consecutive blocks following the currently received block with special blocks, or first mark the currently received block and the N consecutive blocks following the currently received block as special marks, and then replace the block with the special marks with special blocks, wherein N is an integer greater than or equal to 1; The device is also used for: In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with synchronization header errors. In the case where the next block is a block with synchronization header errors, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the next block and several blocks following it are all blocks with synchronization header errors, the next block and the N consecutive blocks following it are marked with a special mark, or the next block and the N consecutive blocks following it are replaced with special blocks, or the next block and the N consecutive blocks following it are first marked with a special mark, and then the blocks with the special mark are replaced with special blocks.

10. A data stream processing apparatus, characterized in that, include: The second receiving module is used for the receiving end to receive data streams via Ethernet PHY; The marking module is used to mark the first block of the erroneous FEC codeword as a first identifier and the last block of the erroneous FEC codeword as a second identifier when the receiving end performs forward error correction (FEC) decoding on the data stream and an FEC codeword error occurs in the data stream. The second processing module is used to mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, or to replace the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier with special blocks, or to first mark the block with the first identifier, the block with the second identifier, and all blocks between the first identifier and the second identifier as special markers, and then replace the block with the special marker with a special block; The device determines the erroneous FEC codeword in the following manner: If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks following the currently received block are all blocks with synchronization header errors; if the preset number of blocks following the currently received block are all blocks with synchronization header errors, then the currently received block and the preset number of blocks following the currently received block belong to the same FEC codeword that has an error. In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the preset number of blocks after the next block are all blocks with synchronization header errors, then the next block and the preset number of blocks after the next block belong to the same FEC codeword that has an error.

11. A data stream processing apparatus, characterized in that, include: The third receiving module is used by the receiving end to receive data streams via Ethernet PHY; The third processing module is used to perform forward error correction (FEC) decoding on the data stream at the receiving end, and if the FEC codeword in the data stream is incorrect, mark all blocks corresponding to the FEC codeword as special marks, or replace all blocks with special blocks, or first mark all blocks as special marks and then replace the blocks with the special marks with special blocks. The device determines that an FEC codeword error is present in the data stream by means of the following method: If the currently received block in the currently received data stream is a block with a synchronization header error, determine whether the preset number of blocks following the currently received block are all blocks with synchronization header errors; if the preset number of blocks following the currently received block are all blocks with synchronization header errors, then the currently received block and the preset number of blocks following the currently received block belong to the same FEC codeword that has an error. In the case where not all blocks are blocks with synchronization header errors, it is detected whether the next block after the currently received block is a block with a synchronization header error. If the next block is a block with a synchronization header error, it is determined whether a preset number of blocks after the next block are all blocks with synchronization header errors. If the preset number of blocks after the next block are all blocks with synchronization header errors, then the next block and the preset number of blocks after the next block belong to the same FEC codeword that has an error.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein the program, when executed, performs the method described in any one of claims 1 to 8.

13. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to execute the method described in any one of claims 1 to 8 through the computer program.

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