Solid state ground fault circuit interrupter

Abstract

A ground fault circuit interrupter is provided between an energy controlled supply circuit and a load circuit, including a fault detection circuit that senses ground path current leakage to the load circuit, a fault handling circuit that detects the presence of a fault and generates a fault output signal when a fault is detected, and a control circuit switch connected to the fault handling signal output, wherein the control circuit switch opens in the presence of the fault output signal, thereby isolating the load circuit from the supply circuit.

Description

[0001] Cross-references to related applications

[0002] This application corresponds to the U.S. national phase application PCT / US2019 / 064900 filed on December 6, 2019.

[0003] Statement regarding federally funded research or development

[0004] not applicable. Technical Field

[0005] This invention relates to protective devices (circuit breakers and resettable fuses) and power safety controllers. Preferred embodiments describe power controllers associated with the automatic and manual operation of ground fault circuit interrupters or residual current devices. Background Technology

[0006] A typical residential utility power supply is a three-wire 240V phase AC current source provided by the secondary winding of a center-tapped utility transformer, with the center tap connected to ground. The 240V source between the secondary (“live”) conductors powers high-power appliances such as stoves, ovens, and air conditioners, while the single-phase power for normal 120V distributed lighting / appliance circuits is provided between any “live” conductor and the center-tapped (“neutral”) conductor. Ground fault circuit interrupters (GFCIs) are an increasingly important addition to distribution systems to protect users from electric shock caused by accidental current paths from either “live” conductor to ground instead of to the “neutral” conductor. Such accidental current paths are most likely to occur when appliances are used near exposed conductors connected to ground, such as plumbing in kitchens and bathrooms or grounded metal structures outside the residence. In residential or light industrial applications, GFCIs typically come in two forms: integrated into conventional 120V electrical outlets or integrated into circuit breaker units mounted within the distribution board.

[0007] A GFCI (Gateway Circuit Injector) is designed to sense imbalances in the current flowing from the "live" conductor into the load and returning through the "neutral" conductor, thus indicating potential accidental / accidental current paths from the "live" conductor directly back to the "neutral" conductor through the ground. For example, such a spurious return path might exist when a hair dryer accidentally falls into a sink or bathtub full of water. A GFCI is designed to disconnect the circuit and interrupt the current ("trip") using an internal mechanical switch when the device detects a parasitic "leakage" current exceeding a set threshold flowing through such an accidental / accidental path. The threshold for most residential applications is 0.005 amps or 5 mA.

[0008] For conventional state-of-the-art ground fault detection (GFCI) systems, detecting a 5mA current imbalance across a load current potentially 4000 times greater (20 amps) in the presence of high-noise loads or high-noise AC sources is a challenging requirement and can lead to numerous fault trips over the product's lifespan. This ratio becomes even more problematic at higher load currents, or when the imbalance threshold drops to 1 or 2mA, particularly in humid locations such as pool lighting. Traditional methods of current imbalance detection based on magnetic sensors such as converters (CTs) or Hall effect sensors are highly unreliable in harsh EMI environments, triggering fault trips. Therefore, there is a need to develop ground fault sensing technologies with higher noise immunity and a wider dynamic range.

[0009] Another significant problem with conventional GFCIs is their slow response to faults. The mechanical switches in the internal circuitry connecting the load to the "live" and "neutral" conductors are typically closed, but spring-loaded, and disconnect the circuit when released by a mechanical latch triggered by an electromagnet (powered by the aforementioned current imbalance). Conventional GFCIs typically exhibit a delay of at least several milliseconds between the occurrence of an excessive current imbalance and load isolation. This delay is undesirable as it increases the risk of electric shock. Furthermore, the delay time in conventional GFCIs varies considerably. This variation is primarily due to limitations in magnetic and mechanical design, as well as the influence of physical factors such as installation stress and operating temperature. Even with the same device type, rating, and manufacturer, the delay time will differ between devices.

[0010] The GCFI delay time can also adversely affect the determination of the current imbalance threshold, leading to additional costs and inconvenient fault tripping. The physical separation of mechanical switch contacts can also create dangerous arcing conditions, which could trigger an explosion of any volatile gases present in the environment. Therefore, a further desired objective is to develop ground fault sensing technologies with smaller load disconnection delay times, preferably with solid-state switches exhibiting less variability and arc-free discharge.

[0011] Early receptacle-based ground fault circuit interrupters (many of which are still in use today) employed current sensing and switching technology, which is prone to failure when the mechanical switch is in the closed position. These failures resulted in functional receptacles lacking the intended ground fault protection. Furthermore, these early GFCIs did not include self-test functionality or end-of-life indication. Complicating matters further, most owners never test their GFCIs, and those who do often perform tests improperly. Recent GFCI designs have incorporated self-test capabilities, a development from the relatively unreliable electromechanical nature of traditional CFCIs. Therefore, there is a need to develop smart solid-state technologies to improve the reliability of GFCI devices.

[0012] Homeowners and GFCI service providers often experience inconvenience due to GFCIs. For example, new home builders often receive warranty repair requests for GFCI-protected outlets that tripped due to an upstream GFCI, but this can seem ineffective to users because they cannot identify the GFCI tripping event or the location of the tripped GFCI, which could be in a completely different area of ​​the room or adjacent rooms. This inconvenience is offset by the relative safety improvements compared to conventional electrical outlets; however, the increased convenience may expand the application of GFCIs and save more lives. Furthermore, building companies report that GFCI problems are the number one reason for their warranty claims. As mentioned above, GFCI problems include simple electromechanical failures, fault tripping, the need for manual testing, and a lack of understanding of upstream GFCIs. Fault tripping occurs when a normally functioning load or circuit causes the GFCI to trip when it shouldn't. Fault tripping is particularly problematic when loads require constant power, such as a refrigerator plugged into a garage or laundry room wall outlet. Upstream GFCIs make it difficult for users to determine where to correct a circuit break and to identify which outlet caused the trip. Therefore, it is desirable to develop intelligent solid-state GFCI that eliminates the inconveniences of poor device reliability, fault tripping, manual testing, and upstream device confusion, and has additional benefits related to the characteristics of communicating tripping events.

[0013] We also hope to develop a smart solid-state GFCI with adjustable trip threshold.

[0014] There is also a need for a smart solid-state GFCI with built-in overcurrent protection.

[0015] It is also desirable to have the ability to connect to, operate, and control the GFCI via a wireless connection device, which includes features such as wireless trip notification and remote disconnection.

[0016] In addition, it is expected that GFCI will control the safe delivery of electricity and provide energy consumption data.

[0017] It is expected that GFCI will be able to exchange data and provide power management within the branch network.

[0018] It is also expected that there will be a GFCI (Power Delivery and Interference Center) to communicate power delivery and leakage in real time.

[0019] Another desired aspect is to enable GFCI to be fully compliant and operate via public or private networks for storing and responding to remote requests.

[0020] It is also expected that GFCI will become an alarm source to notify users of excessive power consumption, changes in condition, or the end of its lifespan.

[0021] The procurement and installation costs of GFCI devices have hindered the global adoption of ground fault detection. By using solid-state technology to improve the reliability, performance, and convenience of GFCI, and with technological advancements, it is expected to increase added value and reduce the cost of various functions. Therefore, the development of intelligent solid-state technology is anticipated to improve the perceived cost and value of GFCI devices, making their application more widespread and saving more lives.

[0022] Further technological advancements have enabled the integration of smart electronic devices with sensors and wireless connectivity. These advancements will enable energy sensing, enhanced situational awareness, remote monitoring and control, including the ability to remotely disable circuits, especially during emergencies or peak power loads. As devices become increasingly interconnected, the demand for better protection, new features, additional controls, convenience, security, and more information is also growing. These needs become increasingly critical over time, thus requiring new methods and devices.

[0023] Examples of prior art that address some, but not all, of the defects include Wellim Inc.’s Publication WO2018 / 159914, U.S. Patent Publication US 2008 / 0234879 by inventors Fuller et al., U.S. Patent Publication US2017 / 0104325 assigned to Brainwave Research Corporation, and U.S. Patent 6,807,035 by inventors Baldwin et al.

[0024] This application relates to the further modernization of ground fault circuit breakers, as detailed below. Attached Figure Description

[0025] Figure 1 A system-level block diagram of a prior art ground fault circuit interrupter is disclosed.

[0026] Figure 2 A block diagram of the components of the invented ground fault circuit breaker is shown.

[0027] Figure 3 An embodiment in which the GFCI switch is a solid-state switch is shown.

[0028] Figure 4 An embodiment in which GFCI is implemented using solid-state switches and electromechanical switches is shown.

[0029] Figure 5 A current sensing circuit using a sensing resistor is shown.

[0030] Figure 6 Examples of AC-to-DC converters used in some embodiments of GFCI are shown.

[0031] Figure 7 It shows Figure 6 More details about the AC / DC converter.

[0032] Figure 8 A schematic diagram of a bidirectional MOSFET switch used in some embodiments of GFCI is shown.

[0033] Figure 9 This shows the voltage source during the positive half-cycle of the AC mains waveform. Figure 8 Active components.

[0034] Figure 10 It shows Figure 9 The diagram shows a half-switch that allows for an increase in gate voltage.

[0035] Figure 11 A fully bidirectional switch configuration is shown. Figure 10 An example of the circuit.

[0036] Figure 12 It shows that it also includes a bypass diode. Figure 11 An example of a bidirectional switch.

[0037] Figure 13 Another embodiment of a solid-state bidirectional switch is shown.

[0038] Figure 14 A third embodiment of a solid-state bidirectional switch is shown.

[0039] Figure 15 An embodiment of optically activating a bidirectional switch is shown.

[0040] Figure 16 A preferred embodiment of optically activating a bidirectional switch is shown.

[0041] Figure 17 The GFCI includes a third switch that bypasses the load.

[0042] Figure 18 A preferred embodiment of a GFCI including load identification and arc fault detection is shown.

[0043] Figure 19 Is using Figure 18 The flowchart of the circuit method.

[0044] Figure 20 This is a block diagram showing the key components of a solid-state circuit breaker.

[0045] Figure 21 It shows Figure 20 More details about solid-state circuit breakers.

[0046] Figure 22It is shown Figure 21 A schematic diagram of an embodiment of a fault detection processor. Detailed Implementation

[0047] We hereby disclose intelligent mechanical solid-state ground fault circuit breakers and intelligent solid-state ground fault circuit breakers. These ground fault circuit breakers incorporate one or more methods disclosed below. Those skilled in the art will recognize that different aspects of the disclosed embodiments can also be combined.

[0048] A ground fault circuit interrupter (GFCI) is an automatically operating electrical switch designed to protect living organisms from electric shock. GFCIs are present in circuit branches. GFCIs are typically integrated into sockets, circuit breakers, wires, and power boards. This disclosure describes GFCI applications primarily within wall sockets; however, the techniques described herein can be implemented in any electrical installation or load within a circuit.

[0049] The basic function of GFCI is to interrupt the current after detecting a current leakage fault, which is usually referred to in this article as disconnection, open circuit, trip, or trip state.

[0050] The primary purpose of a GFCI (Power Grid Connection Injection) is to protect life from electric shock. The technologies disclosed below serve society by improving the functionality and characteristics of a standard GFCI. These improvements aim to enhance safety, increase convenience, raise energy awareness, improve control, conserve energy, and enhance situational awareness. The disclosed technologies implement and combine a range of novel technologies, including AC mains switching technology, AC-to-DC conversion technology, internal short-circuit tripping technology, technology for wirelessly transmitting status and sensor data to enable various innovative use cases, algorithms for fault detection, technologies for detecting and protecting against internal device failures, technologies for handling new loads via over-the-air updates, cloud service support for remote notification, and technologies for improved control, monitoring, and big data collection, including during utility failures. The disclosed technologies further implement and combine circuitry for shunt resistor current sensing, energy metering, and overcurrent detection, as well as technologies for avoiding fault conditions. These technologies are novel in themselves, but their real impact in addressing challenges such as improved safety, increased convenience, raised energy awareness, improved control, conserve energy, and enhanced situational awareness lies in their combination. The combination of these concepts is described in detail in this disclosure.

[0051] Figure 1A system-level block diagram of a prior art ground fault circuit interrupter 100 integrated into a conventional 120V electrical outlet is disclosed. A utility power supply 101 is connected to a load 102 via a GFCI 100 from a "live" wire 103 and a "neutral" wire 104. A converter 105 includes a dual primary winding 106 connected in series with the "live" wire and a dual primary winding 107 connected in series with the "neutral" wire, and a secondary winding 108. The connections to the primary windings 106 and 107 are arranged such that the current generated in the secondary winding 108 is proportional to the difference in current in the primary winding. The secondary winding 108 is connected to an AC solenoid 109 via an amplifier 110. This circuit is designed to trip normally closed spring-loaded switches 111A in the "live" circuit branch and 111B in the "neutral" circuit branch when the difference in primary current exceeds a desired leakage current threshold; in most applications, this threshold is typically 5mA. Optionally, a one-touch test button 112 is included to manually trip the test function, and may be, for example, a simple mechanical momentary push-button switch. A current-limiting resistor 113 limits the test current injected into the primary winding 107 to slightly greater than a current-sensing imbalance threshold, which is typically 5mA in many applications.

[0052] Those skilled in the art will recognize that switch 111A is generally sufficient to disconnect the "live" wire to electrical load 102, and switch 111B appears redundant. The dual-switch configuration is for situations where the "live" and "neutral" wires of the socket are accidentally reversed, ensuring that the "live" wire of the load is interrupted under any circumstances. In the following description of the GFCI embodiment, it will be understood that the switch shown in the "neutral" wire configuration is optional in certain applications where the possibility of reversed "live" and "neutral" electrical supply wires is eliminated due to mechanical installation environments, such as within the housing of a circuit breaker device installed in an electrical supply distribution panel.

[0053] Figure 2A block diagram of the ground fault circuit interrupter of the present invention is shown. Similar to prior art devices, the primary purpose of the device is to detect an imbalance between the currents in the "live" branch 103 and the "neutral" branch 104 of the circuit from AC source 101 to load 102. This imbalance indicates a ground current path other than through load 102 and causes switches 111A,B to open, thereby isolating load 102 from source 101. Current sensors are located on the "live" branch 201 and the "neutral" branch 202 of AC source 101. In a preferred embodiment, sensor units 201, 202 are integrated subsystems including a power supply, current sensing device, analog interface circuitry, analog-to-digital converter, digital signal processing, and digital interface circuitry, and provide a high-precision digital signal representing the branch current to a central microprocessor 206 powered by an independent power supply 205 via bidirectional digital data lines 210 and 211. This signal is electrically isolated from the voltage waveform on the measured line.

[0054] Voltage sensors 203 and 204 are located before switch 111A (203) and at load 102 (204), and transmit high-precision digital signals representing circuit voltage to central microprocessor 206 via bidirectional digital data lines 212 and 213. These digital signals are electrically isolated from the voltage waveform on the circuit under test.

[0055] Microprocessor 206 includes the functions of microprocessors known in the art, such as I / O, memory, processor, and user interface. In one embodiment, microprocessor 206 also includes communication device 207 for sending and receiving electronic communications to and from the GFCI. The communications may include the status of the GFCI, such as fault notification or normal operation of the GFCI. Microprocessor 206 is also programmed to alert the communication device and receive operating instructions upon detecting a fault condition. Operating instructions include programming the microprocessor to open and close switches 111A, B, thereby enabling remote activation of the GFCI. The operating instructions may also include limits for determining the fault condition. The communications may also include the status of other sensors, such as integrated voltage sensor units 203 and 204 that may be further incorporated into the GFCI. Other sensors may also include current sensors, power sensors, internal short-circuit sensors, voltage and current zero-crossing sensors, and sensors combined with algorithms within microprocessor 206 that allow identification of load types. In a preferred embodiment, communication device 207 is a wireless device for remote wireless communication. Communication can be done via wired and wireless methods, including near-field communication, local area networks, cellular networks, and the Internet.

[0056] The microprocessor is programmed to compare digitized signals received from current sensors 201 and 202. The comparison may include using historical data acquired from sensors 201 and 202, data from other sensors 203 and 204, and data received from a remote location via radio interface 207. In some embodiments, the comparison includes using information about the type of load 102. Example information may include whether load 102 is a resistive or inductive load. If the comparison indicates an imbalance in the current flowing across the circuit, the microprocessor sends a signal to disconnect switches 111A and 111B, thereby disconnecting load 102 from power supply 101. In one embodiment, the comparison is the value of the voltage drop across the live and neutral sensing resistors, and if the difference exceeds a preselected value, a ground fault condition is determined, and the switches are disconnected to disconnect the power source from the load. In one embodiment, switches 111A and 111B are separate electromechanical switches. In another embodiment, switches 111A and 111B are incorporated into a mechanical double-pole switch known in the art. In one embodiment, sensors 201 and 202 represent Hall effect sensors.

[0057] Figure 3 Another embodiment is shown, in which the switches are solid-state switches 301 and 302. This embodiment also requires a more complex switch control circuit 303 that communicates with the microprocessor 206 via a bidirectional digital data line 304. It also requires a separate manual reset function, such as a push-button switch 305 that is electrically reset via the microprocessor 206.

[0058] Figure 4 Another embodiment is shown, in which solid-state switches 301, 302 and electromechanical switches 401, 402 are connected in series to implement the switching. In a preferred embodiment, both the mechanical switches and the solid-state switches are controlled by the microprocessor 206 such that, during startup or reset, power is supplied to the mechanical switches only when the source voltage is less than a preselected limit, thereby avoiding the arcing common in mechanical switches that start at high voltages. Therefore, the mechanical switches 401 and 402 are controlled by a separate switch control circuit 403, which communicates with the microprocessor 206 via a bidirectional digital data line 404.

[0059] A fuse 405 is added to the system to protect it from internal failures or to provide a simple end-of-life protection mechanism, such as in the event of device failure. The fuse 405 is disconnected by an internal short-circuit switch 406 controlled by the microprocessor 206 and has a high current capacity between AC circuit branches. The internal short-circuit switch 406 is designed to carry the current necessary to disconnect the fuse 405 and can be implemented in various ways; a preferred embodiment is a switch with a series current-limiting resistor 407 configured to disconnect the fuse 405 without causing an upstream fault. The microprocessor is programmed to receive signals from voltage sensing devices 203, 204 and, if these signals indicate that any of switches 301, 302, 401, or 402 is open, send a failure communication to port 207 and deactivate the GFCI by activating switch 406 to disconnect the fuse 405. Another protection circuit includes a buffer 408, as known in industry, for protecting internal components from damage due to energy backlash from inductive loads.

[0060] Figure 5 A detailed block diagram of current sensing circuits 201 and 202 is shown. Each includes sensing resistors 501 and 502 (conventional precision resistor components) to generate a load voltage based on the total current going to (and from) the load. The voltage drop across sensing resistor 501 is buffered by programmable gain amplifier 503 and then applied to the input of analog-to-digital (A / D) converter 504. Digital signals are buffered and transmitted by digital signal processor 505. External digital input and output signals to digital signal processor 505 are buffered via optical isolators 506 and 507 and multiplexed onto bidirectional digital bus 210 for communication with microprocessor 206. The equivalent components of the current sensing circuit 201 on the "live" side are included in the current sensing circuit 202 on the "neutral" side, which communicates with microprocessor 206 via bidirectional digital bus 211. Current sensing circuits 201 and 202 are powered from independent power supplies 508 and 509, respectively. Power supply 508 provides the components of current sensing circuit 201 with a filtered DC operating voltage from the reference "live" wire, while power supply 509 provides the components of current sensing circuit 202 with a filtered DC operating voltage from the reference "neutral" wire.

[0061] AC to DC converter

[0062] AC-to-DC converters that do not require a rectifier, such as the 205, 508, and 509, typically include... Figure 6 The components shown and the methods implied by these components. Figure 7 The diagram shows a non-limiting specific example of a circuit element. (Reference) Figure 6An AC source 601 is connected to a surge protection element 602. In one embodiment, the surge element consists of resistive elements in the AC source's line and neutral wire. In another embodiment, when higher power and efficiency are required, the surge protection includes a switching element that provides high resistance upon startup and switches the resistive element out of the circuit during steady-state operation. After surge protection, the AC source is sampled using a sampling element 603. In one embodiment, the sampling element 603 includes a resistor configured in a voltage divider network. In another embodiment, the sampling element includes a reference voltage source and a comparator. In another embodiment, the sampling element can be manually adjusted. In another embodiment, the sampling element can be automatically adjusted. The sampled voltage is used as the power supply for a switch driver element 604. In a preferred embodiment, the switch driver element 604 receives a feedback voltage signal 609 from a storage element 606 and, based on this voltage signal, controls the voltage applied to the gates of the switching elements in the control switch and clamping element 605, thereby opening and closing the control switch 606 to supply power to the storage element 606 and ultimately to the load 608. In one embodiment, feedback 609 is removed, and the AC-to-DC converter is a feedforward converter, wherein charging of storage element 606 is controlled from the forward sides 603, 604, and 605. The addition of feedback control 609 provides a means for both feedforward and feedback control. In one embodiment, the balance of feedforward and feedback control is determined by the selection of components in voltage sampling element 603 and feedback line 609. In one embodiment, the balance of feedforward and feedback control is determined by resistive elements in sampling element 603 and feedback 609. In another embodiment, variable elements are used, thereby allowing adjustment of feedforward and feedback control. In a preferred embodiment, the switch driver includes a voltage divider and a switch. The switch and clamping element 605, controlled by switch driver 604, provides pulsed power to storage element 606 at a fixed maximum current. In a preferred embodiment, the switch and clamping element consists of a source-to-gate connected N-MOSFET and a Zener diode, limiting / clamping peak voltage and peak current to a preselected peak voltage value.

[0063] In one embodiment, the preselected limiting voltage is determined by the Zener voltage value of the Zener diode bridged to the gate-source of the N-MOSFET component of switch 605. Power from the switch and clamping elements, consisting of preselected peak current pulses, is supplied to storage element 606. In one embodiment, the voltage regulator includes a capacitor and a diode used as energy storage elements. The charge on the capacitor is fed back to the switch driver 604 via a voltage divider circuit, thereby maintaining a constant charge on the capacitor. The output from the storage element is fed to load 608 via voltage regulator 607. In another embodiment, the AC-to-DC converter also includes a current isolation element 610. In another embodiment, the AC-to-DC converter also includes an element 611 capable of obtaining feedback from load 608. In a preferred embodiment, the feedback circuit 611 also includes current isolation between control element 604 and load 608.

[0064] Figure 7A preferred embodiment of an AC-to-DC converter is shown. An AC source 601 is connected to a surge protection circuit 601, which in this preferred embodiment includes resistors R1 and R2. In another embodiment (not shown), the surge protection includes a switch such that current flows through resistors R1 and R2 during startup and bypasses the resistors once steady-state operation is achieved. In yet another embodiment, surge control uses inductors; i.e., elements R1 and R2 are replaced by inductors L1 and L2. The output of the surge protection reaches switch Q2 of the switch and clamping circuit 605 and voltage sampling element 603. The voltage sampling element 603 consists of resistors R3, R4, and R5 that sample the AC input and resistor R8 that provides feedback voltage from storage capacitor C1. The values ​​of R3, R4, R5, and R8 are chosen such that the voltage applied to the gate of switch Q1 in switch driver element 604 turns switch Q1 on and off, thereby synchronously turning switch Q2 on and off, thus providing a pre-selected timing output pulse from switch Q2 to charge storage element C1. Resistor R8 provides a feedback path regarding the charge on capacitor C1, and thus provides the output voltage to voltage sampling circuit 1303 and therefore to control circuit 604. Switching and clamping element 605 consists of switch Q2, Zener diode D1, and resistor R7. Switch Q2 is controlled by switch driver circuit 604. Based on a selected value of the Zener voltage of diode D1, the peak output current of switch Q2 is clamped to a pre-selected value. The pulse output from switch Q2 is connected to voltage regulator 606, which feeds back to voltage sampling 603 and switch driver 604 via R8, which maintains capacitor C1 at a constant charge. The control element switch Q1, and therefore the power switch Q2, are activated synchronously with the AC input 601, being opened or closed. The AC-to-DC converter provides a low-voltage output with pulse modulation at the frequency of the incoming AC source. At the zero-crossing point of the voltage near the AC source, within the threshold range of components Q1 and Q2, the switches are activated, opening or closing. The output then goes to voltage regulator 607, and then to load 608. Voltage regulator 607 includes switch Q3, Zener diode D3, resistor R9, and capacitor C2. Circuit components D3, Q3, and R9 function as voltage regulators. Capacitor C2 provides storage capacity to buffer and thus smooth the output from the AC-to-DC converter to load 608.

[0065] Figure 4 and Figure 5The AC-to-DC converter in the preferred embodiment includes a surge protection element 602, a voltage sampling element 603, a switch driver 604, a switch and clamp 605, a storage element 606, and a voltage regulator 607. The selection of components in the voltage sampling 603 determines the timing of the switch driver 604. The selection of components in the switch and clamp circuitry determines the peak voltage and current of the output pulse. Power output is controlled by selecting the peak current and pulse timing. Feedback from the storage element via voltage sampling is used to select the pulse timing. The AC-to-DC converter operates synchronously with an AC source.

[0066] Figure 6 and Figure 7 A preferred embodiment typically includes a voltage divider 603 connected to a power source 601, and a first switch 604 connected to the voltage divider via its input, and a second switch 605 connected to the output of the first switch via its input, and a storage capacitor C1 connected to the output of the second switch via a diode, and a sensing resistor 609 connected between the storage capacitor and the voltage divider to provide feedback control for the AC-DC to DC extraction conversion system, and a Zener diode D1 connected between the input and output of the second switch to clamp the voltages of the output and input of the second switch to the Zener voltage of the Zener diode; and an electronic load 608 connected to the storage capacitor C1. Switches 604 and 605 can be any electronically activated switch. In one embodiment, the switch is an N-MOSFET. In another embodiment, the switch is a bipolar transistor, and in yet another embodiment, the switch is a microelectromechanical switch.

[0067] Two-way switch

[0068] Figure 8 This is a schematic diagram illustrating basic power MOSFET bidirectional switches 301 and 302 controlling the power supplied from AC source 801 to load 806. Power MOSFETs 802 and 803 include body diodes 804 and 805, respectively. A Zener diode 811 exhibits a threshold voltage V greater than that of the power MOSFETs 802 and 803. TThe Zener voltage is measured. Zener diode 811 is biased by rectifier diodes 808 and 810, which are connected to the drain terminals of the power MOSFETs and protected by current-limiting resistors 807 and 809, respectively. Therefore, when switch 812 is open, if either drain terminal exceeds the Zener voltage, the resistor-diode branches 807 to 808 and 809 to 810 bias Zener diode 811, thus putting power MOSFETs 802 and 803 in the "on" state. When closed, switch 812 shunts the bias current from branches 807 to 808 and 809 to 810 to the source terminals of the power MOSFETs, putting them in the "off" state. In this circuit, the on-time constant is determined by the values ​​of the current-limiting resistors 807 and 809 and the gate-source capacitance of the power MOSFETs, while the off-time constant is determined by the MOSFET capacitance and the on-resistance of switch 812. These two time constants can be designed to be much shorter than the AC mains cycle, thus allowing the embodiment to operate in both on-off and phase-controlled modes.

[0069] However, in practice, the Zener diode 811 never reaches its Zener voltage, and the gate-source voltages of MOSFETs 802 and 803 rarely exceed their threshold voltage V. T Therefore, neither MOSFET 802 nor 803 is fully "turned on," resulting in excessive power consumption in the cell and reduced current supplied to load 806. Figure 9 This shows the voltage source 801 during the positive half-cycle of the AC mains waveform. Figure 8 The active component. When switch 812 is turned off to allow MOSFET 802 to enter its "on" state, the gate voltage of MOSFET 802 begins to follow the positive offset of source 801, while the source voltage is zero volts. When the gate voltage reaches the threshold voltage of MOSFET 802, current begins to flow to load 806, and the body diode 805 from MOSFET 803 is forward biased. Then, the source voltage of MOSFET 802 "follows" the rise of the gate voltage, lags behind the threshold voltage plus the additional bias value to account for the current supplied to the load. This state continues until the waveform of source 801 becomes negative. Therefore, regardless of the drain-source resistance of the device, the drain-source voltage of MOSFET 802 will not fall below its threshold voltage, and the power consumed in the switch is I. D *V T If the gate voltage can be boosted to well above the threshold voltage, the power consumed is expressed as I. D 2 *r ds , where r ds This is the "on" resistance of the switch. This value can be greater than I. D *V TMuch smaller.

[0070] Figure 10 It shows Figure 9 The diagram shows a half-switch that allows for a boost of the gate voltage. It is related to... Figure 9 The circuit differs in that a bipolar switch 1001 replaces switch 812. Bipolar switch 1001 allows the gate of MOSFET 802 to be connected to its source or bias circuits 807 to 808. The bias circuit also includes a capacitor 1003 connected in parallel with Zener diode 811. Switch 1001 is controlled by switch control circuit 1002, which holds switch 801 in position 1, corresponding to MOSFET 802 being in its "off" state, or in position 2, with the gate connected to the bias circuit. Switch control circuit 1002 is designed to hold switch 1001 in position 1 until the waveform of AC source 801 exceeds a preset trigger level V. trig Therefore, it switches switch 1001 to position 2. Thus, switch 1001 and switch control circuit 1002 keep MOSFET 802 in its "off" state until the AC voltage waveform reaches the trigger level V. trig This allows the bias circuit to charge to V. trig Meanwhile, the source of MOSFET 802 remains at 0 volts. When switch 1001 changes state, the bias voltage V... trig The value applied to the gate can be much greater than the threshold voltage V. T The source of the MOSFET 802 begins to turn towards V. trig -V T The battery is charged, and a portion of this voltage step is coupled to the gate through capacitor 1003. This increases the gate bias voltage to well above V. trig This causes it to exceed the voltage value of AC source 801. Therefore, MOSFET 802 reaches a state where the drain-source voltage is almost zero, while the gate-source voltage is greater than V. trig In this state, the MOSFET 802 exhibits its minimum channel resistance r. ds And the maximum voltage occurs on load 806.

[0071] Figure 11 A fully bidirectional switch configuration is shown. Figure 10 An embodiment of the circuit is described. Switch 1001 is replaced by a pair of electronically controlled switches 1101 and 1102, which are controlled by an extended switch control circuit 1103 having outputs 1104 and 1105 that drive 1101 and 1102 respectively. In a preferred embodiment, switches 1101 and 1102 are optical transistors. Figure 10As shown, the switch control circuit is characterized by a trigger level Vtrig. If the absolute value of the AC mains power supply voltage level is less than Vtrig, the trigger level Vtrig provides optical excitation via output 1104; otherwise, it provides optical excitation via output 1105. The switch control is programmed so that the optical drive signals 1104 and 1105 do not overlap, thereby providing a "first-on, then-off" switching characteristic and preventing premature discharge of capacitor 1003.

[0072] exist Figure 12 In another embodiment shown, Figure 11 The bidirectional switch also includes bypass diodes 1201 and 1202, which bypass the intrinsic diodes 804 and 805 of MOSFETs 802 and 803. All other components are numbered consistently as previously stated. Figures 8 to 11 As discussed in the article.

[0073] Figure 13 It shows Figure 8 A further improved version of the circuit includes moving the branch of diode 810 and bias resistor 809 from the drain of MOSFET 803 to the AC neutral line. This configuration avoids... Figure 6 The clamping effect occurs in the configuration, and when the source of the MOSFET 803 drops to -V Z At that time, the Zener diode 811 is allowed to reach its Zener voltage V. Z This makes the gate-source voltage of the MOSFET 803 V. Z It can be significantly greater than V. T Thus exhibiting a smaller r ds This reduces power consumption. Furthermore, the boosted gate-source bias is stored in the gate-source capacitance of MOSFETs 802 and 803 and is maintained during the subsequent positive half-cycle of the AC mains waveform. Therefore, both devices maintain a minimum r ds Configure until switch 812 is closed. Maintain bias elements 807 and 808 to improve initial conduction characteristics during the positive half-cycle, and include an additional capacitor 1003 in parallel with the gate-source capacitance of MOSFETs 802 and 803 to make the storage of the boosted gate-source bias voltage more robust.

[0074] When the switching circuit is used in phase control mode, a limitation of this embodiment arises, where switch 812 is closed for a predetermined period of time during each cycle of the AC mains waveform. Since capacitor 1003 discharges through switch 812 when it is closed, the gate-source bias required to "turn on" MOSFETs 802 and 803 must be re-established during each cycle. If switch 812 is open during the positive half-cycle of the AC mains waveform, this causes MOSFET 802 to always operate in a suboptimal mode because the boost provided during the negative half-cycle is reset when switch 812 is closed.

[0075] Figure 14 It shows Figure 11 In one embodiment of the circuit, switch 812 is replaced by a bipolar switch 1401, which connects the gates of MOSFETs 802 and 803 to their interconnected sources in position 1, or to a Zener diode bias circuit in position 2, the positions being determined by switch control circuitry 1402. In this embodiment, placing switch 1401 in position 1 “turns off” MOSFETs 802 and 803, disconnecting the Zener diode bias circuit from its gate. This allows capacitor 803 to store a Zener voltage until it discharges through external circuitry, or until switch 1401 is placed in position 2, causing the stored Zener voltage to be reapplied to the gate circuitry and subsequently refreshed during the negative half-cycle.

[0076] Figure 15 It shows Figure 14 In one embodiment of the circuit, switch 1401 is replaced by a pair of phototransistors 1501 and 1502, which are controlled by a switch control circuit 1503 having optical outputs 1504 and 1505 that drive 1501 and 1502 respectively. The switch control circuit 1503 synchronizes outputs 1504 and 1505 with the AC mains waveform to provide phase control mode capability. Importantly, these optical drive signals do not overlap, thus providing a "turn-on-before-make" switching characteristic to prevent premature discharge of capacitor 803.

[0077] The time constant of the switching control allows for rapid switching of the optical drive signal in sync with the AC mains waveform via an external control circuit (not shown) to provide phase control of the applied AC waveform, as used in dimmer applications. In another embodiment, the control signal is a pulse train with an adjustable pulse width, synchronized with the AC mains waveform, to effectively control the average current / power delivered to the load, thereby providing dimming for light source loads and speed control for AC motor loads. In yet another embodiment, the control signal is a pulse train with a fixed or variable frequency independent of the AC mains waveform, thereby generating a radio frequency (RF) power waveform at the load end, used as a wireless charger / generator. In yet another embodiment, the control signal is a variable DC voltage, allowing for variable illumination of the LED, thus allowing the MOSFET to operate in linear mode.

[0078] In a preferred embodiment, the switch control circuit receives a control signal from a control signal source, and the optical drive signal of the switch control circuit pulses synchronously with the AC power source to provide phase control of the AC power supplied to the load. In another embodiment, the optical drive signal is a pulse train synchronized with the AC mains waveform and has an adjustable pulse width to effectively control the average current / power supplied to the load, thereby providing a dimming effect for the light source load and speed control for the AC motor load.

[0079] exist Figure 16 In another embodiment shown, the switch controller 1503 is powered by a low-voltage AC-to-DC converter 1601. The AC-to-DC converter is controlled by a current sensor 1602, which uses a current sensor 1610 to sense the AC current delivered to the load 806, such that if no current is sensed in the bidirectional switch composed of MOSFETs 802 and 803, the AC-to-DC converter and the switch control are turned off. In this embodiment, Figure 15 The bidirectional switch also includes bypass diodes 1611 and 1612, which bypass the intrinsic diodes 804 and 805 of MOSFETs 802 and 803. All other components are numbered consistently as previously stated. Figures 8 to 15 As discussed in the article.

[0080] exist Figure 17 In another embodiment shown, as described above, bidirectional switches 1701 to 1703 are located between power supply 801 and load 806, and are included in line 1701 and neutral line 1703, as well as bidirectional switch 1702 bypassing load 806. When switch 1701 is open, switch 1702 is closed.

[0081] In summary, the solid-state bidirectional switch 1600 includes: first and second electronic switching devices 802 and 803 connected in series, each switching device having a drain terminal, a source terminal, and a gate terminal, and is characterized by a threshold voltage specified between the gate terminal and the source terminal, wherein the drain terminal of the first switching device includes a first input terminal 1606 of the solid-state bidirectional switch, and the drain terminal of the second switching device includes a first output terminal 1607 of the solid-state bidirectional switch. The second input terminal 1608 and the second output terminal 1609 are interconnected. The source terminals of the first and second switching devices are interconnected at the first control terminal 1603, the gate terminals of the first and second switching devices are interconnected at the second control terminal 1604, and the first control switch 1501 is connected between the first control terminal and the second control terminal, and the bias terminal 1605 is connected to the second control terminal via the second control switch 1502, and a voltage regulator device 811 is connected between the bias terminal and the first control terminal, and a capacitor 1003 is connected in parallel with the voltage regulator device, and a first rectifier device 808 is connected from the first input terminal 1606 of the switching circuit to the bias terminal via a first current-limiting resistor 807, and a second rectifier device 810 is connected from the second output terminal 1609 of the switching circuit to the bias terminal via a second current-limiting resistor 809, and a switch control circuit 1503 controls the first control switch and the second control switch such that when the second control switch is open, the first control switch is closed, and vice versa.

[0082] Load identification sensor

[0083] In another embodiment of GFCI, a set of sensors includes sensors that allow identification of load type and control of the load based on the identification. Figure 18 Showing the previous Figure 3 The GFCI circuit shown is a variant that includes additional sensor components to accurately identify the type of load connected to AC power supply 101. Figure 19 It shows the use of Figure 18 The method of circuit.

[0084] Components in various embodiments of load identification GFCI Figure 18 As can be seen in, and related to... Figure 3 The components discussed are the same, but current sensors 1801 and 1802 are added. The additional current sensors are located near the load 102 to provide a more accurate measurement of the load current, and they communicate with the microprocessor 206 via bidirectional digital buses 1803 and 1804.

[0085] Voltage sensors 203, 204 and current sensors 201, 202, 1801, 1802 are known in the art and include voltage sensors using resistive voltage dividers and current sensors using current-sensing resistors and associated differential amplifiers, or Hall effect sensors. Analog sensing signals are typically processed by comparators or A / D converters, and digitized signals are stored in data storage elements, including random access memory, read-only memory, and other solid-state memories and non-solid-state memory devices known in the art. The microprocessor includes components known in the art and associated with it, including a user interface that allows the microprocessor to be started and programmed, memory for storing data, and input and output ports for receiving data and sending control signals, respectively. In one embodiment, the input / output ports include means for accessing other computing devices such as handheld computing devices and remote servers. The microprocessor is programmed to implement the following... Figure 19 The steps described herein. Some aspects of the microprocessor can be located remotely from some components of the load identification GFCI. As a non-limiting example, the data storage of a database can be remotely stored and accessed via wired or wireless means, such as through an internet connection. Similarly, some computations, such as neural network analysis of the load data, can be performed on a remote server, and the results are sent to the microprocessor 206. Switches 301, 302 and switch controller 303 are controlled by the microprocessor 206. Figures 8 to 17 Details of the switch and switch controller in the preferred embodiment are shown and discussed.

[0086] In one embodiment, the AC / DC converter 205 can be of any type known in the art, supplying voltage and power suitable for microprocessor, sensor, and switch control. This AC / DC converter will include rectifier and transformer components to provide the selected voltage and power required by the sensor and microprocessor circuitry. Similarly, switches 301, 302, and controller 303 can be any switch / controller known in the art, capable of programmable operation at a desired frequency, such as phase angle modulation as described. Further, non-limiting examples include triac switching elements known for phase angle modulation, as well as solid-state switches such as MOSFETs and other solid-state switching devices, and microelectromechanical (MEMS) devices. In a preferred embodiment, the component for selecting the load identification GFCI is chosen such that, in addition to the AC mains 101 and load 102, Figure 18 The entire device is integrated on silicon. In a preferred embodiment, the AC / DC converter 205, as... Figure 6 and Figure 7 As shown, switches 301, 302 and controller 303 are as follows Figures 8 to 17 As shown, the entire load for identifying GFCI is integrated on silicon.

[0087] The waveforms of the AC mains power detected by current sensors 201, 202, 1801, 1802 and voltage sensors 203, 204, as well as the voltage and current across and through the load, are recorded and analyzed at a sampling frequency with a period significantly longer than a single cycle of the AC mains power. The sampling frequency of the voltage and current waveforms is selected as needed to differentiate load types. In one embodiment, the sampling frequency is in the kilohertz range. In another embodiment, the sampling frequency is in the megahertz range. In a preferred embodiment, a programmed variation of the power applied to the load is selected to optimize for differences in the acquired waveforms between expected load types. In one embodiment, waveform analysis includes matching patterns of high-frequency components from the voltage and current waveforms of the load. In another embodiment, waveform analysis includes determining the timing delay of power draw by the load after power is first applied to the load. In yet another embodiment, the analysis device classifies the acquired waveforms (including their high-frequency components) into groups indicating different load types. Non-limiting examples of the group include waveforms indicating primarily resistive loads, capacitive loads, inductive loads, loads including power factor correction, and loads including power control, such that there is a power delay to the load at the initial applied power of the source.

[0088] Now for reference Figure 19 This shows the use of, for example Figures 2 to 18 The method of installing the load control circuitry and components described herein. Installing the 1901 load control device. In one embodiment, installation includes including... Figure 18The load control device of the circuit is electrically connected between the AC mains power supply and the load. In one embodiment, this installation includes installing the load control device in a junction box. In another embodiment, the installation includes installing the load control device in a wall socket. In yet another embodiment, the installation includes installing the load control device as an electronically powered strip or smart extension cord by inserting it into a conventional wall socket, and the load is plugged into the load control device. Once the load control device is installed 1901, the load is attached to the load control device 1902. The load control device detects the load 1903 and supplies power to the load by activating a switch within the load control device. Details of the switch and the load control device are shown in subsequent figures. Once the load is detected, data acquisition 1904 is initiated. Data acquisition includes recording the timing of when the load is connected to power, when power is applied to the load, and when the load uses power. Data acquisition also includes acquiring waveform data. Any load-specific data acquired when the load is detected is referred to as “load data”. Load data includes the load’s on-time and waveform data. Waveform data includes acquiring the values ​​of the AC mains voltage, load voltage, load current, and power consumed by the load as a function of time. All of this is acquired at frequencies optimized for load type detection. In one embodiment, data is acquired at frequencies several times higher than the AC mains power frequency. In one embodiment, 50 to 60 cycles of AC source data are acquired at a rate of kilohertz. In another embodiment, which relies on high-frequency components of voltage and current waveforms to identify the load, data is acquired at a rate of megahertz. The acquired load data is stored 1909 for analysis. In one embodiment, the storage includes storage in the microprocessor's short-term random access memory for immediate or near-immediate processing. In another embodiment, the storage includes storage in long-term memory such that the stored load data is used for subsequent pattern matching to identify the same or similar loads based on the matching of waveform patterns obtained during the first connection 1902 of the load (i.e., the first passage through the indicated flowchart) with subsequent connections of the same or different loads. In one embodiment, the storage 1909 includes storage accessible by multiple load control devices. This storage can be accessed by devices wired or wirelessly connected to a load control GFCI or by transferring the stored load data from a first load control GFCI to a second load control GFCI. Once connection 1902 and detection 1903 are completed, and after initial data acquisition 1904, the device power is modulated 1905. Modulation refers to changing the device power using a programmable switch. Further load data is acquired during and after modulation 1906, and then the load is identified 1907 based on the load data. In one embodiment, identification is based on comparing the waveform of the load data with a previously acquired waveform from the load data of a known load device.In another embodiment, as already discussed, the load is identified based on the matching of timing and waveform data before and after power is applied to the load. In another embodiment, neural network analysis is used to classify load data into categories of load types by comparing it with a library of previous load data. In yet another embodiment, load identification means classifying the load into a specific category of load before, during, and after power modulation of the load using a series switch, based on the phase relationship between the load voltage and current waveforms and the AC mains voltage waveform. In one embodiment, the load is identified as one of the following:

[0089] 1. Purely resistive load. Before, during, and after modulation of the supply voltage, both voltage and current cross zero and reach their peak values ​​simultaneously. As the voltage decreases, the power decreases, and when modulation of the supply voltage stops, the power returns to its pre-modulation level, and the supply voltage returns to full voltage.

[0090] 2. Constant power resistive load with power correction. Voltage and current reach their peak synchronously before modulation, and power remains constant before, during, and after modulation.

[0091] 3. Purely reactive (capacitive or inductive) load. Before, during, and after modulation, the voltage and current are out of phase. During the modulation of the supply voltage, the power is reduced, and when the modulation of the supply voltage ends, the power returns to the pre-modulation level and returns to full voltage.

[0092] 4. Constant power reactive load. Voltage and current are out of phase before, during, and after modulation, while power is constant before, during, and after supply voltage modulation.

[0093] In one embodiment, modulation of the supply voltage results in a reduction of the RMS supply voltage by an amount between 1% and 20%.

[0094] In one embodiment, identification 1907 further includes determining a confidence level for identification. In one embodiment, the confidence level is determined by the goodness of fit of the load data obtained during data acquisition steps 1904, 1906 with previously obtained data about a known load and is stored 1910. Once identification step 1907 is completed, the system further checks 1908 whether the load has been identified and whether there is a control rule associated with the load identification. In one embodiment, the identification check 1908 is performed by comparing the confidence level in the identification with a pre-selected confidence level defined as a positive identification. If the load is positively identified and a pre-selected control rule associated with the identified load exists, then load control 1909 is implemented. In a preferred embodiment, the power of the load is controlled by a switch connected in series with the load. Non-limiting examples of pre-selected control rules include:

[0095] 1. During the day, purely resistive loads (such as light bulbs) are dimmed to reduce power consumption, especially during peak demand periods.

[0096] 2. In a constant power load, the input power will decrease accordingly when the load demand decreases, in order to minimize the power consumption under no-load / minimum load demand.

[0097] 3. In remote locations (where no one is present), purely resistive loads and constant power resistive loads will automatically disconnect and reconnect according to the load's needs.

[0098] 4. Arc fault circuit breakers ignore devices that generate arcs during normal operation (e.g., motors with brushes connected to the rotor) to prevent obstruction from disconnecting the circuit.

[0099] In another embodiment, there is a set of pre-selected rules based on whether the load is selected from a purely resistive load, a constant-power resistive load, a purely reactive load, and a constant-power reactive load. In a non-limiting example of the pre-selected rules, a load identified as having included power factor correction, i.e., a constant-power load, is not turned off by the controller, and a purely resistive load is turned off during the pre-selected time period, and the power to the purely reactive load is reduced during the pre-selected time period.

[0100] In another embodiment, the GFCI is activated and the load is disconnected from the power supply when the microprocessor detects that the current difference across the live wire and the neutral wire exceeds a first pre-selected limit. In another embodiment, the GFCI is activated and the load is disconnected from the power supply when the microprocessor detects that the current across the live wire exceeds a second pre-selected limit. In yet another embodiment, the first and second pre-selected limits are automatically selected by the microprocessor based on load type identification.

[0101] Fault detection sensor

[0102] In another embodiment, the sensor array includes fault detection sensors. The sensors detect ground faults and arcing failures in the load circuit and control the load power based on these fault detections.

[0103] Figure 20This is a block diagram illustrating the key components of a solid-state electrical fault circuit interrupter. AC mains power 2001 is connected to a load 2006 via an electronic switching unit 2005. A low-voltage DC power supply 2002 effectively powers the mains voltage and current sensing circuit 2003 and the fault detection processor 2004. The sensing input to the fault detection processor 2004 is provided from the voltage and current sensing circuit 2003. The solid-state sensing circuit includes sensors that sense the voltage and current waveforms applied to the load circuit and generate a proportional analog waveform. The fault detection processor processes the proportional analog waveform and generates a fault output 2007 upon detecting a ground fault or arc fault. Upon fault detection, the fault output 1807 of the fault detection processor 2004 is latched and fed to the control input 2008 of the electronic switch 2005, which disconnects the load 2006 from the mains power 2001 until a reset 2009 is applied to the fault detection processor 2004. In another embodiment, the output voltage of the electronic switch 2005 can be changed via the control circuit 2008. In this embodiment, upon detection of an arc fault, the output voltage can be reduced to a value less than the arc threshold but greater than zero. This embodiment allows the load circuitry to continue operating at the reduced voltage while minimizing the chance of destructive arcing. Operating at the reduced voltage also allows for continuous characterization of the load and mains supply circuitry to pinpoint the location of the arc fault for subsequent replacement or repair.

[0104] Figure 21This is a schematic diagram of one embodiment of a solid-state circuit breaker. AC mains power 2001 is connected to a load 2006 via a bidirectional MOSFET switching unit 2005. A low-voltage AC-to-DC power supply 2002 powers the mains voltage and current sensing circuit 2003, the fault detection processor 2004, and the bidirectional MOSFET switching control circuit 2008. The sensing input of the fault detection processor 2004 is provided by the voltage and current sensing circuit 2003. Current sensing is provided using solid-state Hall effect sensors 2101 and 2102, which provide an output voltage proportional to the current flowing through the sensor while providing isolation between the sensing circuit and the AC mains waveform. The Hall effect sensor output is fed to the current sensing input of the fault detection processor 2004. The AC mains voltage waveform is full-wave rectified in the bridge unit 2103. (To reduce the number of components in the circuit, bridge 2103 can be omitted, and the full-wave rectified waveform can be obtained directly from the output of the AC-to-DC converter circuit. Bridge 2103 is shown here for clarity.) A resistor divider network including resistors 2104 and 2105 is used to attenuate the full-wave rectified waveform and apply it to the voltage sensing input of the fault detection processor 2004. When a fault is detected, the fault output 2007 of the fault detection processor 2004 is latched and fed to the control input of the electronic switch control circuit 2008, which provides an optical control signal to the bidirectional MOSFET switching unit 2005, which disconnects the load 2006 from the mains power 2001 until a reset 2009 is applied to the fault detection processor 2004. In another embodiment, the output voltage of the electronic switch is changed by the control circuit 2008. In this embodiment, when an arc fault is detected, the output voltage is reduced to a value less than the arc threshold but greater than zero. This embodiment allows the load circuit to continue operating at a reduced voltage while reducing the chance of a destructive arc. Operating at reduced voltage also allows for continuous characterization of the load and mains supply circuitry to pinpoint the location of arcing faults for subsequent replacement or repair.

[0105] Figure 22 This is a schematic diagram illustrating an embodiment of the fault detection processor. A voltage-sensing signal is applied to the input terminal of a differential amplifier, and the resulting differential signal ΔV is applied to the input of an analog-to-digital (A / D) converter 2208 within the microprocessor 2207. Similarly, the current-sensing input is summed in the input circuit 2204 of the operational amplifier 2205 to form a signal proportional to the sum of the currents ΣI in the AC mains line and neutral branch. The ΣI signal is also applied to the input of the A / D converter.

[0106] The digitized ΔV signal is processed by subroutine 2209 within the microprocessor to detect voltage waveform anomalies over several cycles, indicating the presence of an arc fault. A non-limiting example of such voltage anomalies is the presence of excessive high-frequency energy applied to a normal low-frequency AC mains voltage waveform. The digitized ΣI signal is processed by subroutine 2210 within the microprocessor 2207 to detect anomalies in the current waveform over several cycles, indicating the presence of an arc fault. A non-limiting example of such current anomalies is the appearance of a "shoulder" (flat point) in the current waveform near its zero-crossing point. The combined occurrence of voltage and current waveform anomalies is an indication of an arc fault 2212.

[0107] The current sensing signal is also applied to the input of operational amplifier 2206, which generates a differential signal ΔI proportional to the difference between the currents in the line and neutral branches. The ΔI signal is digitized and processed by subroutine 2211, which performs threshold detection and issues a ground fault signal 2213. The arc fault signal 2212 and the ground fault signal 2213 are combined and applied to the input of latch 2214, which stores the fault condition 2215 until cleared by an external reset signal. Summary of the Invention

[0108] A ground fault circuit interrupter (GFCI) is disclosed, featuring a solid-state DPST switching device, non-magnetic high dynamic bandwidth sampling, and highly reliable triggering. Embodiments include integrated wireless transmission of circuit status data and visual alarms, enhancing awareness of GFCI performance. Furthermore, the wireless connectivity enables real-time responses to changing conditions or based on predefined or predicted conditions. Two main system-level embodiments are disclosed: a smart electromechanical GFCI and a smart solid-state start-up GFCI embodiment. This GFCI incorporates one or more methods disclosed below. The disclosed improvements address increased safety, enhanced convenience, increased energy awareness, control, energy savings, and improved situational awareness. The disclosed technologies combine a range of new technologies, including AC mains switching technology, AC-to-DC conversion technology, internal short-circuit tripping technology, technologies for wirelessly transmitting status and sensor data to enable various innovative use cases, algorithms for fault detection, technologies for detecting and protecting against internal device failures, technologies for handling new loads via over-the-air updates, and even technologies for supporting remote notification, control, monitoring, and big data collection via cloud services during a utility failure; circuitry for shunt resistor current sensing, energy metering, leakage, and overcurrent detection; and technologies for avoiding fault conditions. These are all new technologies in themselves, but their real impact in addressing the challenges of improving safety, expanding convenience, increasing energy awareness, control, energy saving, and improving situational awareness may lie in their combination.

Claims

1. A ground fault circuit breaker for a single-phase power supply having a live wire and a neutral wire and a two-terminal electrical load connected from the live wire to the neutral wire, the ground fault circuit breaker comprising: a) A first switch, the first switch being located in the live wire between the power supply and a first terminal of the load, and, b) A second switch, the second switch being located in the neutral wire between the second terminal of the load and the electrical supply, and, c) Each of the first switch and the second switch is controlled by a first switch controller, and, d) A first current sensor, wherein the first current sensor is located in series with the first switch in the live wire, and, e) A second current sensor, located in the neutral wire and connected in series with the second switch, and f) A microprocessor programmed to receive digital signals from each of the first and second current sensors, compare the digital signals from the first and second current sensors, determine a ground fault condition if the digital signals have a difference greater than a first preselected value, send a first fault signal to the first switch controller, and cause the first switch controller to open the first and second switches, thereby disconnecting the power supply from the load. g) An AC-to-DC converter that supplies power to the ground fault circuit interrupter, and Each of the first switch and the second switch includes a first and a second MOSFET device connected in series, each MOSFET device having a drain terminal, a source terminal and a gate terminal, and is characterized by a threshold voltage specified between the gate terminal and the source terminal, wherein the drain terminal of the first MOSFET device includes the input terminal of the switch, and the drain terminal of the second MOSFET device includes the output terminal of the switch.

2. The ground fault circuit breaker according to claim 1 further includes a first electromechanical switch connected in series with the first switch and a second electromechanical switch connected in series with the second switch, and each of the first electromechanical switch and the second electromechanical switch has an electromechanical controller for opening and closing the electromechanical switch, and the electromechanical controller, which is connected to and controlled by the microprocessor, is further programmed to open the electromechanical switch when the ground fault condition is determined.

3. The ground fault circuit breaker according to claim 2, wherein, The microprocessor is also programmed to close each of the electromechanical switches before closing each of the first and second switches, and to open each of the electromechanical switches after opening each of the first and second switches.

4. The ground fault circuit breaker according to claim 1, wherein, The microprocessor is also programmed to send a second fault signal to the first switch controller if the digital signal from the first current sensor is greater than a second preselected value, causing the first switch controller to disconnect the first switch and the second switch, thereby disconnecting the power supply from the load.

5. The ground fault circuit interrupter of claim 4 further includes a communication device connected to the microprocessor, and the microprocessor is further programmed to issue an alarm from the communication device when the first fault signal or the second fault signal is sent.

6. The ground fault circuit breaker according to claim 5, wherein, The microprocessor is also programmed to receive operating instructions from a remote location.

7. The ground fault circuit breaker according to claim 6, wherein, The operating instructions include programming the microprocessor to disconnect the first switch and the second switch, and to close the first switch and the second switch.

8. The ground fault circuit breaker according to claim 6, wherein, The operation instructions include values ​​for the first preselected value and the second preselected value.

9. The ground fault circuit breaker according to claim 1, wherein, The AC-to-DC converter is a sample-and-hold circuit that includes an energy storage component, enabling the microprocessor to execute commands in the event of a power supply failure.

10. The ground fault circuit breaker according to claim 1, wherein, The live wire and the neutral wire are collectively referred to as a circuit, wherein each of the first current sensor located in the live wire and the second current sensor located in the neutral wire includes: a) A sensing resistor having a voltage drop proportional to the current flowing through the line, the voltage drop being buffered by a programmable gain amplifier and then applied to the input of an analog-to-digital (A / D) converter to produce a buffered digital output signal, which is then transmitted by a digital signal processor to the microprocessor. b) Wherein, the digital output signal and the external digital input signal to the digital signal processor are buffered by an optical isolator and multiplexed onto a bidirectional digital bus for communication with the microprocessor, and c) Wherein, DC power is supplied to the first current sensor by a first DC power supply, the first DC power supply having an operating voltage based on the live wire, and, d) Wherein, DC power is supplied to the second current sensor by a second DC power supply, the second DC power supply having an operating voltage based on the neutral line.

11. A ground fault circuit breaker for a single-phase power supply having a live wire and a neutral wire and a two-terminal electrical load connected from the live wire to the neutral wire, the ground fault circuit breaker comprising: a) A switch located in the live wire between the power supply and the first terminal of the load, and b) The switch is controlled by a first switch controller, and, c) A first current sensor, wherein the first current sensor is located in the live wire and connected in series with the switch, and d) A second current sensor, the second current sensor being located in the neutral wire between the second terminal of the load and the power supply, and, e) A microprocessor programmed to receive digital signals from each of the first and second current sensors, compare the digital signals from the first and second current sensors, determine a ground fault condition if the digital signals have a difference greater than a first preselected value, send a first fault signal to the first switch controller, cause the first switch controller to open the switch, and thereby disconnect the power supply from the load. f) An AC-to-DC converter that supplies power to the ground fault circuit interrupter, and The switch includes first and second MOSFET devices connected in series, each MOSFET device having a drain terminal, a source terminal and a gate terminal, and is characterized by a specified threshold voltage between the gate terminal and the source terminal, wherein the drain terminal of the first MOSFET device includes the input terminal of the switch, and the drain terminal of the second MOSFET device includes the output terminal of the switch.

12. The ground fault circuit interrupter of claim 11 further includes an electromechanical switch connected in series with the switch, and the electromechanical switch has an electromechanical controller for opening and closing the electromechanical switch, and the electromechanical controller, connected to and controlled by the microprocessor, is further programmed to open the electromechanical switch when a ground fault condition is determined.

13. The ground fault circuit breaker according to claim 12, wherein, The microprocessor is also programmed to close the electromechanical switch before closing the switch, and to open the electromechanical switch after opening the switch.

14. The ground fault circuit breaker according to claim 11, wherein, The microprocessor is also programmed to send a second fault signal to the first switch controller if the digital signal from the first current sensor is greater than a second preselected value, causing the first switch controller to disconnect the switch and thereby disconnect the power supply from the load.

15. The ground fault circuit interrupter of claim 14, further comprising a communication device connected to the microprocessor, and the microprocessor being further programmed to issue an alarm from the communication device when the first fault signal or the second fault signal is transmitted.

16. The ground fault circuit breaker according to claim 15, wherein, The microprocessor is also programmed to receive operating instructions from a remote location.

17. The ground fault circuit breaker according to claim 16, wherein, The operating instructions include programming the microprocessor to disconnect the switch and to close the switch.

18. The ground fault circuit breaker according to claim 16, wherein, The operation instructions include values ​​for the first preselected value and the second preselected value.

19. The ground fault circuit breaker according to claim 11, wherein, The AC-to-DC converter is a sample-and-hold circuit that includes an energy storage component, enabling the microprocessor to execute commands in the event of a power supply failure.

20. The ground fault circuit breaker according to claim 11, wherein, The live wire and the neutral wire are collectively referred to as a circuit, wherein each of the first current sensor located in the live wire and the second current sensor located in the neutral wire includes: a) A sensing resistor having a voltage drop proportional to the current flowing through the line, the voltage drop being buffered by a programmable gain amplifier and then applied to the input of an analog-to-digital (A / D) converter to produce a buffered digital output signal, which is then transmitted by a digital signal processor to the microprocessor. b) Wherein, the digital output signal and the external digital input signal to the digital signal processor are buffered by an optical isolator and multiplexed onto a bidirectional digital bus for communication with the microprocessor, and c) Wherein, DC power is supplied to the first current sensor by a first DC power supply, the first DC power supply having an operating voltage based on the live wire, and, d) Wherein, DC power is supplied to the second current sensor by a second DC power supply, the second DC power supply having an operating voltage based on the neutral line.

21. An electrical fault circuit breaker for connecting a single-phase power supply having a live wire and a neutral wire to a two-terminal electrical load having a load type from the live wire to the neutral wire, the electrical fault circuit breaker comprising: a) A switch located in the live wire between the first terminal of the power supply and the load, and b) The switch is controlled by a first switch controller, and, c) A first current sensor, located in the live wire between the power supply and the switch, the first current sensor generating a first digital waveform signal proportional to the current flowing through the live wire, and, d) A second current sensor, located in the neutral wire between the second terminal of the electrical load and the electrical supply, the second current sensor generating a second digital waveform signal proportional to the current flowing through the neutral wire, and, e) A first voltage sensor, connected between the live wire and the neutral wire and located between the power supply and the switch, the first voltage sensor generating a third digital waveform signal proportional to the voltage of the power supply, and, f) A second voltage sensor, connected between the live wire and the neutral wire and located between the switch and the load, the second voltage sensor generating a fourth digital waveform signal proportional to the voltage at the load, and, g) A microprocessor programmed to receive the digital waveform signals from each of the first current sensor, the second current sensor, the first voltage sensor, and the second voltage sensor, all of which are sampled at a frequency optimized for detecting the load type. h) Compare the digital waveform signals, and determine at least one of the following from the comparison: i) Indicate a first fault condition by checking whether the current difference between the live wire and the neutral wire exceeds a first pre-selected value, and send a first fault signal to the first switch controller, causing the first switch controller to open the switch and disconnect the load from the power supply. ii) Indicate a second fault condition by checking whether the current of the load exceeds a second pre-selected value, and send a second fault signal to the first switch controller to cause the first switch controller to disconnect the switch and disconnect the load from the power supply.

22. The electrical fault circuit breaker according to claim 21, wherein, The switch includes first and second MOSFET devices connected in series, each MOSFET device having a drain terminal, a source terminal and a gate terminal, and is characterized by a threshold voltage specified between the gate terminal and the source terminal, wherein the drain terminal of the first MOSFET device includes the input terminal of the switch and the drain terminal of the second MOSFET device includes the output terminal of the switch.

23. The electrical fault circuit breaker according to claim 22, wherein, The switch is programmably opened and closed by the microprocessor via the first switch controller, such that the electrical supply to the load is modulated during the modulation period, and the digital waveform signal is acquired by the microprocessor before, during and after the modulation period.

24. The electrical fault circuit breaker according to claim 23, wherein, Based on comparisons of the digital waveform signals before, during, and after modulation, the identification of the load type includes classifying the load as one of the following: a purely resistive load, a constant power resistive load with power correction, a purely reactive load, and a constant power reactive load.

25. The electrical fault circuit breaker according to claim 21, wherein, The first current sensor and the second current sensor are Hall effect sensors.

26. The electrical fault circuit breaker of claim 21 further includes an electromechanical switch connected in series with the switch, and the electromechanical switch has an electromechanical controller for opening and closing the electromechanical switch, and the electromechanical controller, connected to and controlled by the microprocessor, is further programmed to open the electromechanical switch when a ground fault condition is determined.

27. The electrical fault circuit breaker according to claim 26, wherein, The microprocessor is also programmed to close the electromechanical switch before the switch is opened, and to open the electromechanical switch after the switch is opened.

28. The electrical fault circuit interrupter of claim 21 further includes a communication device connected to the microprocessor, and the microprocessor is further programmed to issue an alarm from the communication device when at least one of the first fault condition and the second fault condition is detected, and to receive operating instructions from a remote location via the communication device.

29. The electrical fault circuit breaker according to claim 28, wherein, The operating instructions include programming the microprocessor to disconnect the switch and to close the switch.

30. The electrical fault circuit breaker according to claim 28, wherein, The operation instructions include values ​​for the first preselected value and the second preselected value.

31. The electrical fault circuit breaker of claim 21, further comprising an AC-to-DC converter, the AC-to-DC converter providing power to the electrical fault circuit breaker, wherein, The AC-to-DC converter includes a sample-and-hold circuit with an energy storage component, enabling the microprocessor to execute commands after the power supply fails.

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