A nano-silver packaging structure of a chip

CN115188719BActive Publication Date: 2026-08-21BOWEI INTEGRATED CIRCUITS CO LTD
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Patent Information

Application Number
CN202210928751.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-03
Publication Date
2026-08-21
Estimated Expiration
2042-08-03

AI Technical Summary

Technical Problem

[0003]由于现有封装技术的限制,特别是芯片与基板的互连技术,例如银浆、聚合物材料,软钎焊等互连技术由于焊料合金的低熔点、环氧树脂的低温分解等原因,使其不能在高温环境下可靠工作,导致电力电子系统性能及可靠性降低,由于芯片整体都比较小巧,在对芯片引脚与封装引脚之间进行焊接时使得导线焊点的空洞率大,焊点强度低,易造成开裂或焊点脱落,从而导致封装质量不好

Benefits of technology

[0014]该纳米银芯片的封装结构,设置有铜网格板和纳米银焊膏层,纳米颗粒具有独特的性能,其比表面积小并且表面曲率半径小,这种特性赋予了它具有比常规的粉体更低的熔点和焊接温度,利用纳米尺度下金属颗粒的高表面能、低熔点特性来实现芯片与基板的低温低压烧结互连,形成的纳米银互连层具有优良耐高温性能及高热导率能力,适用于芯片的封装要求,提高了其电力电子系统性能及芯片的可靠性。

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Abstract

This invention discloses a nano-silver encapsulation structure for a chip, relating to the field of chip encapsulation technology. It includes a substrate and a chip. A mounting groove is formed on the top of the substrate, and a copper mesh plate is fixed to the bottom wall of the mounting groove. A nano-silver solder paste layer is coated on the top of the copper mesh plate. The chip is placed on top of the nano-silver solder paste layer. A packaging box is fixed to the top of the substrate. Multiple rectangular slots are formed on both sides of the packaging box. A first external lead is provided on the outer side of one rectangular slot, and a second external lead is fixed to the inner wall of the other rectangular slot. This invention incorporates a copper mesh plate and a nano-silver solder paste layer. Nanoparticles possess unique properties, including a small specific surface area and a small surface curvature radius. These characteristics give them a lower melting point and welding temperature than conventional powders. The high surface energy and low melting point of the nanoscale metal particles are utilized to achieve low-temperature, low-pressure sintering interconnection between the chip and the substrate.
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Description

Technical Field

[0001] This invention relates to the field of chip packaging technology, specifically to a nano-silver packaging structure for a chip. Background Technology

[0002] Semiconductor chips are semiconductor devices that perform a specific function by etching and wiring on semiconductor wafers. Besides silicon chips, common semiconductor materials include gallium arsenide, germanium, and even nano-silver chips with superior properties.

[0003] Due to limitations in existing packaging technologies, especially chip-to-substrate interconnection technologies such as silver paste, polymer materials, and soft soldering, these technologies cannot operate reliably in high-temperature environments due to the low melting point of solder alloys and the low-temperature decomposition of epoxy resins. This leads to reduced performance and reliability of power electronic systems. Because chips are generally small, the soldering process between chip pins and package pins results in a high void ratio and low solder joint strength, making them prone to cracking or solder joint detachment, thus leading to poor packaging quality. Summary of the Invention

[0004] The purpose of this invention is to provide a nano-silver packaging structure for chips to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a nano-silver encapsulation structure for a chip, comprising a substrate and a chip, wherein a mounting groove is formed on the top of the substrate, a copper mesh plate is fixed to the bottom wall of the mounting groove, a nano-silver solder paste layer is coated on the top of the copper mesh plate, the chip is placed on top of the nano-silver solder paste layer, an encapsulation box is fixed to the top of the substrate, and multiple rectangular grooves are formed on both sides of the encapsulation box, a first external pin is provided on the outer side of one rectangular groove, and a second external pin is fixed to the inner wall of the other rectangular groove, the first external pin is connected to the chip through a first connecting device, and the second external pin is connected to the chip through a second connecting device, the length of the mounting groove is greater than the length of the copper mesh plate, one side of the copper mesh plate is fixed to the side wall of the mounting groove near the first connecting device, and a top box is placed on the top of the encapsulation box.

[0006] Furthermore, the chip includes a first pin and a second pin. Both sides of the first pin are integrally formed with pressing blocks, and the end of the first pin is integrally formed with an insert plate. The top and bottom of the insert plate are provided with slots.

[0007] Furthermore, the first connecting device includes a hollow block fixed to the outer side plate of the packaging box, the hollow block being connected to a rectangular groove, the first outer pin being fixed to the inner wall of the hollow block, and the first connecting device also includes a socket block integrally formed with the first outer pin, the top and bottom inner walls of the socket block being integrally formed with elastic plates, the elastic plates being engaged with the slot.

[0008] Furthermore, a second solder port is provided at the top of the hollow block, and a solder inlet pipe connected to the second solder port is fixed at the top of the hollow block. Tin particles are filled into the gap formed between the socket block and the hollow block through the solder inlet pipe.

[0009] Furthermore, the second connecting device includes a connecting block fixed to the inner side plate of the packaging box, a slot is provided on the top of the connecting block, baffles are fixed on both sides of the inner wall of the connecting block, the width of the first pin is less than the width between the two baffles, the width between the outer sides of the two pressing blocks is greater than the width between the two baffles, and a limit structure is provided on the top of the connecting block.

[0010] Furthermore, the limiting structure includes a limiting plate, with multiple dovetail blocks fixed at the bottom end of the limiting plate. Dovetail grooves are opened at the top of the side plates of the connecting blocks, and the dovetail grooves and dovetail blocks are adapted to each other. Multiple first solder ports are opened at the top of the limiting plate, and the first solder ports are connected to the slots. Tin particles are filled into the gap formed between the first pin and the second outer pin through the first solder ports.

[0011] Furthermore, the top box includes a lid, the bottom side panel of the lid is integrally formed with an L-shaped plate, a U-shaped groove is formed between the L-shaped plate and the side panel, the width of the U-shaped groove is greater than the width of the encapsulation box, and injection holes are opened on both sides of the top of the lid, through which encapsulation glue is injected into the space formed between the encapsulation box and the lid.

[0012] Furthermore, the encapsulating adhesive is an epoxy resin.

[0013] Compared with the prior art, the beneficial effects of the present invention are:

[0014] The packaging structure of this nano-silver chip includes a copper grid plate and a nano-silver solder paste layer. The nanoparticles have unique properties, with small specific surface area and small surface curvature radius. These characteristics give them a lower melting point and soldering temperature than conventional powders. The high surface energy and low melting point of the metal particles at the nanoscale are used to achieve low-temperature and low-pressure sintering interconnection between the chip and the substrate. The resulting nano-silver interconnect layer has excellent high-temperature resistance and high thermal conductivity, which is suitable for the chip packaging requirements and improves the performance of its power electronic system and the reliability of the chip.

[0015] In addition, a first connecting device, a second connecting device, and a top box are provided. After the chip pins are initially fixed to the first and second external pins, solder particles are placed into the hollow block and connecting block through the first and second solder ports. After being vibrated and compacted, the block is placed in a heating furnace for heating, which melts the solder particles. After cooling, the chip pins are fixed to the first and second external pins. This prevents the chip pins from detaching or cracking at the connection points with the first and second external pins, reduces the void ratio, enhances the connection strength, and improves the packaging quality. Attached Figure Description

[0016] Figure 1 This is the left-side axial view of the present invention;

[0017] Figure 2 This is a partially exploded view of the present invention;

[0018] Figure 3 This is a fully exploded view of the present invention;

[0019] Figure 4 This is a half-sectional view of the set-top box of the present invention;

[0020] Figure 5 This is an axial view of the chip of the present invention;

[0021] Figure 6 This is an axial view of the present invention with the chip, set-top box, copper grid plate and nano silver solder paste layer removed;

[0022] Figure 7 This is a half-sectional view of the present invention.

[0023] In the diagram: 1. Substrate; 101. Mounting slot; 2. Copper mesh plate; 3. Nano silver solder paste layer; 4. Encapsulation box; 5. Chip; 501. First pin; 502. Pressing block; 503. Second pin; 504. Insert plate; 505. Slot; 6. Top box; 601. Box cover; 602. Injection hole; 603. L-shaped plate; 7. First connecting device; 701. Hollow block; 702. Solder inlet pipe; 8. Second connecting device; 801. Connecting block; 802. Slot; 803. Dovetail groove; 804. Baffle; 805. Limiting plate; 806. First solder port; 807. Dovetail block; 9. First outer pin; 901. Socket block; 902. Elastic plate; 10. Second outer pin; 11. Sealing adhesive. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] It should be noted that in the description of this invention, the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0026] Furthermore, it should be understood that, for ease of description, the dimensions of the various components shown in the accompanying drawings are not drawn to actual scale; for example, the thickness or width of some layers may be exaggerated relative to other layers.

[0027] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined or described in one figure, it will not need to be discussed or described in detail in the description of the subsequent figures.

[0028] like Figures 1-7 As shown, the present invention provides a technical solution: a nano-silver encapsulation structure for a chip, comprising a substrate 1 and a chip 5, wherein the chip 5 includes a plurality of first pins 501 and a plurality of second pins 503 equal in number to the first pins 501. A pressing block 502 is integrally formed on both sides of each first pin 501, and an insert plate 504 is integrally formed at the end of each first pin 501. The insert plate 504 has slots 505 at both its top and bottom ends. A mounting groove 101 is formed on the top of the substrate 1, and a copper mesh plate 2 is fixed to the bottom wall of the mounting groove 101. It is understood that the copper mesh plate 2 is composed of traces arranged in intersecting directions, resulting in a hollow cavity in the middle of the copper mesh plate 2. A nano-silver solder paste layer 3 is coated on the top of the copper mesh plate 2. The nano-silver solder paste includes a mixture of flake-shaped nano-silver and an organic solvent carrier, the organic solvent carrier being ethylene glycol. The chip 5 is placed... The conductive plate (conductive bump) placed on top of the nano-silver solder paste layer 3, i.e. the bottom of the chip 5, is in contact with the nano-silver solder paste layer 3. A package box 4 is fixed at the top of the substrate 1. Multiple rectangular slots are opened on both sides of the package box 4. A first external pin 9 is provided on the outer side of one rectangular slot, and a second external pin 10 is fixed on the inner wall of the other rectangular slot. It should be noted that the first external pin 9 is connected to the chip 5 through a first connecting device 7, and the second external pin 10 is connected to the chip 5 through a second connecting device 8. The length of the mounting slot 101 is greater than the length of the copper grid plate 2. The copper grid plate 2 is fixed to the side wall of the mounting slot 101 near the first connecting device 7. This arrangement facilitates the installation of the chip 5 and the first external pin 9, i.e. the second external pin 10. The specific installation process is described below. A top box 6 is placed on top of the package box 4.

[0029] To ensure the smooth implementation of this scheme, it is necessary to understand that the first connecting device 7 includes a hollow block 701 fixed to the outer side plate of the packaging box 4. The hollow block 701 is connected to the rectangular groove. It is understood that the first outer pin 9 is fixed to the inner wall of the hollow block 701. The first connecting device 7 also includes a socket block 901 integrally formed with the first outer pin 9. The top and bottom inner walls of the socket block 901 are integrally formed with elastic plates 902, and the elastic plates 902 are engaged with the slot 505 to limit the second pin 503 of the chip 5. A second solder port is opened at the top of the hollow block 701, and a solder inlet pipe 702 connected to the second solder port is fixed at the top of the hollow block 701. It is known that solder particles are filled into the gap formed between the socket block 901 and the hollow block 701 through the solder inlet pipe 702.

[0030] To ensure the smooth implementation of this scheme, it should be noted that the second connecting device 8 includes a connecting block 801 fixed to the inner side plate of the packaging box 4. A slot 802 is provided on the top of the connecting block 801. Baffles 804 are fixed on both inner walls of the connecting block 801. It is understood that the width of the first pin 501 is less than the width between the two baffles 804, and the width between the outer sides of the two pressing blocks 502 is greater than the width between the two baffles 804. Thus, after installation, the side of the baffle 804 abuts against the side of the pressing block 502, thereby sealing the gap formed between the pressing block 502 and the end face of the second outer pin 10, preventing the tin particles from flowing out after melting. A limit structure is provided on the top of the connecting block 801.

[0031] Preferably, the limiting structure includes a limiting plate 805, with multiple dovetail blocks 807 fixed at the bottom end of the limiting plate 805. The top of the side plate of the connecting block 801 is provided with a dovetail groove 803, which is adapted to the dovetail block 807. Multiple first solder ports 806 are provided at the top of the limiting plate 805. The first solder ports 806 are connected to the slot 802, and solder particles are filled into the gap between the first pin 501 and the second outer pin 10 through the first solder ports 806.

[0032] For ease of overall packaging, such as Figure 1 and Figure 4 As shown, the top box 6 includes a cover 601. The bottom side panel of the cover 601 is integrally formed with an L-shaped plate 603. A U-shaped groove is formed between the L-shaped plate 603 and the side panel. The width of the U-shaped groove is greater than the width of the encapsulation box 4. In this way, during installation, the U-shaped groove can be locked onto the top of the side panel. Injection holes 602 are provided on both sides of the top of the cover 601. Encapsulating glue is injected into the space formed between the encapsulation box 4 and the cover 601 through one of the injection holes 602. Preferably, in this embodiment, the encapsulating glue is an epoxy resin.

[0033] Specifically, first, the copper mesh plate 2 is placed in the mounting groove 101, and then nano silver solder paste is coated on the top of the copper mesh plate 2 to form a nano silver solder paste layer 3. The chip 5 is placed on top of the nano silver solder paste layer 3, and the chip 5 is moved to the left so that the slot 505 on the chip 5 insertion plate 504 is locked between the elastic plates 902. At this time, the side of the baffle 804 abuts against the side of the pressing block 502. Then, the dovetail block 807 of the limiting plate 805 is inserted into the dovetail groove 803. Finally, solder particles are filled into the gaps formed between the socket block 901 and the hollow block 701 and between the first pin 501 and the second outer pin 10 through the solder inlet pipe 702 and the first solder port 806, respectively.

[0034] The specific encapsulation steps are as follows: After the above steps are completed, the encapsulation structure is placed in a vibratory machine for vibration. Tin particles are added again during the vibration interval until the tin particles are compacted. Then, the semi-finished product is placed in a heating furnace for heating. In this embodiment, for nano-silver, its particle size is less than 10nm, and its sintering temperature can be reduced to less than 100℃. Therefore, in order to ensure that the tin particles can be completely melted, the heating temperature is set to 300℃ in this embodiment. After heating for a period of time, the semi-finished product is taken out and placed in a heat preservation box for cooling down to room temperature. At this time, encapsulating glue is injected into the space formed between the encapsulation box 4 and the box cover 601 through the injection hole 602. In order to prevent the fixed tin from contacting the outside air and oxidizing, sealing glue 11 is added through the solder inlet tube 702. Of course, sealing glue 11 can also be epoxy resin. Finally, the finished product is placed in the heat preservation box again for cooling down to room temperature, and then taken out, thus obtaining the encapsulation structure of the chip 5.

[0035] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A nano-silver encapsulation structure for a chip, comprising a substrate (1) and a chip (5), characterized in that: The substrate (1) has a mounting groove (101) on its top. A copper mesh plate (2) is fixed to the bottom wall of the mounting groove (101). A nano silver solder paste layer (3) is coated on the top of the copper mesh plate (2). The chip (5) is placed on top of the nano silver solder paste layer (3). A package box (4) is fixed to the top of the substrate (1). Multiple rectangular grooves are provided on both sides of the package box (4). A first external pin (9) is provided on the outer side of one rectangular groove. A second external pin (10) is fixed to the inner wall of the other rectangular groove. The first external pin (9) is connected to the chip (5) through a first connecting device (7). The second external pin (10) is connected to the chip (5) through a second connecting device (8). The length of the mounting groove (101) is greater than the length of the copper mesh plate (2). One side of the copper mesh plate (2) is fixed to the side wall of the mounting groove (101) near the first connecting device (7). A top box (6) is placed on the top of the package box (4).

2. The nano-silver encapsulation structure for a chip according to claim 1, characterized in that: The chip (5) includes a first pin (501) and a second pin (503). Both sides of the first pin (501) are integrally formed with a pressing block (502). The end of the first pin (501) is integrally formed with a plug plate (504). The top and bottom ends of the plug plate (504) are provided with slots (505).

3. The nano-silver encapsulation structure for a chip according to claim 2, characterized in that: The first connecting device (7) includes a hollow block (701) fixed to the outer side plate of the packaging box (4). The hollow block (701) is connected to the rectangular groove. The first outer pin (9) is fixed to the inner wall of the hollow block (701). The first connecting device (7) also includes a socket block (901) integrally formed with the first outer pin (9). The top and bottom inner walls of the socket block (901) are integrally formed with elastic plates (902). The elastic plates (902) are engaged with the slot (505).

4. The nano-silver encapsulation structure for a chip according to claim 3, characterized in that: The hollow block (701) has a second solder port at its top. A solder inlet pipe (702) connected to the second solder port is fixed at the top of the hollow block (701). Tin particles are filled into the gap between the socket block (901) and the hollow block (701) through the solder inlet pipe (702).

5. The nano-silver encapsulation structure for a chip according to claim 1, characterized in that: The second connecting device (8) includes a connecting block (801) fixed to the inner side plate of the packaging box (4). The top of the connecting block (801) is provided with a slot (802). Both sides of the inner wall of the connecting block (801) are fixed with baffles (804). The width of the first pin (501) is less than the width between the two baffles (804). The width between the outer sides of the two pressing blocks (502) is greater than the width between the two baffles (804). The top of the connecting block (801) is provided with a limit structure.

6. The nano-silver encapsulation structure for a chip according to claim 5, characterized in that: The limiting structure includes a limiting plate (805), with multiple dovetail blocks (807) fixed at the bottom end of the limiting plate (805). The top of the side plate of the connecting block (801) is provided with dovetail grooves (803), which are adapted to the dovetail blocks (807). The top of the limiting plate (805) is provided with multiple first solder ports (806), which are connected to the slot (802). Solder particles are filled into the gap between the first pin (501) and the second outer pin (10) through the first solder ports (806).

7. The nano-silver encapsulation structure for a chip according to claim 1, characterized in that: The top box (6) includes a cover (601). The bottom side panel of the cover (601) is integrally formed with an L-shaped plate (603). A U-shaped groove is formed between the L-shaped plate (603) and the side panel. The width of the U-shaped groove is greater than the width of the encapsulation box (4). Injection holes (602) are provided on both sides of the top of the cover (601). Encapsulation glue is injected into the space formed between the encapsulation box (4) and the cover (601) through one of the injection holes (602).

8. The nano-silver encapsulation structure for a chip according to claim 7, characterized in that: The encapsulating adhesive is an epoxy resin.

Citation Information

Patent Citations

  • Nano-silver packaging structure of chip

    CN218333747U