OLED display panel and OLED display device

Abstract

The OLED display panel and the OLED display device provided by the embodiment of the present application comprise a substrate, an anode layer, a pixel definition layer, an electron transport layer and a cathode layer. The anode layer comprises a first electrode block, the pixel definition layer is provided with a first cathode auxiliary hole, and the first electrode block is connected with the first electrode block through the electron transport layer at the first cathode auxiliary hole. Before conduction, the first electrode block is driven by a positive voltage, and the cathode layer is driven by a negative voltage, so that a potential difference exists between the first electrode block and the cathode layer. Due to the existence of the potential difference, Ag ions in the first electrode block migrate to the cathode, so that the pressure drop can be reduced, the conduction can be increased, and the uniformity of the OLED display panel display can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to an OLED display panel and an OLED display device. Background Technology

[0002] Currently, Organic Light Emitting Diodes (OLED) displays have become the mainstream product for next-generation display technology. OLEDs are a new type of current-driven semiconductor light-emitting device that emits light by controlling the injection and recombination of charge carriers to excite organic materials; this is a self-emissive technology. Compared to passively emitting Liquid Crystal Displays (LCDs), self-emissive OLED displays have advantages such as faster response times, higher contrast ratios, and wider viewing angles, and are also easier to implement in flexible displays.

[0003] The display principles of OLED and LCD panels are essentially the same, both achieving display by controlling the switching state of the thin-film transistors (TFTs) in each sub-pixel. The difference lies in their control mechanisms: OLED displays adjust their brightness by controlling the current flowing through the TFTs, while LCD displays adjust their backlight transmittance by controlling the voltage applied across the liquid crystal cell using the TFTs. Compared to LCDs, OLED displays have higher requirements for the driving current capability of their TFTs. OLEDs are extremely sensitive to their driving current; even slight changes in current can affect their luminous intensity, thus requiring the TFT drivers to continuously and stably provide operating current.

[0004] At room temperature, the resistance of a metallic conductor is non-zero. Current flowing through the conductor will cause a voltage drop, a phenomenon known as IR drop. IR drop in metallic conductors leads to potential differences at different locations from the input terminal. For large OLED display panels, this IR drop causes differences in current across the OLED at different locations, resulting in uneven panel illumination and affecting image display quality.

[0005] Therefore, how to provide an OLED display panel and its manufacturing method that can reduce voltage drop and improve the display uniformity of the OLED display panel is a challenge that existing panel manufacturers need to overcome. Summary of the Invention

[0006] The purpose of this application is to provide an OLED display panel and an OLED display device that can solve the technical problem of poor display uniformity caused by voltage drop of metal traces in existing OLED display panels.

[0007] This application provides an OLED display panel, including:

[0008] Substrate, the substrate including a first surface and a second surface disposed opposite to each other;

[0009] An anode layer is disposed on the first surface, and the anode layer includes a first electrode block;

[0010] A pixel defining layer is disposed on the side of the anode layer away from the substrate, and the pixel defining layer is provided with a first cathode auxiliary hole to expose the first electrode block;

[0011] An electron transport layer is disposed on the side of the pixel defining layer away from the substrate and extends to the first cathode auxiliary hole;

[0012] A cathode layer is disposed on the side of the electron transport layer away from the substrate, and the cathode layer extends to the first cathode auxiliary hole so that the cathode layer is connected to the first electrode block via the electron transport layer.

[0013] In the OLED display panel described in this application, the first electrode block includes a first side portion, which is connected to the electron transport layer extending to the first cathode auxiliary hole.

[0014] In the OLED display panel described in this application, the orthographic projection of the first electrode block on the substrate at least partially overlaps with the orthographic projection of the first cathode auxiliary hole on the substrate.

[0015] In the OLED display panel described in this application, the pixel defining layer includes a pixel defining block, and the first electrode block includes a first portion located below the pixel defining block, wherein the orthographic projection of the first portion on the substrate is located in the orthographic projection of the pixel defining block on the substrate.

[0016] In the OLED display panel described in this application, the first electrode block further includes a second part interconnected with the first part, the second part extending into the first cathode auxiliary hole, and the second part being electrically connected to the electron transport layer extending to the first cathode auxiliary hole.

[0017] In the OLED display panel described in this application, the second part includes a front side and a side side connected in sequence, and the front side and the side side are both connected to the electron transport layer extending to the first cathode auxiliary hole.

[0018] In the OLED display panel described in this application, the OLED display panel further includes a planarization layer, which is disposed between the anode layer and the substrate. The planarization layer has a second cathode auxiliary hole, which communicates with the first cathode auxiliary hole.

[0019] In the OLED display panel described in this application, the OLED display panel further includes a first metal layer, an insulating layer, a second metal layer, a passivation layer, a first via, and a second via; wherein, the first metal layer is located on the first surface, the insulating layer is located on the surface of the first metal layer away from the substrate, the second metal layer is located on the surface of the insulating layer away from the substrate, the passivation layer is located between the second metal layer and the planarization layer, the first via penetrates the insulating layer, the second via penetrates the planarization layer and the passivation layer, the first metal layer includes a second electrode block, the second metal layer includes a third electrode block, the second electrode block is connected to the third electrode block via the first via, and the third electrode block is connected to the first electrode block via the second via.

[0020] In the OLED display panel described in this application, the first cathode auxiliary hole includes a first sub-cathode auxiliary hole and a second sub-cathode auxiliary hole. The first sub-cathode auxiliary hole is located on one side of the second via, and the second sub-cathode auxiliary hole is located on the other side of the second via.

[0021] This application also provides an OLED display device, which includes the OLED display panel as described above.

[0022] The OLED display panel and OLED display device provided in this application embodiment include a substrate, an anode layer, a pixel defining layer, an electron transport layer, and a cathode layer. The anode layer includes a first electrode block, and the pixel defining layer has a first cathode auxiliary hole. The first electrode block is connected to the first electrode block via the first cathode auxiliary hole through the electron transport layer. Before conduction, a positive voltage is used to drive the first electrode block, and a negative voltage is used to drive the cathode layer, creating a potential difference between the first electrode block and the cathode layer. This potential difference causes Ag ions in the first electrode block to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the OLED display panel. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a first structural schematic diagram of a first embodiment of an OLED display panel provided in this application.

[0025] Figure 2 This is a first structural schematic diagram of a first embodiment of an OLED display panel provided in this application.

[0026] Figure 3 This is a schematic diagram of a second embodiment of the OLED display panel provided in this application.

[0027] Figure 4 This is a schematic diagram of a third embodiment of the OLED display panel provided in this application.

[0028] Figure 5 This is a schematic diagram of the fourth embodiment of the OLED display panel provided in this application.

[0029] Figure 6 This is a schematic diagram of a fifth embodiment of the OLED display panel provided in this application.

[0030] Figure 7 This is a schematic diagram of a sixth embodiment of the OLED display panel provided in this application.

[0031] Figure 8 This is a schematic flowchart illustrating the manufacturing method of an OLED display panel provided in an embodiment of this application.

[0032] Figure 9 This is a first structural schematic diagram of a method for manufacturing an OLED display panel according to an embodiment of this application.

[0033] Figure 10 This is a second structural schematic diagram of a method for manufacturing an OLED display panel provided in an embodiment of this application.

[0034] Figure 11 This is a third structural schematic diagram of a method for manufacturing an OLED display panel according to an embodiment of this application. Detailed Implementation

[0035] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0036] Please see Figure 1 as well as Figure 2 , Figure 1 This is a first structural schematic diagram of a first embodiment of the OLED display panel provided in this application. Figure 2 This is a second structural schematic diagram of a first embodiment of the OLED display panel provided in this application. Figure 1 as well as Figure 2 As shown, the OLED display panel 10 provided in this application embodiment includes a substrate 101, an anode layer 102, a pixel defining layer 103, an electron transport layer 104, and a cathode layer 105.

[0037] The substrate 101 includes a first surface 101a and a second surface 101b disposed opposite to each other. An anode layer 102 is disposed on the first surface 101a. The anode layer 102 includes a first electrode block 1021. A pixel defining layer 103 is disposed on the surface of the anode layer 102 away from the substrate 101. The pixel defining layer 103 has a first cathode auxiliary hole 103a to expose the side of the first electrode block 1021. An electron transport layer 104 is disposed on the surface of the pixel defining layer 103 away from the substrate 101 and extends to the first cathode auxiliary hole 103a. A cathode layer 105 is disposed on the surface of the electron transport layer 104 away from the substrate 101 and extends to the first cathode auxiliary hole 103a. The cathode layer 105 is connected to the first electrode block 1021 via the electron transport layer 104.

[0038] In this embodiment, before displaying with the OLED display panel 10, a positive voltage is provided to the first electrode block 1021 to drive it, and a negative voltage is provided to the cathode layer 105 to drive it, thereby creating a potential difference between the first electrode block 1021 and the cathode layer 105. Due to the existence of this potential difference, Ag ions in the first electrode block 1021 migrate to the cathode layer 105. Moreover, since the cathode layer 105 and the first electrode block 1021 are connected via the electron transport layer 104, which has the function of transporting ions, it is not necessary to use current to break down the film between the cathode layer 105 and the first electrode block 1021; Ag ions can migrate directly, thereby increasing the current and voltage of the cathode layer 105. Therefore, by using the OLED display panel 10 provided in this application embodiment, the voltage drop of the internal metal wires of the OLED display panel 10 can be reduced, the conductivity of the internal metal wires of the OLED display panel 10 can be increased, thereby improving the uniformity of the OLED display panel 10 display and improving the image display quality of the OLED display panel 10.

[0039] The orthographic projection of the first electrode block 1021 on the substrate 101 does not overlap with the orthographic projection of the first cathode auxiliary hole 103a on the anode layer, meaning the first electrode block 1021 does not extend into the first cathode auxiliary hole 103a. The first electrode block 1021 includes a first side portion 1021a, which is connected to the electron transport layer 104 extending to the first cathode auxiliary hole 103a.

[0040] It should be noted that when the first electrode block 1021 is not inserted into the first cathode auxiliary hole 103a, the first side portion 1021a is connected to the electron transport layer 104 extending to the first cathode auxiliary hole 103a, and the first electrode block 1021 and the cathode layer 105 are edge-connected via the side of the electron transport layer 104. The side of the electron transport layer 104 has a relatively small thickness, which reduces the loss of Ag ions from the first electrode block 1021 during transmission to the cathode layer 105. This improves the current and voltage of the cathode layer 105, enhances the uniformity of the OLED display panel 10, and improves the image display quality of the OLED display panel 10.

[0041] It should be noted that the first cathode auxiliary hole 103a is annular in shape. By making the first cathode auxiliary hole 103a annular, the manufacturing process of forming the first cathode auxiliary hole 103a is reduced, and it is also ensured that the first electrode block 1021 and the cathode layer 105 can be connected within the first cathode auxiliary hole 103a. This improves the current and voltage of the cathode layer 105, enhances the uniformity of the OLED display panel 10, and improves the image display quality of the OLED display panel 10.

[0042] In the OLED display panel provided in this application embodiment, the sub-pixels include R sub-pixels, G sub-pixels, and B sub-pixels. That is, the sub-pixels include R red sub-pixels, green sub-pixels, and blue sub-pixels.

[0043] Please see Figure 3 , Figure 3 A schematic diagram of the structure of a second embodiment of the OLED display panel provided in this application is shown below. Figure 3 As shown, Figure 3 The OLED display panel 10 shown is Figure 2 The difference in the OLED display panel 10 shown is that the orthographic projection of the first electrode block 1021 on the substrate 101 at least partially overlaps with the orthographic projection of the first cathode auxiliary hole 103a on the substrate 101.

[0044] The pixel defining layer 103 includes a pixel defining block 1031, and the first electrode block 1021 includes a first portion 1021b located below the pixel defining block 1031. The orthographic projection of the first portion 1021b onto the substrate 101 lies within the orthographic projection of the pixel defining block 1031 onto the substrate 101. The first electrode block 1021 also includes a second portion 1021c interconnected with the first portion 1021b. The second portion 1021c extends into the first cathode auxiliary hole 103a and is electrically connected to the electron transport layer 104 extending to the first cathode auxiliary hole 103a. The second portion 1021c includes a front surface 1021d and a side surface 1021e connected in sequence. Both the front surface 1021d and the side surface 1021e are connected to the electron transport layer 104 extending to the first cathode auxiliary hole 103a.

[0045] It should be noted that since both the electron transport layer 104 and the cathode layer 105 are connected to the first electrode block 1021 by extending into the first cathode auxiliary hole 103a, the second portion 1021b of the first electrode block 1021 extending into the first cathode auxiliary hole 103a is electrically connected to the electron transport layer 104 extending into the first cathode auxiliary hole 103a. This ensures that the first electrode block 1021 and the cathode layer 105 can be connected within the first cathode auxiliary hole 103a, thereby increasing the current and voltage of the cathode layer 105, improving the uniformity of the OLED display panel 10, and enhancing the image display quality of the OLED display panel 10.

[0046] Please see Figure 4 , Figure 4 A schematic diagram of a third embodiment of the OLED display panel provided in this application is shown below. Figure 4 As shown, Figure 4 The OLED display panel 10 shown is Figure 3 The difference in the OLED display panel 10 shown is that the OLED display panel 10 also includes a planarization layer 106. The planarization layer 106 is disposed between the anode layer 102 and the substrate 101, and the planarization layer 106 has a second cathode auxiliary hole 103b, which communicates with the first cathode auxiliary hole 103a.

[0047] It should be noted that by providing a second cathode auxiliary hole 103b in the planarization layer 106, and by having the second cathode auxiliary hole 103b communicate with the first cathode auxiliary hole 103a (i.e., the first cathode auxiliary hole 103a can penetrate to the film layer below the anode layer), the contact area between the first electrode block 1021 and the cathode layer 105 via the electron transport layer can be increased. This allows more Ag ions from the first electrode block 1021 to be transferred to the cathode layer 105, thereby improving the current and voltage of the cathode layer 105, enhancing the uniformity of the OLED display panel 10, and improving the image display quality of the OLED display panel 10.

[0048] Please see Figure 5 , Figure 5 A schematic diagram of the fourth embodiment of the OLED display panel provided in this application is shown below. Figure 5 As shown, Figure 5 The OLED display panel 10 shown is Figure 4 The difference in the OLED display panel 10 shown is that it further includes a first metal layer 107, an insulating layer 108, a second metal layer 109, a passivation layer 110, a first via 10a, and a second via 10b. The first metal layer 107 is located on the first surface 101a. The insulating layer 108 is located on the surface of the first metal layer 107 away from the substrate 101, the second metal layer 109 is located on the surface of the insulating layer 108 away from the substrate 101, and the passivation layer 110 is located between the second metal layer 109 and the planarization layer 106. The first via 10a penetrates the insulating layer 108, and the second via 10b penetrates the planarization layer 106 and the passivation layer 110. The first metal layer 107 includes a second electrode block 1071. The second metal layer 109 includes a third electrode block 1091. The second electrode block 1071 is connected to the third electrode block 1091 via the first via 10a, and the third electrode block 1091 is connected to the first electrode block 1021 via the second via 10b.

[0049] It should be noted that the first metal layer 107 is made of conductive metal, which not only blocks light and prevents light from affecting other film layers, but also transmits current signals.

[0050] In this embodiment, the first electrode block 1021 is not easily connected to external traces, making it impossible to directly transmit current signals to it, i.e., it cannot be driven by positive or negative voltage. However, in this embodiment, the first electrode block 1021 is connected to the second electrode block 1071 via the third electrode block 1091, and the second electrode block 1071 can be connected to external traces, thus facilitating the driving of the first electrode block 1021 by positive or negative voltage.

[0051] The first cathode auxiliary hole 103a includes a first sub-cathode auxiliary hole 103c and a second sub-cathode auxiliary hole 103d. The first sub-cathode auxiliary hole 103c is located on one side of the second via 10b, and the second sub-cathode auxiliary hole 103d is located on the other side of the second via 10b.

[0052] Please see Figure 6 , Figure 6 This is a schematic diagram of the fifth embodiment of the OLED display panel provided in this application, as shown below. Figure 6 As shown, Figure 6 The OLED display panel 10 shown is Figure 5 The difference in the OLED display panel 10 shown is that the insulating layer 108 includes a buffer layer 1081 and an interlayer insulating layer 1082 stacked sequentially.

[0053] The buffer layer 1081 is located on the side of the first metal layer 107 away from the substrate 101, and the interlayer insulating layer 1082 is located on the side of the buffer layer 1081 away from the substrate 101.

[0054] It should be noted that the OLED display panel 10 also needs to have a thin-film transistor layer for controlling the light-emitting device to emit light. Specifically, the OLED display panel 10 also includes film layers such as an active layer, a gate insulating layer, a gate layer, and a light-emitting material layer. The first metal layer also includes a light-shielding metal block, and the second metal layer also includes source and drain electrode blocks. Among them, the light-shielding metal block is located on the first surface, and the orthogonal projection of the active layer on the substrate is located in the orthogonal projection of the light-shielding metal block on the substrate. The buffer layer 1081 is located on the surface of the light-shielding metal block away from the substrate, the active layer is located on the surface of the buffer layer 1081 away from the substrate, the gate insulating layer is located on the surface of the active layer away from the substrate, the gate layer is located on the surface of the gate insulating layer away from the substrate, the interlayer insulating layer 1082 is located on the surface of the gate layer away from the substrate, and the source and drain electrode blocks are located on the surface of the interlayer insulating layer 1082 away from the substrate.

[0055] Please see Figure 7 , Figure 7 This is a schematic diagram of the sixth embodiment of the OLED display panel provided in this application, as shown below. Figure 7 As shown, Figure 7 The OLED display panel 10 shown is Figure 6 The difference in the OLED display panel 10 shown is that the anode layer 102 includes a first sub-anode layer 102a, a second sub-anode layer 102b and a third sub-anode layer 102c stacked in sequence, and the first sub-anode layer 102a and the third sub-anode layer 102c are made of the same material.

[0056] The first sub-anode layer 102a is made of one or a combination of indium tin oxide and indium zinc oxide, and the second sub-anode layer 102b is made of silver. It should be noted that the anode layer 102 employs a laminated structure of indium tin oxide-silver-indium tin oxide, which can improve the transparency and conductivity of the anode layer 102.

[0057] The OLED display panel provided in this embodiment includes a substrate, an anode layer, a pixel defining layer, an electron transport layer, and a cathode layer. The anode layer includes a first electrode block, and the pixel defining layer has a first cathode auxiliary hole. The first electrode block is connected to the first cathode auxiliary hole via the electron transport layer. Before conduction, a positive voltage is used to drive the first electrode block, and a negative voltage is used to drive the cathode layer, creating a potential difference between the first electrode block and the cathode layer. This potential difference causes Ag ions in the first electrode block to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the OLED display panel.

[0058] This application also provides an OLED display device, which includes a frame and an OLED display panel 10. The frame serves as the mounting base for the OLED display panel 10. The OLED display panel 10 is as described in the above embodiments and will not be repeated here.

[0059] The OLED display device provided in this application includes a substrate, an anode layer, a pixel defining layer, an electron transport layer, and a cathode layer. The anode layer includes a first electrode block, and the pixel defining layer has a first cathode auxiliary hole. The first electrode block is connected to the first cathode auxiliary hole via the electron transport layer. Before conduction, a positive voltage is used to drive the first electrode block, and a negative voltage is used to drive the cathode layer, creating a potential difference between the first electrode block and the cathode layer. This potential difference causes Ag ions in the first electrode block to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the OLED display panel.

[0060] This application also provides a method for manufacturing an OLED display panel. Please refer to [link / reference]. Figure 8 , Figure 8 This is a schematic flowchart illustrating a method for manufacturing an OLED display panel according to an embodiment of this application. Figure 8 As shown, the method for manufacturing an OLED display panel provided in this application embodiment includes the following steps:

[0061] Step 201: Provide a substrate, the substrate including a first surface and a second surface disposed opposite to each other.

[0062] Step 202: Form an anode layer on the first surface, the anode layer including a first electrode block.

[0063] Step 203: A pixel defining layer is formed on the side of the anode layer away from the substrate, and a first cathode auxiliary hole is provided on the pixel defining layer to expose the first electrode block.

[0064] Step 204: An electron transport layer is formed on the side of the pixel defining layer away from the substrate, and the electron transport layer fills the first cathode auxiliary hole.

[0065] Step 205: A cathode layer is formed on the side of the electron transport layer away from the substrate, and the cathode layer fills the first cathode auxiliary hole so that the cathode layer is connected to the first electrode block through the electron transport layer.

[0066] Please see Figure 9 , Figure 10 as well as Figure 11 As shown, Figure 9 This is a first structural schematic diagram of a method for manufacturing an OLED display panel according to an embodiment of this application. Figure 10 This is a second structural schematic diagram of a method for manufacturing an OLED display panel according to an embodiment of this application. Figure 11 This is a third structural schematic diagram of a method for manufacturing an OLED display panel according to an embodiment of this application.

[0067] The OLED display panel and OLED display device provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. An OLED display panel, characterized in that, include: Substrate, the substrate including a first surface and a second surface disposed opposite to each other; An anode layer is disposed on the first surface, and the anode layer includes a first electrode block; the material of the anode layer includes silver. A pixel defining layer is disposed on the side of the anode layer away from the substrate, and the pixel defining layer is provided with a first cathode auxiliary hole, the first cathode auxiliary hole penetrating the first electrode block, and the orthographic projection of the first cathode auxiliary hole on the substrate does not overlap with the orthographic projection of the first electrode block on the substrate at least partially, so that the side of the first electrode block is exposed. An electron transport layer is disposed on the side of the pixel defining layer away from the substrate and extends to the first cathode auxiliary hole; A cathode layer is disposed on the side of the electron transport layer away from the substrate, and the cathode layer extends to the first cathode auxiliary hole so that the cathode layer is connected to the first electrode block via the electron transport layer; The first electrode block includes a first side portion, which is connected to the electron transport layer extending to the first cathode auxiliary hole, such that the first electrode block and the cathode layer are edge-connected via the side of the electron transport layer; Before conduction, the first electrode block is driven by a positive voltage and the cathode layer is driven by a negative voltage, so that there is a potential difference between the first electrode block and the cathode layer, and silver ions in the first electrode block migrate to the cathode layer.

2. The OLED display panel according to claim 1, characterized in that, First electrode The orthographic projection of the block on the substrate at least partially overlaps with the orthographic projection of the first cathode auxiliary hole on the substrate.

3. The OLED display panel according to claim 2, characterized in that, The pixel defining layer includes a pixel defining block, and the first electrode block includes a first portion located below the pixel defining block, wherein the orthographic projection of the first portion on the substrate is located in the orthographic projection of the pixel defining block on the substrate.

4. The OLED display panel according to claim 3, characterized in that, The first electrode block further includes a second portion interconnected with the first portion, the second portion extending into the first cathode auxiliary hole, and the second portion being electrically connected to the electron transport layer extending into the first cathode auxiliary hole.

5. The OLED display panel according to claim 4, characterized in that, The second part includes a front side and a side side connected in sequence, both of which are connected to the electron transport layer extending to the first cathode auxiliary aperture.

6. The OLED display panel according to claim 1, characterized in that, The OLED display panel further includes a planarization layer disposed between the anode layer and the substrate. The planarization layer has a second cathode auxiliary hole, which communicates with the first cathode auxiliary hole.

7. The OLED display panel according to claim 6, characterized in that, The OLED display panel further includes a first metal layer, an insulating layer, a second metal layer, a passivation layer, a first via, and a second via; wherein, the first metal layer is located on the first surface, the insulating layer is located on the surface of the first metal layer away from the substrate, the second metal layer is located on the surface of the insulating layer away from the substrate, the passivation layer is located between the second metal layer and the planarization layer, the first via penetrates the insulating layer, the second via penetrates the planarization layer and the passivation layer, the first metal layer includes a second electrode block, the second metal layer includes a third electrode block, the second electrode block is connected to the third electrode block via the first via, and the third electrode block is connected to the first electrode block via the second via.

8. The OLED display panel according to claim 7, characterized in that, The first cathode auxiliary hole includes a first sub-cathode auxiliary hole and a second sub-cathode auxiliary hole. The first sub-cathode auxiliary hole is located on one side of the second via, and the second sub-cathode auxiliary hole is located on the other side of the second via.

9. An OLED display device, characterized in that, The OLED display device includes an OLED display panel as described in any one of claims 1-8.

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