Signal transmission circuit, receiving circuit, and signal transmission system
Patent Information
- Application Number
- CN202210898127.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-28
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2042-07-28
AI Technical Summary
[0003]然而,这类使用电压差信号传输方法可能被在半导体芯片内部的模块间的传输线长度所影响,尤其是考虑到近来技术趋势中,由于电源轨、控制信号等影响版图布局的因素导致两个模块之间的距离逐渐增长,而该传输线具有较大寄生电阻和寄生电容,传输线的长度增长会导致带宽降低,信号传输质量下降等问题
[0016]上述信号传输电路,采用电流传输模式,解决了后续长线传输中信号带宽不足的问题,降低了由于传输线长度增长对信号传输带来的影响,提高了信号传输质量。
Smart Images

Figure CN115203106B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to signal transmission circuits, receiving circuits, and signal transmission systems. Background Technology
[0002] In traditional technology, the transmission of signals between modules within a semiconductor chip typically uses a pair of differential transmission lines to transmit a signal in differential voltage form and to enable a receiving unit to receive the signal in voltage form.
[0003] However, this type of signal transmission method using voltage difference may be affected by the length of the transmission lines between modules inside the semiconductor chip. In particular, considering the recent technological trend that the distance between two modules is gradually increasing due to factors affecting the layout such as power rails and control signals, the transmission lines have large parasitic resistance and capacitance. The increase in the length of the transmission lines will lead to problems such as reduced bandwidth and degraded signal transmission quality. Summary of the Invention
[0004] Therefore, it is necessary to provide a signal transmission circuit, a receiving circuit, and a signal transmission system to reduce the impact of increased transmission line length on signal transmission and improve signal transmission quality.
[0005] In a first aspect, the present invention provides a signal transmission circuit, comprising: a positive input terminal for receiving a positive terminal voltage signal of a differential voltage signal; a negative input terminal for receiving a negative terminal voltage signal of the differential voltage signal; and an amplification unit connected to the positive and negative input terminals for receiving the differential voltage signal and converting it into a differential current signal for output; the amplification unit includes: a current source configured to independently generate and provide current; a first branch connected to the current source and acquiring the positive terminal voltage signal, converting the positive terminal voltage signal into a positive current signal and transmitting it to a first transmission line; and a second branch connected to the current source and acquiring the negative terminal voltage signal, converting the negative terminal voltage signal into a negative current signal and transmitting it to a second transmission line.
[0006] In one embodiment, the first branch includes a first resistor and a first switch. One end of the first resistor is connected to a current source, and the other end of the first resistor is connected to the first end of the first switch. The second end of the first switch is connected to a positive voltage signal, and the third end of the first switch outputs a positive current signal. The second branch includes a second resistor and a second switch. One end of the second resistor is connected to a current source, and the other end of the second resistor is connected to the first end of the second switch. The second end of the second switch is connected to a negative voltage signal, and the third end of the second switch outputs a negative current signal.
[0007] In one embodiment, the resistance values of the first resistor and the second resistor are equal.
[0008] In one embodiment, the differential voltage signal is an analog signal.
[0009] In one embodiment, the first and second switching transistors are transistors or MOSFETs.
[0010] In a second aspect, the present invention provides a signal receiving circuit for receiving positive current signals and negative current signals from a differential current signal from a transmission line and recovering them as a differential voltage signal, comprising: a third branch connected to a first transmission line, which outputs a first voltage signal in response to a positive current signal; and a fourth branch connected to a second transmission line, which outputs a second voltage signal in response to a negative current signal.
[0011] In one embodiment, the third branch includes a third resistor and a third transistor. One end of the third resistor is connected to a first power supply voltage, and the other end of the third resistor is connected to the third transistor. The first end of the third transistor is connected to a first transmission line, the second end of the third transistor is connected to a second power supply voltage, and the third end of the third transistor is connected to the third resistor. The third end of the third transistor outputs a first voltage signal. The fourth branch includes a fourth resistor and a fourth transistor. One end of the fourth resistor is connected to the first power supply voltage, and the other end of the fourth resistor is connected to the fourth transistor. The first end of the fourth transistor is connected to a second transmission line, the second end of the fourth transistor is connected to the second power supply voltage, and the third end of the fourth transistor is connected to the fourth resistor. The third end of the fourth transistor outputs a second voltage signal.
[0012] In one embodiment, the third branch further includes a first voltage regulator connected between the second power supply voltage and the third transistor to regulate the voltage supplied to the third transistor.
[0013] The fourth branch also includes a second voltage regulator, connected between the second power supply voltage and the fourth transistor, to regulate the voltage supplied to the fourth transistor.
[0014] In one embodiment, the resistance values of the third resistor and the fourth resistor are equal.
[0015] Thirdly, the present invention provides a signal transmission system, comprising: a signal transmission circuit for receiving a positive terminal voltage signal and a negative terminal voltage signal of a differential voltage signal and converting them into a differential current signal for output to a first transmission line and a second transmission line; a signal receiving circuit connected to the first transmission line and the second transmission line for receiving a differential current signal and recovering it as a differential voltage signal; the signal transmission circuit includes: a current source configured to independently generate and provide current; a first branch connected to the current source and acquiring the positive terminal voltage signal, converting the positive terminal voltage signal into a positive current signal for transmission to the first transmission line; and a second branch connected to the current source and acquiring the negative terminal voltage signal, converting the negative terminal voltage signal into a negative current signal for transmission to the second transmission line.
[0016] The aforementioned signal transmission circuit employs a current transmission mode, which solves the problem of insufficient signal bandwidth in subsequent long-distance transmission, reduces the impact of increased transmission line length on signal transmission, and improves signal transmission quality. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a general block diagram of a signal transmission circuit according to one embodiment;
[0019] Figure 2 This is a schematic diagram of a signal transmission circuit in one embodiment;
[0020] Figure 3 for Figure 2 The circuit component diagram of the signal transmission circuit in the illustrated embodiment is shown.
[0021] Figure 4 This is a general block diagram of the signal receiving circuit in one embodiment;
[0022] Figure 5 This is a schematic diagram of a signal receiving circuit in one embodiment;
[0023] Figure 6 This is a circuit element diagram of a signal receiving circuit in one embodiment;
[0024] Figure 7 This is a circuit element diagram of the signal receiving circuit in another embodiment;
[0025] Figure 8 This is a general block diagram of a signal transmission system in one embodiment;
[0026] Figure 9 This is a schematic diagram of a signal transmission system in one embodiment. Detailed Implementation
[0027] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0029] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0030] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0031] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “including,” or “having,” etc., specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.
[0032] See Figure 1 , Figure 1 A general block diagram of a signal transmission circuit according to an embodiment of the present invention is shown. The signal transmission circuit 100 provided in an embodiment of the present invention includes a positive input terminal 110, a negative input terminal 120, and an amplification unit 130.
[0033] The positive input terminal 110 and the negative input terminal 120 are used to connect the positive voltage signal VIAP and the negative voltage signal VIAN of the differential voltage.
[0034] Amplification unit 130 is connected to the positive input terminal 110 and the negative input terminal 120, and is used to receive differential voltage signals and convert them into differential current signals for output. Amplification unit 130 includes: current source 131, first branch 132 and second branch 133.
[0035] A current source 131 is configured to independently generate and supply current to a transmission line pair 200, which includes a first transmission line 210 and a second transmission line 220. The current source 131 has one end connected to ground (GND) and another end connected to a first end of a first branch 132 and a second branch 133, supplying a predetermined amount of current I0 to the first end. The second end of the first branch 132 is connected to the first transmission line 210, and the second end of the second branch 133 is connected to the second transmission line 220.
[0036] The first end of the first branch 132 is connected to the current source 131, the second end of the first branch 132 is connected to the first transmission line 210, and the third end of the first branch 132 is connected to the positive input terminal 110 to obtain a positive voltage signal VIAP, and convert the positive voltage signal VIAP into a positive current signal IIAP and transmit it to the first transmission line 210. The first end of the second branch 133 is connected to the current source 131, the second end of the second branch 133 is connected to the second transmission line 120, and the third end of the second branch 133 is connected to the negative input terminal 120 to obtain a negative voltage signal VIAN, and convert the negative voltage signal VIAN into a negative current signal IIAN and transmit it to the second transmission line 220.
[0037] In this way, the signal transmission circuit 100 converts the voltage signal inside the module into a current signal output, which is then transmitted to another module via the transmission line pair. Using current transmission mode can solve the problem of insufficient signal bandwidth in subsequent long-distance transmissions, reduce the impact of increased transmission line length on signal transmission, and improve signal transmission quality. It is understood that the positive terminal voltage signal VIAP and the negative terminal voltage signal VIAN are the positive and negative signals of the differential voltage signal, and do not represent the positive or negative values of the voltage values.
[0038] Combination Figure 2 As shown, Figure 2A schematic diagram of a signal transmission circuit according to an embodiment of the present invention is shown. In some embodiments, the first branch 132 includes a first resistor R1 and a first switch Q1, and the second branch 133 includes a second resistor R2 and a second switch Q2. Specifically, one end of the first resistor R1 is grounded through a current source 131, the other end of the first resistor R1 is connected to the first end of the first switch Q1, the second end of the first switch Q1 is connected to the positive input terminal 110 to receive the positive voltage signal VIAP, and the third end of the first switch Q1 serves as the first output terminal 140, connected to the first transmission line 210, for outputting the positive current signal IIAP. Similarly, one end of the second resistor R2 is grounded through a current source 131, the other end of the second resistor R2 is connected to the other end of the second switch Q2, the second end of the second switch Q2 is connected to the negative input terminal 120 to receive the negative voltage signal VIAN, and the third end of the second switch Q2 serves as the second output terminal 150, connected to the second transmission line 220, for outputting the negative current signal IIAN.
[0039] Optionally, the first switching transistor Q1 can be a transistor or a MOSFET. Taking a transistor as an example, such as... Figure 3 As shown, Figure 3 A circuit diagram of a signal transmission circuit according to an embodiment of the present invention is shown. Current source 131 provides a DC bias current I0 to the first transistor Q1. Positive input terminal 110 provides a positive terminal voltage signal VIAP to the first transistor Q1, while negative input terminal 120 provides a negative terminal voltage signal VIAN to the second transistor Q2. Specifically, the base of the first transistor Q1 is connected to the positive terminal voltage signal VIAP, the emitter of the first transistor Q1 is connected to the current source 131 through a first resistor R1, and the collector of the first transistor Q1 serves as the first output terminal 140, used to output a positive current signal IIAP. Therefore, after the emitter of the first transistor Q1 is connected to the DC bias current provided by current source 131, it operates in the amplification region, and the collector of the first transistor Q1 generates a positive current signal IIAP based on the positive terminal voltage signal VIAP connected to the base. The base of the second transistor Q2 is connected to a negative terminal voltage signal VIAN, and the emitter of the second transistor Q2 is connected to a current source through a second resistor R2. The collector of the second transistor Q2 serves as the second output terminal 150, used to output a negative current signal IIAN. Therefore, after the emitter of the second transistor Q2 is connected to the DC bias current provided by the current source 131, it operates in the amplification region, and the collector of the second transistor Q2 generates a negative current signal IIAN based on the negative terminal voltage signal VIAN connected to the base.
[0040] Figure 4This is a general block diagram of the signal receiving circuit in another embodiment. One embodiment of the present invention provides a signal receiving circuit 300, including a third branch 310 and a fourth branch 320. The signal receiving circuit 300 is used to receive positive and negative current signals from the differential current signal from the transmission line pair 200 and recover them as a differential voltage signal.
[0041] The third branch 310 is connected to the first transmission line 210 and outputs the first voltage signal VOBP in response to the positive current signal IIAP. Specifically, the first terminal of the third branch 310 is connected to the second power supply voltage Vb1, the second terminal of the third branch 310 is connected to the first power supply voltage Vcc, the third terminal of the third branch 310 is connected to the first transmission line 210 to receive the positive current signal IIAP, and the fourth terminal of the third branch 310 outputs the first voltage signal VOBP.
[0042] The fourth branch 320 is connected to the second transmission line 220 and outputs the second voltage signal VOBN in response to the negative current signal IIAN. Specifically, the first terminal of the fourth branch 320 is connected to the second power supply voltage Vb1, the second terminal of the fourth branch 320 is connected to the first power supply voltage Vcc, the third terminal of the fourth branch 320 is connected to the second transmission line 220 to receive the negative current signal IIAN, and the fourth terminal of the fourth branch 320 outputs the second voltage signal VOBN.
[0043] Combination Figure 5 As shown, Figure 5 A schematic diagram of a signal receiving circuit according to an embodiment of the present invention is shown. In some embodiments, the third branch 310 further includes a third resistor R3 and a third switch Q3. One end of the third resistor R3 is connected to a first power supply voltage Vcc, and the other end of the third resistor R3 is connected to the third switch Q3. The first end of the third switch Q3 is connected to the first transmission line 210, the second end of the third switch Q3 is connected to a second power supply voltage Vb1, and the third end of the third switch Q3 is connected to the third resistor R3, and the third end of the third switch Q3 outputs a first voltage signal VOBP. Specifically, the emitter of the third switch Q3 is connected to the first transmission line and receives a positive current signal IIAP, the base of the third switch Q3 is connected to the second power supply voltage Vb1, and the collector of the third switch Q3 is connected to the first power supply voltage Vcc through the third resistor R3. Therefore, by providing the second power supply voltage Vb1, the third switch Q3 operates in the amplification region, thereby responding to the positive current signal IIAP received at the emitter of the third switch Q3 and outputting the first voltage signal VOBP.
[0044] The fourth branch 320 includes a fourth resistor R4 and a fourth switch Q4. One end of the fourth resistor R4 is connected to the first power supply voltage Vcc, and the other end is connected to the fourth switch Q4. The first end of the fourth switch Q4 is connected to the second transmission line 220, the second end is connected to the second power supply voltage Vb1, and the third end is connected to the fourth resistor R4, outputting a second voltage signal VOBN from the third end of the fourth switch Q4. Specifically, the emitter of the fourth switch Q4 is connected to the second transmission line and receives a negative current signal IIAN; the base of the fourth switch Q4 is connected to the second power supply voltage Vb1; and the collector of the fourth switch Q4 is connected to the first power supply voltage Vcc through the fourth resistor R4. Therefore, by providing the second power supply voltage Vb1, the fourth switch Q4 operates in the amplification region, thereby responding to the negative current signal IIAN received at the emitter of the fourth switch Q4 and outputting the second voltage signal VOBN.
[0045] Figure 6 A circuit element diagram of a signal receiving circuit according to an embodiment of the present invention is shown. Specifically, the third branch 310 further includes a third resistor R3 and a third transistor Q3. One end of the third resistor R3 is connected to the first power supply voltage Vcc, and the other end of the third resistor R3 is connected to the third transistor Q3. The first end of the third transistor Q3 is connected to the first transmission line 210, the second end of the third transistor Q3 is connected to the second power supply voltage Vb1, and the third end of the third transistor Q3 is connected to the third resistor R3, and the third end of the third transistor outputs a first voltage signal VOBP. Specifically, the emitter of the third transistor Q3 is connected to the first transmission line and receives a positive current signal IIAP, the base of the third transistor Q3 is connected to the second power supply voltage Vb1, and the collector of the third transistor Q3 is connected to the first power supply voltage Vcc through the third resistor R3. Therefore, by providing the second power supply voltage Vb1, the third transistor Q3 operates in the amplification region, thereby responding to the positive current signal IIAP received at the emitter of the third transistor Q3 and outputting the first voltage signal VOBP.
[0046] The fourth branch 320 includes a fourth resistor R4 and a fourth transistor Q4. One end of the fourth resistor R4 is connected to the first power supply voltage Vcc, and the other end is connected to the fourth transistor Q4. The first end of the fourth transistor Q4 is connected to the second transmission line 220, the second end of the fourth transistor Q4 is connected to the second power supply voltage Vb1, and the third end of the fourth transistor Q4 is connected to the fourth resistor R4, outputting a second voltage signal VOBN from the third end of the fourth transistor Q4. Specifically, the emitter of the fourth transistor Q4 is connected to the second transmission line and receives a negative current signal IIAN; the base of the fourth transistor Q4 is connected to the second power supply voltage Vb1; and the collector of the fourth transistor Q4 is connected to the first power supply voltage Vcc through the fourth resistor R4. Therefore, by providing the second power supply voltage Vb1, the fourth transistor Q4 operates in the amplification region, thereby responding to the negative current signal IIAN received at the emitter of the fourth transistor Q4 and outputting the second voltage signal VOBN.
[0047] In this circuit, the resistance values of the third resistor R3 and the fourth resistor R4 are equal. Thus, the signal receiving circuit 300 restores the current signal from the transmission line pair 200 to a voltage signal for further signal processing. It is understood that the third transistor Q3 and the fourth transistor Q4 can be replaced by MOSFETs, and there are no restrictions on this.
[0048] Combination Figure 7 As shown, Figure 7A circuit element diagram of a signal receiving circuit according to another embodiment of the present invention is shown. In some other embodiments, the signal receiving circuit 400 includes a third branch 410 and a fourth branch 420. The third branch 410 includes a third resistor R3a, a third transistor Q3a, and a first voltage regulator OP1. The first voltage regulator OP1 is connected between a second power supply voltage Vb1 and the third transistor Q3a to regulate the voltage supplied to the third transistor Q3a. Typically, the second power supply voltage Vb1 is applied to the first terminal of the first voltage regulator OP1, and a positive current signal IIAP is applied to the second terminal of the first voltage regulator OP1. Therefore, the second terminal of the first voltage regulator OP1 is connected to the first transmission line 210 and also to the emitter of the third transistor Q3a. Furthermore, the third terminal of the first voltage regulator OP1 is connected to the base of the third transistor Q3a. One end of the third resistor R3a is connected to the first power supply voltage Vcc, and the other end of the third resistor R3a is connected to the collector of the third transistor Q3a. The fourth branch 420 includes a fourth resistor R4a, a fourth transistor Q4a, and a second voltage regulator OP2. The second voltage regulator OP2 is connected between the second power supply voltage Vb1 and the fourth transistor Q4a to regulate the voltage supplied to Q4a. Typically, the second power supply voltage Vb1 is applied to the first terminal of the second voltage regulator OP2, and the negative current signal IIAN is applied to the second terminal of the second voltage regulator OP2. Therefore, the second terminal of the second voltage regulator OP2 is connected to the second transmission line 220 and also to the emitter of the fourth transistor Q4a. Furthermore, the third terminal of the second voltage regulator OP2 is connected to the base of the fourth transistor Q4a. One end of the fourth resistor R4a is connected to the first power supply voltage Vcc, and the other end of the fourth resistor R4a is connected to the collector of the fourth transistor Q4a. For example, an operational amplifier is used as the first voltage regulator OP1 and the second voltage regulator OP2. The second power supply voltage Vb1 is applied to the positive input terminal of the first voltage regulator OP1, and the positive current signal IIAP is applied to the negative input terminal of the first voltage regulator OP1. Similarly, the second power supply voltage Vb1 is applied to the positive input terminal of the second voltage regulator OP2, while the negative current signal IIAN is applied to the negative input terminal of the second voltage regulator OP2. Here, the voltage regulator can specifically be an operational amplifier.
[0049] Because the emitter of a transistor has an emitter resistance Re, which is a parasitic effect of the transistor, the input resistance of the module containing the signal receiving circuit is close to the long-line resistance of the transmission line pair. In some cases, the input resistance of the module containing the signal receiving circuit is even greater than the impedance of the long-line resistance, and the advantages of the current transmission mode are not realized. Therefore, a voltage regulator is added to the circuit so that the first voltage regulator OP1 and the third transistor Q3a form a voltage follower. Due to the virtual short principle, the voltage at the negative input terminal of the first voltage regulator OP1 is equal to the voltage Vb1 at the positive input terminal of the first voltage regulator OP1. Therefore, the voltage applied to the emitter of the third transistor Q3a is the second power supply voltage Vb1, that is, the input impedance of the emitter of the third transistor Q3a is 0. Similarly, the second voltage regulator OP2 and the fourth transistor Q4a form a voltage follower. Due to the virtual short principle, the voltage at the negative input terminal of the second voltage regulator OP2 is equal to the voltage Vb1 at the positive input terminal of the second voltage regulator OP2. Therefore, the voltage applied to the emitter of the fourth transistor Q4a is the second power supply voltage Vb1, meaning the input impedance of the emitter of the fourth transistor Q4a is 0. This allows the advantages of the current-mode transmission to be utilized, increasing the bandwidth of the signal transmission.
[0050] Then, a signal transmission system will be described in another embodiment of the invention. (See reference...) Figure 8 and Figure 9 , Figure 8 and Figure 9 The signal transmission system 500, which is another embodiment of the present invention, includes a signal transmission circuit 510, a transmission line pair 520, and a signal receiving circuit 530.
[0051] Transmission line pair 520, used for transmitting signals via a differential scheme, includes a first transmission line 521 and a second transmission line 522.
[0052] The signal transmission circuit 510 is configured to receive the positive terminal voltage signal VIAP and the negative terminal voltage signal VIAN of the differential voltage signal and convert them into differential current signals for output to the first transmission line 521 and the second transmission line 522.
[0053] Exemplarily, the signal transmission circuit 510 further includes a current source 5131, a first branch 5132, and a second branch 5133. The current source 5131 is configured to independently generate and supply current to the transmission line pair 520. The current source 5131 has one end connected to ground (GND) and one end connected to a first end of the first branch 5132 and the second branch 5133, and supplies a predetermined amount of current to the first end. The other end of the first branch 5132 is connected to the first transmission line 521, and the other end of the second branch 5133 is connected to the second transmission line 522.
[0054] The first terminal of the first branch 5132 is connected to the current source 5131, the second terminal of the first branch 5132 is connected to the first transmission line 521, and the third terminal of the first branch 5132 is connected to the positive input terminal 511 to obtain the positive terminal voltage signal VIAP and convert the positive terminal voltage signal VIAP into a positive current signal IIAP and transmit it to the first transmission line 521. The first terminal of the second branch 5133 is connected to the current source 5131, the second terminal of the second branch 5133 is connected to the second transmission line 522, and the third terminal of the second branch 5133 is connected to the negative input terminal 512 to obtain the negative terminal voltage signal VIAN and convert the negative terminal voltage signal VIAN into a negative current signal IIAN and transmit it to the second transmission line 522.
[0055] The signal receiving circuit 530 is connected to the first transmission line 521 and the second transmission line 522, and is used to receive the differential current signal and recover it as a differential voltage signal.
[0056] For example, the signal receiving circuit further includes a third branch 531 and a fourth branch 532. The third branch 531 is connected to the first transmission line 521 and outputs a first voltage signal VOBP in response to the positive current signal IIAP. Specifically, the first terminal of the third branch 531 is connected to the second power supply voltage Vb1, the second terminal of the third branch 531 is connected to the first power supply voltage Vcc, the third terminal of the third branch 531 is connected to the first transmission line 521 to receive the positive current signal IIAP, and the fourth terminal of the third branch 531 outputs the first voltage signal VOBP.
[0057] The fourth branch 532 is connected to the second transmission line 522 and outputs the second voltage signal VOBN in response to the negative current signal IIAN. Specifically, the first terminal of the fourth branch 532 is connected to the second power supply voltage Vb1, the second terminal of the fourth branch 532 is connected to the first power supply voltage Vcc, the third terminal of the fourth branch 532 is connected to the second transmission line 522 to receive the negative current signal IIAN, and the fourth terminal of the fourth branch 532 outputs the second voltage signal VOBN.
[0058] Since the signal transmission circuit and signal receiving circuit are the same as those described in other embodiments, a detailed description of their circuit configuration is omitted here.
[0059] Therefore, this signal transmission system uses current transmission mode to transmit signals between modules, which can solve the problem of insufficient signal bandwidth in subsequent long-distance transmission, reduce the impact of increased transmission line length on signal transmission, and improve signal transmission quality. It is understood that the first module and the second module can be different modules within the same chip. For example, the first module and the second module could be the switching module and sample-and-hold module in an AFE (Analog-Front-End) analog front-end chip, respectively. Of course, the first module and the second module can also be located in different chips. It is understood that in some embodiments, the second module can also directly use the differential current signal for processing, without needing to recover the differential current signal received by the signal receiving circuit into a differential voltage signal.
[0060] The gain of the signal transmission system is analyzed below, referring to... Figure 8 The signal transmission system shown in the diagram has a signal transmission circuit that is a transconductance amplifier with differential voltage input and differential current output. Figure 3 As shown in the example, the transconductance amplifier consists of the input pair of the first transistor Q1 and the second transistor Q2, the first resistor R1 and the second resistor R2 are emitter resistors, and the current source 131 serves as the tail current source. Therefore, the output current ΔI o for:
[0061]
[0062] Among them, I op I is the current of the positive current signal IIAP. on Let g be the current of the negative current signal IIAN. Then the transconductance g of the signal transmission circuit is... m for:
[0063]
[0064] The signal receiving circuit is a transimpedance amplifier with differential current input and differential voltage output. Figure 6 As shown in the example, the transimpedance amplifier consists of a common-base amplifier composed of transistors Q3 and Q4. The input current is transferred through transistors Q3 and Q4 to the load resistors R3 and R4. Resistors R3 and R4 convert the current into a voltage output, thus achieving current-to-voltage conversion. The final output differential voltage ΔV o for:
[0065] ΔV o =ΔI I ·(R3+R4)
[0066] Where, ΔI I The input current of the signal receiving circuit is ΔI, which is the output current of the signal transmission circuit. oTherefore, the transimpedance r of the signal receiving circuit m for:
[0067] r m =R3+R4
[0068] Where R1 = R2, R3 = R4, then the gain G of the signal transmission system is:
[0069]
[0070] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0071] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.
Claims
1. A signal transmission system, characterized in that, include: A signal transmission circuit is used to receive the positive and negative voltage signals of a differential voltage signal and convert them into differential current signals, which are then output to the first and second transmission lines; the differential voltage signal is an analog signal. A signal receiving circuit, connected to the first transmission line and the second transmission line, is used to receive the differential current signal and recover it as a differential voltage signal; The signal transmission circuit includes: Positive input terminal, used to connect the positive terminal voltage signal of the differential voltage signal; The negative input terminal is used to receive the negative voltage signal of the differential voltage signal; the differential voltage signal is an analog signal. An amplification unit, connected to the positive input terminal and the negative input terminal, is used to receive the differential voltage signal and convert it into a differential current signal for output; The amplification unit includes: A current source is configured to independently generate and supply current; The first branch is connected to the current source and acquires the positive terminal voltage signal, converts the positive terminal voltage signal into a positive current signal and transmits it to the first transmission line; the first branch includes a first resistor and a first switch, one end of the first resistor is connected to the current source, the other end of the first resistor is connected to the first end of the first switch, the second end of the first switch is connected to the positive terminal voltage signal, and the third end of the first switch outputs the positive current signal. The second branch is connected to the current source and acquires the negative terminal voltage signal, converting the negative terminal voltage signal into a negative current signal and transmitting it to the second transmission line. The second branch includes a second resistor and a second switch. One end of the second resistor is connected to the current source, and the other end of the second resistor is connected to the first end of the second switch. The second end of the second switch receives the negative terminal voltage signal, and the third end of the second switch outputs the negative current signal. The resistance values of the first resistor and the second resistor are equal. The signal receiving circuit is used to receive the positive current signal and the negative current signal from the differential current signal of the transmission line pair, and recover them as a differential voltage signal, wherein the differential voltage signal is an analog signal. The signal receiving circuit includes: The third branch is connected to the first transmission line and outputs a first voltage signal in response to the positive current signal. The third branch includes a third resistor and a third transistor. One end of the third resistor is connected to the first power supply voltage, and the other end of the third resistor is connected to the third transistor. The first end of the third transistor is connected to the first transmission line, the second end of the third transistor is connected to the second power supply voltage, and the third end of the third transistor is connected to the third resistor. The third end of the third transistor outputs the first voltage signal. The fourth branch is connected to the second transmission line and outputs a second voltage signal in response to the negative current signal. The fourth branch includes a fourth resistor and a fourth transistor. One end of the fourth resistor is connected to the first power supply voltage, and the other end of the fourth resistor is connected to the fourth transistor. The first end of the fourth transistor is connected to the second transmission line, the second end of the fourth transistor is connected to the second power supply voltage, and the third end of the fourth transistor is connected to the fourth resistor. The third end of the fourth transistor outputs the second voltage signal. The third branch also includes a first voltage regulator connected between the second power supply voltage and the third transistor, used to regulate the voltage supplied to the third transistor; The fourth branch also includes a second voltage regulator connected between the second power supply voltage and the fourth transistor, used to regulate the voltage supplied to the fourth transistor.
2. The signal transmission system as described in claim 1, characterized in that, The first and second switching transistors are either transistors or MOSFETs.
3. The signal transmission system as described in claim 1, characterized in that, The resistance values of the third resistor and the fourth resistor are equal.
Citation Information
Patent Citations
Apparatus and method for low current differential swing I / O interface
US7279982B1