A quantum computing simulation method, quantum circuit simulator, and related devices

Abstract

The application discloses a quantum computing simulation method, a quantum circuit simulator and related equipment. The method comprises the following steps: generating a quantum circuit computing task splitting scheme according to configuration information of a work node; allocating computing tasks to the work node according to instance identification information generated by the work node, the number of the work nodes and task identification information of the computing tasks included in the splitting scheme; and collecting computing results returned by the work nodes after processing the computing tasks, and outputting a quantum circuit computing result. The method separates task scheduling from task computing, can be flexibly expanded, has small communication overhead and is better in performance.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a quantum computing simulation method, a quantum circuit simulator, and related equipment. Background Technology

[0002] Quantum computing is a new computing paradigm that uses quantum information units to perform calculations in accordance with the laws of quantum mechanics. Currently, there is no large-scale quantum computing hardware. Considering the future advantages of quantum computing, some research institutions and advanced manufacturing companies have designed quantum computing-based algorithms. To verify the correctness of these algorithms, cloud platforms have launched their own quantum computing simulators, which can be used to verify the correctness of these algorithms on classical computers.

[0003] Currently, quantum computing simulators mainly adopt matrix-based implementation schemes and parallel framework schemes based on matrix computation. The publicly disclosed parallel framework schemes are mainly based on MPI. Summary of the Invention

[0004] The inventors of this application have discovered that the aforementioned matrix-based computation schemes generally require the computation of the entire quantum state, but many current scenarios only require the computation of a few quantum states. Matrix-based computation schemes cannot be well optimized for such scenarios. Furthermore, the aforementioned MPI-based parallel framework's parallel scheduling is coupled to the computation modules, hindering the expansion of individual modules. In summary, there is currently no computationally efficient and easily scalable quantum circuit computation implementation scheme or corresponding quantum computing simulator in the existing technology.

[0005] In view of the above problems, the present invention is proposed to provide a quantum computing simulation method, a quantum circuit simulator, and related equipment that overcomes or at least partially solves the above problems.

[0006] This invention provides a quantum computing simulation method, comprising:

[0007] Based on the configuration information of the working nodes, a quantum circuit computing task splitting scheme is generated;

[0008] Based on the instance identifier information generated by the worker node, the number of worker nodes, and the task identifier information of the computing tasks included in the splitting scheme, computing tasks are assigned to the worker nodes.

[0009] The calculation results returned by each working node after processing the calculation task are summarized and the quantum circuit calculation results are output.

[0010] In some optional embodiments, generating a quantum circuit computing task splitting scheme based on the configuration information of the working nodes includes:

[0011] Generate a quantum circuit computing task partitioning scheme based on the memory size of the working nodes; or generate a quantum circuit computing task partitioning scheme based on the memory size of the working nodes and the number of nodes.

[0012] The splitting scheme includes multiple split computing tasks, and the memory size required by each computing task is adapted to the memory size of the working node.

[0013] In some alternative embodiments, the memory size required for each computational task is adapted to the memory size of the worker node by configuring search strategy parameters and pruning parameters, wherein the pruning parameters include at least one of the following: number of iterations, quantum circuit compression path bandwidth, number of pruning branches, and number of threads.

[0014] In some optional embodiments, computational tasks are assigned to the worker nodes based on the instance identifier information generated by the worker nodes, the number of worker nodes, and the task identifier information of the computational tasks included in the splitting scheme, including:

[0015] Obtain the instance identifier information generated by the worker nodes; perform a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes; determine the task identifier information corresponding to each instance identifier information based on the modulo operation result; assign a set of computing tasks with the same modulo operation result to each worker node based on the task identifier information corresponding to each instance identifier information; or

[0016] Obtain the instance identifier information generated by the worker node, perform a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes, and determine the task identifier information corresponding to each instance identifier information based on the modulo operation result; allocate a computing task to the worker node based on the task identifier information corresponding to each instance identifier information, and repeat the step of allocating a computing task to the worker node based on the computing task acquisition request of the worker node until a group of computing tasks with the same modulo operation result are all allocated to the worker node.

[0017] In some optional embodiments, it also includes:

[0018] By establishing a heartbeat connection with the worker nodes, once an abnormal worker node status is detected, the computation tasks of the abnormal worker node are assigned to newly added worker nodes or to worker nodes whose computation tasks have been completed.

[0019] This invention also provides another quantum computing simulation method, including:

[0020] Each worker node generates its own instance identifier information;

[0021] The working node obtains the computing tasks in the quantum circuit computing task splitting scheme assigned by the coordinator based on the instance identification information;

[0022] The working node processes the acquired computing tasks to obtain computing results, and then provides the computing results to the coordinator.

[0023] In some optional embodiments, the working node obtains the computational tasks in the quantum circuit computation task splitting scheme assigned by the coordinator based on the instance identification information, including:

[0024] The worker node provides the generated instance identification information to the coordinator and receives a set of computing tasks assigned by the coordinator; or

[0025] The worker node provides the generated instance identifier information to the coordinator, receives a computing task assigned by the coordinator, and sends a computing task retrieval request to the coordinator to retrieve the next computing task, until it has retrieved the last assigned computing task.

[0026] In some optional embodiments, it also includes:

[0027] The working node obtains the quantum circuit computing task splitting scheme from the coordinator.

[0028] In some optional embodiments, the same compute acceleration image is used in the worker nodes and the coordinator; the compute acceleration image includes an operating system image, a compute library image, and a compiled compute acceleration main program image.

[0029] This invention also provides a coordinator, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the aforementioned quantum computing simulation method.

[0030] This invention also provides a working node, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the other quantum computing simulation method described above.

[0031] This invention also provides a quantum circuit simulator, including the coordinator described above and at least two working nodes described above.

[0032] This invention also provides a computer storage medium storing computer-executable instructions, which, when executed by a processor, implement the aforementioned quantum computing simulation method.

[0033] The beneficial effects of the above-described technical solutions provided in the embodiments of the present invention include at least the following:

[0034] The quantum computing simulation method provided in this embodiment of the invention involves a coordinator generating a quantum circuit computing task splitting scheme based on the configuration information of the worker nodes. The coordinator then allocates computing tasks to the worker nodes based on the instance identifier information generated by the worker nodes, the number of worker nodes, and the task identifier information of the computing tasks included in the splitting scheme. The coordinator generates the computing task splitting scheme and schedules the allocation of computing tasks. By splitting the computing tasks, the tasks are distributed to multiple worker nodes for processing, thereby achieving parallel scheduling of computing tasks and separation of computational processing. This allows the quantum computing simulator to easily compute single-frame, multi-frame, and full-frame quantum states, facilitating the optimization of the computing scheme and the expansion of the quantum computing simulator. It also allows for flexible configuration of the allocation scheme. This multi-node parallel framework for computing tasks is highly efficient and has good scalability. The amount of interaction information between the coordinator and the worker nodes is very small, resulting in very low communication overhead and superior performance.

[0035] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings.

[0036] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0037] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0038] Figure 1 This is a flowchart of the coordinator processing in the quantum computing simulation method of this invention.

[0039] Figure 2 This is a flowchart of the working node processing of the quantum computing simulation method in this embodiment of the invention;

[0040] Figure 3 This is an interactive flowchart of the quantum computing simulation method in an embodiment of the present invention;

[0041] Figure 4 This is an example diagram of the configuration parameters during splitting in an embodiment of the present invention;

[0042] Figure 5 This is an example diagram of the mirror configuration in an embodiment of the present invention;

[0043] Figure 6 This is a schematic diagram of the structure of the first quantum computing simulation device in an embodiment of the present invention;

[0044] Figure 7 This is a schematic diagram of the structure of the second quantum computing simulation device in an embodiment of the present invention. Detailed Implementation

[0045] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0046] To address the lack of a computationally efficient and easily scalable quantum circuit computing implementation scheme in existing technologies, this invention provides a quantum computing simulation method that separates task scheduling and task computation. This method enables the computation of only a few quantum states and allows for flexible expansion, resulting in low communication overhead and superior performance. This method can be implemented using a quantum computing simulator, which can simulate quantum computer computations on a classical computer. For example, it can be implemented using the AcQDP simulator, which implements quantum simulation algorithms based on tensor network compression and can be used as a quantum computing simulator service. The quantum computing simulator can be deployed across multiple computing nodes, each with two roles: a coordinator and a worker node, where there can be multiple workers.

[0047] This invention provides a quantum computing simulation method, which mainly implements task splitting and scheduling functions on the coordinator. The process is as follows: Figure 1 As shown, it includes the following steps:

[0048] Step S101: Generate a quantum circuit computing task splitting scheme based on the configuration information of the working nodes.

[0049] The coordinator generates a quantum circuit computation task splitting scheme based on the worker node configuration information. This scheme typically refers to a compressed path partitioning (split) scheme for the entire quantum circuit. The configuration information can include the memory size of the worker nodes. Optionally, the coordinator generates the quantum circuit computation task splitting scheme based on the worker node memory size; the splitting scheme includes multiple computational tasks, each requiring a memory size appropriate to the worker node memory size. Optionally, when generating the splitting scheme, in addition to considering the worker node memory size, the number of worker nodes can also be considered; that is, the quantum circuit computation task splitting scheme is generated based on the worker node memory size and the number of nodes.

[0050] Step S102: Assign computing tasks to the worker nodes based on the instance identifier information of the worker nodes, the number of worker nodes, and the task identifier information of the computing tasks included in the splitting scheme.

[0051] The coordinator assigns the computational tasks split from the partitioning scheme to worker nodes for processing. This assignment can be random or based on preset rules. Optionally, it can use an allocation algorithm based on the instance identifiers generated by the worker nodes and the number of worker nodes. The instance identifiers can be instance identifiers. During task allocation, the coordinator can either perform a single interaction with each worker node to allocate all computational tasks (assigning a group of tasks to each worker node each time) or perform multiple interactions to allocate one task to each worker node, completing the allocation of all computational tasks after multiple interactions. The coordinator can distinguish the computational tasks assigned to different worker nodes using the task identifiers.

[0052] Optionally, the process of allocating a group of computing tasks at once includes: the coordinator obtains the instance identifier information generated by the worker nodes, performs a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes, determines the task identifier information corresponding to each instance identifier information based on the modulo operation result, and allocates a group of computing tasks with the same modulo operation result to each worker node based on the task identifier information corresponding to each instance identifier information.

[0053] Optionally, the process of allocating a computing task each time includes: the coordinator obtains the instance identifier information generated by the worker node, performs a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes, and determines the task identifier information corresponding to each instance identifier information based on the modulo operation result; allocates a computing task to the worker node based on the task identifier information corresponding to each instance identifier information, and repeats the step of allocating a computing task to the worker node based on the computing task acquisition request of the worker node until a group of computing tasks with the same modulo operation result are all allocated to the worker node.

[0054] Step S103: Summarize the calculation results returned by each working node after processing the calculation task, and output the quantum circuit calculation results.

[0055] After each worker node executes its computational task, it returns the results to the coordinator. The coordinator then aggregates the results. Each worker node can execute one or more computational tasks, and each node can compute single or multiple quantum states, facilitating computational scheme optimization. Worker nodes process their assigned computational tasks in parallel, enabling scalability and high flexibility. The coordinator can aggregate the computational tasks based on their task identifiers to obtain the quantum circuit computation results.

[0056] This invention provides a quantum computing simulation method, which mainly implements task computation functions on the working node, and its process is as follows: Figure 2 As shown, it includes the following steps:

[0057] Step S201: The worker node generates its own instance identification information.

[0058] Each worker node can generate its own instance identifier as instance identification information. Of course, other instance identification information can also be used, if optional.

[0059] Step S202: The worker node obtains the computation tasks in the quantum circuit computation task splitting scheme assigned by the coordinator based on the instance identification information.

[0060] When a worker node receives assigned computing tasks, it can interact with the coordinator in one go, providing instance identification information to obtain multiple computing tasks. In other words, the worker node provides the generated instance identification information to the coordinator and receives a set of computing tasks assigned by the coordinator. This reduces the amount of information exchange between the worker node and the coordinator.

[0061] When a worker node acquires an assigned computing task, it can interact with the coordinator multiple times, pulling one task at a time. Specifically, the worker node provides its instance identifier information to the coordinator, receives one assigned computing task, and sends a task acquisition request to the coordinator to acquire the next task, until it has acquired the last assigned task. When acquiring computing tasks multiple times, it can acquire them periodically or acquire the next task only after completing the previous one. This approach is more conducive to coordinating and allocating computing tasks among worker nodes, allowing each worker node to more easily assist other worker nodes after completing its own tasks.

[0062] Step S203: The worker node processes the acquired computation task to obtain the computation result and provides the computation result to the coordinator.

[0063] When a worker node returns a computation result, it can carry the task identifier information of the computation task, its own instance identifier information, etc., so that the coordinator can know which computation task the result belongs to.

[0064] The quantum computing simulation method provided in this embodiment of the invention, wherein the process of quantum computing simulation through interaction between the coordinator and the working nodes is as follows: Figure 3 As shown, it includes the following steps:

[0065] Step S301: Generate a quantum circuit computing task splitting scheme based on the configuration information of the working nodes.

[0066] When the coordinator generates a partitioning scheme, an optimal approach is to ensure that the resources required by the partitioned computational tasks are compatible with the configured resources of the worker nodes, preventing memory overflow. Therefore, certain configuration parameters are used to generate the partitioning scheme. Specifically, this can be achieved by configuring search strategy parameters and pruning parameters to ensure that the memory size required by each computational task is compatible with the memory size of the worker nodes. Pruning parameters include at least one of the following: number of iterations, quantum circuit compression path bandwidth, number of pruning branches, and number of threads. An example of the configuration parameters used when partitioning computational tasks is shown below. Figure 4 As shown in the diagram. Here, `order_finder_params` represents the search strategy parameters; `slicer_params` represents the pruning parameters. `slicer_params` includes the number of iterations (`num_inter`), the bandwidth of the quantum circuit compression path (`max_tw`), the number of pruning branches (`max_num_slice`), and the number of threads (`num_threads`), etc.

[0067] Step S302: The working node obtains the quantum circuit computing task splitting scheme from the coordinator.

[0068] Optionally, after the coordinator generates a splitting scheme for the quantum circuit computing task, worker nodes can obtain this scheme from the coordinator. Each worker node can obtain a splitting scheme from the coordinator, and the coordinator can return the splitting scheme to the worker node based on its node identifier. This ensures that each worker node can know the splitting scheme, and that the obtained splitting schemes are all identical; for example, the i-th worker node, Worker_i, obtains the splitting scheme from the coordinator, and the coordinator returns the splitting scheme to Worker_i based on its node identifier.

[0069] Step S303: The worker node generates its own instance identification information and requests computing tasks from the coordinator based on the instance identification information.

[0070] Worker_i generates its own instance identifier (instance_id), and acquires the task identifier (Taskid) from the Coordinator according to the instance_id. A group of computing tasks can be acquired through one interaction with the coordinator, or only one computing task can be acquired in each interaction, and multiple computing tasks can be acquired through multiple interactions.

[0071] Step S304: The coordinator allocates computing tasks to the worker nodes according to the instance identification information of the worker nodes, the number of the worker nodes, and the task identification information of the computing tasks included in the splitting scheme.

[0072] The Coordinator will divide the computing tasks into M computing tasks, that is, M computing tasks with task identifiers (task_id) of 0, 1, 2, ..., M-1. According to the number of worker nodes, these computing tasks can be divided into N parts, that is, the 0th, 1st, 2nd, ..., N-1th parts, where N is the number of worker nodes. Generally, M≥N, and in the case where some nodes are allowed to be temporarily not assigned computing tasks, M<N is also allowed; each instance_id is correspondingly assigned one of the parts, and one part of computing tasks includes one or more computing tasks. A modulo operation can be performed on the task_id and the number N of worker nodes, and task allocation is performed according to the remainder of the division of the two, so that tasks with the same remainder are allocated to the same worker node. That is, the task_id of the computing task allocated to each worker node is x, where x satisfies that the result of x mod N is the same. For example, the task_id of the computing tasks allocated to the 0th worker node all satisfy x mod N=0, the task_id of the computing tasks allocated to the 1st worker node all satisfy x mod N=1, and so on. Thereby, the task identifiers of the computing tasks allocated to each worker node can be determined, and the instance identification information of the worker node is corresponding to the task identifiers of the allocated computing tasks. When the instance identifiers of the N worker nodes are 0, 1, 2, ..., N-1 respectively, the computing task with the task identifier x can be allocated to the worker node whose instance identifier is equal to x mod N. mod represents the remainder after the division operation of two numerical expressions.

[0073] Optionally, for the case where only one computing task is acquired in one interaction, the task identifiers of the computing tasks may also be used to sequentially allocate the computing tasks.

[0074] Step S305: Process the acquired computing task to obtain a computing result, and provide the computing result to the coordinator.

[0075] Each worker node will synchronize its own computing result to the coordinator, for example, Worker_i synchronizes the computing result back to the Coordinator.

[0076] Step S306: Summarize the calculation results returned by each working node after processing the calculation task, and output the quantum circuit calculation results.

[0077] In the above method, a heartbeat connection can be established between the coordinator and the worker nodes. Through this heartbeat connection, the coordinator determines if a worker node is in an abnormal state and then assigns its computational tasks to a newly added worker node or to a worker node whose computational tasks have already been completed. The heartbeat connection ensures that if a worker node fails, its tasks can be reassigned to other worker nodes for processing, guaranteeing that computational tasks can still be processed and completed even when a worker node fails. Specifically, a new worker node can be added, and the computational tasks of the failed worker node can be assigned to the newly added worker node; alternatively, the computational tasks of the failed worker node can be reassigned to the worker node that has completed its computational tasks after other worker nodes have completed their tasks.

[0078] To accelerate computation on each worker node, a MathKernel Library (MKL) can be introduced to speed up all vector computations. Ultimately, by introducing MKL for NumPy / SciPy, instruction set-based parallel acceleration can be achieved for each matrix computation. Instruction set acceleration refers to utilizing the chip's Single Instruction Multiple Data (SIMD) architecture for parallel instruction acceleration. The same computation acceleration image can be used in both the worker nodes and the coordinator; this image includes the operating system image, the computation library image, and the compiled computation acceleration main program image. An example of configuring the computation acceleration image in the coordinator and worker nodes is shown below. Figure 5 As shown, both the Coordinator and the Worker are configured with the same image. The image configuration can be as follows: Figure 5 As shown in the dashed circle on the left, these include the operating system image, the computing library image (numpy / scipy / acqdp@MKL), the compiled computing acceleration main program image (the main program compiled with Rust / PyO3 / python module), and so on. These images are used to achieve parallel acceleration of each worker node.

[0079] The aforementioned method and corresponding quantum computing simulator represent a high-performance, scalable, and interconnected framework for quantum computing. This framework defines a task partitioning and coordination scheme, enabling the computation of a task to be completed on any number of machines. This includes multiple machines collaborating, performing computational tasks in parallel, and then aggregating the results to obtain the final outcome. In this method, the coordinator calculates the task partitioning and allocation schemes based on pre-defined parameters. Worker nodes then remotely access the coordinator to retrieve computational tasks and perform the computations according to the coordinator's allocation scheme. This separation of computation and task allocation / scheduling allows for the customization of various task scheduling schemes, maximizing flexibility and scalability. In the task allocation scheme, each worker node only needs to interact with the coordinator once to obtain its instance identifier. Subsequent interactions only require determining the task identifier assigned to each worker node. Finally, the computation result is returned to the coordinator, minimizing the interaction overhead between the coordinator and workers and improving performance.

[0080] Based on the same inventive concept, embodiments of the present invention also provide a quantum computing simulation device, which can be housed in a coordinator, and the structure of the device is as follows. Figure 6 As shown, it includes:

[0081] The splitting scheme generation module 11 is used to generate a splitting scheme for quantum circuit computing tasks based on the configuration information of the working nodes.

[0082] The task allocation module 12 is used to allocate computing tasks to the working nodes based on the instance identification information generated by the working nodes, the number of working nodes, and the task identification information of the computing tasks included in the splitting scheme.

[0083] The summary module 13 is used to summarize the calculation results returned by each working node after processing the calculation task and output the quantum circuit calculation results.

[0084] Optionally, the above device also includes an anomaly handling module 14, which is used to notify the task allocation module 12 after determining that the status of the work node is abnormal through the heartbeat connection between the work node and the work node. Correspondingly, the task allocation module 12 is also used to allocate the computing tasks of the work node with abnormal status to newly added work nodes or to work nodes whose computing tasks have been completed.

[0085] Based on the same inventive concept, embodiments of the present invention also provide a quantum computing simulation device, which can be set in a working node, and the structure of the device is as follows. Figure 7 As shown, it includes:

[0086] The identifier generation module 21 is used to generate its own instance identifier information;

[0087] The task acquisition module 22 is used to acquire the computing tasks in the quantum circuit computing task splitting scheme assigned by the coordinator based on the instance identification information.

[0088] The result feedback module 23 is used to process the acquired calculation task to obtain the calculation result and provide the calculation result to the coordinator.

[0089] This invention also provides a quantum circuit simulator, including, as follows: Figure 6 The quantum computing simulation device shown and at least two such Figure 7 The quantum computing simulation device shown.

[0090] This invention also provides a coordinator, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the above-described quantum computing simulation method.

[0091] This invention also provides a working node, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the above-described quantum computing simulation method.

[0092] This invention also provides a quantum circuit simulator, including the coordinator described above and at least two working nodes described above.

[0093] This invention also provides a computer storage medium storing computer-executable instructions, which, when executed by a processor, represent the aforementioned quantum computing simulation method.

[0094] The specific methods by which the devices, coordinators, working nodes, and quantum circuit simulators in the above embodiments are performed have been described in detail in the embodiments related to the method, and will not be elaborated here.

[0095] The method described in this invention is a parallel framework for a quantum computing simulator with high computational performance and good scalability, capable of meeting computational needs requiring a large number of qubits. This method separates the parallel scheduling of computational tasks from the computational processing itself. Computational tasks are broken down into subtasks, and parallel scheduling is achieved through the interaction between a coordinator and worker nodes. Different allocation schemes can be configured, allowing for flexible expansion. Furthermore, the coordination and allocation of computational tasks between the coordinator and worker nodes are based on instance and task identification information, resulting in very little interaction information and communication overhead, thus leading to superior performance. This method achieves high-performance quantum simulation computation while flexibly computing full-scale and single-scale quantum states. The parallel framework used is sufficiently efficient, highly flexible, and easily scalable, and can be based on the Taizhang simulator, which is naturally well-suited for computing single-scale, multi-scale, and full-scale quantum states. To achieve higher computing performance, instructions can be used to accelerate the computation process, especially matrix calculations involved in tensor compression. MKL can be used for parallel acceleration, and the entire computation process can be further accelerated by introducing MKL for NumPy / SciPy.

[0096] Unless otherwise specifically stated, terms such as processing, calculation, operation, determination, display, etc., may refer to the actions and / or processes of one or more processing or computing systems or similar devices that represent the manipulation and conversion of data representing physical (e.g., electronic) quantities within the registers or memory of the processing system into other data similarly representing physical quantities within the memory, registers, or other such information storage, transmission, or display devices of the processing system. Information and signals can be represented using any of a variety of different techniques and methods. For example, data, instructions, commands, information, signals, bits, symbols, and chips mentioned throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or particles, light fields or particles, or any combination thereof.

[0097] It should be understood that the specific order or hierarchy of steps in the disclosed process is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of steps in the process may be rearranged without departing from the scope of this disclosure. The appended method claims provide elements of various steps in an exemplary order and are not intended to limit the scope to the specific order or hierarchy described.

[0098] In the detailed description above, various features are combined together in a single embodiment to simplify this disclosure. This approach to disclosure should not be construed as reflecting an intention that embodiments of the claimed subject matter require more features than are explicitly stated in each claim. Rather, as reflected in the appended claims, the invention is presented with fewer features than all of the features in a single disclosed embodiment. Therefore, the appended claims are hereby explicitly incorporated into the detailed description, with each claim representing a separate preferred embodiment of the invention.

[0099] Those skilled in the art will also understand that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments herein can be implemented as electronic hardware, computer software, or a combination thereof. To clearly illustrate the interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps described above are generally described in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art can implement the described functionality in alternative ways for each specific application; however, such implementation decisions should not be construed as departing from the scope of this disclosure.

[0100] The steps of the methods or algorithms described in conjunction with the embodiments herein can be directly embodied in hardware, software modules executed by a processor, or a combination thereof. The software modules can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium well known in the art. An exemplary storage medium is connected to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. The ASIC can reside in a user terminal. Alternatively, the processor and storage medium can exist as discrete components in the user terminal.

[0101] For software implementation, the techniques described in this application can be implemented using modules (e.g., procedures, functions, etc.) that perform the functions described in this application. This software code can be stored in memory units and executed by a processor. The memory units can be implemented within the processor or outside the processor; in the latter case, they are communicatively coupled to the processor via various means, as is well known in the art.

[0102] The foregoing description includes examples of one or more embodiments. It is certainly impossible to describe all possible combinations of components or methods in order to describe the above embodiments, but those skilled in the art will recognize that further combinations and arrangements of the various embodiments are possible. Therefore, the embodiments described herein are intended to cover all such changes, modifications, and variations that fall within the scope of the appended claims. Furthermore, the term "comprising" as used in the specification or claims is interpreted in a manner similar to the term "including," as interpreted when used as a conjunction in the claims. Additionally, the use of any term "or" in the specification of the claims is intended to mean "non-exclusive or."

Claims

1. A quantum computing simulation method, characterized in that, include: Based on the memory size of the working nodes, generate a quantum circuit computing task splitting scheme; The quantum circuit computing task decomposition scheme is a compressed path segmentation scheme for quantum circuits. The quantum circuit computing task decomposition scheme includes multiple decomposed computing tasks, each computing task requiring a memory size adapted to the memory size of the working node; wherein, by configuring search strategy parameters and pruning parameters, the memory size required by each computing task is adapted to the memory size of the working node, and the pruning parameters include at least one of the following: number of iterations, quantum circuit compression path bandwidth, number of pruning branches, and number of threads; Based on the instance identifier information generated by the worker node, the number of worker nodes, and the task identifier information of the computing tasks included in the splitting scheme, the split computing tasks are assigned to the worker node. Based on the task identification information of the computing task, the computing results returned by each working node after processing the computing task are summarized, and the quantum circuit computing results are output.

2. The method as described in claim 1, characterized in that, The step of generating a quantum circuit computing task splitting scheme based on the memory size of the working node includes: Based on the memory size of the working nodes and the number of nodes, a quantum circuit computing task splitting scheme is generated.

3. The method as described in claim 1, characterized in that, Based on the instance identifier information generated by the worker nodes, the number of worker nodes, and the task identifier information of the computing tasks included in the splitting scheme, the split computing tasks are assigned to the worker nodes, including: Obtain the instance identifier information generated by the worker nodes; perform a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes; determine the task identifier information corresponding to each instance identifier information based on the modulo operation result; assign a set of computing tasks with the same modulo operation result to each worker node based on the task identifier information corresponding to each instance identifier information; or Obtain the instance identifier information generated by the worker node, perform a modulo operation on the task identifier information of the computing tasks included in the splitting scheme and the number of worker nodes, and determine the task identifier information corresponding to each instance identifier information based on the modulo operation result; allocate a computing task to the worker node based on the task identifier information corresponding to each instance identifier information, and repeat the step of allocating a computing task to the worker node based on the computing task acquisition request of the worker node until a group of computing tasks with the same modulo operation result are all allocated to the worker node.

4. The method according to any one of claims 1-3, characterized in that, Also includes: By establishing a heartbeat connection with the worker nodes, once an abnormal worker node status is detected, the computation tasks of the abnormal worker node are assigned to newly added worker nodes or to worker nodes whose computation tasks have been completed.

5. A quantum computing simulation method, characterized in that, include: Each worker node generates its own instance identifier information; The worker node obtains the computational tasks from the quantum circuit computation task splitting scheme allocated by the coordinator based on the instance identification information. The coordinator generates the quantum circuit computation task splitting scheme based on the worker node's memory size and then allocates the split computational tasks to the worker node. The quantum circuit computation task splitting scheme is a compression path segmentation scheme for the quantum circuit. The quantum circuit computation task splitting scheme includes multiple split computational tasks, each requiring a memory size adapted to the worker node's memory size. The memory size required for each computational task is adapted to the worker node's memory size by configuring search strategy parameters and pruning parameters. The pruning parameters include at least one of the following: number of iterations, quantum circuit compression path bandwidth, number of pruned branches, and number of threads. The worker nodes process the acquired computing tasks to obtain computing results, and provide the computing results to the coordinator. The coordinator then summarizes the computing results returned by each worker node based on the task identification information of the computing tasks, and outputs the quantum circuit computing results.

6. The method as described in claim 5, characterized in that, The working node obtains the computational tasks in the quantum circuit computation task splitting scheme assigned by the coordinator based on the instance identification information, including: The worker node provides the generated instance identification information to the coordinator and receives a set of computing tasks assigned by the coordinator; or The worker node provides the generated instance identifier information to the coordinator, receives a computing task assigned by the coordinator, and sends a computing task retrieval request to the coordinator to retrieve the next computing task, until it has retrieved the last assigned computing task.

7. The method as described in claim 5, characterized in that, Also includes: The working node obtains the quantum circuit computing task splitting scheme from the coordinator.

8. The method as described in any one of claims 5-7, characterized in that, The same computing acceleration image is used in the working node and the coordinator; the computing acceleration image includes an operating system image, a computing library image, and a compiled computing acceleration main program image.

9. A coordinator, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the quantum computing simulation method according to any one of claims 1-4.

10. A working node, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the quantum computing simulation method according to any one of claims 5-8.

11. A quantum circuit simulator, characterized in that, It includes the coordinator as described in claim 9 and at least two working nodes as described in claim 10.

12. A computer storage medium, characterized in that, The computer storage medium stores computer-executable instructions, which, when executed by a processor, implement the quantum computing simulation method according to any one of claims 1-8.

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