A PID testing method for solar cells
By setting a barrier protective layer between the solar cell and the EVA layer, the bonding problem of testing equipment caused by the melting of EVA thin film in the prior art is solved, and the non-destructive testing of solar cell and the accurate characterization of performance parameters is achieved, and the research on PID mechanism and improvement of production process is promoted.
Patent Information
- Application Number
- CN202110325740.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-03-26
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2041-03-26
Smart Images

Figure CN115206818B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the technical field of photovoltaic cell testing, and in particular to a PID testing method for solar cells. Background Art
[0002] In today's world, the social and economic development has an increasing demand for sufficient and inexpensive electricity, and solar energy, as a representative of renewable energy, can be a reliable source of power resources. How to improve the efficiency and reliability of solar photovoltaic modules is an important research direction in the industry. Attenuation caused by manufacturing defects, application environments, and climate erosion, especially Potential-Induced Degradation (PID), will reduce the module efficiency and even shorten its service life.
[0003] Traditional battery-end PID reliability testing equipment, such as the Freiberg Instrument PIDcon tester, often requires a stacking structure of glass, EVA film (Ethylene-vinyl Acetate Copolymer, EVA), and solar cells. The high temperature in the testing environment will cause the EVA to melt, and the glass and the solar cells will be bonded together and cannot be separated without damage. This results in only a single parallel resistance characterization being possible after PID testing, and comprehensive electrical performance and imaging characterizations cannot be carried out, which hinders the research on the PID acceleration mechanism and degree of solar cells. Summary of the Invention
[0004] The present invention provides a PID testing method for solar cells. Without affecting the standard PID testing, by setting a barrier protection layer structure between the surface of the solar cell sample to be tested and the EVA layer during PID testing, the solar cells can be taken out intact after PID testing and further characterized, realizing the possibility and repeatability of PID testing characterization for solar cells, improving the accuracy of performance and parameter characterization, enhancing the final reliability of the product, and playing a positive role in in-depth research on the PID mechanism and improvement of the production process.
[0005] It can effectively reduce the sample preparation cost, improve the testing efficiency, meet the requirements of the current production line, help monitor the PID resistance performance of solar cells at the production source, and facilitate the improvement of the battery preparation process and research on the PID mechanism.
[0006] In a first aspect, the embodiments of the present invention provide a PID testing method for solar cells, including:
[0007] Providing a solar cell to be tested, a photovoltaic glass sheet, an EVA layer, and a barrier protection layer;
[0008] The barrier protection layer is arranged between the solar cell and the EVA layer, and the photovoltaic glass sheet is located on the side of the EVA layer away from the solar cell;
[0009] Move the solar cell, the barrier protection layer, the EVA layer and the photovoltaic glass sheet into a cell PID tester for PID testing;
[0010] After the PID testing is completed, move the solar cell out of the cell PID tester, extract the performance parameters of the solar cell, and evaluate the performance of the solar cell according to the performance parameters.
[0011] Optionally, the vertical projection of the barrier protection layer on the plane where the solar cell is located covers the vertical projection of the EVA layer on the plane where the solar cell is located.
[0012] Optionally, the EVA layer includes a first side and a second side arranged adjacent to each other, the length of the first side is a, and the length of the second side is b;
[0013] The barrier protection layer includes a third side and a fourth side arranged adjacent to each other, the length of the third side is c, and the length of the fourth side is d;
[0014] Wherein, c > a and d > b.
[0015] Optionally, the length a of the first side satisfies 50mm ≤ a ≤ 300mm; the length b of the second side satisfies 50mm ≤ b ≤ 300mm.
[0016] Optionally, the barrier protection layer includes polyethylene terephthalate material or fluorine-containing high molecular polymer.
[0017] Optionally, the cell PID tester includes a test cavity, a voltage application plate and a heating table;
[0018] Both the voltage application plate and the heating table are located inside the test cavity. The voltage application plate is used to provide the voltage for the solar cell to perform PTD testing, and the heating table is used to carry and heat the solar cell;
[0019] Moving the solar cell, the barrier protection layer, the EVA layer and the photovoltaic glass sheet into a cell PID tester for PID testing includes:
[0020] Arrange the solar cell, the barrier protection layer, the EVA layer and the photovoltaic glass sheet between the voltage application plate and the heating table;
[0021] Among them, the vertical projection of the voltage application plate on the plane where the solar cell is located, the vertical projection of the photovoltaic glass sheet on the plane where the solar cell is located, the vertical projection of the EVA layer on the plane where the solar cell is located, the vertical projection of the barrier protection layer on the plane where the solar cell is located, and the vertical projection of the heating table on the plane where the solar cell is located overlap at least partially;
[0022] Set the test parameters of the cell PID tester, and start the cell PID tester to perform PID test on the solar cell; the test parameters include test voltage, test temperature and test time.
[0023] Optionally, before extracting the performance parameters of the solar cell, it further includes:
[0024] Remove the barrier protection layer on the surface of the solar cell.
[0025] Optionally, after moving the solar cell, the barrier protection layer, the EVA layer and the photovoltaic glass sheet into the cell PID tester for PID test, it further includes:
[0026] Obtain test data, and the test data includes shunt resistance;
[0027] Evaluate the PID test effect of the solar cell according to the shunt resistance.
[0028] Optionally, the performance parameters include electrical performance parameters, depth imaging characterization parameters and interface appearance composition parameters.
[0029] Optionally, the solar cell includes a crystalline silicon-based solar cell.
[0030] The PID test method for solar cell wafers provided by the embodiments of the present invention includes providing a solar cell wafer to be tested, a photovoltaic glass sheet, an EVA layer, and a barrier protection layer. The barrier protection layer is arranged between the solar cell wafer and the EVA layer, and the photovoltaic glass sheet is located on the side of the EVA layer away from the solar cell wafer. Further, the solar cell wafer, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet are moved into a cell PID tester for PID testing. Due to the presence of the barrier protection layer, the EVA is prevented from melting and adhering to the surface of the solar cell wafer due to high temperature. After the PID test is completed, the solar cell wafer is removed from the cell PID tester, and the performance parameters of the solar cell wafer are extracted, and the performance of the solar cell wafer is evaluated based on the performance parameters. This test method can enable the cell wafer to be taken out intact after testing and further characterized, realizing the possibility and repeatability of cell wafer PID test characterization, improving the accuracy of performance and parameter characterization, improving the final reliability of the product, and playing a positive role in in-depth research on the PID mechanism and improvement of the production process. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 is a flowchart of a PID test method for a solar cell wafer provided by an embodiment of the present invention;
[0032] Figure 2 is a schematic structural diagram in the PID test of a solar cell wafer to be tested provided by an embodiment of the present invention;
[0033] Figure 3 is a flowchart of another PID test method for a solar cell wafer provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0034] The present invention will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of convenience of description, only parts related to the present invention are shown in the drawings, rather than all the structures.
[0035] The embodiments of the present invention provide a PID test method for a solar cell wafer, Figure 1 is a flowchart of a PID test method for a solar cell wafer provided by an embodiment of the present invention; Figure 2 is a schematic structural diagram in the PID test of a solar cell wafer to be tested provided by an embodiment of the present invention. Combining Figure 1 and Figure 2 as shown, the PID test method for the solar cell wafer includes:
[0036] S101. Provide a solar cell wafer to be tested, a photovoltaic glass sheet, an EVA layer, and a barrier protection layer.
[0037] Exemplarily, there are many types of solar cells. According to the different materials used, solar cells include: silicon solar cells, polycrystalline compound thin-film solar cells, polymer multi-layer modified electrode type solar cells, nanocrystalline solar cells, organic solar cells, plastic solar cells, etc. In this embodiment, according to the actual production needs, the solar cell wafers to be tested are selected. In the prior art for testing the anti-PID characteristics of solar cell wafers, a stacking structure of glass, EVA film and the cell wafer is usually used. The high temperature in the test environment will cause the EVA film to melt, so that the glass and the solar cell wafer are bonded together and cannot be separated without damage. Referring to Figure 2 , in this application, a barrier protection layer 3 is added between the EVA layer and the solar cell wafer. The barrier protection layer 3 is a polymer material with high chemical stability, which is resistant to high temperature and not easy to melt, and is easy to remove. It can prevent the photovoltaic glass sheet 5 and the EVA layer 4 from adhering to the surface of the solar cell wafer after melting, and play a role in protecting the integrity of the test results of the solar cell wafer. Among them, the EVA layer 4 is usually an EVA film, which is used for the PID test of solar cell wafers.
[0038] S102. Set the barrier protection layer between the solar cell wafer and the EVA layer, and the photovoltaic glass sheet is located on the side of the EVA layer away from the solar cell wafer.
[0039] Specifically, as Figure 2 shown, without affecting the PID test, in this application, the barrier protection layer 3 is set between the solar cell wafer 2 and the EVA layer 4, and the photovoltaic glass sheet 5 is located on the side of the EVA layer 4 away from the solar cell wafer 2, forming a stacking structure of photovoltaic glass sheet 5 + EVA layer 4 + barrier protection layer 3 + solar cell wafer 2. Then, the anti-PID test of the solar cell wafer is carried out, and the structure of the solar cell wafer after the PID test is completed without damage, and the solar cell wafer can be comprehensively characterized and detected and evaluated after the PID test.
[0040] S103. Move the solar cell wafer, the barrier protection layer, the EVA layer and the photovoltaic glass sheet into a cell wafer PID tester for PID testing.
[0041] Exemplarily, the performance of solar cells is liable to change under high temperature and high pressure environments, and the phenomenon that the output efficiency decreases when high voltage flows through solar cells occurs. In this test method, a barrier protection layer is added between the EVA film and the solar cell. By setting the test parameters in the cell PID tester, the anti-PID test is carried out on the solar cell to be tested. When the high temperature in the test environment melts the EVA film and adheres it to the surface of the barrier protection layer, the direct contact between the EVA film and the solar cell is avoided. After the PID test, there is no EVA residue on the surface of the solar cell. The sample preparation of the solar cell to be tested is simple, and the surface of the solar cell after testing is undamaged, which is conducive to the extraction of comprehensive performance parameters of the aged solar cell. The test method is simple and efficient, and can be repeated for testing, playing a role in quickly and online monitoring the yield rate of solar cell products.
[0042] S104. After the PID test is completed, remove the solar cell from the cell PID tester, extract the performance parameters of the solar cell, and evaluate the performance of the solar cell according to the performance parameters.
[0043] Exemplarily, after the PID test is completed, remove the solar cell from the cell PID tester, further extract the performance parameters of the solar cell, and evaluate the performance of the solar cell according to the performance parameters. For example, according to the anti-PID characteristics of the solar cell, evaluate the electrical performance and yield rate of the solar cell after the PID test, etc. Using this PID test method, the surface of the aged solar cell is undamaged, the sample preparation is simple, the accuracy of the characterization parameters and the test efficiency are high, the performance extraction of the solar cell is more comprehensive, meeting the requirements of the current production line, helping to monitor the anti-PID performance of solar cells at the production source, and playing a role in facilitating the improvement of the battery preparation process and the research on the PID mechanism.
[0044] In summary, for the PID test method of the solar cell provided in the embodiment of the present invention, by setting a barrier protection layer between the solar cell and the EVA layer, and a photovoltaic glass sheet on the side of the EVA layer away from the solar cell, a stacked test structure of photovoltaic glass sheet + EVA layer + barrier protection layer + solar cell is formed, and then the anti-PID test of the solar cell is carried out. The structure of the solar cell after the PID test obtained is completely undamaged. This test method can take out the cell intact and undamaged after testing for further characterization, realizing the possibility and repeatability of the PID test characterization of the cell, improving the accuracy of performance and parameter characterization, improving the final reliability of the product, and playing a positive role in deeply studying the PID mechanism and improving the production process.
[0045] In another embodiment of the present invention, there are various types of solar cells. Optionally, the solar cells include crystalline silicon-based solar cells. The embodiments of the present invention can be applied to the PID test of crystalline silicon-based solar cells. Figure 3 is a flowchart of another PID test method for solar cells provided by an embodiment of the present invention. With reference to Figure 2 and Figure 3 shown, optionally, the cell PID tester 1 includes a test chamber 11, a voltage application plate 12, and a heating stage 13; both the voltage application plate 12 and the heating stage 13 are located inside the test chamber 11. The voltage application plate 12 is used to provide the voltage for the PTD test of the solar cell 2, and the heating stage 13 is used to carry and heat the solar cell 2. With reference to Figure 2 and Figure 3 shown, the PID test method for the solar cell includes:
[0046] S201. Provide a solar cell, a photovoltaic glass sheet, an EVA layer, and a barrier protection layer to be tested.
[0047] S202. Arrange the barrier protection layer between the solar cell and the EVA layer, and arrange the photovoltaic glass sheet on the side of the EVA layer away from the solar cell.
[0048] S203. Arrange the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet between the voltage application plate and the heating stage.
[0049] Among them, the vertical projection of the voltage application plate on the plane where the solar cell is located, the vertical projection of the photovoltaic glass sheet on the plane where the solar cell is located, the vertical projection of the EVA layer on the plane where the solar cell is located, the vertical projection of the barrier protection layer on the plane where the solar cell is located, and the vertical projection of the heating stage on the plane where the solar cell is located overlap at least partially.
[0050] Exemplarily, with reference to Figure 2As shown, the cell PID tester 1 includes a test cavity 11, a voltage application plate 12, and a heating table 13. The solar cell 2, the barrier protection layer 3, the EVA layer 4, and the photovoltaic glass sheet 5 are moved into the cell PID tester. The solar cell 2 is arranged on the side of the heating table 13 close to the voltage application plate 12, forming a stacked structure of voltage application plate 12 + photovoltaic glass sheet 5 + EVA layer 4 + barrier protection layer 3 + solar cell 2 + heating table 13. When the voltage application plate 12 provides a high-voltage electric field and the heating table 13 provides a heat source, the cations in the photovoltaic glass sheet 5 migrate towards the solar cell 2 due to the action of the high-voltage electric field. The high-temperature environment in the test cavity 11 melts the EVA layer 4. The barrier protection layer 3 is located between the EVA layer 4 and the solar cell 2. The cations in the solar cell 2 form conduction with the cations in the photovoltaic glass sheet 5, thereby starting the PID test of the solar cell 2. Among them, the barrier protection layer 3 can be made of a non-sticky polymer, which is heat-resistant, not easily sticky, and does not affect the electric field action of the voltage application plate 12 on the surface of the solar cell 2. When the EVA layer 4 melts and adheres to the surface of the barrier protection layer 3 during the PID test, and the barrier protection layer 3 has no adhesion to the surface of the solar cell 2, there is no problem of damaging the surface of the solar cell 2, and it is relatively easy to remove the barrier protection layer 3 and the molten EVA layer 4 on the surface of the barrier protection layer 3. Optionally, the barrier protection layer includes polyethylene terephthalate material (Polyethyleneterephthalate, PET) or fluorine-containing polymer. Among them, both the PET material and the fluorine-containing polymer material are excellent polymer materials with excellent mechanical properties, corrosion resistance, easy processability, low viscosity, and easy removal characteristics; the fluorine-containing polymer includes ethylene-tetrafluoroethylene copolymer (Ethylene-Tetra-Fluoro-Ethylene, ETFE), polytetrafluoroethylene (Poly tetra fluoroethylene, PTFE), etc. These materials as the barrier protection layer can effectively prevent the molten EVA layer from adhering to the surface of the solar cell 2 and can better protect the surface of the solar cell 2 after the PID test.
[0051] Among them, the stacking structure of the voltage application plate 12 + photovoltaic glass sheet 5 + EVA layer 4 + barrier protection layer 3 + solar cell 2 + heating table 13 is reasonably set to satisfy that the vertical projection of the voltage application plate 12 on the plane where the solar cell 2 is located, the vertical projection of the photovoltaic glass sheet 5 on the plane where the solar cell 2 is located, the vertical projection of the EVA layer 4 on the plane where the solar cell 2 is located, the vertical projection of the barrier protection layer 3 on the plane where the solar cell 2 is located, and the vertical projection of the heating table 13 on the plane where the solar cell 2 is located at least partially overlap. Preferably, the vertical projection of the barrier protection layer on the plane where the solar cell is located covers the vertical projection of the EVA layer on the plane where the solar cell is located. As Figure 2 shown, the planar dimension of the barrier protection layer 3 is set to be larger than the planar dimension of the barrier protection layer 3, and the vertical projection of the barrier protection layer 3 on the plane where the solar cell 2 is located is set to cover the vertical projection of the EVA layer 4 on the plane where the solar cell 2 is located. When the EVA layer 4 melts due to high temperature and adheres to the surface of the barrier protection layer 3, it is possible to prevent the melted EVA from overflowing and contacting the solar cell, thus playing a protective function.
[0052] As a feasible implementation manner, the EVA layer includes a first side and a second side arranged adjacent to each other. The length of the first side is a, and the length of the second side is b; the barrier protection layer includes a third side and a fourth side arranged adjacent to each other. The length of the third side is c, and the length of the fourth side is b; wherein, c > a, d > b. Exemplarily, the planar dimension of the barrier protection layer is adjusted to be larger than that of the EVA layer so that it can fully carry the melted EVA layer.
[0053] Based on the above embodiments, by reasonably selecting the size of the EVA layer, the size of the barrier protection layer is further set to be not less than the size of the EVA layer so that the melted EVA layer is completely carried by the barrier protection layer. When setting the size of the EVA layer, optionally, the length a of the first side satisfies 50 mm ≤ a ≤ 300 mm; the length b of the second side satisfies 50 mm ≤ b ≤ 300 mm. Exemplarily, as Figure 2As shown, the size of the EVA layer 4 can be selected to meet: 100 mm × 100 mm, the size of the photovoltaic glass sheet 5 can meet: 100 mm × 100 mm, and the size of the barrier protection layer 3 can meet: 120 mm × 120 mm. Preferably, the centers of the EVA layer 4 and the photovoltaic glass sheet 5 are completely placed directly above the solar cell 2, keeping the centers of each component aligned. Adjust the positions of the voltage application plate 12 and the heating table 13 so that the vertical projections of the voltage application plate 12, the photovoltaic glass sheet 5, the EVA layer 4, the barrier protection layer 3, and the heating table 13 on the solar cell 2 are maximally overlapped, ensuring that the voltage application plate 12 supplies high voltage to the solar cell 2 and ensuring that the heating table 13 uniformly heats the solar cell 2, and that the barrier protection layer 3 completely bears the melted EVA layer 4. Through this structural adjustment, the surface of the solar cell can be effectively protected from being damaged, facilitating subsequent comprehensive performance characterization tests.
[0054] S204. Set the test parameters of the cell PID tester and start the cell PID tester to perform PID tests on the solar cell; the test parameters include the test voltage, test temperature, and test time.
[0055] Exemplarily, based on the above embodiments, after the solar cell 2 to be tested is set up, set the PID test parameters through the parameter setting device of the cell PID tester. Specifically, set the test voltage, test temperature, and test time, and start the cell PID tester to perform PID tests on the solar cell.
[0056] S205. After the PID test is completed, remove the solar cell from the cell PID tester, extract the performance parameters of the solar cell, and evaluate the performance of the solar cell according to the performance parameters.
[0057] Exemplarily, after the PID test is completed, remove the solar cell from the cell PID tester, and further extract the performance parameters of the solar cell. Optionally, the performance parameters include electrical performance parameters, depth imaging characterization parameters, and interfacial appearance composition parameters. Exemplarily, perform failure analysis on the solar cell after PID testing, for example, obtain the resistance change of the solar cell by testing the working voltage and working current parameters of the solar cell. For example, fit the dark IV curve using the double-diode model formula and calculate the dark saturation recombination current J of the cell 01 , J 02And ideal coefficients n1, n2; test the electroluminescent (EL), photoluminescence (PL), and lock-in thermography (LIT) characteristics of the solar cell to obtain depth imaging characterization parameters; use a scanning electron microscope (SEM), a scanning transmission electron microscope (TEM), and an energy dispersive X-ray spectrometer (EDX) to characterize the surface morphology, the composition ratio of metal atoms, and the atomic distribution of the solar cell after PID testing, and then conduct qualitative and quantitative analysis on the solar cell to determine whether the cell is sensitive to PID, analyze its potential PID risks, and comprehensively evaluate the performance of the solar cell.
[0058] Optionally, before extracting the performance parameters of the solar cell, it further includes:
[0059] Removing the barrier protection layer on the surface of the solar cell.
[0060] Specifically, after PID testing, when the temperature of the solar panel is stable, remove the barrier protection layer. The removal method can be manual. Since the EVA layer and the photovoltaic glass are attached to the surface of the isolation protection layer, the melted EVA layer and the photovoltaic glass are removed together during the removal of the barrier protection layer. This method is simple and does not affect the surface performance of the solar cell, and can directly conduct comprehensive electrical performance tests on the aged solar cell, etc.
[0061] Optionally, after moving the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass into a cell PID tester for PID testing, it further includes:
[0062] Obtaining test data, where the test data includes the shunt resistance;
[0063] Evaluating the PID test effect of the solar cell according to the shunt resistance.
[0064] Exemplarily, the anti-PID characteristics of a solar cell can be tested by measuring the parallel resistance within the solar cell. Specifically, when the solar cell is moved into a cell PID tester for PID testing, test data of the parallel resistance within the solar cell is obtained. By setting a data recording interval time t, the voltage value and current value across the parallel resistance inside the solar cell are recorded. Specifically, when the solar cell is in good condition without short circuit, the ideal parallel resistance is an infinite value. As the PID aging test progresses, internal short circuit occurs within the solar cell due to the migration of cations, the parallel resistance value decreases, and the electrical performance of the cell changes. By establishing a curve of the working voltage and working current of the parallel resistance, failure analysis of the solar cell after PID testing is carried out, and then the electrical performance of the solar cell is analyzed, and further the performance of the solar cell is comprehensively evaluated.
[0065] In summary, using this PID testing method, the cell can be taken out intact after testing and further characterized, realizing the possibility and repeatability of cell PID testing and characterization, improving the accuracy of cell performance and parameter characterization, thus improving the final reliability of the product, meeting the requirements of the current production line, helping to monitor the anti-PID performance of solar cells at the production source, playing a role in improving the cell preparation process, and having a positive effect on in-depth research on the PID mechanism and improvement of the production process.
[0066] Note that the above is only a preferred embodiment of the present invention and the applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, combinations with each other, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A PID testing method for solar cells, characterized in that, Including: Providing a solar cell, a photovoltaic glass sheet, an EVA layer, and a barrier protection layer to be tested; Setting the barrier protection layer between the solar cell and the EVA layer, and the photovoltaic glass sheet on the side of the EVA layer away from the solar cell; Moving the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet into a cell PID tester for PID testing; After the PID testing is completed, removing the solar cell from the cell PID tester, extracting the performance parameters of the solar cell, and evaluating the performance of the solar cell based on the performance parameters; The vertical projection of the barrier protection layer on the plane where the solar cell is located covers the vertical projection of the EVA layer on the plane where the solar cell is located; the barrier protection layer is used to carry the EVA layer that melts due to high temperature during the PID testing.
2. The PID test method according to claim 1, wherein The EVA layer includes a first side and a second side arranged adjacent to each other, the length of the first side is a, and the length of the second side is b; The barrier protection layer includes a third side and a fourth side arranged adjacent to each other, the length of the third side is c, and the length of the fourth side is d; Wherein, c > a and d > b.
3. The PID testing method according to claim 2, wherein The length a of the first side satisfies 50mm ≤ a ≤ 300mm; the length b of the second side satisfies 50mm ≤ b ≤ 300mm.
4. The PID testing method according to claim 1, wherein The barrier protection layer includes polyethylene terephthalate material or a fluorine-containing high polymer.
5. The PID testing method according to claim 1, characterized in that The cell PID tester includes a test chamber, a voltage application plate, and a heating table; Both the voltage application plate and the heating table are located inside the test chamber. The voltage application plate is used to provide the voltage for the solar cell to perform PTD testing, and the heating table is used to carry and heat the solar cell; Moving the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet into a cell PID tester for PID testing includes: Setting the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet between the voltage application plate and the heating table; Wherein, the vertical projection of the voltage application plate on the plane where the solar cell is located, the vertical projection of the photovoltaic glass sheet on the plane where the solar cell is located, the vertical projection of the EVA layer on the plane where the solar cell is located, the vertical projection of the barrier protection layer on the plane where the solar cell is located, and the vertical projection of the heating table on the plane where the solar cell is located at least partially overlap; Setting the test parameters of the cell PID tester, and starting the cell PID tester to perform PID testing on the solar cell; the test parameters include test voltage, test temperature, and test time.
6. The PID testing method according to claim 1, wherein Before extracting the performance parameters of the solar cell, it further includes: Removing the barrier protection layer on the surface of the solar cell.
7. The PID testing method according to claim 1, wherein After moving the solar cell, the barrier protection layer, the EVA layer, and the photovoltaic glass sheet into a cell PID tester for PID testing, it further includes: Obtain test data, where the test data includes parallel resistors; Evaluate the PID test effect of the solar cell based on the parallel resistors.
8. The PID testing method according to claim 1, wherein The performance parameters include electrical performance parameters, depth imaging characterization parameters, and interface appearance composition parameters.
9. The PID testing method according to claim 1, wherein The solar cell includes a crystalline silicon-based solar cell.
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