3D pad structure, interconnect structure and semiconductor packaging

Abstract

This invention discloses a three-dimensional pad structure, comprising: a substrate; a pad disposed on the substrate, wherein the periphery of the pad is covered with a solder resist layer; and at least one conductive pillar protruding from the upper surface of the pad. This method increases the contact area between the conductive ball and the combined structure of the conductive ball pad and conductive pillar, thereby making the connection between the conductive ball and the combined structure of the conductive ball pad and conductive pillar more stable and tight. The mechanical strength of the three-dimensional pad structure of this invention is more robust than that of ordinary structures where solder balls are directly formed on the pad. This avoids instability in mechanical and electrical connections during collisions, reduces the likelihood of solder ball detachment and other accidents, improves the structural stability of semiconductor packaging, and can significantly improve board-level reliability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more particularly to a three-dimensional pad structure, interconnect structure, and semiconductor package. Background Technology

[0002] Ball grid array (BGA) packaging is rapidly gaining acceptance in the electronics industry as a low-cost, high-yield alternative to fine-pitch leaded packages. Conductive solder joints are formed to mechanically and electrically interconnect pads or solder joints on a component / device with corresponding pads or solder joints on the substrate. Whether mechanical or electrical, all solder joints must provide the necessary level of reliability for the application.

[0003] As is well known, the intermetallic compound (IMC) layer is crucial for forming a good weld, but it is also the weakest layer in the entire welded structure. Even if the process strain level is within the design specifications, the IMC layer, with its poor mechanical strength, is easily damaged when subjected to process mechanical stress.

[0004] Therefore, there is a need for an improved interconnect structure that can address the cracking phenomenon in current printed circuit board assemblies (PCBAs) without changing any BGA manufacturing process. Summary of the Invention

[0005] In view of this, the present invention provides a three-dimensional pad structure, interconnect structure, and semiconductor package to solve the above problems.

[0006] According to a first aspect of the present invention, a three-dimensional pad structure is disclosed, comprising:

[0007] substrate;

[0008] A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer; and

[0009] At least one conductive post protrudes from the upper surface of the pad.

[0010] According to a second aspect of the present invention, a three-dimensional pad structure is disclosed, comprising:

[0011] substrate;

[0012] A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer;

[0013] A recessed area is provided on the upper surface of the pad; and

[0014] At least one prominent feature is present between the recessed areas.

[0015] According to a third aspect of the present invention, an interconnection structure is disclosed, comprising:

[0016] substrate;

[0017] A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer;

[0018] At least one conductive post protrudes from the upper surface of the pad; and

[0019] A conductive ball is disposed on the pad and surrounds the conductive post, wherein the at least one conductive post and the conductive ball are interlocked, and wherein the conductive ball is anchored to the pad.

[0020] According to a fourth aspect of the invention, a semiconductor package is disclosed, wherein the semiconductor package includes a three-dimensional pad structure as described in any of the preceding claims or an interconnect structure as described in any of the preceding claims.

[0021] The three-dimensional pad structure of the present invention includes: a substrate; a pad disposed on the substrate, wherein the periphery of the pad is covered with a solder resist layer; and at least one conductive pillar protruding from the upper surface of the pad. This method increases the contact area between the conductive ball and the combined structure of the conductive ball pad and conductive pillar, thereby making the connection between the conductive ball and the combined structure of the conductive ball pad and conductive pillar more stable and tight. The mechanical strength of the three-dimensional pad structure of the present invention is more robust than that of ordinary structures where solder balls are directly formed on the pad. This avoids instability in mechanical and electrical connections during collisions, reduces the likelihood of solder ball detachment and other accidents, improves the structural stability of semiconductor packaging, and can significantly improve board-level reliability. Attached Figure Description

[0022] Figure 1 This is a perspective top view showing the closely related portions of an exemplary semiconductor package according to an embodiment of the present invention;

[0023] Figure 2 It is along Figure 1 A schematic cross-sectional view taken along the centerline I-I';

[0024] Figure 3 A schematic top view of a conductive ball pad of an exemplary semiconductor package according to another embodiment of the present invention is shown;

[0025] Figure 4 It is along Figure 3 A cross-sectional view of line I-I' in the middle;

[0026] Figure 5 yes Figure 4 The conductive ball pad after the conductive ball is mounted on the conductive ball pad of the semiconductor package;

[0027] Figure 6 and Figure 7 Various recessed patterns on conductive ball pads according to some embodiments are shown;

[0028] Figure 8 This is a perspective top view showing closely related portions of an exemplary semiconductor package according to another embodiment of the present invention;

[0029] Figure 9 It is along Figure 8 The schematic cross-section is taken by line I-I' in the diagram. Detailed Implementation

[0030] In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings, which form part of the invention, and which illustrate specific preferred embodiments in which the invention can be practiced. These embodiments have been described in sufficient detail to enable those skilled in the art to practice them, and it should be understood that other embodiments may be utilized, and mechanical, structural, and procedural changes may be made, without departing from the spirit and scope of the invention. Therefore, the following detailed description should not be construed as limiting, and the scope of the embodiments of the invention is defined only by the appended claims.

[0031] It will be understood that although the terms “first,” “second,” “third,” “primary,” “secondary,” etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or portion from another. Therefore, without departing from the teachings of the inventive concept, the first or primary element, component, region, layer, or portion discussed below may be referred to as a second or secondary element, component, region, layer, or portion.

[0032] Furthermore, for ease of description, spatial relative terms such as “below,” “under,” “under,” “above,” and “above” may be used herein to describe the relationship of an element or feature to it. Another element or feature is shown in the figure. In addition to the orientation described in the figure, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or otherwise), and the spatial relative descriptive terms used herein may be interpreted accordingly. Additionally, it will be understood that when a “layer” is referred to as being “between” two layers, it can be the only layer between the two layers, or there may be one or more intermediate layers.

[0033] The terms “about,” “roughly,” and “about” generally mean a range of ±20%, ±10%, ±5%, ±3%, ±2%, ±1%, or ±0.5% of a specified value. The specified values ​​in this invention are approximate. Unless otherwise specified, the specified values ​​include the meanings of “about,” “roughly,” and “about.” The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular terms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise.

[0034] It will be understood that when an “element” or “layer” is referred to as being “on,” “connected to,” “coupled to,” or “adjacent to” another element or layer, it can be directly on, connected to, coupled to, or adjacent to the other element or layer, or there may be intermediate elements or layers. Conversely, when an element is referred to as being “directly on,” “directly connected to,” “directly coupled to,” or “immediately adjacent to” another element or layer, there are no intermediate elements or layers.

[0035] Note: (i) the same features will be represented by the same reference numerals throughout the figures and will not necessarily be described in detail in every figure in which they appear, and (ii) a series of figures may show different aspects of a single item, each of which is associated with various reference labels that may appear throughout the series or only in selected figures of the series.

[0036] In ball grid array (BGA) packaging, an organic substrate is typically used instead of a lead frame. The substrate is generally made of bismaleimide triazine or polyimide. The chip is mounted on top of the substrate, and conductive balls on the bottom of the substrate connect to the circuit board. This design allows for shorter interconnect lengths, thus improving electrical performance, and enabling a smaller package size. In BGA packaging, the integrated circuit (IC) component, solder joints, and printed circuit board (PCB) form a three-layer structure.

[0037] Interconnect failures caused by drops or impacts are a major reliability issue in portable electronic applications. Failures typically occur at the package / solder interface (interface) of corner (or bend) BGA balls (or solder balls), leading to reduced I / O density because corner (or bend) BGA balls are not considered I / O balls due to board-level reliability (BLR) considerations (therefore, previous technologies required larger space for I / O solder balls, resulting in a larger package area). BLR has consistently been a critical issue in the use of BGA packages in automotive applications. The required BLR specifications are listed in various standards (AEC-Q100, Q104, etc.) and vary depending on the automotive application customer.

[0038] This invention relates to a novel three-dimensional (3D) conductive ball pad for mechanical and electrical interconnection between opposing electrodes, functional modules, and substrates of electronic components / devices, and to an interconnection structure formed by conductive joints and the 3D conductive ball pad. The electronic components / devices may include semiconductor packages, printed circuit boards, etc.

[0039] Please refer to Figure 1 and Figure 2 . Figure 1 This is a perspective top view of closely related portions of an exemplary semiconductor package 1 according to an embodiment of the present invention. Figure 2 It is along Figure 1 A schematic cross-sectional view taken by line I-I' in the diagram. (See diagram below.) Figure 1 and Figure 2As shown, the semiconductor package 1 includes a package substrate (or substrate) 100, which has a component side (or chip side) 100a and a board side (or PCB side) 100b. The package substrate 100 can be a cored substrate (with a core layer) or a coreless substrate. According to one embodiment, a semiconductor die (or chip) 110 can be disposed on the component side 100a of the package substrate 100. The semiconductor die 110 is physically (or mechanically) and electrically connected to the package substrate 100 via connection elements 111 such as copper pillars, microbumps, or solder bumps, but is not limited thereto. The board side (or PCB side) 100b can be used for connection to a PCB board.

[0040] According to one embodiment, the semiconductor die 110 may be over-molded by an encapsulant 120, such as a molding compound comprising epoxy resin. The encapsulant 120 is in direct contact with the package substrate 100. It is understood that the semiconductor package 1 may in some way include multiple chips or dies. For simplicity, only a portion of the semiconductor die 110 is shown in the figures.

[0041] At least one conductive ball pad (or conductive ball solder pad) 102 is provided on the board side 100b of the package substrate 100. According to one embodiment, for example, the conductive ball pad (or solder pad) 102 may be located at a corner of the semiconductor package 1. That is, when viewed from the bottom of the package 1, the conductive ball pad 102 may be a corner ball pad located near the vertices of a rectangular semiconductor package. For example, if the planar shape of the semiconductor package is rectangular, the conductive ball pad 102 may be located at the four corners or bends of the rectangular semiconductor package, near the right angles. Multiple conductive ball pads 102 may be provided; they can be provided in areas other than corners, and are freely arranged as needed, not limited to corners. According to one embodiment, for example, the conductive ball pad 102 may be a copper pad. According to design requirements, a surface solderable coating, such as a nickel and / or gold coating or an organic solderability preserver (OSP), can be formed on the upper surface of the conductive ball pad 102 to enhance the connection strength and stability between the conductive ball pad 102 and the conductive ball 140 (as described below). According to one embodiment, the conductive ball pad 102 can be electrically connected to the corresponding connection element 111 via an interconnect structure 104 in the package substrate 100. For example, the interconnect structure 104 may include copper traces and plated vias, but is not limited thereto.

[0042] According to one embodiment, the board side 100b of the package substrate 100 and the periphery of the conductive ball pad 102 may be covered with a solder mask 130. An opening 130p in the solder mask 130 partially exposes the central upper surface (or at least a portion of the upper surface) of the conductive ball pad 102. According to one embodiment, the conductive ball pad 102 includes at least one conductive post 202, such as a copper post protruding from the upper surface of the conductive ball pad 102. For example, the height h1 of the conductive post 202 above the upper surface of the conductive ball pad 102 is approximately equal to the height h2 of the solder mask 130 above the upper surface of the conductive ball pad 102 (the distance from the upper surface 102a of the conductive ball pad 102 to the upper surface 130a of the solder mask 130). While approximately equal, these measurements may be nearly equal, but errors within a tolerance range are possible, such as errors within the measurement range. According to one embodiment, the upper surface 202a of the conductive post 202 may be flush (or nearly flush) with the upper surface 130a of the solder mask layer 130. In some embodiments, multiple conductive posts, such as 2 to 3 or more, may be provided on the conductive ball pad 102. Figure 1 Only three exemplary conductive pillars or copper pillars are shown in the image. According to one embodiment, additional electroplating and wet etching processes may be performed to form the conductive pillars 202. In this embodiment, when the conductive ball pads 102 are copper pads and the conductive pillars 202 are copper pillars, the two can be bonded more tightly and stably, improving the connection strength and stability. The conductive pillars 202 can also be other metal pillars, such as nickel pillars, etc., where nickel pillars facilitate formation and improve connection stability. The conductive ball pads 102 may also include other metals, such as aluminum, nickel, etc.

[0043] According to one embodiment, such as Figure 2As shown, undercuts 202s are provided on the sidewalls of the conductive post 202, thereby forming a curved sidewall profile. The undercuts 202s can be formed by performing a wet etching process with a faster lateral etching rate, which provides a neck 202n that is thinner than the head 202h and base 202b of the conductive post 202. According to one embodiment, the neck portion (or neck) 202n can have a smooth curved surface. For example, a smooth curved surface formed after a wet etching process allows for a tighter bond with subsequently formed solder balls (e.g., conductive balls 140), ensuring structural stability. According to one embodiment, the width w1 of the base 202b of the conductive post 202 can be greater than the width w2 of the head 202h of the conductive post 202. For example, the width (or diameter) w2 of the head 202b of the conductive post 202 can be approximately 50 micrometers, but is not limited thereto. After the wet etching process is completed, an annular groove 120r can be formed on the conductive ball pad 102 and around the conductive post 202. The width w1 of the base 202b can be the diameter of the base 202b, and the width w2 of the head 202h can be the diameter of the head 202h. A wider base 202b or a larger diameter w1 can increase the connection strength between the conductive post 202 and the conductive ball pad 102, improving structural stability. A smaller width (or diameter) w2 of the head 202b can make the structure of the conductive post 202 itself more stable and facilitates the formation of the conductive ball 140. In this embodiment, the side cross-sectional shape of the conductive post 202 is not limited to... Figure 2 The conductive post can also be, for example, a straight rod shape (i.e., a cylindrical conductive post), or a small base with a large head, etc.

[0044] According to one embodiment, conductive balls (or conductive solder balls) 140, such as solder balls, can be disposed on conductive ball pads 102 and completely surround conductive pillars 202. According to one embodiment, conductive balls 140, conductive pillars 202, and conductive ball pads 102 can be reflow processed, and an intermetallic compound (IMC) layer (not explicitly shown) can be formed at the interface between conductive pillars 202 and conductive balls 140. According to one embodiment, conductive pillars 202 and conductive balls 140 are interlocked, and conductive balls 140 are anchored to conductive ball pads 102. Experimental results show that the 3D conductive ball pad 102 with conductive pillars 202 increases the strength of the solder joint by at least 20%. That is, the combined structure of the conductive ball pad 102, conductive pillars 202, and conductive balls 140 formed in this embodiment has a more robust mechanical strength than a structure where solder balls are directly formed on the pad. This avoids instability in mechanical and electrical connections during collisions, reducing the likelihood of solder ball detachment and other accidents, thus improving the structural stability of the semiconductor package. The conductive ball pad with conductive pillars 202 can significantly improve board-level reliability. The above-described method in this embodiment increases the contact area between the conductive balls 140 and the combined structure of the conductive ball pads 102 and conductive pillars 202, thereby making the connection between the conductive balls and the combined structure of the conductive ball pads and conductive pillars more stable and tighter.

[0045] According to one embodiment, only the conductive ball pads at the corners of the semiconductor package 1 have such conductive pillars 202. According to some embodiments, each conductive ball pad of the semiconductor package 1 may have such a conductive pillar 202. According to some embodiments, some conductive ball pads of the semiconductor package 1 may have such conductive pillars 202. In this embodiment, the proposed three-dimensional pad structure may include a structure composed of conductive ball pads 102, conductive pillars 202, and conductive balls 140, and may also include other structures, such as a substrate, solder mask, etc. In this embodiment, the interconnect structure may include a structure composed of conductive ball pads 102, conductive pillars 202, and conductive balls 140, and may also include other structures, such as a substrate, solder mask, etc. In this embodiment, the semiconductor package 1 may include the above-described three-dimensional pad structure, or the semiconductor package 1 may include the above-described interconnect structure. In some embodiments, the three-dimensional pad structure may also be referred to as an interconnect structure.

[0046] Please refer to Figures 3 to 7 . Figure 3 A schematic top view of the conductive ball pads of an exemplary semiconductor package 2 according to another embodiment of the present invention is shown, wherein the same layers, regions or elements are represented by the same numerical designations or labels. Figure 4 For along Figure 3 A cross-sectional view of the midline I-I', for the sake of simplicity. Figure 4The detailed structure beneath the packaging substrate has been omitted. Figure 5 This shows the process after the conductive ball is mounted on the conductive ball pad. Figure 4 Conductive ball pads in semiconductor packages. Figure 6 and Figure 7 Various recessed patterns on conductive ball pads are shown for various reasons.

[0047] like Figure 3 and Figure 4 As shown, recessed regions 102s are provided on the upper surface of the conductive ball pad 102. The recessed regions 102s are formed by selectively etching a predetermined pattern into the upper surface 102a of the conductive ball pad 102 using photolithography processes and wet or dry etching methods known in the art, thereby forming protruding features 302 between them. For example, each recessed region 102s may have a cross pattern when viewed from above. According to one embodiment, the recessed regions 102s are isolated or spaced apart from each other by the protruding features 302. In some embodiments, the recessed regions 102s may be interconnected to form a network or interlaced pattern. In one embodiment, the inner surface of the recessed region 102s is an unsmooth surface, for example, the inner surface has regular or irregular bumps, or the inner surface has a grid pattern or other pattern, or as... Figure 7 As shown, the recessed area 102s is a groove, or its inner surface has a frosted surface, etc. Furthermore, as... Figure 3 As shown, from a top view, the planar shape of the recessed region 102s can be a cross shape or other shapes, such as a triangle, quadrilateral, octagon or other regular or irregular shapes; in this embodiment, there can be one or more recessed regions 102s, wherein when there are multiple recessed regions 102s, the planar shape of each recessed region 102s can be the same or different, or at least two recessed regions 102s can have the same planar shape, etc.

[0048] It is understood that the aerial pattern in the recessed area 102s is for illustrative purposes only. Other patterns, such as... Figure 6 The pie pattern depicted in the middle and Figure 7 The grid (or network) pattern depicted in the diagram can also be applied. The protruding part 302 between the recessed areas 102s can have an upper surface 302a that is flush with the upper surface 102a of the conductive ball pad 102. Figure 7 In the grid pattern depicted, the recessed areas 102s can be interconnected or disconnected grooves, and the shape of the grooves can be regular or irregular, which can be freely set according to the requirements.

[0049] According to one embodiment, such as Figure 6As shown, similarly, conductive balls 140 are disposed on conductive ball pads 102 and completely surround the protruding member 302. Recessed regions 102s are filled with conductive balls 140. According to one embodiment, the conductive balls 140, the protruding member 302, and the conductive ball pads 102 can be reflowed, and an intermetallic compound (IMC) layer (not explicitly shown) can be formed at the interface between the protruding member 302 and the conductive balls 140. According to one embodiment, the protruding feature (or protruding member) 302 and the conductive balls 140 are interlocked, and the conductive balls 140 are anchored (or secured) to the conductive ball pads 102. In this embodiment, because the inner surface of the recessed regions 102s is not smooth, the connection between the conductive balls 140 and the conductive ball pads 102 is more stable after the conductive balls 140 are formed, and accidents such as solder ball detachment are less likely to occur. In one embodiment, the inner surface of the recessed regions 102s can also be smooth. In summary, the above-described method of this embodiment can increase the contact area between the conductive ball 140 and the conductive ball pad 102 (which has a recessed area 102s), thereby making the connection between the conductive ball and the conductive ball pad more stable and tighter.

[0050] Please refer to Figure 8 and Figure 9 . Figure 8 This is a perspective top view of closely related portions of an exemplary semiconductor package 3 according to another embodiment of the present invention. Figure 9 It is along Figure 8 A schematic cross-sectional view taken by line I-I' in the diagram. (See diagram below.) Figure 8 and Figure 9 As shown, similarly, the semiconductor package 3 includes a package substrate 100 having a component side (or chip side) 100a and a board side (or PCB side) 100b. The package substrate 100 can be a cored substrate (having a core layer) or a coreless substrate. According to one embodiment, a semiconductor die (or chip) 110 can be disposed on the component side 100a of the package substrate 100. The semiconductor die 110 is provided by, but is not limited to, copper pillars, microbumps, or solder bumps.

[0051] According to one embodiment, the semiconductor die 110 may be overmolded with a sealant 120, such as a molding compound comprising epoxy resin. The sealant 120 is in direct contact with the package substrate 100. It should be understood that in some embodiments, the semiconductor package 3 may include multiple chips or dies. For simplicity, only a portion of the semiconductor die 110 is shown in the figures.

[0052] At least one conductive ball pad 102 is provided on the board side 100b of the package substrate 100. According to one embodiment, for example, the conductive ball pad 102 may be located at a corner of the semiconductor package 3. That is, when viewed from the bottom of the package 3, the conductive ball pad 102 may be a corner ball pad located adjacent to the vertices of a rectangular semiconductor package. According to one embodiment, for example, the conductive ball pad 102 may be a copper pad. Depending on design requirements, a surface solderable coating, such as a nickel and / or gold coating or an organic solderability preservative (OSP), may be formed on the upper surface of the conductive ball pad 102. According to one embodiment, the conductive ball pad 102 may be electrically connected to a corresponding connection element 111 via an interconnect structure 104 in the package substrate 100. For example, the interconnect structure 104 may include copper traces and plated vias, but is not limited thereto.

[0053] According to one embodiment, the board side 100b of the packaging substrate 100 and the periphery of the conductive ball pad 102 may be covered with a solder resist layer 130. An opening 130p in the solder resist layer 130 partially exposes the central upper surface of the conductive ball. According to one embodiment, the conductive ball pad 102 includes at least one conductive post 202, such as a copper post protruding from the upper surface of the conductive ball pad 102. For example, the height h1 of the conductive post (or copper post) 202 above the upper surface of the conductive ball pad 102 is approximately equal to the height h2 of the solder resist layer 130 above the upper surface of the conductive ball pad 102. According to one embodiment, the upper surface 202a of the conductive post 202 may be flush with the upper surface 130a of the solder resist layer 130. In some embodiments, multiple conductive posts, such as 2 to 3 posts, may be provided on the conductive ball pad 102. Figure 8 (Only three exemplary copper pillars are shown in the image). According to one embodiment, additional electroplating and wet etching processes are performed to form the conductive pillars 202.

[0054] According to one embodiment, such as Figure 9 As shown, undercuts 202s are provided on the sidewalls of the conductive post 202, thereby forming a curved sidewall profile. The undercuts 202s can be formed by performing a wet etching process with a faster lateral etching rate, which provides a neck 202n that is thinner than its head 202h and base 202b. According to one embodiment, the neck portion 202n can have a smooth curved surface. According to one embodiment, the width w1 of the base 202b of the conductive post 202 can be greater than the width w2 of the head 202h of the conductive post 202. For example, the width (or diameter) w2 of the head 202b of the conductive post 202 can be about 50 micrometers, but is not limited thereto. After the wet etching process is completed, an annular groove 120r (see reference) can be formed on the conductive ball pad 102 and around the conductive post 202. Figure 2 (As shown).

[0055] According to one embodiment, conductive balls 140, such as solder balls, can be disposed on conductive ball pads 102 and completely surround conductive pillars 202. According to one embodiment, conductive balls 140, conductive pillars 202, and conductive ball pads 102 can undergo a reflow process, and an intermetallic compound (IMC) layer (not explicitly shown) can be formed at the interface between the conductive pillars 202 and conductive balls 140. According to one embodiment, the conductive pillars 202 and conductive balls 140 are interlocked, and the conductive balls 140 are anchored to the conductive ball pads 102.

[0056] According to one embodiment, a recessed region 102r is disposed on the upper surface of the conductive ball pad 102 and surrounds the conductive post 202. The recessed region 102r can be formed by selectively etching a predetermined pattern into the upper surface 102a of the conductive ball pad 102 using photolithography processes and wet or dry etching methods known in the art. In this embodiment, the conductive post and recessed region embodiments described above can be combined to further enhance the stability of the combined structure of the conductive ball pad, conductive post, and conductive ball, preventing accidental detachment of the solder ball or unstable connection. The above-described method of this embodiment can increase the contact area between the conductive ball 140 and the conductive ball pad (which has a conductive post and / or a recessed region) 102, thereby making the connection between the conductive ball and the conductive ball pad (which has a conductive post and / or a recessed region) more stable and tighter. The recessed region 102r can be formed using methods such as... Figure 3-7 The recessed regions 102s shown can be one or more types, and the conductive pillars can be any of the conductive pillars described above. The number of recessed regions 102s and the number of conductive pillars 202 are not limited; both can be freely set as needed.

[0057] Those skilled in the art will readily observe that numerous modifications and alterations can be made to the apparatus and method while maintaining the teachings of this invention. Therefore, the foregoing disclosure should be interpreted as being limited only by the scope and limits of the appended claims.

Claims

1. A three-dimensional pad structure, characterized in that, include: substrate; A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer; as well as At least one conductive post protrudes from the upper surface of the pad; The at least one conductive post includes a base and a head, the base being connected to the pad, and the conductive post also includes a neck located between the base and the head; wherein the diameter of the base is larger than the diameter of the head, and the neck is thinner than the head and the base; the height of the conductive post above the upper surface of the pad is approximately equal to the height of the solder mask above the upper surface of the pad.

2. The three-dimensional pad structure as described in claim 1, characterized in that, The substrate is a packaging substrate, which has a component side and a board side, wherein the pad is disposed on the board side of the packaging substrate.

3. The three-dimensional pad structure as described in claim 1, characterized in that, This pad is a copper pad.

4. The three-dimensional pad structure as described in claim 1, characterized in that, The conductive pillar is either a copper pillar or a nickel pillar.

5. The three-dimensional pad structure as described in claim 1, characterized in that, Also includes: A surface solderable coating or organic solderable corrosion inhibitor is applied to the upper surface of the pad.

6. The three-dimensional pad structure as described in claim 1, characterized in that, The sidewalls of the conductive post are undercut, thus forming a curved sidewall profile.

7. The three-dimensional pad structure as described in claim 1, characterized in that, The neck has a smooth curved surface.

8. The three-dimensional pad structure as described in claim 1, characterized in that, The diameter of the head of the conductive post is approximately 50 micrometers.

9. The three-dimensional pad structure as described in claim 1, characterized in that, Also includes: An annular groove on the pad and around the conductive post.

10. A three-dimensional pad structure, characterized in that, include: substrate; A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer; A recessed area is provided on the upper surface of the pad; as well as At least one prominent feature is present between the recessed areas; At least one conductive post protrudes from the upper surface of the pad; The at least one conductive post includes a base and a head, the base being connected to the pad, and the conductive post also includes a neck located between the base and the head; wherein the diameter of the base is larger than the diameter of the head, and the neck is thinner than the head and the base; the height of the conductive post above the upper surface of the pad is approximately equal to the height of the solder mask above the upper surface of the pad.

11. The three-dimensional pad structure as described in claim 10, characterized in that, The recessed areas are isolated from each other by this protruding feature.

12. The three-dimensional pad structure as described in claim 10, characterized in that, The recessed areas are interconnected to form a network or interlaced pattern.

13. The three-dimensional pad structure as described in claim 10, characterized in that, The protruding feature between the recessed areas has an upper surface that is flush with the upper surface of the pad.

14. An interconnection structure, characterized in that, include: substrate; A solder pad is disposed on the substrate, wherein the periphery of the solder pad is covered with a solder resist layer; At least one conductive post protrudes from the upper surface of the pad; wherein the at least one conductive post includes a base and a head, the base being connected to the pad, and the conductive post further includes a neck located between the base and the head; wherein the diameter of the base is larger than the diameter of the head, and the neck is thinner than the head and the base; the height of the conductive post above the upper surface of the pad is approximately equal to the height of the solder mask above the upper surface of the pad; and A conductive ball is disposed on the pad and surrounds the conductive post, wherein the at least one conductive post and the conductive ball are interlocked, and wherein the conductive ball is anchored to the pad.

15. The interconnection structure as described in claim 14, characterized in that, The conductive sphere completely surrounds the conductive pillar.

16. The interconnection structure as described in claim 14, characterized in that, This pad is a corner pad.

17. A semiconductor package, characterized in that, The semiconductor package includes a three-dimensional pad structure as described in any one of claims 1-13 or an interconnect structure as described in any one of claims 14-16.

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