Sensing circuit and display driver integrated circuit for detecting features of a display panel
Patent Information
- Application Number
- CN202210299562.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-04-19
- Filing Date
- 2022-03-25
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2042-03-25
AI Technical Summary
[0011]可基于串行电流感测方案实施根据示例性实施例的感测电路和显示驱动器集成电路,在串行电流感测方案中,使用一个信号电流积分器对多个感测通道顺序地执行感测操作。另外,可基于主动屏蔽方案实施感测电路和显示驱动器集成电路,在主动屏蔽方案中,在针对目标感测通道的感测操作期间,邻近于目标感测通道的至少一个感测通道被选为或设为屏蔽感测通道,屏蔽电压被施加至至少一个屏蔽感测通道,并且至少一个屏蔽感测通道被顺序地改变以对应于目标感测通道的改变。因此,可以有效地防止或减少来自邻近的感测通道的耦合噪声,并且可以改进和增强感测性能和精度。
Smart Images

Figure CN115223467B_ABST
Abstract
Description
[0001] Cross-reference to related applications
[0002] This application claims priority to Korean Patent Application No. 10-2021-0050649, filed on April 19, 2021, with the Korean Intellectual Property Office (KIPO), the contents of which are incorporated herein by reference in their entirety. Technical Field
[0003] Exemplary embodiments generally relate to semiconductor integrated circuits, and more specifically, to sensing circuits for detecting features of a display panel, and display driver integrated circuits including such sensing circuits. Background Technology
[0004] With the development of information technology, display devices have become crucial for providing users with timely information. Various display devices, such as liquid crystal displays (LCDs), plasma displays, and electroluminescent displays, have become widespread. Among these display devices, electroluminescent displays, which use light-emitting diodes (LEDs) or organic light-emitting diodes (OLEDs) to emit light through the recombination of electrons and holes, are preferred due to their fast response speed and low power consumption.
[0005] Electroluminescent displays offer advantages such as fast response and low power consumption. As a related technology, OLED display devices use driving transistors to supply current to each pixel corresponding to a data signal, thereby generating light through the OLED of each pixel. Therefore, electroluminescent display devices use current to generate the displayed image. The performance of the driving transistors and OLEDs degrades over time; to compensate for this degradation, it is necessary to continuously sense and measure the degree of this degradation. Summary of the Invention
[0006] At least one exemplary embodiment of this disclosure provides a sensing circuit capable of effectively detecting features of pixels included in a display panel.
[0007] At least one exemplary embodiment of this disclosure provides a display driver integrated circuit including sensing circuitry.
[0008] According to an exemplary embodiment, a sensing circuit connected to multiple pixels in a display panel via multiple sensing channels includes multiple initialization switches, multiple shielding switches, multiple signal selection switches, and a signal current integrator. The multiple initialization switches apply an initialization voltage to the multiple sensing channels based on an initialization control signal. The multiple shielding switches apply a shielding voltage, different from the initialization voltage, to the multiple sensing channels based on multiple shielding control signals. The multiple signal selection switches sequentially output multiple sensing currents received from the multiple sensing channels based on multiple sensing control signals. The signal current integrator sequentially converts the multiple sensing currents into multiple sensing voltages. When a target sensing current is detected from a target sensing channel among the multiple sensing channels, a shielding voltage is applied to at least one shielded sensing channel adjacent to the target sensing channel among the multiple sensing channels.
[0009] According to an exemplary embodiment, a display driver integrated circuit for driving a display panel including multiple pixels includes a data driver. The data driver generates multiple data voltages applied to the multiple pixels and includes sensing circuitry for detecting features of the multiple pixels through multiple sensing channels. The sensing circuitry includes multiple initialization switches, multiple shielding switches, multiple signal selection switches, and a signal current integrator. The multiple initialization switches apply initialization voltages to the multiple sensing channels based on initialization control signals. The multiple shielding switches apply shielding voltages, different from the initialization voltages, to the multiple sensing channels based on multiple shielding control signals. The multiple signal selection switches sequentially output multiple sensing currents received from the multiple sensing channels based on multiple sensing control signals. The signal current integrator sequentially converts the multiple sensing currents into multiple sensing voltages. When a target sensing current is detected from a target sensing channel among the multiple sensing channels, a shielding voltage is applied to at least one shielded sensing channel adjacent to the target sensing channel among the multiple sensing channels.
[0010] According to an exemplary embodiment, a sensing circuit (where X is a natural number greater than or equal to three) connected to a plurality of pixels in a display panel via a first sensing channel to an Xth sensing channel includes a first initialization switch to an Xth initialization switch, a first shielding switch to an Xth shielding switch, a first signal selection switch to an Xth signal selection switch, an operational amplifier, a reset switch, and a feedback capacitor. The first initialization switches to the Xth initialization switches are connected to the first sensing channels to the Xth sensing channels and apply initialization voltages substantially simultaneously to the first sensing channels to the Xth sensing channels based on an initialization control signal. The first shielding switches to the Xth shielding switches are connected to the first sensing channels to the Xth sensing channels and apply shielding voltages different from the initialization voltages to the first sensing channels to the Xth sensing channels based on a first shielding control signal to an Xth shielding control signal. The first signal selection switches to the Xth signal selection switches are connected to the first sensing channels to the Xth sensing channels and sequentially output first sensing currents to Xth sensing currents received from the first sensing channels to the Xth sensing channels based on the first sensing control signal to the Xth sensing control signal. The operational amplifier includes a first input terminal that sequentially receives a first sensing current to an Xth sensing current, a second input terminal that receives an initialization voltage, and an output terminal that sequentially outputs a first sensing voltage to an Xth sensing voltage. A reset switch is connected between the first input terminal and the output terminal of the operational amplifier. A feedback capacitor is connected in parallel with the reset switch between the first input terminal and the output terminal of the operational amplifier. The initialization voltage and the shielding voltage have the same voltage level. When the first sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, a second sensing channel is selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, and a shielding voltage is applied to the second sensing channel. When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K-1)th sensing channel and the (K+1)th sensing channel are selected as the shielding sensing channels from the first sensing channel to the Xth sensing channel, and a shielding voltage is applied to the (K-1)th sensing channel and the (K+1)th sensing channel, where K is a natural number greater than or equal to two and less than or equal to (X-1). When the Xth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (X-1)th sensing channel is selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, and the shielding voltage is applied to the (X-1)th sensing channel.
[0011] The sensing circuit and display driver integrated circuit according to exemplary embodiments can be implemented based on a serial current sensing scheme, in which a signal current integrator is used to sequentially perform sensing operations on multiple sensing channels. Alternatively, the sensing circuit and display driver integrated circuit can be implemented based on an active shielding scheme, in which, during a sensing operation targeting a target sensing channel, at least one sensing channel adjacent to the target sensing channel is selected or designated as a shielded sensing channel, a shielding voltage is applied to at least one shielded sensing channel, and at least one shielded sensing channel is sequentially changed to correspond to a change in the target sensing channel. Therefore, coupling noise from adjacent sensing channels can be effectively prevented or reduced, and sensing performance and accuracy can be improved and enhanced. Attached Figure Description
[0012] Exemplary, non-limiting embodiments will become clearer from the following detailed description taken in conjunction with the accompanying drawings.
[0013] Figure 1 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0014] Figure 2 This is a block diagram illustrating a display driver integrated circuit and a display device including the display driver integrated circuit according to an exemplary embodiment.
[0015] Figure 3 It is shown Figure 2 A circuit diagram of an example of pixels included in a display panel in a display device.
[0016] Figure 4 It is shown Figure 1 A circuit diagram of an example sensing circuit.
[0017] Figure 5A , Figure 5B , Figure 5C , Figure 5D and Figure 5E It is used to describe Figure 4 A diagram illustrating the operation of the sensing circuit.
[0018] Figure 6 It is shown Figure 1 Another example of a sensing circuit is shown in the circuit diagram.
[0019] Figure 7 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0020] Figure 8A It is shown Figure 7 A block diagram of an example of a control signal generator included in a sensing circuit.
[0021] Figure 8BIt is used to describe Figure 8A A diagram illustrating the operation of the control signal generator.
[0022] Figure 9 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0023] Figure 10 It is shown Figure 9 A circuit diagram of an example sensing circuit.
[0024] Figure 11A , Figure 11B , Figure 11C , Figure 11D , Figure 11E and Figure 11F It is used to describe Figure 10 A diagram illustrating the operation of the sensing circuit.
[0025] Figure 12 It is shown Figure 9 Another example of a sensing circuit is shown in the circuit diagram.
[0026] Figure 13 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0027] Figure 14A It is shown Figure 13 A block diagram of an example of a control signal generator included in a sensing circuit.
[0028] Figure 14B It is used to describe Figure 14A A diagram illustrating the operation of the control signal generator.
[0029] Figure 15 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0030] Figure 16 This is a diagram used to illustrate the performance of a sensing circuit according to an exemplary embodiment.
[0031] Figure 17 This is a flowchart illustrating a method for detecting features of a display panel according to an exemplary embodiment.
[0032] Figure 18 This is a block diagram illustrating an electronic system according to an exemplary embodiment. Detailed Implementation
[0033] Various exemplary embodiments will be described more fully with reference to the accompanying drawings, in which embodiments are illustrated. However, this disclosure may be embodied in many different forms and should not be construed as limited to the embodiments described herein. In this invention, the same reference numerals denote the same elements.
[0034] Figure 1This is a block diagram illustrating a sensing circuit according to an exemplary embodiment.
[0035] Reference Figure 1 The sensing circuit 100 includes a switching circuit 200 and a signal current integrator 300.
[0036] Sensing circuit 100 is connected to multiple pixels PX included in the display panel via multiple sensing channels SCH. Sensing circuit 100 detects features of the multiple pixels PX based on multiple pixel currents IPIX and / or multiple sensing currents ISIG received via the multiple sensing channels SCH. For example, sensing circuit 100 may be included in a display driver integrated circuit (DDI) that drives the display panel. (See reference...) Figure 2 and Figure 3 Describes an exemplary configuration of a display panel, a display driver integrated circuit, and a plurality of pixel PXs.
[0037] Switching circuit 200 controls the operation of applying voltage to multiple sensing channels SCH and / or controls the operation of outputting current from multiple sensing channels SCH. Switching circuit 200 includes initialization circuit 210, shielding circuit 220, and signal selection circuit 230.
[0038] The initialization circuit 210 includes a plurality of initialization switches 212. The plurality of initialization switches 212 are connected to a plurality of sensing channels SCH, and an initialization voltage VINIT is applied to the plurality of sensing channels SCH based on an initialization control signal SW_DISP. For example, the plurality of initialization switches 212 can be turned on substantially simultaneously based on the initialization control signal SW_DISP, and the initialization voltage VINIT can be provided to the plurality of sensing channels SCH substantially simultaneously through the plurality of initialization switches 212.
[0039] The signal selection circuit 230 includes multiple signal selection switches 232. The multiple signal selection switches 232 sequentially output multiple pixel currents IPIX received from multiple sensing channels SCH as multiple sensing currents ISIG based on multiple sensing control signals SW_SIG. For example, the multiple signal selection switches 232 can be sequentially turned on based on the multiple sensing control signals SW_SIG, and only one signal selection switch can be turned on at a specific time. The multiple sensing currents ISIG can be sequentially provided to the signal current integrator 300. The sensing channel connected to the turned-on signal selection switch can be referred to as the target sensing channel as the target of the sensing operation, and the sensing current provided from the target sensing channel among the multiple sensing currents ISIG can be referred to as the target sensing current.
[0040] The shielding circuit 220 includes a plurality of shielding switches 222. The plurality of shielding switches 222 are connected to a plurality of sensing channels SCH, and the plurality of shielding switches 222 apply a shielding voltage VS, different from the initialization voltage VINIT, to the plurality of sensing channels SCH based on a plurality of shielding control signals SW_VS. For example, the plurality of shielding switches 222 may be turned on based on the plurality of shielding control signals SW_VS, and only some shielding switches 222 may be turned on at a specific time. The sensing channels connected to the turned-on shielding switches may be referred to as shielded sensing channels that act to prevent or reduce coupling noise affecting the target sensing channel during sensing operation.
[0041] In some exemplary embodiments, when a target sensing current is detected from a target sensing channel among multiple sensing channels SCH, for example, when it is desired to detect a target sensing current provided by a target sensing channel among multiple sensing channels SCH, at least one sensing channel adjacent to the target sensing channel may be selected or set as a shielded sensing channel among the multiple sensing channels SCH, and multiple shielding switches 222 may be controlled to apply a shielding voltage VS to at least one shielded sensing channel. For example, when sensing operations are performed sequentially from the first sensing channel to the last sensing channel in the multiple sensing channels SCH, for example, when the target sensing channel changes sequentially from the first sensing channel to the last sensing channel, at least one shielded sensing channel may also change sequentially to correspond to the change of the target sensing channel. In other words, an active shielding scheme in which the shielded sensing channel changes actively or adaptively can be implemented.
[0042] In some exemplary embodiments, the number of sensing channels SCH, the number of initialization switches 212, the number of shielding switches 222, and the number of signal selection switches 232 may be equal to each other. For example, one initialization switch, one shielding switch, and one signal selection switch may be connected to each sensing channel. However, the exemplary embodiments are not limited thereto.
[0043] The signal current integrator 300 sequentially converts the sensed current ISIG into the sensed voltage VSIG, and sequentially generates and outputs the sensed voltage VSIG. One signal current integrator 300 can be shared by multiple sense channels SCH.
[0044] Electroluminescent display panels comprising multiple pixels (each pixel including a light-emitting element such as a light-emitting diode (LED) or an organic light-emitting diode (OLED) and a driving transistor for driving the light-emitting element) may suffer from brightness variations due to misalignment between light-emitting elements, misalignment between driving transistors, etc. Furthermore, the characteristics of the light-emitting elements and the driving transistors (e.g., mobility, threshold voltage, etc.) can deteriorate or degrade (e.g., age) with increasing usage time, potentially leading to image persistence or ghosting, in which frequently used image formats persist on the screen due to degradation. Such brightness variations or image persistence can be reduced by compensating for the threshold voltage of the driving transistors, either internally or externally to the display panel. Pixel brightness variations can be directly measured and compensated during the manufacturing of the display device. However, to compensate for the degradation of light-emitting elements over time after the display device has been manufactured and delivered to the end user, it may be necessary to continuously sense or detect the degree of direct degradation that has already occurred.
[0045] Traditionally, methods for measuring voltage without a current integrator have been used. However, since relatively fast measurements can be performed when using a current integrator that reads current directly from the driving transistor, it is necessary to simultaneously measure both current and voltage for detecting degradation; therefore, current integrators for current measurement have been used. For multi-channel current measurement, there is a problem that placing a current integrator on each channel increases the chip size. Therefore, to reduce chip size, a serial current measurement scheme has been used, in which a single integrator measures multiple pixels connected to multiple channels sequentially over time. In the serial current measurement scheme, measurements can be performed sequentially by driving the channel from the first to the last, and coupling noise from the (n-1)th and / or (n+1)th sensing channels can be generated while the nth measurement channel is being driven, causing channel offset in the current integrator output.
[0046] The sensing circuit 100 according to the exemplary embodiment can be implemented based on a serial current sensing scheme, in which a signal current integrator 300 sequentially performs sensing operations on multiple sensing channels SCH. Alternatively, the sensing circuit 100 can be implemented based on an active shielding scheme, in which during a sensing operation targeting a target sensing channel, at least one sensing channel adjacent to the target sensing channel is selected or designated as a shielded sensing channel, a shielding voltage VS is applied to at least one shielded sensing channel, and the at least one shielded sensing channel sequentially changes to correspond to the change of the target sensing channel. Therefore, coupling noise from adjacent sensing channels can be effectively prevented or reduced, and sensing performance and accuracy can be improved and enhanced.
[0047] Figure 2 This is a block diagram illustrating a display driver integrated circuit and a display device including the display driver integrated circuit according to an exemplary embodiment.
[0048] Reference Figure 2 The display device 700 includes a display panel 710 and a display driver integrated circuit. The display driver integrated circuit may include a data driver 720, a scan driver 730, a power supply 740, and a timing controller 750. In other words, Figure 2 All components shown, except for the display panel 710, can form a display driver integrated circuit.
[0049] The display panel 710 can operate based on image data (e.g., frame data) (e.g., displaying an image). The display panel 710 can be connected to the data driver 720 via multiple data lines D1, D2, ..., DM and multiple sensing lines S1, S2, ..., SM, and can be connected to the scan driver 730 via multiple scan lines (or gate lines) G1, G2, ..., GN. The multiple data lines D1 to DM and the multiple sensing lines S1 to SM can extend in a first direction, and the multiple scan lines G1 to GN can extend in a second intersecting direction relative to (e.g., substantially perpendicular to) the first direction.
[0050] The display panel 710 may include a plurality of pixels PX arranged in a matrix having multiple rows and columns. For example, each of the plurality of pixels PX may include a light-emitting element and at least one driving transistor for driving the light-emitting element. Each of the plurality of pixels PX may be electrically connected to a corresponding one of a plurality of data lines D1 to DM, a corresponding one of a plurality of sensing lines S1 to SM, and a corresponding one of a plurality of scan lines G1 to GN.
[0051] In some exemplary embodiments, the display panel 710 may be a self-emissive display panel that emits light without using a backlight unit. For example, the display panel 710 may be an organic light-emitting diode (OLED) display panel that includes an OLED as the light-emitting element.
[0052] In some exemplary embodiments, each of the plurality of pixels PX included in the display panel 710 may have various configurations depending on the driving scheme of the display device 700. For example, the display device 700 may be driven using either an analog or digital driving scheme. Analog driving schemes generate grayscale using variable voltage levels corresponding to input data, while digital driving schemes generate grayscale using variable time periods of light emission from light-emitting diodes (LEDs). Analog driving schemes are difficult to implement because they require driver integrated circuits (ICs), which are complex to manufacture, especially in cases where the display is large and requires high resolution. On the other hand, digital driving schemes can easily achieve the required high resolution with a simple IC structure. (Refer to...) Figure 3 A sample structure describing each pixel PX.
[0053] The data driver 720 can generate multiple data voltages based on the output image data ODAT and the control signal CS1, and can apply the multiple data voltages to multiple pixels PX included in the display panel 710 via multiple data lines D1 to DM. For example, the data driver 720 may include a digital-to-analog converter (DAC) that converts the digital output image data ODAT into multiple data voltages in analog form. The data driver 720 may use additional compensation data CDAT to generate the multiple data voltages.
[0054] The data driver 720 includes a sensing circuit 100. The sensing circuit 100 can be... Figure 1 The sensing circuit 100 can be connected to multiple pixels PX via multiple sensing lines S1 to SM. It can detect features of the multiple pixels PX based on multiple pixel currents IPIX and / or multiple sensing currents ISIG received via the multiple sensing lines S1 to SM, and can generate and output multiple sensing voltages VSIG representing the features of the multiple pixels PX. Figure 1 Multiple sensing channels SCH in the circuit. In some exemplary embodiments, the sensing circuit 100 may further include a reference... Figure 15 The analog-to-digital converter (ADC) described herein, the sensing circuit 100, can generate and output multiple digital codes DCODE corresponding to multiple sensing voltages VSIG.
[0055] Although Figure 2 The data driver 720 is shown to include a sensing circuit 100, but the exemplary embodiment is not limited thereto. For example, the sensing circuit 100 may be disposed or located anywhere on the display driver integrated circuit.
[0056] Although Figure 2The illustration shows a display driver integrated circuit including a sensing circuit 100, but exemplary embodiments are not limited thereto. For example, the display driver integrated circuit may include two or more sensing circuits. For example, when the display driver integrated circuit includes two or more sensing circuits, the plurality of sensing lines S1 to SM may be divided into two or more sensing line groups, each of which includes at least one sensing line, and a sensing circuit may be connected to the sensing lines included in a sensing line group to perform the operation of detecting features of the plurality of pixels PX described above.
[0057] The scan driver 730 can generate multiple scan signals based on the control signal CS2, and can apply the multiple scan signals to multiple pixels PX included in the display panel 710 through multiple scan lines G1 to GN. The multiple scan lines G1 to GN can be activated sequentially based on the multiple scan signals.
[0058] The timing controller 750 can control the overall operation of the display device 700. For example, the timing controller 750 can receive input control signals ICS from an external source (e.g., from an external display processor), and can provide control signals CS1, CS2, and CS3 to the data driver 720, scan driver 730, and power supply 740 based on the input control signals ICS to control the operation of the display device 700. For example, the control signals CS1, CS2, and CS3 may include vertical synchronization signals and horizontal synchronization signals used within the display device 700.
[0059] The timing controller 750 can receive input image data IDAT from an external source and can generate output image data ODAT for displaying the image based on the input image data IDAT. For example, the input image data IDAT may include red image data, green image data, and blue image data. Alternatively, the input image data IDAT may include white image data. Alternatively, the input image data IDAT may include magenta image data, yellow image data, cyan image data, etc.
[0060] The timing controller 750 can generate compensation data CDAT based on multiple sensed voltages VSIG (or multiple digital codes DCODE) to compensate for degradation associated with the characteristics of multiple pixels PX. Display quality can be improved or enhanced using multiple data voltages generated based on output image data ODAT and compensation data CDAT.
[0061] In some exemplary embodiments, the data driver 720, scan driver 730, and timing controller 750 may be implemented as a single integrated circuit. In other example embodiments, the data driver 720, scan driver 730, and timing controller 750 may be implemented as two or more integrated circuits. A driver module that includes at least the timing controller 750 and the data driver 720 may be referred to as a timing controller embedded data driver (TED).
[0062] Power supply 740 can supply a first power supply voltage ELVDD and a second power supply voltage ELVSS to display panel 710 based on control signal CS3. For example, the first power supply voltage ELVDD can be a high power supply voltage, and the second power supply voltage ELVSS can be a low power supply voltage.
[0063] In some exemplary embodiments, at least some elements included in the display driver integrated circuit may be disposed (e.g., directly mounted) on the display panel 710, or may be connected to the display panel 710 in a tape-on-a-carrier package (TCP). Alternatively, at least some elements included in the display driver integrated circuit may be integrated on the display panel 710. In some exemplary embodiments, the elements included in the display driver integrated circuit may be implemented separately using separate circuits / modules / chips. In other exemplary embodiments, based on function, at least some elements included in the display driver integrated circuit may be combined into a single circuit / module / chip, or may be further separated into multiple circuits / modules / chips.
[0064] Although not shown in detail, the display device 700 may also include a frame buffer that stores image data according to the type of pixel PX, the driving scheme of the display panel 710, etc.
[0065] Figure 3 It is shown Figure 2 A circuit diagram of an example of pixels included in a display panel in a display device.
[0066] Reference Figure 3 A pixel PX may include a switching transistor TS, a storage capacitor CST, a driving transistor TD, a sensing transistor TSE, an organic light-emitting diode EL, and a load capacitor CLOAD.
[0067] The switching transistor TS may have a first electrode connected to the data line Di, a second electrode connected to the storage capacitor CST, and a gate electrode connected to the scan line Gj. The switching transistor TS may, in response to a scan signal SSC received from the scan driver 730, transfer the data voltage VD received from the data driver 720 to the storage capacitor CST.
[0068] The storage capacitor CST may have a first electrode connected to the gate electrode of the driving transistor TD and a second electrode connected to the organic light-emitting diode EL. The storage capacitor CST can store the data voltage VD transferred through the switching transistor TS.
[0069] The driving transistor TD may have a first electrode connected to a first power supply voltage ELVDD, a second electrode connected to an organic light-emitting diode EL, and a gate electrode connected to a storage capacitor CST. The driving transistor TD can be turned on or off according to the data voltage VD stored in the storage capacitor CST.
[0070] An organic light-emitting diode (OLED) EL may have a positive electrode connected to a driving transistor TD and a storage capacitor CST, and a negative electrode connected to a second power supply voltage ELVSS. The OLED EL can emit light based on the current flowing from a first power supply voltage ELVDD to a second power supply voltage ELVSS when the driving transistor TD is turned on. The brightness of the pixel PX can increase as the current flowing through the OLED EL increases.
[0071] The sensing transistor TSE may have a first electrode connected to the organic light-emitting diode EL, a gate electrode for receiving the sensing control signal SSE, and a second electrode connected to the sensing line Si and the load capacitor CLOAD. The sensing transistor TSE may provide an initialization voltage VINIT or a shielding voltage VS, or may output a pixel current IPIX in response to the sensing control signal SSE.
[0072] In some exemplary embodiments, the gate electrode of the sensing transistor TSE may be connected to one of a plurality of scan lines G1 to GN. In other words, the sensing control signal SSE may be generated and provided by the scan driver 730. For example, the scan line connected to the gate electrode of the sensing transistor TSE may be the same as or different from the scan line Gj connected to the gate electrode of the switching transistor TS.
[0073] Unlike the storage capacitor CST, the load capacitor CLOAD can be a parasitic capacitor formed between the sensing line Si and the ground voltage. The second electrode of the driving transistor TD can be charged during sensing operation through the load capacitor CLOAD and the initialization voltage VINIT.
[0074] Although Figure 3 An example of a pixel PX included in a display panel 710 is shown, but it should be understood that the exemplary embodiments are not limited thereto, and other embodiments can be applied to any pixel of various types and configurations.
[0075] Figure 4 It is shown Figure 1 A circuit diagram of an example sensing circuit.
[0076] Reference Figure 4 The sensing circuit may be included in the data driver 722 and may be connected to the pixels and sensing lines included in the display panel 712. For ease of illustration, only a portion of the sensing circuit connected to four pixels and four sensing lines is shown.
[0077] The first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 can be jointly connected to the first scan line G1, and can be respectively connected to the first sensing line S1, the second sensing line S2, the third sensing line S3, and the fourth sensing line S4. For example, each of the first pixel PX1 to the fourth pixel PX4 can have Figure 3 The configuration is shown, and the gate electrode of the sensing transistor TSE can be connected to the first scan line G1. When a sensing operation is performed, the sensing transistor TSE can be turned on in response to the sensing control signal SSE applied through the first scan line G1.
[0078] The sensing circuit may include a first initialization switch 212a, a second initialization switch 212b, a third initialization switch 212c, and a fourth initialization switch 212d; a first shielding switch 222a, a second shielding switch 222b, a third shielding switch 222c, and a fourth shielding switch 222d; a first signal selection switch 232a, a second signal selection switch 232b, a third signal selection switch 232c, and a fourth signal selection switch 232d; an operational amplifier 310; a reset switch 320; and a feedback capacitor 330.
[0079] The first initialization switch 212a can be connected between the first sensing line S1 and the initialization voltage VINIT. The second initialization switch 212b can be connected between the second sensing line S2 and the initialization voltage VINIT. The third initialization switch 212c can be connected between the third sensing line S3 and the initialization voltage VINIT. The fourth initialization switch 212d can be connected between the fourth sensing line S4 and the initialization voltage VINIT.
[0080] The first shielding switch 222a can be connected between the first sensing line S1 and the shielding voltage VS. The second shielding switch 222b can be connected between the second sensing line S2 and the shielding voltage VS. The third shielding switch 222c can be connected between the third sensing line S3 and the shielding voltage VS. The fourth shielding switch 222d can be connected between the fourth sensing line S4 and the shielding voltage VS.
[0081] The first signal selection switch 232a can be connected between the first sensing line S1 and the first input terminal (e.g., the negative (-) input terminal) of the operational amplifier 310. The second signal selection switch 232b can be connected between the second sensing line S2 and the first input terminal of the operational amplifier 310. The third signal selection switch 232c can be connected between the third sensing line S3 and the first input terminal of the operational amplifier 310. The fourth signal selection switch 232d can be connected between the fourth sensing line S4 and the first input terminal of the operational amplifier 310.
[0082] Operational amplifier 310 may include a first input terminal connected to first signal selection switches 232a through fourth signal selection switches 232d to sequentially receive a plurality of sensed currents ISIG, a second input terminal (e.g., a positive (+) input terminal) to receive an initialization voltage VINIT, and an output terminal sequentially outputting a plurality of sensed voltages VSIG. A reset switch 320 may be connected between the first input terminal and the output terminal of operational amplifier 310. A feedback capacitor 330 may be connected in parallel with the reset switch 320 between the first input terminal and the output terminal of operational amplifier 310. Operational amplifier 310, reset switch 320, and feedback capacitor 330 may be implemented... Figure 1 The signal current integrator 300 in the middle.
[0083] Figure 5A , Figure 5B , Figure 5C , Figure 5D and Figure 5E It is used to describe Figure 4 A diagram illustrating the operation of the sensing circuit.
[0084] exist Figure 5E In this context, "SW_DISP" represents the initialization control signal applied to the first initialization switch 212a to the fourth initialization switch 212d; "SW_VS1", "SW_VS2", "SW_VS3" and "SW_VS4" represent the first shielding control signal, the second shielding control signal, the third shielding control signal and the fourth shielding control signal applied to the first shielding switch 222a to the fourth shielding switch 222d, respectively; and "SW_SIG1", "SW_SIG2", "SW_SIG3" and "SW_SIG4" represent the first sensing control signal, the second sensing control signal, the third sensing control signal and the fourth sensing control signal applied to the first signal selection switch 232a to the fourth signal selection switch 232d, respectively.
[0085] Reference Figure 5A , Figure 5B , Figure 5C , Figure 5D and Figure 5EAn example is shown where a sensing channel adjacent to the target sensing channel in a first direction and a sensing channel adjacent to the target sensing channel in a second direction are selected or set as shielded sensing channels.
[0086] In other words, the multiple sensing channels SCH may include a first sensing channel to an Xth sensing channel, where X is a natural number greater than or equal to three. When a Kth sensing channel is selected or set as the target sensing channel from the first sensing channel to the Xth sensing channel (where K is a natural number greater than or equal to two and less than or equal to (X-1)), a (K-1)th sensing channel and a (K+1)th sensing channel may be selected or set as at least one shielded sensing channel from the first sensing channel to the Xth sensing channel.
[0087] Additionally, the plurality of signal selection switches 232 may include a Kth signal selection switch connected to the Kth sensing channel, and the plurality of shielding switches 222 may include a (K-1)th shielding switch connected to the (K-1)th sensing channel and a (K+1)th shielding switch connected to the (K+1)th sensing channel. The Kth sensing current received from the Kth sensing channel can be provided to the signal current integrator 300 from the plurality of sensing currents ISIG by turning on the Kth signal selection switch. When the Kth signal selection switch is turned on, a shielding voltage VS can be applied to the (K-1)th sensing channel and the (K+1)th sensing channel by turning on both the (K-1)th shielding switch and the (K+1)th shielding switch.
[0088] Furthermore, the Kth sensing control signal among the multiple sensing control signals SW_SIG can be activated to turn on the Kth signal selection switch. When the Kth sensing control signal is activated, both the (K-1)th and (K+1)th shielding control signals among the multiple shielding control signals SW_VS can be activated to turn on both the (K-1)th and (K+1)th shielding switches.
[0089] For example, such as Figure 5A and Figure 5E As shown, the first initialization switch 212a to the fourth initialization switch 212d can be turned on by activating the initialization control signal SW_DISP during the first time interval T11, and the first sensing line S1 to the fourth sensing line S4 can be initialized with the initialization voltage VINIT.
[0090] During the first time interval T11, a constant data voltage (e.g., Figure 3 The VD in the image is applied to the driving transistor in each pixel (e.g., VD). Figure 3 In the driving transistor TD, the voltage between the gate electrode and the source electrode of the TD can be kept constant (e.g., VGS = VD - VINIT), thus a constant current can be generated and output from the driving transistor TD. For example, as Figure 5B , Figure 5C and Figure 5D As shown, the first pixel current IPIX1, the second pixel current IPIX2, the third pixel current IPIX3, and the fourth pixel current IPIX4 can be output from the first pixel PX1 to the fourth pixel PX4, respectively.
[0091] Subsequently, as Figure 5B and Figure 5E As shown, the initialization control signal SW_DISP can be deactivated after the first time interval T11. During the second time interval T12 following the first time interval T11, the first signal selection switch 232a can be turned on by activating the first sensing control signal SW_SIG1, and the first sensing line S1 can be electrically connected to the first input terminal of the operational amplifier 310. Additionally, during the second time interval T12, the second shielding switch 222b can be turned on by activating the second shielding control signal SW_VS2, and a shielding voltage VS can be applied to the second sensing line S2. In other words, during the second time interval T12, the first sensing line S1 can be selected as or set as the target sensing channel, and the second sensing line S2 can be selected as or set as the shielded sensing channel. Only the second sensing line S2 can be set as the shielded sensing channel for the first sensing line S1.
[0092] During the second time interval T12, the first pixel current IPIX1 received through the first sensing line S1 can be provided to the first input terminal of the operational amplifier 310 as the first sensing current ISIG1. The reset switch 320 can be turned on to reset the signal current integrator 300, and then the reset switch 320 can be turned off to begin current integration relative to the first sensing current ISIG1. The first sensing current ISIG1 can be converted into a first sensing voltage VSIG1 through current integration. The first sensing voltage VSIG1 can represent a characteristic of the first pixel PIX1.
[0093] Subsequently, as Figure 5C and Figure 5EAs shown, the first sensing control signal SW_SIG1 and the second shielding control signal SW_VS2 can be deactivated after the second time interval T12. During the third time interval T13 after the second time interval T12, the second signal selection switch 232b, the first shielding switch 222a, and the third shielding switch 222c can be turned on by activating the second sensing control signal SW_SIG2, the first shielding control signal SW_VS1, and the third shielding control signal SW_VS3. The second sensing line S2 can be selected as or set as the target sensing channel, and the first sensing line S1 and the third sensing line S3 can be selected as or set as shielded sensing channels. In addition, during the third time interval T13, the second pixel current IPIX2 received through the second sensing line S2 can be provided as the second sensing current ISIG2, and the second sensing current ISIG2 can be converted into the second sensing voltage VSIG2 by performing current integration.
[0094] Similarly, such as Figure 5D and Figure 5E As shown, the second sensing control signal SW_SIG2, the first shielding control signal SW_VS1, and the third shielding control signal SW_VS3 can be deactivated after the third time interval T13. During the fourth time interval T14 after the third time interval T13, the third signal selection switch 232c, the second shielding switch 222b, and the fourth shielding switch 222d can be turned on by activating the third sensing control signal SW_SIG3, the second shielding control signal SW_VS2, and the fourth shielding control signal SW_VS4. The third sensing line S3 can be selected as or set as the target sensing channel, and the second sensing line S2 and the fourth sensing line S4 can be selected as or set as shielding sensing channels. In addition, during the fourth time interval T14, the third pixel current IPIX3 received through the third sensing line S3 can be provided as the third sensing current ISIG3, and the third sensing current ISIG3 can be converted into the third sensing voltage VSIG3 by performing current integration.
[0095] In the manner described above, sensing operations can be performed sequentially from the first sensing line S1 to the Xth sensing line, which is the last sensing line. For example, when the Xth sensing line is selected or set as the target sensing channel, only the (X-1)th sensing line can be selected or set as the shielded sensing channel.
[0096] Furthermore, after performing a sensing operation on the pixel connected to the first scan line G1 in the manner described above, sensing operations can be performed sequentially on the pixels connected to the remaining scan lines (e.g., scan lines G2 to GN). As a result, all sensing operations for multiple pixels PX can be performed and completed sequentially.
[0097] Based on Figure 5CDescribing coupling noise. When the second sensing line S2 is selected or set as the target sensing channel, the second sensing line S2 can be connected to the first input terminal of the signal current integrator 300 (e.g., operational amplifier 310), so the voltage level on the second sensing line S2 can remain constant. Conversely, the first sensing line S1 and the third sensing line S3 adjacent to the second sensing line S2 can be floated, so when the first pixel current IPIX1 and the third pixel current IPIX3 are received from the first pixel PX1 and the third pixel PX3, the load capacitor CLOAD (the parasitic capacitance component of the first sensing line S1 and the third sensing line S3) can be charged. In this case, the voltage level on the first sensing line S1 and the third sensing line S3 can continuously increase, so coupling noise can occur due to the coupling capacitance of the second sensing line S2. If coupling noise occurs, output noise may occur at the output of the integrator (e.g., signal current integrator 300), so the performance of the integrator may deteriorate or be degraded. For example, the signal-to-noise ratio (SNR) of the integrator can deteriorate or worsen because the feedback factor β used to determine the closed-loop gain of the integrator is small and the integrator is sensitive to input noise. The effective noise bandwidth (ENBW) of the integrator can be obtained based on Equations 1, 2, and 3.
[0098] [Equation 1]
[0099]
[0100] [Equation 2]
[0101]
[0102] [Equation 3]
[0103]
[0104] In equations 1, 2, and 3, A O W represents the open-loop gain of the integrator. 3dB This represents the 3dB frequency of the integrator, β = C. F / (C F +C L ), C L C represents the parasitic capacitance of the sensing line. F This indicates the capacitance of feedback capacitor 330.
[0105] It can be seen that the output noise distribution is inversely proportional to the feedback factor β. Because C L This represents the parasitic capacitance of the sensing line, and therefore it can have a relatively large value. Conversely, due to C... F The value is less than C LTherefore, input noise can significantly affect SNR performance. Thus, when driving the second sensing line S2, the first sensing line S1 and the third sensing line S3 adjacent to the second sensing line S2 can be maintained at the shielding voltage VS to remove coupling noise from adjacent sensing lines. The shielding voltage VS can be used as a voltage separate from the initialization voltage VINIT, because the initialization voltage VINIT is connected to the second input terminal of the operational amplifier 310, and when the initialization voltage VINIT fluctuates, output noise also occurs at the output of the integrator.
[0106] In some exemplary embodiments, the voltage level of the shielding voltage VS can be substantially equal to the voltage level of the initialization voltage VINIT. In other words, the shielding voltage VS and the initialization voltage VINIT can be different voltages, but they can also have the same voltage level. However, the exemplary embodiments are not limited to this, and the voltage levels of the initialization voltage VINIT and the shielding voltage VS can be changed according to the exemplary embodiments.
[0107] Figure 6 It is shown Figure 1 A circuit diagram of another example of a sensing circuit. (Compared to...) Figure 4 and Figure 5D Repeated descriptions will be considered redundant and omitted.
[0108] Reference Figure 6 The sensing circuit may be included in the data driver 724 and may be connected to the pixels and sensing lines included in the display panel 714.
[0109] Figure 6 The circuit structure can be compared with Figure 4 The circuit structure is basically the same, except that the display panel 714 also includes a fifth pixel PX5 connected to the fifth sensing line S5 and outputting the fifth pixel current IPIX5, and the sensing circuit also includes a fifth initialization switch 212e, a fifth shielding switch 222e and a fifth signal selection switch 232e connected to the fifth sensing line S5.
[0110] exist Figure 6 The example shown illustrates selecting or setting two sensing channels adjacent to the target sensing channel in a first direction and two sensing channels adjacent to the target sensing channel in a second direction as shielded sensing channels.
[0111] In other words, the multiple sensing channels SCH may include a first sensing channel to a Yth sensing channel, where Y is a natural number greater than or equal to five. When the Jth sensing channel is selected or set as the target sensing channel from the first sensing channel to the Yth sensing channel (where J is a natural number greater than or equal to three and less than or equal to (Y-2)), two sensing channels from the first sensing channel to the (J-1)th sensing channel included in the first sensing channel to the Yth sensing channel (e.g., the (J-2)th sensing channel and the (J-1)th sensing channel) and two sensing channels from the (J+1)th sensing channel to the Yth sensing channel included in the first sensing channel to the Yth sensing channel (e.g., the (J+1)th sensing channel and the (J+2)th sensing channel) can be selected or set as at least one masked sensing channel.
[0112] For example, such as Figure 6 As shown, the third signal selection switch 232c can be turned on by activating the third sensing control signal applied to it, and the third sensing line S3 can be selected as or set as the target sensing channel. Additionally, the first shielding switch 222a, the second shielding switch 222b, the fourth shielding switch 222d, and the fifth shielding switch 222e can be turned on by activating the first shielding control signal, the second shielding control signal, the fourth shielding control signal, and the fifth shielding control signal applied to it, and the first sensing line S1, the second sensing line S2, the fourth sensing line S4, and the fifth sensing line S5 can be selected as or set as the shielded sensing channel.
[0113] Although not shown in detail, when in Figure 6 In the example, when the first sensing line S1 is selected or set as the target sensing channel, the second sensing line S2 and the third sensing line S3 can be selected or set as the shielded sensing channels. Figure 6 In the example, when the second sensing line S2 is selected or set as the target sensing channel, the first sensing line S1, the third sensing line S3, and the fourth sensing line S4 can be selected or set as the shielded sensing channel.
[0114] Although Figure 4 and Figure 6 An example is shown where one or two sensing channels adjacent to the target sensing channel in a first direction and one or two sensing channels adjacent to the target sensing channel in a second direction are selected or configured as shielded sensing channels, but exemplary embodiments are not limited thereto. For example, three or more sensing channels adjacent to the target sensing channel in the first direction and three or more sensing channels adjacent to the target sensing channel in the second direction may be selected or configured as shielded sensing channels. Alternatively, all remaining sensing channels other than the target sensing channel may be selected or configured as shielded sensing channels.
[0115] Figure 7 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment. Figure 1 Repeated descriptions will be considered redundant and omitted.
[0116] Reference Figure 7 The sensing circuit 102 includes a switching circuit 200 and a signal current integrator 300. The sensing circuit 102 may also include a control signal generator 400.
[0117] Figure 7 The sensing circuit 102 can be connected with Figure 1 The sensing circuit 102 is basically the same as the sensing circuit 100, except that the sensing circuit 102 also includes a control signal generator 400.
[0118] The control signal generator 400 can generate an initialization control signal SW_DISP, multiple masking control signals SW_VS, and multiple sensing control signals SW_SIG. For example, the timing sequence of the initialization control signal SW_DISP, the multiple masking control signals SW_VS, and the multiple sensing control signals SW_SIG can be found in [reference needed]. Figure 5E Descriptive implementation to drive Figure 4 The sensing circuit, or can be implemented as a driver Figure 6 The sensing circuit.
[0119] Figure 8A It is shown Figure 7 A block diagram of an example of a control signal generator included in a sensing circuit. Figure 8B It is used to describe Figure 8A A diagram illustrating the operation of the control signal generator.
[0120] Reference Figure 8A and Figure 8B The control signal generator 402 may include: multiple shift registers 412a, 412b and 412c; multiple level shifters 422a, 422b and 422c; and multiple high-voltage (HV) logic 432a, 432b and 432c.
[0121] Figure 8A The control signal generator 402 can be implemented as a driver Figure 4 The sensing circuit. For ease of illustration, only three shift registers, three level shifters, and three high-voltage logic circuits are shown.
[0122] Multiple shift registers 412a, 412b, and 412c may be connected in series (or cascaded) and may operate based on a sensed reset signal CSEN_RSTb, a sensed enable signal CSEN_EN, and a sensed clock signal CSEN_CK. For example, the multiple shift registers 412a, 412b, and 412c may include elements for low voltage (LV).
[0123] Multiple level shifters 422a, 422b, and 422c can perform level changes on the outputs of multiple shift registers 412a, 412b, and 412c (e.g., signals corresponding to SOUT1, SOUT2, and SOUT3). For example, the outputs of multiple shift registers 412a, 412b, and 412c, which are low-voltage signals, can be level-shifted to high-voltage signals by multiple level shifters 422a, 422b, and 422c.
[0124] Multiple high-voltage logics 432a, 432b, and 432c can generate multiple sensing control signals SW_SIG1, SW_SIG2, and SW_SIG3, and multiple shielding control signals SW_VS1, SW_VS2, and SW_VS3, based on the outputs of multiple level shifters 422a, 422b, and 422c. For example, the multiple high-voltage logics 432a, 432b, and 432c may include elements for high voltage.
[0125] like Figure 8B As shown, the sense reset signal CSEN_RSTb can first be activated low to reset the shift register, and then the sense enable signal CSEN_EN can be activated high to begin the sense operation. When the sense clock signal CSEN_CK is activated high, each of time intervals T12, T13, and T14 can begin, and the shift register operates sequentially. Figure 8B The operations during time intervals T12, T13, and T14 can be respectively compared with those in... Figure 5E The operations during time intervals T12, T13, and T14 are essentially the same.
[0126] Figure 9 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment. Figure 1 Repeated descriptions will be considered redundant and omitted.
[0127] Reference Figure 9 The sensing circuit 104 includes a switching circuit 204 and a signal current integrator 300. The sensing circuit 104 may also include a reference current integrator 500.
[0128] Figure 9 The sensing circuit 104 can be connected with Figure 1The sensing circuit 104 is basically the same as the sensing circuit 100, except that the sensing circuit 104 is implemented with a differential sensing scheme. The switching circuit 204 also includes a reference selection circuit 240, and the sensing circuit 104 also includes a reference current integrator 500.
[0129] The reference selection circuit 240 may include a plurality of reference selection switches 242. The plurality of reference selection switches 242 may sequentially output a plurality of pixel currents IPIX received from a plurality of sensing channels SCH as a plurality of reference currents IREF based on a plurality of reference sensing control signals SW_REF. For example, the plurality of reference selection switches 242 may be sequentially turned on based on the plurality of reference sensing control signals SW_REF, and only one reference selection switch may be turned on at a specific time. The plurality of reference currents IREF may be sequentially provided to the reference current integrator 500. Two adjacent sensing lines may operate as a pair of differential sensing lines. When one of the pair of differential sensing lines is selected or set as a target sensing channel, the other sensing line of the pair of differential sensing lines may be selected or set as a reference sensing channel corresponding to the target sensing channel.
[0130] The reference current integrator 500 can sequentially convert multiple reference currents IREF into multiple reference voltages VREF, and can sequentially generate and output multiple reference voltages VREF. A single reference current integrator 500 can be shared by multiple sensing channels SCH. Currents ISIG and IREF and / or voltages VSIG and VREF can be a pair of differential signals.
[0131] In some exemplary embodiments, the configurations of the reference selection circuit 240 and the reference current integrator 500 may be substantially the same as those of the signal selection circuit 230 and the signal current integrator 300, respectively.
[0132] Figure 10 It is shown Figure 9 A circuit diagram of an example sensing circuit. (Compared to...) Figure 4 Repeated descriptions will be considered redundant and omitted.
[0133] Reference Figure 10 The sensing circuit may be included in the data driver 726 and may be connected to the pixels and sensing lines included in the display panel 716. For ease of illustration, only the portion of the sensing circuit connected to six pixels and six sensing lines is shown.
[0134] The first pixel PX1, the second pixel PX2, the third pixel PX3, the fourth pixel PX4, the fifth pixel PX5, and the sixth pixel PX6 can be connected to the first scan line G1, and can be connected to the first sensing line S1, the second sensing line S2, the third sensing line S3, the fourth sensing line S4, the fifth sensing line S5, and the sixth sensing line S6, respectively. The first sensing line S1 and the second sensing line S2 can operate as a pair of differential sensing lines, the third sensing line S3 and the fourth sensing line S4 can operate as a pair of differential sensing lines, and the fifth sensing line S5 and the sixth sensing line S6 can operate as a pair of differential sensing lines.
[0135] The sensing circuit may include a first initialization switch 212a, a second initialization switch 212b, a third initialization switch 212c, a fourth initialization switch 212d, a fifth initialization switch 212e, and a sixth initialization switch 212f; a first shielding switch 222a, a second shielding switch 222b, a third shielding switch 222c, a fourth shielding switch 222d, a fifth shielding switch 222e, and a sixth shielding switch 222f; a first signal selection switch 232a, a second signal selection switch 232b, a third signal selection switch 232c, a fourth signal selection switch 232d, a fifth signal selection switch 232e, and a sixth signal selection switch 232f; a first reference selection switch 242a, a second reference selection switch 242b, a third reference selection switch 242c, a fourth reference selection switch 242d, a fifth reference selection switch 242e, and a sixth reference selection switch 242f; operational amplifiers 310 and 410; reset switches 320 and 420; and feedback capacitors 330 and 430.
[0136] The configuration of the first initialization switches 212a to the fourth initialization switches 212d, the first shielding switches 222a to the fourth shielding switches 222d, the first signal selection switches 232a to the fourth signal selection switches 232d, the operational amplifier 310, the reset switch 320, and the feedback capacitor 330 can be referenced. Figure 4 The configurations described are basically the same.
[0137] The fifth initialization switch 212e can be connected between the fifth sensing line S5 and the initialization voltage VINIT. The sixth initialization switch 212f can be connected between the sixth sensing line S6 and the initialization voltage VINIT. The fifth shielding switch 222e can be connected between the fifth sensing line S5 and the shielding voltage VS. The sixth shielding switch 222f can be connected between the sixth sensing line S6 and the shielding voltage VS. The fifth signal selection switch 232e can be connected between the fifth sensing line S5 and the first input terminal of the operational amplifier 310. The sixth signal selection switch 232f can be connected between the sixth sensing line S6 and the first input terminal of the operational amplifier 310.
[0138] The first reference selection switch 242a can be connected between the first sensing line S1 and the first input terminal (e.g., the negative (-) input terminal) of the operational amplifier 410. The second reference selection switch 242b can be connected between the second sensing line S2 and the first input terminal of the operational amplifier 410. The third reference selection switch 242c can be connected between the third sensing line S3 and the first input terminal of the operational amplifier 410. The fourth reference selection switch 242d can be connected between the fourth sensing line S4 and the first input terminal of the operational amplifier 410. The fifth reference selection switch 242e can be connected between the fifth sensing line S5 and the first input terminal of the operational amplifier 410. The sixth reference selection switch 242f can be connected between the sixth sensing line S6 and the first input terminal of the operational amplifier 410.
[0139] Operational amplifier 410 may include: a first input terminal connected to a first reference selection switch 242 through a sixth reference selection switch 242f to sequentially receive a plurality of reference currents IREF; a second input terminal (e.g., a positive (+) input terminal) receiving an initialization voltage VINIT; and an output terminal sequentially outputting a plurality of reference voltages VREF. A reset switch 420 may be connected between the first input terminal and the output terminal of operational amplifier 410. A feedback capacitor 430 may be connected in parallel with the reset switch 420 between the first input terminal and the output terminal of operational amplifier 410. Operational amplifier 410, reset switch 420, and feedback capacitor 430 may form a... Figure 9 The reference current integrator 500 in the middle.
[0140] Figure 11A , Figure 11B , Figure 11C , Figure 11D , Figure 11E and Figure 11F It is used to describe Figure 10 A diagram illustrating the operation of the sensing circuit. (And...) Figure 5A , Figure 5B , Figure 5C , Figure 5D and Figure 5E Repeated descriptions will be considered redundant and omitted.
[0141] exist Figure 11FIn this context, "SW_DISP" represents the initialization control signal applied to the first initialization switch 212a through the sixth initialization switch 212f; "SW_VS1", "SW_VS2", "SW_VS3", "SW_VS4", "SW_VS5", and "SW_VS6" represent the first, second, third, fourth, fifth, and sixth shielding control signals applied to the first shielding switch 222a through the sixth shielding switch 222f, respectively; and "SW_SIG1", "SW_SIG2", "SW_SIG3", "SW_SIG4", "SW_SIG5", and "SW_SIG6" represent the initialization control signals applied to the first shielding switch 222a through the sixth shielding switch 222f, respectively. The first, second, third, fourth, fifth, and sixth sensing control signals are applied to the first signal selection switch 232a through the sixth signal selection switch 232f, respectively. Furthermore, “SW_REF1”, “SW_REF2”, “SW_REF3”, “SW_REF4”, “SW_REF5”, and “SW_REF6” respectively represent the first, second, third, fourth, fifth, and sixth reference sensing control signals applied to the first, second, third, fourth, fifth, and sixth reference sensing control signals, respectively.
[0142] Reference Figure 11A , Figure 11B , Figure 11C , Figure 11D , Figure 11E and Figure 11F An example is shown in which two sensing channels (e.g., a pair of differential sensing channels) adjacent to a pair of target differential sensing channels including a target sensing channel in a first direction and two sensing channels adjacent to a pair of target differential sensing channels in a second direction are selected or set as shielded sensing channels.
[0143] In other words, the multiple sensing channels SCH may include a first sensing channel to a Zth sensing channel, where Z is an even natural number greater than or equal to six. When a Pth sensing channel is selected or set as the target sensing channel from the first sensing channel to the Zth sensing channel (where P is an odd natural number greater than or equal to three and less than or equal to (Z-3)), a (P+1)th sensing channel may be selected or set as the reference sensing channel from the first sensing channel to the Zth sensing channel, and a (P-2)th sensing channel, a (P-1)th sensing channel, a (P+2)th sensing channel, and a (P+3)th sensing channel may be selected or set as at least one shielding sensing channel from the first sensing channel to the Zth sensing channel.
[0144] Additionally, the plurality of signal selection switches 232 may include a P-th signal selection switch connected to the P-th sensing channel, the plurality of reference selection switches 242 may include a (P+1)-th reference selection switch connected to the (P+1)-th sensing channel, and the plurality of shield switches may include a (P-2)-th shield switch connected to the (P-2)-th sensing channel, a (P-1)-th shield switch connected to the (P-1)-th sensing channel, a (P+2)-th shield switch connected to the (P+2)-th sensing channel, and a (P+3)-th shield switch connected to the (P+3)-th sensing channel. The P-th sensing current received from the P-th sensing channel in the plurality of sensing currents ISIG can be provided to the signal current integrator 300 by turning on the P-th signal selection switch. The P-th reference current received from the (P+1)-th sensing channel in the plurality of reference currents IEF can be provided to the reference current integrator 500 by turning on the (P+1)-th reference selection switch. When both the P signal selection switch and the (P+1) reference selection switch are turned on, the shielding voltage VS can be applied to the (P-2) sensing channel, the (P-1) sensing channel, the (P+2) sensing channel, and the (P+3) sensing channel by turning on all the shielding switches, including the (P-2) shielding switch, the (P-1) shielding switch, the (P+2) shielding switch, and the (P+3) shielding switch.
[0145] In addition, the Pth sensing control signal among multiple sensing control signals SW_SIG can be activated to turn on the Pth signal selection switch. The (P+1)th reference sensing control signal among multiple reference sensing control signals SW_REF can be activated to turn on the (P+1)th reference selection switch. When both the Pth sensing control signal and the (P+1)th reference sensing control signal are turned on, all the (P-2), (P-1), (P+2), and (P+3)th shielding control signals among multiple shielding control signals SW_VS can be activated to turn on the (P-2), (P-1), (P+2), and (P+3)th shielding switches.
[0146] Furthermore, after performing the Pth sensing operation by selecting the Pth sensing channel as the target sensing channel and selecting the (P+1)th sensing channel as the reference sensing channel, the (P+1)th sensing operation can be performed by selecting the (P+1)th sensing channel as the target sensing channel and selecting the Pth sensing channel as the reference sensing channel. During the (P+1)th sensing operation, the (P-2)th, (P-1)th, (P+2)th, and (P+3)th sensing channels can remain as at least one masked sensing channel.
[0147] For example, such as Figure 11A and Figure 11FAs shown, the first initialization switch 212a to the sixth initialization switch 212f can be turned on by activating the initialization control signal SW_DISP during the first time interval T21. Therefore, the first sensing line S1 to the sixth sensing line S6 can be initialized with the initialization voltage VINIT, and the first pixel current IPIX1, the second pixel current IPIX2, the third pixel current IPIX3, the fourth pixel current IPIX4, the fifth pixel current IPIX5, and the sixth pixel current IPIX6 can be output from the first pixel PX1 to the sixth pixel PX6, respectively.
[0148] Then, as Figure 11B and Figure 11F As shown, during the second time interval T22 following the first time interval T21, the first signal selection switch 232a and the second reference selection switch 242b can be turned on by activating the first sensing control signal SW_SIG1 and the second reference sensing control signal SW_REF2. Therefore, the first sensing line S1 can be selected as or set as the target sensing channel, and the second sensing line S2 can be selected as or set as the reference sensing channel. Additionally, during the second time interval T22, the third shielding switch 222c and the fourth shielding switch 222d can be turned on by activating the third shielding control signal SW_VS3 and the fourth shielding control signal SW_VS4. Therefore, the third sensing line S3 and the fourth sensing line S4 can be selected as shielded sensing channels. The first pixel current IPIX1 received through the first sensing line S1 can be provided as the first sensing current ISIG1, and the second pixel current IPIX2 received through the second sensing line S2 can be provided as the first reference current IREF1. The first sensing current ISIG1 and the first reference current IREF1 can be converted into the first sensing voltage VSIG1 and the first reference voltage VREF1, respectively, by performing current integration.
[0149] Then, as Figure 11C and Figure 11FAs shown, during the third time interval T23 following the second time interval T22, the second signal selection switch 232b and the first reference selection switch 242a can be turned on by activating the second sensing control signal SW_SIG2 and the first reference sensing control signal SW_REF1. Therefore, the second sensing line S2 can be selected as or set as the target sensing channel, and the first sensing line S1 can be selected as or set as the reference sensing channel. The activation of the third shielding control signal SW_VS3 and the fourth shielding control signal SW_VS4 and the turning on of the third shielding switch 222c and the fourth shielding switch 222d can be maintained, and the third sensing line S3 and the fourth sensing line S4 can remain as shielded sensing channels. The second pixel current IPIX2 can be provided as the second sensing current ISIG2, and the first pixel current IPIX1 can be provided as the second reference current IREF2. The second sensing current ISIG2 and the second reference current IREF2 can be converted into the second sensing voltage VSIG2 and the second reference voltage VREF2 respectively by performing current integration.
[0150] Similarly, such as Figure 11D and Figure 11F As shown, during the fourth time interval T24 following the third time interval T23, the third signal selection switch 232c and the fourth reference selection switch 242d can be turned on by activating the third sensing control signal SW_SIG3 and the fourth reference sensing control signal SW_REF4. Therefore, the third sensing line S3 and the fourth sensing line S4 can be selected as or set as the target sensing channel and the reference sensing channel, respectively. Additionally, during the fourth time interval T24, the first shielding switch 222a, the second shielding switch 222b, the fifth shielding switch 222e, and the sixth shielding switch 222f can be turned on by activating the first shielding control signal SW_VS1, the second shielding control signal SW_VS2, the fifth shielding control signal SW_VS5, and the sixth shielding control signal SW_VS6. Therefore, the first sensing line S1, the second sensing line S2, the fifth sensing line S5, and the sixth sensing line S6 can be selected as or set as shielded sensing channels. A third pixel current IPIX3 can be provided as the third sensing current ISIG3, and a fourth pixel current IPIX4 can be provided as the third reference current IREF3. The third sensing current ISIG3 and the third reference current IREF3 can be converted into the third sensing voltage VSIG3 and the third reference voltage VREF3 respectively by performing current integration.
[0151] Then, as Figure 11E and Figure 11FAs shown, during the fifth time interval T25 following the fourth time interval T24, the fourth signal selection switch 232d and the third reference selection switch 242c can be turned on by activating the fourth sensing control signal SW_SIG4 and the third reference sensing control signal SW_REF3. Therefore, the fourth sensing line S4 and the third sensing line S3 can be selected as or set as the target sensing channel and the reference sensing channel, respectively. The first sensing line S1, the second sensing line S2, the fifth sensing line S5, and the sixth sensing line S6 can remain as shielded sensing channels. The fourth pixel current IPIX4 can be provided as the fourth sensing current ISIG4, and the third pixel current IPIX3 can be provided as the fourth reference current IREF4. The fourth sensing current ISIG4 and the fourth reference current IREF4 can be converted into the fourth sensing voltage VSIG4 and the fourth reference voltage VREF4, respectively, by performing current integration.
[0152] Figure 12 It is shown Figure 9 A circuit diagram of another example of a sensing circuit. (Compared to...) Figure 10 and Figure 11D Repeated descriptions will be considered redundant and omitted.
[0153] Reference Figure 12 The sensing circuit may be included in the data driver 728 and may be connected to the pixels and sensing lines included in the display panel 718. Figure 12 The circuit structure can be compared with Figure 10 The circuit structures are basically the same.
[0154] exist Figure 12 The example shown illustrates a sensing channel adjacent to a pair of target differential sensing channels including a target sensing channel in a first direction and a sensing channel adjacent to a pair of target differential sensing channels in a second direction, which is selected or set as a masked sensing channel.
[0155] In other words, the multiple sensing channels SCH may include a first sensing channel to a Zth sensing channel, where Z is an even natural number greater than or equal to six. When a Pth sensing channel is selected or set as the target sensing channel from the first sensing channel to the Zth sensing channel (where P is an odd natural number greater than or equal to three and less than or equal to (Z-3)), a (P+1)th sensing channel may be selected or set as the reference sensing channel from the first sensing channel to the Zth sensing channel. One of the first sensing channels to the (P-1)th sensing channels included in the first sensing channel to the Zth sensing channel (e.g., the (P-1)th sensing channel) and one of the (P+2)th sensing channels to the Zth sensing channel included in the first sensing channel to the Zth sensing channel (e.g., the (P+2)th sensing channel) may be selected or set as at least one shielded sensing channel.
[0156] For example, such as Figure 12 As shown, the third sensing line S3 and the fourth sensing line S4 can be selected as or set as the target sensing channel and the reference sensing channel, respectively. In addition, the second sensing line S2 and the fifth sensing line S5 can be selected as or set as the shielded sensing channel.
[0157] The number of shielded sensing channels can be changed according to an exemplary embodiment.
[0158] Figure 13 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment. Figure 7 and Figure 9 Repeated descriptions will be considered redundant and omitted.
[0159] Reference Figure 13 The sensing circuit 106 includes a switching circuit 204, a signal current integrator 300, and a reference current integrator 500. The sensing circuit 106 may also include a control signal generator 450.
[0160] Figure 13 The sensing circuit 106 can be connected with Figure 9 The sensing circuit 106 is basically the same as the sensing circuit 104, except that the sensing circuit 106 also includes a control signal generator 450.
[0161] The control signal generator 450 can generate an initialization control signal SW_DISP, multiple masking control signals SW_VS, multiple sensing control signals SW_SIG, and multiple reference sensing control signals SW_REF.
[0162] Figure 14A It is shown Figure 13 A block diagram of an example of a control signal generator included in a sensing circuit. Figure 14B It is used to describe Figure 14A A diagram illustrating the operation of the control signal generator. (Compared to...) Figure 8A and Figure 8B Repeated descriptions will be considered redundant and omitted.
[0163] Reference Figure 14A and Figure 14B The control signal generator 452 may include multiple shift registers 462a, 462b, 462c and 462d, multiple level shifters 472a, 472b, 472c and 472d, and multiple high-voltage logic 482a, 482b, 482c and 482d.
[0164] Figure 14A The control signal generator 452 can be implemented as a driver Figure 10 The sensing circuitry. For ease of illustration, only four shift registers, four level shifters, and four high-voltage logic circuits are shown.
[0165] Multiple shift registers 462a, 462b, 462c, and 462d can be connected in series (or cascaded) and can operate based on the sensed reset signal CSEN_RSTb, the sensed enable signal CSEN_EN, and the sensed clock signal CSEN_CK. Multiple level shifters 472a, 472b, 472c, and 472d can perform level changes on the outputs of multiple shift registers 462a, 462b, 462c, and 462d (e.g., signals corresponding to SOUT1, SOUT2, SOUT3, and SOUT4). Multiple high-voltage logics 482a, 482b, 482c, and 482d can generate multiple sensing control signals SW_SIG1, SW_SIG2, SW_SIG3, and SW_SIG4, multiple reference sensing control signals SW_REF1, SW_REF2, SW_REF3, and SW_REF4, and multiple shielding control signals SW_VS1, SW_VS2, SW_VS3, and SW_VS4 based on the outputs of multiple level shifters 472a, 472b, 472c, and 472d.
[0166] exist Figure 14B In this context, the operation of the sensing reset signal CSEN_RSTb, the sensing enable signal CSEN_EN, and the sensing clock signal CSEN_CK can be compared with the reference. Figure 8B The operations described are essentially the same, and the operations during time intervals T22, T23, T24, and T25 can be respectively compared with those in... Figure 11F The operations in time intervals T22, T23, T24, and T25 are basically the same.
[0167] Figure 15 This is a block diagram illustrating a sensing circuit according to an exemplary embodiment. Figure 1 Repeated descriptions will be considered redundant and omitted.
[0168] Reference Figure 15 The sensing circuit 108 includes a switching circuit 200 and a signal current integrator 300. The sensing circuit 108 may also include an analog-to-digital converter 600.
[0169] Figure 15 The sensing circuit 108 can be connected with Figure 1 The sensing circuit 108 is basically the same as the sensing circuit 100, except that the sensing circuit 108 also includes an analog-to-digital converter 600.
[0170] The analog-to-digital converter 600 can convert multiple sensed voltages VSIG into multiple digital codes DCODE.
[0171] In some exemplary embodiments, Figure 7 Sensing circuit 102, Figure 9 The sensing circuit 104 and Figure 13The sensing circuit 106 may also include an analog-to-digital converter.
[0172] Figure 16 This is a diagram used to illustrate the performance of a sensing circuit according to an exemplary embodiment.
[0173] Reference Figure 16 CASE1 represents a conventional serial current sensing scheme, and CASE2 represents an example of applying or employing an active shielding scheme according to an exemplary embodiment for the serial current sensing scheme. It can be seen that when the active shielding scheme is applied, the offset error ERROR LSB of channel CH# decreases.
[0174] Figure 17 This is a flowchart illustrating a method for detecting features of a display panel according to an exemplary embodiment.
[0175] Reference Figure 1 and Figure 17 In the method for detecting features of a display panel according to an exemplary embodiment, an initialization voltage VINIT is applied to a plurality of sensing channels SCH based on an initialization control signal SW_DISP (step S100). A plurality of sensing currents ISIG received from the plurality of sensing channels SCH are sequentially output based on a plurality of sensing control signals SW_SIG (step S200). A shielding voltage VS is applied to at least one shielded sensing channel adjacent to a target sensing channel based on a plurality of shielding control signals SW_VS (step S300). The plurality of sensing currents ISIG are sequentially converted into a plurality of sensing voltages VSIG (step S400).
[0176] Steps S100, S200, S300, and S400 can be executed respectively through the initialization circuit 210, the shielding circuit 220, the signal selection circuit 230, and the signal current integrator 300. For each sensing line, steps S200, S300, and S400 can be executed substantially simultaneously or sequentially.
[0177] Figure 18 This is a block diagram illustrating an electronic system according to an exemplary embodiment.
[0178] Reference Figure 18 The electronic system 1000 may include a processor 1010, a memory device 1020, a connector 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. The electronic system 1000 may also include multiple ports for communicating with video cards, sound cards, memory cards, universal serial bus (USB) devices, and other electronic devices.
[0179] Processor 1010 controls the operation of electronic system 1000. Processor 1010 can execute an operating system and at least one application program to provide an internet browser, games, videos, etc. Memory device 1020 can store data used for the operation of electronic system 1000. Connector 1030 can be coupled to external devices and / or systems. I / O device 1040 can include input devices such as a keyboard, keypad, mouse, touchpad, touch screen, remote control, etc., and output devices such as a printer, speaker, etc. Power supply 1050 can provide electricity for the operation of electronic system 1000.
[0180] Display device 1060 may include a display panel and a display driver integrated circuit. Display device 1060 and display driver integrated circuit may be a display device and a display driver integrated circuit, respectively, according to exemplary embodiments. The display driver integrated circuit may include sensing circuitry 1062 for detecting features of a plurality of pixels and may perform a method for detecting features of the display panel according to exemplary embodiments.
[0181] The present invention can be applied to a variety of electronic devices and systems, including display devices. For example, the present invention can be applied to systems such as personal computers (PCs), server computers, data centers, workstations, mobile phones, smartphones, tablet computers, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, portable game consoles, music players, camcorders, video players, navigation devices, wearable devices, Internet of Things (IoT) devices, Internet of Things (IoE) devices, e-book readers, virtual reality (VR) devices, augmented reality (AR) devices, robotic devices, drones, and the like.
[0182] The foregoing is illustrative of exemplary embodiments and should not be construed as limiting them. While some exemplary embodiments have been described, those skilled in the art will readily understand that many modifications may be made to the exemplary embodiments without substantially departing from the novel teachings and advantages of these exemplary embodiments. Therefore, all such modifications are intended to be included within the scope of the exemplary embodiments defined in the claims. Consequently, it should be understood that the foregoing is illustrative of various exemplary embodiments and should not be construed as limiting to the specific exemplary embodiments disclosed, and modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the scope of the appended claims.
Claims
1. A sensing circuit connected to multiple pixels in a display panel via multiple sensing channels, comprising: Multiple initialization switches are configured to apply an initialization voltage to the multiple sensing channels based on an initialization control signal; Multiple shielding switches are configured to apply a shielding voltage, different from the initialization voltage, to the multiple sensing channels based on multiple shielding control signals; Multiple signal selection switches are configured to sequentially output multiple sensing currents received from the multiple sensing channels based on multiple sensing control signals; as well as A signal current integrator is configured to sequentially convert the plurality of sensed currents into a plurality of sensed voltages, and Specifically, when a target sensing current is detected from a target sensing channel among the plurality of sensing channels, the shielding voltage is applied to the shielded sensing channel adjacent to the target sensing channel among the plurality of sensing channels, wherein: The plurality of sensing channels includes a first sensing channel to an Xth sensing channel, where X is a natural number greater than or equal to three, and When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K-1)th sensing channel and the (K+1)th sensing channel are selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, where K is a natural number greater than or equal to two and less than or equal to (X-1).
2. The sensing circuit according to claim 1, wherein: The plurality of signal selection switches includes a Kth signal selection switch connected to the Kth sensing channel. The plurality of shielding switches includes a (K-1)th shielding switch connected to the (K-1)th sensing channel and a (K+1)th shielding switch connected to the (K+1)th sensing channel. By activating the Kth signal selection switch, the Kth sensing current received from the Kth sensing channel from the plurality of sensing currents is provided to the signal current integrator, and When the Kth signal selection switch is turned on, the shielding voltage is applied to the (K-1)th sensing channel and the (K+1)th sensing channel by turning on both the (K-1)th shielding switch and the (K+1)th shielding switch.
3. The sensing circuit according to claim 2, wherein: The Kth sensing control signal among the plurality of sensing control signals is activated to turn on the Kth signal selection switch, and When the Kth sensing control signal is activated, both the (K-1)th shielding control signal and the (K+1)th shielding control signal among the plurality of shielding control signals are activated to connect both the (K-1)th shielding switch and the (K+1)th shielding switch.
4. The sensing circuit according to claim 1, further comprising: A control signal generator is configured to generate the initialization control signal, the plurality of shielding control signals, and the plurality of sensing control signals.
5. The sensing circuit according to claim 4, wherein, The control signal generator includes: Multiple shift registers connected in series are configured to operate based on a sensed reset signal, a sensed enable signal, and a sensed clock signal; Multiple level shifters configured to perform level changes on the outputs of the multiple shift registers; and Multiple high-voltage logics are configured to generate the multiple sensing control signals and the multiple shielding control signals based on the outputs of the multiple level shifters.
6. The sensing circuit according to claim 1, wherein: X is a natural number greater than or equal to five, and When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, at least two sensing channels from the first sensing channel to the (K-1)th sensing channel included in the first sensing channel to the Xth sensing channel and at least two sensing channels from the (K+1)th sensing channel to the Xth sensing channel included in the first sensing channel to the Xth sensing channel are selected as the shielding sensing channels, where K is a natural number greater than or equal to three and less than or equal to (X-2).
7. The sensing circuit according to claim 1, further comprising: Multiple reference selection switches are configured to sequentially output multiple reference currents received from the multiple sensing channels based on multiple reference sensing control signals; as well as A reference current integrator is configured to sequentially convert the plurality of reference currents into a plurality of reference voltages.
8. The sensing circuit according to claim 7, wherein: X is an even natural number greater than or equal to six, and When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K+1)th sensing channel is selected as the reference sensing channel corresponding to the target sensing channel from the first sensing channel to the Xth sensing channel, and the (K-2)th, (K-1)th, (K+2)th, and (K+3)th sensing channels are selected as the shielding sensing channels from the first sensing channel to the Xth sensing channel, where K is an odd natural number greater than or equal to three and less than or equal to (X-3).
9. The sensing circuit according to claim 8, wherein: The plurality of signal selection switches includes a Kth signal selection switch connected to the Kth sensing channel. The plurality of reference selection switches includes a (K+1)th reference selection switch connected to the (K+1)th sensing channel. The plurality of shielding switches includes a shielding switch connected to the (K-2)th sensing channel, a shielding switch connected to the (K-1)th sensing channel, a shielding switch connected to the (K+2)th sensing channel, and a shielding switch connected to the (K+3)th sensing channel. By activating the Kth signal selection switch, the Kth sensing current received from the Kth sensing channel among the plurality of sensing currents is provided to the signal current integrator. By activating the (K+1)th reference selection switch, the Kth reference current received from the (K+1)th sensing channel is provided to the reference current integrator, and When both the Kth signal selection switch and the (K+1)th reference selection switch are turned on, the shielding voltage is applied to the (K-2)th sensing channel, the (K-1)th sensing channel, the (K+2)th sensing channel, and the (K+3)th sensing channel by turning on all the shielding switches, including the (K-2)th shielding switch, the (K-1)th shielding switch, the (K+2)th shielding switch, and the (K+3)th shielding switch.
10. The sensing circuit according to claim 9, wherein: The Kth sensing control signal among the plurality of sensing control signals is activated to turn on the Kth signal selection switch. The (K+1)th reference sensing control signal among the plurality of reference sensing control signals is activated to turn on the (K+1)th reference selection switch, and When both the Kth sensing control signal and the (K+1)th reference sensing control signal are activated, all of the shielding control signals among the plurality of shielding control signals—the (K-2)th shielding control signal, the (K-1)th shielding control signal, the (K+2)th shielding control signal, and the (K+3)th shielding control signal—are activated to turn on all of the shielding switches, including the (K-2)th shielding switch, the (K-1)th shielding switch, the (K+2)th shielding switch, and the (K+3)th shielding switch.
11. The sensing circuit according to claim 8, wherein: After performing the Kth sensing operation by selecting the Kth sensing channel as the target sensing channel and by selecting the (K+1)th sensing channel as the reference sensing channel, the (K+1)th sensing operation is performed by selecting the (K+1)th sensing channel as the target sensing channel and by selecting the Kth sensing channel as the reference sensing channel. When performing the (K+1)th sensing operation, the (K-2)th sensing channel, the (K-1)th sensing channel, the (K+2)th sensing channel, and the (K+3)th sensing channel remain as the shielded sensing channels.
12. The sensing circuit according to claim 7, further comprising: A control signal generator configured to generate the initialization control signal, the plurality of shielding control signals, the plurality of sensing control signals, and the plurality of reference sensing control signals.
13. The sensing circuit according to claim 12, wherein, The control signal generator includes: Multiple shift registers connected in series are configured to operate based on a sensed reset signal, a sensed enable signal, and a sensed clock signal; Multiple level shifters configured to perform level changes on the outputs of the multiple shift registers; and Multiple high-voltage logics are configured to generate the multiple sensing control signals, the multiple reference sensing control signals, and the multiple shielding control signals based on the outputs of the multiple level shifters.
14. The sensing circuit according to claim 7, wherein: X is an even natural number greater than or equal to six, and When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K+1)th sensing channel is selected as the reference sensing channel corresponding to the target sensing channel from the first sensing channel to the Xth sensing channel, and at least one sensing channel from the first sensing channel to the (K-1)th sensing channel included in the first sensing channel to the Xth sensing channel and at least one sensing channel from the (K+2)th sensing channel to the Xth sensing channel included in the first sensing channel to the Xth sensing channel are selected as the shielding sensing channel, where K is an odd number of natural numbers greater than or equal to three and less than or equal to (X-3).
15. The sensing circuit according to claim 1, wherein, The signal current integrator includes: An operational amplifier includes a first input terminal that sequentially receives the plurality of sensed currents, a second input terminal that receives the initialization voltage, and an output terminal that sequentially outputs the plurality of sensed voltages; A reset switch is connected between the first input terminal and the output terminal of the operational amplifier; and A feedback capacitor is connected in parallel with the reset switch between the first input and output terminals of the operational amplifier.
16. The sensing circuit according to claim 1, further comprising: An analog-to-digital converter is configured to convert the plurality of sensed voltages into a plurality of digital codes.
17. A display driver integrated circuit configured to drive a display panel comprising a plurality of pixels, the display driver integrated circuit comprising: A data driver configured to generate multiple data voltages applied to the plurality of pixels, and including sensing circuitry configured to detect features of the plurality of pixels through multiple sensing channels. The sensing circuit includes: Multiple initialization switches are configured to apply an initialization voltage to the multiple sensing channels based on an initialization control signal; Multiple shielding switches are configured to apply a shielding voltage, different from the initialization voltage, to the multiple sensing channels based on multiple shielding control signals; Multiple signal selection switches are configured to sequentially output multiple sensing currents received from the multiple sensing channels based on multiple sensing control signals; and A signal current integrator is configured to sequentially convert the plurality of sensed currents into a plurality of sensed voltages, and Specifically, when a target sensing current is detected from a target sensing channel among the plurality of sensing channels, the shielding voltage is applied to the shielded sensing channel adjacent to the target sensing channel among the plurality of sensing channels, wherein... The plurality of sensing channels includes a first sensing channel to an Xth sensing channel, where X is a natural number greater than or equal to three, and When the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K-1)th sensing channel and the (K+1)th sensing channel are selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, where K is a natural number greater than or equal to two and less than or equal to (X-1).
18. The display driver integrated circuit of claim 17, further comprising: A timing controller is configured to generate output image data based on input image data, and to generate compensation data based on the plurality of sensed voltages for compensating for degradation associated with features of the plurality of pixels. The data driver is configured to generate the plurality of data voltages based on the output image data and the compensation data.
19. A sensing circuit connected to a plurality of pixels in a display panel via a first sensing channel to an Xth sensing channel, wherein X is a natural number greater than or equal to three, the sensing circuit comprising: A first initialization switch to an Xth initialization switch connected to the first sensing channel to the Xth sensing channel is configured to apply an initialization voltage substantially simultaneously to the first sensing channel to the Xth sensing channel based on an initialization control signal. A first shielding switch to an Xth shielding switch connected to the first sensing channel to the Xth sensing channel is configured to apply a shielding voltage different from the initialization voltage to the first sensing channel to the Xth sensing channel based on a first shielding control signal to an Xth shielding control signal; A first signal selection switch to an Xth signal selection switch connected to the first sensing channel to the Xth sensing channel is configured to sequentially output the first sensing current to the Xth sensing current received from the first sensing channel to the Xth sensing channel based on the first sensing control signal to the Xth sensing control signal; An operational amplifier includes a first input terminal that sequentially receives the first sensed current to the Xth sensed current, a second input terminal that receives the initialization voltage, and an output terminal that sequentially outputs the first sensed voltage to the Xth sensed voltage; A reset switch is connected between the first input terminal and the output terminal of the operational amplifier; as well as A feedback capacitor is connected in parallel with the reset switch between the first input and output terminals of the operational amplifier. The initialization voltage and the shielding voltage have the same voltage level. Specifically, when the first sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, a second sensing channel is selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, and the shielding voltage is applied to the second sensing channel. Specifically, when the Kth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (K-1)th sensing channel and the (K+1)th sensing channel are selected as the shielding sensing channels from the first sensing channel to the Xth sensing channel, and the shielding voltage is applied to the (K-1)th sensing channel and the (K+1)th sensing channel, where K is a natural number greater than or equal to two and less than or equal to (X-1). Specifically, when the Xth sensing channel is selected as the target sensing channel from the first sensing channel to the Xth sensing channel, the (X-1)th sensing channel is selected as the shielding sensing channel from the first sensing channel to the Xth sensing channel, and the shielding voltage is applied to the (X-1)th sensing channel.
Citation Information
Patent Citations
Face verifying method of mobile device
KR1020210050649A
Organic light emitting display device and pixel sensing method of the same
CN111354313A
Light-Emitting Display and Method of Driving the Same
US20200202777A1