Light emitting device driving circuit and related methods

Abstract

The pixel circuit includes a drive transistor configured to control an amount of current applied to a light emitting device according to a voltage applied to a control terminal of the drive transistor during an emission phase, the drive transistor having a first terminal and a second terminal. During a first phase, an anode of the light emitting device is set to a reference voltage and the first terminal of the drive transistor is set to a constant data voltage, such that the drive transistor is stressed with a constant source-gate voltage to prevent drift of a threshold voltage in the drive transistor, thereby preventing drift of screen brightness. During a second phase, the anode of the light emitting device is set to the reference voltage and the first terminal of the drive transistor is set to a voltage of the first power supply.

Description

Technical Field

[0001] This disclosure relates to the design and operation of electronic circuits for transmitting current to elements in a display device (e.g., to organic light-emitting diodes (OLEDs) in pixels of an active-matrix OLED (AMOLED) display device). Background Technology

[0002] Organic light-emitting diodes (OLEDs) generate light through the recombination of electrons and holes, emitting light when a bias voltage is applied between the anode and cathode to allow current to flow. The brightness of the light is related to the magnitude of the current. Without current, no light is emitted, making OLED technology a technology capable of achieving absolute blacks and virtually "infinite" contrast between pixels when used in display applications.

[0003] Several methods for using pixel thin-film transistor (TFT) circuits are taught in the prior art to transfer current to elements of a display device, such as an organic light-emitting diode (OLED), via p-type driving transistors. In one example, an input signal (such as a low "SCAN" signal) is used to switch the transistors in the circuit to allow the data voltage V to be transferred during the programming phase. DATA Stored at the storage capacitor. When the SCAN signal is high and the switching transistor isolates the circuit from the data voltage, the capacitor maintains V. DATA A voltage is applied, and this voltage is then applied to the gate of the driving transistor. The driving transistor has a threshold voltage V. TH In this case, the current of the OLED is related to the voltage on the gate of the driving transistor by the following formula: Among them, V DD It is the power supply connected to the source of the driving transistor.

[0004] TFT device characteristics (especially TFT threshold voltage V) TH Yes, for example, due to manufacturing processes or stress and aging of TFT devices during operation, it can vary over time or between comparable devices. Therefore, at the same V DATA Under voltage, the amount of current driving the TFT can vary significantly due to changes in this threshold voltage. Therefore, for a given V... DATA If the value is too low, the pixels on the display may not exhibit uniform brightness.

[0005] Therefore, traditionally, OLED pixel circuits have a high tolerance range to variations in the threshold voltage and / or carrier mobility of the driving transistors by employing circuitry that compensates for mismatches in the characteristics of the driving transistors. For example, a method is described in US Patent 7414599 (Chung et al., published August 19, 2008), which describes a circuit in which the driving TFT is configured as a diode-connected device during programming and a data voltage is applied to the source of the driving transistor.

[0006] The threshold compensation time is determined by the characteristics of the driving transistor, which may require a relatively long compensation time to achieve high compensation accuracy. For the data programming time, the RC constant time required to charge the programming capacitor is determined by the programming time. As illustrated in this art, a level (1H) time is the time taken to program data into a single line.

[0007] Using a circuit configuration such as that in US Patent 7414599, data is programmed while compensating the threshold voltage of the driving transistors. However, it is desirable to have the shortest possible horizontal time to enhance the responsiveness and operability of the display device. This is because each line must be programmed independently, while other operations, such as driving transistor compensation, can be performed on multiple lines simultaneously. Therefore, the responsiveness of the display device tends to be largely determined by the horizontal time used for programming. When data is programmed in the same operational phase as the driving transistors are being compensated, the horizontal time cannot be further reduced according to the required compensation accuracy for the driving transistors, as the compensation requirements limit any reduction in the programming phase time.

[0008] Another drawback of US Patent 7414599 is that voltage variations on the VDD line, such as IR drop, will affect the OLED current. At the end of the data programming and compensation phase, the stored voltage across the capacitor is: in, The VDD voltage applied to the first plate of the storage capacitor during the programming and compensation phase; V DAT -|V TH | is the voltage that is programmed and compensated at the second plate of the storage capacitor.

[0009] The IR drop of each pixel on the same scan row will vary depending on the programmed data voltage. Similarly, the IR drop of pixels on different rows will differ, meaning that the V during the programming phase... DD Power supply voltage The differences will also be different. Even using the same data signal and threshold voltage, the aforementioned differences will result in different OLED currents that need to be compensated for. IR drop reduces the uniformity of the display. Summary of the Invention

[0010] This disclosure relates to driving circuits and related methods for light-emitting devices.

[0011] In a first aspect of this disclosure, a pixel circuit of a display device includes: a driving transistor configured to control the amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal; a first switching transistor connected between a reference voltage and the control terminal of the driving transistor; a second switching transistor connected between the second terminal of the driving transistor and the control terminal; a third switching transistor connected between a first power supply and the first terminal of the driving transistor; a fourth switching transistor connected between a data line and the first terminal of the driving transistor; a fifth switching transistor connected between the second terminal of the driving transistor and the anode of the light-emitting device; and a sixth switching transistor connected between the anode of the light-emitting device and the reference voltage, wherein during a first phase having a constant duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to a constant data voltage; and wherein during a second phase having a variable duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to the voltage of the first power supply.

[0012] In one embodiment of the first aspect described above, during the first stage, a first emission pulse having a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; and during the first stage, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

[0013] In another embodiment of the first aspect described above, during the second stage, a second emission pulse having a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage, and to control the pulse width modulation (PWM) setting of the display device.

[0014] In another embodiment of the first aspect described above, during the first stage, the first terminal (S) of the driving transistor is set to a constant data voltage, such that the driving transistor is subjected to a constant gate-source voltage stress to prevent the threshold voltage in the driving transistor from drifting, thereby preventing the screen brightness of the display device from drifting.

[0015] In a second aspect of this disclosure, a pixel circuit of a display device includes: a driving transistor configured to control the amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal, wherein, during a first phase having a constant duration, the anode of the light-emitting device is set to a reference voltage, and the first terminal of the driving transistor is set to a constant data voltage, such that the driving transistor is subjected to a constant source-gate voltage stress to prevent drift of a threshold voltage in the driving transistor, thereby preventing drift of the screen brightness of the display device; and wherein, during a second phase having a variable duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to the voltage of a first power supply.

[0016] In one embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between the reference voltage and the control terminal of the driving transistor.

[0017] In another embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between the second terminal of the driving transistor and the control terminal.

[0018] In yet another embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between a first power supply and the first terminal of the driving transistor.

[0019] In yet another embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between the data line and the first terminal of the driving transistor.

[0020] In yet another embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between the second terminal of the driving transistor and the anode of the light-emitting device.

[0021] In yet another embodiment of the second aspect described above, the pixel circuit further includes a switching transistor connected between the anode of the light-emitting device and the reference voltage.

[0022] In another embodiment of the second aspect described above, during the first stage, a first emission pulse having a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; and during the first stage, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

[0023] In another embodiment of the second aspect described above, during the second stage, a second emission pulse having a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage, and the pulse width modulation (PWM) setting of the display device is controlled.

[0024] In a first aspect of this disclosure, a method of operating a pixel circuit of a display device includes: comprising: a driving transistor configured to control an amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal; a first switching transistor connected between a reference voltage and the control terminal of the driving transistor; a second switching transistor connected between the second terminal of the driving transistor and the control terminal; a third switching transistor connected between a first power supply and the first terminal of the driving transistor; a fourth switching transistor connected between a data line and the first terminal of the driving transistor; a fifth switching transistor connected between the second terminal of the driving transistor and the anode of the light-emitting device; and a sixth switching transistor connected between the anode of the light-emitting device and the reference voltage. The method further includes: performing a first phase with a constant duration, during which the anode of the light-emitting device is set to the reference voltage and the first terminal of the driving transistor is set to a constant data voltage; and performing a second phase with a variable duration, during which the anode of the light-emitting device is set to the reference voltage and the first terminal of the driving transistor is set to the voltage of the first power supply.

[0025] In one embodiment of the third aspect described above, the first stage is the anode reset and conduction bias stress stage.

[0026] In another embodiment of the third aspect described above, during the anode reset and conduction bias stress phase, a first emission pulse having a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; and during the anode reset and conduction bias stress phase, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

[0027] In yet another embodiment of the third aspect described above, the second stage is an anode reset stage only.

[0028] In another embodiment of the third aspect described above, during the anode-only reset phase, a second transmit pulse having a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage and control the pulse width modulation (PWM) setting of the display device.

[0029] In another embodiment of the third aspect described above, during the first stage, the first terminal (S) of the driving transistor is set to a constant data voltage, such that the driving transistor is subjected to a constant gate-source voltage stress to prevent the threshold voltage in the driving transistor from drifting, thereby preventing the screen brightness of the display device from drifting. Attached Figure Description

[0030] Implementation of the patented technology will now be described by way of example only with reference to the accompanying drawings.

[0031] Figure 1 A schematic diagram of a circuit for driving a light-emitting device according to an exemplary embodiment of the present disclosure is shown.

[0032] Figure 2A An example embodiment of the present disclosure is shown. Figure 1 The timing diagram associated with the operation of the pixel driving circuit during frame refresh.

[0033] Figure 2B An example embodiment of the present disclosure is shown. Figure 1 Timing diagram associated with the operation of the pixel driving circuit during non-refresh frames.

[0034] Figure 3 An example embodiment of the present disclosure is shown under bias stress. Figure 1 The threshold voltage of the driving transistor in the pixel driving circuit.

[0035] Figure 4 Exemplary embodiments according to this disclosure are shown. Figure 1Different refresh rates of the pixel drive circuit. Detailed Implementation

[0036] The following description contains specific information relating to embodiments described herein. The accompanying drawings and their descriptions relate only to embodiments. It should be understood that, for simplicity and clarity of illustration, reference numerals repeated in different drawings, where appropriate, are used to indicate corresponding or similar elements. Furthermore, numerous specific details are set forth to provide a thorough understanding of the embodiments described herein. However, those skilled in the art will understand that the embodiments described herein can be practiced without these specific details. In other instances, methods, processes, and components have not been described in detail so as not to obscure the relevant features described. Moreover, this description should not be construed as limiting the scope of the embodiments described herein. The drawings are not necessarily drawn to scale, and some components may be enlarged to better illustrate the details and features of this disclosure.

[0037] When the term "includes" is used, it means "includes, but not necessarily limited to"; it is exactly an open inclusion or member in combinations, groups, series, etc., as described.

[0038] Now refer to Figure 1 , Figure 1 A schematic diagram 100 of a driving circuit 102 for driving a light-emitting device 104 according to an exemplary embodiment of the present disclosure is shown. In this embodiment, the driving circuit 102 may include transistors T1, T2, T3, T4, T5, and T6. The driving circuit 102 may further include a driving transistor T1. D and storage capacitor C ST .

[0039] In this embodiment, transistors T1, T2, and T6 are n-MOS or n-type transistors, driving transistor T D Transistors T3, T4, and T5 are p-MOS or p-type transistors. In one embodiment, the driving circuit 102 is configured as a thin-film transistor (TFT) circuit to drive the light-emitting device 104. In one embodiment, at least one of transistors T1, T2, T3, T4, T5, and T6, and the driving transistor T... D It is a TFT. In one embodiment, the driving transistor can be an analog TFT, while transistors T1, T2, T3, T4, T5, and T6 are digital switching TFTs.

[0040] In this embodiment, the light-emitting device 104 may include a light-emitting diode D. 104 (For example, OLED). The light-emitting device 104 may also include an associated internal capacitor, which is represented as C in circuit diagram 100. 104 C104 It is not an independent component, but is inherent to the light-emitting device 104.

[0041] It should be understood that although the above embodiments are mainly described in conjunction with OLEDs as light-emitting devices, similar principles can also be used in display technologies that use other types of light-emitting devices, including, for example, micro LEDs and quantum dot LEDs.

[0042] The driving circuit 102 and the light-emitting device 104 can be manufactured using TFT manufacturing processes known in the art. The light-emitting device 104 includes transistors, capacitors, and interconnect wiring. It will be understood that similar manufacturing processes can be used to manufacture TFT circuits according to any embodiment.

[0043] For example, the driving circuit 102 and other embodiments can be disposed on a substrate such as a glass, plastic, or metal substrate. Each TFT may include a gate electrode, a gate insulating layer, a semiconductor layer, a first electrode, and a second electrode. The semiconductor layer is disposed on the substrate. The gate insulating layer is disposed on the semiconductor layer, and the gate electrode may be disposed on the insulating layer. The first electrode and the second electrode may be disposed on the insulating layer and connected to the semiconductor layer using vias. The first electrode and the second electrode may typically be referred to as the "source electrode" and "drain electrode" of the TFT, respectively. Each capacitor may include a first electrode, an insulating layer, and a second electrode, whereby the insulating layer forms an insulating barrier between the first electrode and the second electrode. Wiring between components in the circuit and wiring for introducing signals into the circuit (e.g., SCAN, EMI, V) DATA and V REF The semiconductor layer can include metal lines or doped semiconductor materials. For example, metal lines can be disposed between the substrate and the gate electrode of the TFT and connected to the electrode using vias. The semiconductor layer can be deposited by chemical vapor deposition, while the metal layer can be deposited by thermal evaporation.

[0044] The light-emitting device 104 may be disposed above the driving circuit 102. The light-emitting device 104 may include: a first electrode (e.g., the anode of an OLED) connected to transistors T5 and T6 in this embodiment; one or more layers for injecting or transporting charge (e.g., holes) into the emission layer; an emission layer; one or more layers for injecting or transporting charge (e.g., electrons) into the emission layer; and a second electrode (e.g., the cathode of an OLED) connected to the power supply ELVSS in this embodiment. For example, the injection layer, transport layer, and emission layer may be organic materials, the first electrode and the second electrode may be metals, and all these layers may be deposited using a thermal evaporation technique.

[0045] Figure 2A Is with Figure 1The timing diagrams associated with the operation of the drive circuit in a refresh mode having the following three phases are as follows: initialization phase (e.g., from t=t1 to t=t2), compensation and data programming phase (e.g., from t=t3 to t=t4), and emission phase (e.g., at the beginning of t=t5). The time period used to perform the programming phase is referred to as a “horizontal time” or “1H” time as shown in the timing diagrams and subsequent timing diagrams.

[0046] In different embodiments of this disclosure, the display pixels are addressed by rows and columns. The current row is row n. The previous row is row (n-1), and the row before that is row (n-2). The next row is row (n+1), and the row after that is row (n+2), and so on, because they are associated with the corresponding control signals identified in the figure. Thus, for example, SCAN(n) refers to the scan signal for row n, SCAN(n+1) refers to the scan signal for row (n+1), and so on. For the various control signals, EMI(n) refers to the transmit signal for row n, EMI(n-1) refers to the transmit signal for row (n-1), and so on. In this way, for various embodiments, the input signal corresponds to the indicated row.

[0047] In this embodiment, during the preceding emission phase (e.g., before t = t1), EMI(n) has a low voltage value, therefore transistors T3 and T5 are turned on, transistor T6 is turned off, and light emission is generated by transistor T connected to the driving transistor T. D Input drive voltage V DD Driven, thus, the actual current applied to the light-emitting device 104 is driven by the driving transistor T. D The voltage between the gate and source is determined.

[0048] During the preceding transmit phase, the nSCAN signal level for the applicable row initially has a low voltage value, causing transistors T1 and T2 to be in the off state. The pSCAN signal level for the applicable row initially has a high voltage value, causing transistor T4 to be in the off state.

[0049] like Figure 2A As shown, before the initialization phase begins (e.g., before t = t1), the EMI(n) signal level changes from a low voltage value to a high voltage value, turning off transistors T3 and T5 and turning on transistor T6. When transistor T6 turns on, the anode of the OLED is reset to V. INI Next, the nSCAN(n-2) signal level changes from a low voltage value to a high voltage value, which turns on transistor T1. INI The voltage is applied to V through transistor T1. G Drive transistor T D The previous gate voltage is thus reset, and the driving transistor T is activated. DIt is initialized to a high gate-source voltage, which is required for the next stage, programming, and compensation stage.

[0050] At the end of the initialization phase (e.g., at t = t2), the signal nSCAN(n-2) changes from high to low, turning off transistor T1. At the start of the compensation and data programming phase (e.g., at t = t3), the signal nSCAN(n) changes from low to high, turning on transistor T2. The driving transistor T... D gate node V G and drain node V D Connected via transistor T2. Driving transistor T D Source voltage V S It was previously set to DATA. Now, the source-gate voltage driving the transistor is: V SG =V DATA -V INI Equation (3),

[0051] Due to gate node V G Floating, driving transistor T D Inject current into the gate node V G In, until the driving transistor T D The gate voltage is high enough to turn off the drive transistor. The compensated gate node V G The voltage is: V G =V DATA -V TH Equation (4), Among them, V TH It is the driving transistor T D Threshold voltage.

[0052] Preferably, in order to drive transistor T D For effective voltage threshold compensation, the initial voltage difference between the gate and source of the driving transistor should be: V DATA -V INI >|V TH |+ΔV Equation (5), Where ΔV is a voltage large enough to generate a high initial current, which is used to charge the storage capacitor (C) within the allocated threshold compensation time. ST Charging. The value of ΔV will depend on the characteristics of the transistor. For example, for exemplary IGZO and LTPS thin-film transistor processes, ΔV can be at least 3 volts. Voltages ELVDD and VINI are set to meet this voltage requirement. The anode voltage is set to V via transistor T6. DATA Therefore, the storage capacitor CST The voltage stored above is:

[0053] Next, during the emission phase, the signal EMI(n) changes from a high state to a low state (e.g., at t = t5), causing transistors T3 and T5 to conduct and transistor T6 to turn off. The driving transistor T... D Currently connected to a positive power supply. Therefore, the gate-source voltage of the driving transistor is related to the storage capacitor C. ST The voltages stored above are the same, and are:

[0054] The driving transistor now supplies current to the light-emitting device from the positive and negative power rails. Driving transistor T D The current supply is: Among them, C ox It is the capacitance of the gate oxide of the driving transistor. W is the width of the driving transistor channel. L is the length of the driving transistor channel (i.e., the distance between the source and drain), and μ n It is the carrier mobility of the driving transistor.

[0055] In some implementations, low-leakage transistors (e.g., IGZO transistors) can be used as switching transistors connected to the corresponding voltage supply lines. By using low-leakage transistors, low storage capacitors can be used to reduce pixel size, or low refresh rates (such as 30Hz or lower) can be used to better display static or low-motion images. This, in turn, reduces power consumption.

[0056] because Figure 1 The pixel circuit 102 uses IGZO and LTPS (LTPO) processes, allowing it to operate at much lower frequencies than conventional LTPS circuits. This is due to the characteristics of the IGZO switching TFT transistor, which exhibits very low leakage current. The extremely low current leakage of the indium gallium zinc oxide (IGZO) transistor allows charge to be stored in the capacitor C. ST It stores data for longer periods, thereby enabling very low refresh rates (such as 1Hz).

[0057] Reference Figure 2B , Figure 2B Is with Figure 1The timing diagrams associated with the operation of the drive circuit in a non-refresh mode having two phases: an anode reset and on-bias stress phase (e.g., from t=t6 to t=t7) and an anode reset-only phase (e.g., from t=t7 to t=t8).

[0058] During the previous emission phase, EMI(n) has a low voltage value, so transistors T3 and T5 are turned on and transistor T6 is turned off, and light is emitted by transistor T connected to the driving transistor T. D Input drive voltage V DD The driving mechanism determines the actual current applied to the OLED by measuring the voltage between the gate and source of the driving transistor. The nSCAN signal level for the applicable row initially has a low voltage value, so transistors T1 and T2 are both off. The pSCAN signal level for the applicable row initially has a high voltage value, so transistor T4 is off.

[0059] At the start of the anode reset and bias stress phase (e.g., at t = t6), the EMI(n) signal level changes from a low voltage value to a high voltage value, causing transistors T3 and T5 to turn off and transistor T6 to turn on. When transistor T6 turns on, the anode of the light-emitting device 104 is reset to V. INI The pSCAN(n) signal level changes from a high voltage value to a low voltage value, causing transistor T4 to conduct. A sufficiently high data voltage is applied through transistor T4 to the source of the driving transistor to control the driving transistor T. D Apply pressure. This applied voltage stress resets the drive transistor T by trapping charge at the oxide-channel interface. D Threshold voltage.

[0060] At the start of the anode reset phase only (e.g., at t = t7), the EMI(n) signal level changes from a high voltage value to a low voltage value, causing transistors T3 and T5 to conduct and transistor T6 to turn off. The driving transistor T... D The source is currently set to ELVDD. Therefore, the driving transistor T... D The high data voltage no longer applies voltage. The EMI(n) signal level changes from a low voltage value to a high voltage value, causing transistors T3 and T5 to turn off and transistor T6 to turn on. The anode of the light-emitting device 104 is set to V. INI .

[0061] During the emission phase (e.g., at t = t8), the signal EMI(n) changes from a high state to a low state, turning on transistors T3 and T5 and turning off transistor T6. Now, the driving transistor T... D Provide current to the light-emitting device.

[0062] Figure 3It shows in Figure 2B How does the inter-frame insertion of the conduction bias stress stage change? Figure 1 The driving transistor T in D Threshold voltage (V) TH In this embodiment, it is assumed that the drive circuit 102 operates at 30Hz.

[0063] like Figure 3 As shown, the dashed curve illustrates the driving of transistor T without inserting a conduction bias stress phase between frames. D Threshold voltage (V) TH How it behaves. Driving transistor T D Threshold voltage (V) TH This will deviate from the initial V th (V th0 And it is only reset when the frame is refreshed. Therefore, due to this threshold voltage variation, the amount of current driving the TFT transmission can vary greatly. Therefore, for a given V DATA If the value is too low, the pixels on the display may not exhibit uniform brightness.

[0064] like Figure 3 As shown, the solid curve illustrates the driving transistor T when a conduction bias stress phase is inserted between frames. D Threshold voltage V TH How it is represented. Driving transistor T D Threshold voltage V TH Reset to initial V during non-refresh frames th (V th0 Therefore, the amount of current transmitted by the driving TFT can be better regulated, which causes the pixels in the display to move at a given V. DATA The values ​​show a basically consistent brightness.

[0065] Furthermore, in the aforementioned driving methods, as referred to Figure 1 , 2A The conduction bias stress duration described in 2B and 3 is set independently of the emitter width (PMW) to ensure that the threshold reset amount of the drive transistor does not change with the PMW setting.

[0066] Figure 4 This illustrates how different refresh rates can be achieved. Lower refresh rates can be achieved by inserting non-refresh frames where the data voltage has not been updated. Therefore, it is preferable to ensure that refresh frames and non-refresh frames have the same perceived brightness level. Since anodizing causes a decrease in brightness during refresh frames, anodizing must also occur during non-refresh frames to match the brightness levels of the two frames.

[0067] According to various embodiments of this disclosure, the driving transistor T DThreshold voltage V TH Threshold voltage drift is essentially eliminated by regularly resetting the conduction bias stress. As a result, the brightness levels of refreshed and non-refreshed frames are essentially matched to each other, thereby essentially eliminating brightness drift, especially at low refresh rates (e.g., 1Hz).

[0068] This disclosure relates to pixel circuitry that employs a conduction bias stress phase during anode reset to reduce flicker. For low-frequency operation, such as 1 Hz, resetting the anode voltage of the light-emitting device is important to ensure constant brightness and thus avoid flicker. When performing an anode reset, a constant gate-source voltage can be applied to the driving transistor to prevent the threshold voltage in the driving transistor from drifting over time, which causes screen brightness to drift. When performing conduction bias stress, the applied voltage value and the duration of application determine the threshold voltage reset amount.

[0069] Embodiments of this disclosure provide a driving method in which the duration of the on-bias stress is set independently of the emitter width (PMW) to ensure that the threshold reset amount of the driving transistor does not change with the PMW setting.

[0070] Although the invention has been shown and described with respect to one or more embodiments, it will be apparent to those skilled in the art, upon reading and understanding this specification and the accompanying drawings, that equivalent changes and modifications will occur. Specifically, with respect to the various functions performed by the foregoing elements (components, assemblies, devices, compositions, etc.), unless otherwise stated, the terminology used to describe these elements (including references to “means”) is intended to correspond to any element that performs the specified function of the described element (i.e., is functionally equivalent), even if it is not structurally equivalent to the disclosed structure, which performs the functions of the exemplary embodiments or embodiments of the invention shown herein. Furthermore, although specific features of the invention may have been described above with respect to only one or more of the illustrated embodiments, such features may be combined with one or more other features of other embodiments, which may be desirable and advantageous for any given or particular application.

[0071] Industrial applicability

[0072] Embodiments of this disclosure are applicable to a wide range of display devices to allow for high-resolution display devices with effective threshold voltage compensation and true black performance. Examples of such devices include televisions, mobile phones, personal digital assistants (PDAs), tablets and laptops, desktop monitors, digital cameras, and similar devices that require high-resolution displays. Explanation of reference numerals in the attached figures

[0073] T1, T2, T3, T4, T5, T6 – Switching transistors T D –Drive transistor OLED – Organic Light Emitting Diode (or conventional light-emitting device) C ST – Storage capacitors C 104 – Parasitic capacitance of OLED104 V G – Gate of the driving transistor in the pixel circuit V S – The source of the driving transistor in the pixel circuit V D – The drain of the driving transistor in the pixel circuit V DATA –Data Voltage ELVSS – Power Supply ELVDD – Power Supply V INI –Reference voltage SCAN(n) / EMI(n) – Control signals

Claims

1. A pixel circuit for a display device, characterized in that, include: A driving transistor configured to control the amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during the emission phase, the driving transistor having a first terminal and a second terminal; A first switching transistor is connected between a reference voltage and the control terminal of the driving transistor; A second switching transistor is connected between the second terminal of the driving transistor and the control terminal; A third switching transistor is connected between the first power supply and the first terminal of the driving transistor; A fourth switching transistor is connected between the data line and the first terminal of the driving transistor; A fifth switching transistor is connected between the second terminal of the driving transistor and the anode of the light-emitting device; and A sixth switching transistor is connected between the anode of the light-emitting device and the reference voltage. During a non-refresh frame, during a first phase having a constant duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to a constant data voltage; and During the non-refresh frame, during a second phase with a variable duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to the voltage of the first power supply.

2. The pixel circuit according to claim 1, characterized in that, During the first phase, a first emission pulse with a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; as well as During the first phase, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

3. The pixel circuit according to claim 1, characterized in that, During the second phase, a second emission pulse with a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage and control the pulse width modulation setting of the display device.

4. The pixel circuit according to claim 1, characterized in that, During the first phase, the first terminal of the driving transistor is set to a constant data voltage, so that the driving transistor is subjected to a constant gate-source voltage stress to prevent the threshold voltage in the driving transistor from drifting, thereby preventing the screen brightness of the display device from drifting.

5. A pixel circuit for a display device, characterized in that, include: A driving transistor, configured to control the amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during the emission phase, the driving transistor having a first terminal and a second terminal. During a non-refresh frame, in a first phase with a constant duration, the anode of the light-emitting device is set to a reference voltage, and the first terminal of the driving transistor is set to a constant data voltage, causing the driving transistor to be subjected to a constant source-gate voltage stress to prevent drift of the threshold voltage in the driving transistor, thereby preventing drift of the screen brightness of the display device; and During the non-refresh frame, during a second phase having a variable duration, the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to the voltage of the first power supply.

6. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between the reference voltage and the control terminal of the driving transistor.

7. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between the second terminal of the driving transistor and the control terminal.

8. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between a first power supply and the first terminal of the driving transistor.

9. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between the data line and the first terminal of the driving transistor.

10. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between the second terminal of the driving transistor and the anode of the light-emitting device.

11. The pixel circuit according to claim 5, characterized in that, It also includes a switching transistor connected between the anode of the light-emitting device and the reference voltage.

12. The pixel circuit according to claim 5, characterized in that, During the first phase, a first emission pulse with a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; as well as During the first phase, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

13. The pixel circuit according to claim 5, characterized in that, During the second phase, a second emission pulse with a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage and control the pulse width modulation setting of the display device.

14. A method for operating the pixel circuit of a display device, characterized in that, include: The pixel circuit shall have: A driving transistor configured to control the amount of current applied to a light-emitting device based on a voltage applied to a control terminal of the driving transistor during the emission phase, the driving transistor having a first terminal and a second terminal; A first switching transistor is connected between a reference voltage and the control terminal of the driving transistor; A second switching transistor is connected between the second terminal of the driving transistor and the control terminal; A third switching transistor is connected between the first power supply and the first terminal of the driving transistor; A fourth switching transistor is connected between the data line and the first terminal of the driving transistor; A fifth switching transistor is connected between the second terminal of the driving transistor and the anode of the light-emitting device; and A sixth switching transistor is connected between the anode of the light-emitting device and the reference voltage. During a non-refresh frame, a first phase with a constant duration is executed, during which the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to a constant data voltage; as well as During the non-refresh frame, a second phase with a variable duration is performed, during which the anode of the light-emitting device is set to the reference voltage, and the first terminal of the driving transistor is set to the voltage of the first power supply.

15. The method according to claim 14, characterized in that, The first stage is the anode reset and conduction bias stress stage.

16. The method according to claim 15, characterized in that, During the anode reset and conduction bias stress phase, a first emission pulse with a constant pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage; as well as During the anode reset and conduction bias stress phase, a scan pulse is applied to the control terminal of the fourth switching transistor to set the first terminal of the driving transistor to the constant data voltage.

17. The method according to claim 14, characterized in that, The second stage is the anode reset stage only.

18. The method according to claim 17, characterized in that, During the anode-only reset phase, a second emission pulse with a variable pulse width is applied to the control terminal of the sixth switching transistor to set the anode of the light-emitting device to the reference voltage and control the pulse width modulation setting of the display device.

19. The method according to claim 14, characterized in that, During the first phase, the first terminal of the driving transistor is set to a constant data voltage, so that the driving transistor is subjected to a constant gate-source voltage stress to prevent the threshold voltage in the driving transistor from drifting, thereby preventing the screen brightness of the display device from drifting.

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