一种1S1C存储器数据读取方法及系统
By controlling the bit line and word line voltages of the 1S1C memory and using voltage changes to determine the state of the memory cell, the problem of high read error rate is solved, and higher data read reliability and accuracy are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUAZHONG UNIV OF SCI & TECH
- Filing Date
- 2022-07-29
- Publication Date
- 2026-07-17
AI Technical Summary
In existing 1S1C memory read solutions, the read current pulse is at the nanosecond level, making it difficult to precisely control the timing of the read pulse and the detection circuit, resulting in a high read error rate.
The state of the memory cell is determined by controlling the voltage on the bit lines and word lines connected to the memory cell and using the change in the bit line voltage. The specific steps include charging the bit line voltage to VreadBL and maintaining it, charging the word line voltage to VreadWL, using the difference in the read voltage Vread to determine the state of the memory cell, and outputting high and low level signals through a voltage comparator.
It improves the accuracy and reliability of read operations, reduces the requirements for read timing control, and ensures the accuracy of data reading.
Smart Images
Figure CN115240732B_ABST