Imaging element and imaging apparatus

Abstract

The present invention shortens a charge transfer path of a transfer transistor composed of a vertical transistor. An imaging device includes a photoelectric conversion unit, a charge holding unit, a charge transfer unit, and an image signal generation unit. The photoelectric conversion unit is arranged on a semiconductor substrate and generates a charge corresponding to incident light by photoelectric conversion. The charge holding unit holds the charge. The charge transfer unit includes a polygonal opening formed in the semiconductor substrate in a plan view and an embedded gate arranged in the opening, and the charge transfer unit transfers the charge from the photoelectric conversion unit to the charge holding unit. The image signal generation unit generates an image signal based on the held charge.

Description

Technical Field

[0001] This disclosure relates to an imaging element and an imaging apparatus. Specifically, this disclosure relates to an imaging element and an imaging apparatus using the imaging element, the imaging element being configured such that pixels, each having a vertical transistor, are arranged such that the vertical transistors transfer charge generated by photoelectric conversion in photoelectric conversion units arranged on the semiconductor substrate in the thickness direction of the semiconductor substrate. Background Technology

[0002] In the prior art, imaging elements for imaging a subject utilize pixels arranged in a two-dimensional lattice shape to generate image signals based on incident light. Within each pixel, a photodiode is arranged to generate a charge corresponding to the incident light through photoelectric conversion, and a floating diffuser is used to transfer the generated charge. An image signal is generated based on the charge transferred to the floating diffuser. Furthermore, within the pixel, a transfer transistor is further arranged to transfer the charge generated by the photodiode to the floating diffuser. Imaging elements in which a vertical transistor is used as the transfer transistor have been proposed (see, for example, Patent Document 1). A vertical transistor is a transistor in which a gate electrode and a gate insulating film are embedded in a semiconductor substrate.

[0003] The vertical transistor is configured with a gate insulating film and a gate electrode disposed in a hole formed in a semiconductor substrate by dry etching. The gate insulating film is composed of a silicon oxide (SiO2) film formed on the bottom and side surfaces of the hole by free radical oxidation or plasma oxidation. The gate electrode is made of polycrystalline silicon and is disposed adjacent to the gate insulating film of the hole. The channel of the vertical transistor is formed along the outer periphery of the embedded gate insulating film.

[0004] [List of Citations]

[0005] [Patent Literature]

[0006] [Patent Document 1]

[0007] JP 2010-287743 A Summary of the Invention

[0008] [Technical Issues]

[0009] The aforementioned prior art suffers from the problem of an increased charge transfer path in the transfer transistor. As described above, the vertical transistor is configured such that the gate insulating film and the gate electrode are embedded in a hole formed in the semiconductor substrate, making fine fabrication of the gate region difficult and increasing the distance between the photodiode and the floating diffuser. Consequently, the charge transfer path becomes longer, and the transfer efficiency deteriorates.

[0010] This disclosure was designed in view of the above problems, and its purpose is to reduce the charge transfer path of transfer transistors composed of vertical transistors.

[0011] [Solution to the problem]

[0012] This disclosure was designed to address the aforementioned problems, and its first aspect is an imaging element comprising: a photoelectric conversion unit configured to be disposed on a semiconductor substrate and generate a charge corresponding to incident light by photoelectric conversion; a charge holding unit configured to hold the charge; a charge transfer unit configured to include an opening portion and an embedded gate, the opening portion being formed in the semiconductor substrate and having a polygonal shape in a plan view, the embedded gate being disposed in the opening portion, and the charge transfer unit being configured to transfer the charge from the photoelectric conversion unit to the charge holding unit; and an image signal generation unit configured to generate an image signal based on the held charge.

[0013] Furthermore, in the first aspect, the charge transfer unit may include an opening portion of a polygon with more than six sides.

[0014] Furthermore, in the first aspect, the charge transfer unit may include an opening portion of a polygon in which the interior angles of its vertices are 120 to 150 degrees.

[0015] Furthermore, in the first aspect, the charge transfer unit may include an octagonal opening.

[0016] Furthermore, in the first aspect, the charge transfer unit has a polygonal opening portion formed by recrystallizing the components constituting the semiconductor substrate.

[0017] Furthermore, in the first aspect, the photoelectric conversion unit may include a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit.

[0018] Furthermore, in the first aspect, the charge holding unit may include a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit.

[0019] Furthermore, in the first aspect, the charge transfer unit may also include a gate insulating film disposed between the semiconductor substrate and the embedded gate.

[0020] Furthermore, in the first aspect, the charge transfer unit has a gate insulating film formed by oxidizing a semiconductor substrate.

[0021] Furthermore, in the first aspect, the charge transfer unit has a gate insulating film formed by oxidizing the semiconductor substrate using oxygen free radicals.

[0022] Furthermore, in the first aspect, the semiconductor substrate is formed of silicon.

[0023] Furthermore, in the first aspect, the charge transfer unit may also include a high impurity concentration region disposed on a semiconductor substrate adjacent to the opening and configured to have a high impurity concentration.

[0024] Furthermore, in the first aspect, the charge transfer unit may also include a substrate surface gate, which is adjacent to the embedded gate and configured to have a shape having a high impurity concentration region covering the front surface side of the semiconductor substrate.

[0025] Furthermore, in the first aspect, the imaging element may also include a second high impurity concentration region, which is adjacent to the photoelectric conversion unit, disposed on the front surface side of the semiconductor substrate, and configured to have a high impurity concentration.

[0026] Furthermore, a second aspect of this disclosure is an imaging apparatus, comprising: a photoelectric conversion unit configured to be disposed on a semiconductor substrate and generate a charge corresponding to incident light by photoelectric conversion; a charge holding unit configured to hold the charge; a charge transfer unit configured to include an opening portion and an embedded gate, the opening portion being formed in the semiconductor substrate and having a polygonal shape in a plan view, the embedded gate being disposed in the opening portion and the charge transfer unit being configured to transfer the charge from the photoelectric conversion unit to the charge holding unit; an image signal generation unit configured to generate an image signal based on the held charge; and a processing circuit configured to process the generated image signal.

[0027] According to various aspects of this disclosure, the effect of forming a channel along the opening portion of the polygon in the charge transfer unit is achieved. Attached Figure Description

[0028] Figure 1 This is a diagram illustrating an example configuration of an imaging element according to an embodiment of the present disclosure.

[0029] Figure 2 This is a diagram illustrating an example of pixel configuration according to an embodiment of the present disclosure.

[0030] Figure 3 This is a cross-sectional view showing an example of pixel configuration according to a first embodiment of the present disclosure.

[0031] Figure 4 This is a plan view illustrating an example of pixel configuration according to a first embodiment of the present disclosure.

[0032] Figure 5 This is a plan view illustrating an example configuration of an embedded gate according to a first embodiment of the present disclosure.

[0033] Figure 6This is an illustration showing an example of a pixel manufacturing method according to a first embodiment of the present disclosure.

[0034] Figure 7 This is an illustration showing an example of a pixel manufacturing method according to a first embodiment of the present disclosure.

[0035] Figure 8 This is an illustration showing an example of a pixel manufacturing method according to a first embodiment of the present disclosure.

[0036] Figure 9 This is an illustration showing an example of a pixel manufacturing method according to a first embodiment of the present disclosure.

[0037] Figure 10 This is a plan view illustrating another configuration example of pixels according to a first embodiment of the present disclosure.

[0038] Figure 11 This is a cross-sectional view showing an example of pixel configuration according to a second embodiment of the present disclosure.

[0039] Figure 12 This is a cross-sectional view showing an example of pixel configuration according to a third embodiment of the present disclosure.

[0040] Figure 13 This is a block diagram illustrating an example of a camera configuration as an imaging device to which the present technology can be applied.

[0041] Figure 14 This is a diagram illustrating an example of a schematic configuration of an endoscopic surgical system.

[0042] Figure 15 This is a block diagram illustrating an example of the functional configuration of the camera and CCU.

[0043] Figure 16 This is a block diagram illustrating an example of a schematic configuration of a vehicle control system.

[0044] Figure 17 This is an illustration showing an example of the installation location of the vehicle external information detection unit and the imaging unit. Detailed Implementation

[0045] Next, embodiments for implementing this disclosure (hereinafter referred to as embodiments) will be described with reference to the accompanying drawings. In the following drawings, the same or similar parts are indicated by the same or similar reference numerals and symbols. Furthermore, the embodiments will be described in the following order.

[0046] 1. First Implementation Method

[0047] 2. Second Implementation Method

[0048] 3. Third Implementation Method

[0049] 4. Examples of application to cameras

[0050] 5. Examples of the application of endoscopic surgical systems

[0051] 6. Examples of applications of moving objects

[0052] <1. First Implementation Method>

[0053] [Imaging element configuration]

[0054] Figure 1 This is a diagram illustrating an example configuration of an imaging element according to an embodiment of the present disclosure. In the diagram, the imaging element 1 includes a pixel array 10, a vertical drive unit 20, a column signal processing unit 30, and a control unit 40.

[0055] The pixel array section 10 is configured with pixels 100 arranged in a two-dimensional lattice shape. Here, the pixels 100 generate an image signal in response to emitted light. Each pixel 100 includes a photoelectric conversion unit that generates charge in response to emitted light. Furthermore, each pixel 100 also includes a pixel circuit. The pixel circuit generates the image signal based on the charge generated by the photoelectric conversion unit. The generation of the image signal is controlled by a control signal generated by the vertical drive unit 20, which will be described later. Signal lines 11 and 12 are arranged in the pixel array section 10 in an XY matrix configuration. Signal line 11 is a signal line through which control signals of the pixel circuits in the pixels 100 are transmitted. Signal line 11 is provided for each row of the pixel array section 10 and is shared by the pixels 100 in each row. Signal line 12 is a signal line that transmits the image signal generated by the pixel circuits of the pixels 100. It is provided for each column of the pixel array section 10 and is shared by the pixels 100 in each column. The photoelectric conversion unit and the pixel circuit are formed on a semiconductor substrate.

[0056] The vertical drive unit 20 generates control signals for the pixel circuit of pixel 100. The vertical drive unit 20 transmits the generated control signals to pixel 100 via signal line 11 shown in the figure. The column signal processing unit 30 processes the image signal generated by pixel 100. The column signal processing unit 30 processes the image signal transmitted from pixel 100 via signal line 12 shown in the figure. The processing in the column signal processing unit 30 corresponds to, for example, analog-to-digital conversion, converting the analog image signal generated in pixel 100 into a digital image signal. The image signal processed by the column signal processing unit 30 is output as the image signal of imaging element 1. The control unit 40 controls the imaging element 1 as a whole. The control unit 40 generates and outputs control signals for controlling the vertical drive unit 20 and the column signal processing unit 30 to control the imaging element 1. The control signals generated by the control unit 40 are transmitted to the vertical drive unit 20 and the column signal processing unit 30 via signal lines 41 and 42. Meanwhile, the column signal processing unit 30 is an example of the processing circuit described in the claims.

[0057] [Pixel configuration]

[0058] Figure 2 This is a diagram illustrating an example configuration of pixels according to an embodiment of the present disclosure. The accompanying drawing is a circuit diagram illustrating an example configuration of pixel 100. Pixel 100 in the figure includes a photoelectric conversion unit 101, a charge retention unit 102, a charge transfer unit 103, and MOS transistors 104 to 106. Note that the charge transfer unit 103 may be composed of a MOS transistor. An n-channel MOS transistor may be used for the charge transfer unit 103 and the MOS transistors 104 to 106.

[0059] The anode of photoelectric conversion unit 101 is grounded, and the cathode is connected to the source of charge transfer unit 103. The drain of charge transfer unit 103 is connected to the source of MOS transistor 104, the gate of MOS transistor 105, and the end of charge holding unit 102. The other end of charge holding unit 102 is grounded. The drains of MOS transistors 104 and 105 are connected to the power supply line Vdd, and the source of MOS transistor 105 is connected to the drain of MOS transistor 106. The source of MOS transistor 106 is connected to signal line 12. The gates of charge transfer units 103, 104, and 106 are respectively connected to transmission signal line TR, reset signal line RST, and select signal line SEL. Note that transmission signal line TR, reset signal line RST, and select signal line SEL constitute signal line 11.

[0060] The photoelectric conversion unit 101 generates a charge corresponding to the emitted light as described above. A photodiode can be used in the photoelectric conversion unit 101.

[0061] In addition, the charge retention unit 102 and MOS transistors 103 to 106 constitute the pixel circuit.

[0062] The charge transfer unit 103 is a transistor that transfers the charge generated by photoelectric conversion through the photoelectric conversion unit 101 to the charge holding unit 102. The charge transfer in the charge transfer unit 103 is controlled by a signal transmitted through the transmission signal line TR. The charge holding unit 102 is a capacitor that holds the charge transferred by the charge transfer unit 103.

[0063] MOS transistor 105 is a transistor that generates a signal based on the charge held in charge holding unit 102. MOS transistor 106 is a transistor that outputs the signal generated by MOS transistor 105 as an image signal to signal line 12. MOS transistor 106 is controlled by a signal transmitted via selection signal line SEL. In this way, MOS transistors 105 and 106 generate an image signal based on the charge held in charge holding unit 102. The circuitry of MOS transistors 105 and 106 constitutes image signal generation unit 110.

[0064] The MOS transistor 104 resets the transistor in the charge holding unit 102 by releasing the charge held in the charge holding unit 102 to the power supply line Vdd. The reset performed by the MOS transistor 104 is controlled by a signal transmitted via the reset signal line RST and is performed before the charge is transferred through the charge transfer unit 103. Note that during reset, the photoelectric conversion unit 101 can also be reset by setting the charge transfer unit 103 to a conductive state. In this way, the pixel circuit converts the charge generated by the photoelectric conversion unit 101 into an image signal.

[0065] [Pixel cross-section configuration]

[0066] Figure 3 This is a cross-sectional view illustrating an example configuration of pixels according to a first embodiment of the present disclosure. The drawing is a schematic cross-sectional view illustrating an example configuration of pixel 100. In the drawing, pixel 100 includes a semiconductor substrate 120, a wiring region 140, an insulating film 150, a color filter 160, a protective film 170, and an on-chip lens 180.

[0067] The semiconductor substrate 120 is a semiconductor substrate on which diffusion regions of photoelectric conversion units 101, MOS transistors, etc., are formed. As the semiconductor substrate 120, a substrate formed of, for example, silicon (Si) can be used. The photoelectric conversion units 101, etc., are arranged in well regions formed in the semiconductor substrate 120. For convenience, it is assumed that the semiconductor substrate 120 in the figure is arranged in a p-type well region. By forming an n-type semiconductor region in the p-type well region, the photoelectric conversion units 101, etc., can be formed. The white area of ​​the semiconductor substrate 120 in the figure represents the n-type semiconductor region.

[0068] In the semiconductor substrate 120 shown in the accompanying drawings, a photoelectric conversion unit 101, a charge retention unit 102, and a charge transfer unit 103 are illustrated as examples. The photoelectric conversion unit 101 is composed of an n-type semiconductor region 121. Specifically, a photodiode configured using a pn junction at the interface between the n-type semiconductor region 121 and a p-type well region in its periphery corresponds to the photoelectric conversion unit 101. The charge generated by photoelectric conversion accumulates in the n-type semiconductor region 121. Note that a p-type semiconductor region 122, formed with a relatively high impurity concentration, is arranged between the n-type semiconductor region 121 and the surface on the front surface side of the semiconductor substrate 120. The p-type semiconductor region 122 is a semiconductor region used to fix the surface energy level on the front surface side of the semiconductor substrate 120 adjacent to the semiconductor region 121. By providing the semiconductor region 122, the dark current caused by the surface level of the semiconductor substrate 120 can be reduced. Note that the semiconductor region 122 is an example of the second high impurity concentration region described in the claims.

[0069] The charge retention unit 102 is composed of an n-type semiconductor region 124. The n-type semiconductor region 124 is configured to have a relatively high impurity concentration and is a region in which the charge generated and accumulated in the n-type semiconductor region 121 by photoelectric conversion is retained. The charge retention unit 102 composed of the semiconductor region 124 is referred to as floating diffusion. The n-type semiconductor region 124 is connected to the image signal generation unit 110 through a wiring layer 143 described later.

[0070] The charge transfer unit 103 is a MOS transistor disposed between the n-type semiconductor region 121 constituting the photoelectric conversion unit 101 and the n-type semiconductor region 124 constituting the charge retention unit 102, and transfers the charge accumulated in the n-type semiconductor region 121 to the n-type semiconductor region 124. The charge transfer unit 103 includes an embedded gate 132 configured to be embedded in an opening 129 formed in the semiconductor substrate 120. The embedded gate 132 is disposed adjacent to the opening 129 of the semiconductor substrate 120 via a gate insulating film 131. A channel is formed along the opening 129 in a well region of the semiconductor substrate 120. The MOS transistor including this embedded gate 132 is called a vertical transistor. The charge transfer efficiency from the n-type semiconductor region 121 disposed in a relatively deep region of the semiconductor substrate 120 can be improved.

[0071] Furthermore, a p-type semiconductor region 123 configured to have a relatively high impurity concentration is disposed in the semiconductor substrate 120 adjacent to the opening portion 129. The p-type semiconductor region 123 is a region of surface energy level of the semiconductor substrate 120 used to fix the opening portion 129. The semiconductor region 123 can be formed by implanting acceptors such as boron (B) into the semiconductor substrate 120. Note that the semiconductor region 123 is an example of the high impurity concentration region described in the claims.

[0072] Furthermore, the substrate surface gate 133 can be arranged adjacent to the embedded gate 132. The substrate surface gate 133 is a gate disposed on the front surface side of the semiconductor substrate 120 and is configured to have a shape covering the opening portion 129. Additionally, the substrate surface gate 133 in the figure is configured to have a shape covering the p-type semiconductor region 123. Similar to the embedded gate 132, a gate insulating film 131 is disposed between the substrate surface gate 133 and the front surface side of the semiconductor substrate 120. A channel is formed in the semiconductor substrate 120 directly below the substrate surface gate 133.

[0073] The opening 129 can be formed by etching the surface of the semiconductor substrate 120. As described later, the opening 129 is polygonal when viewed from above.

[0074] The gate insulating film 131 can be formed, for example, from SiO2. SiO2 can be formed by oxidizing Si on the surface of the opening portion 129.

[0075] The embedded gate 132 and the substrate surface gate 133 can be formed of, for example, polysilicon or amorphous silicon. The embedded gate 132 can be formed by arranging polysilicon or the like in the opening 129. As described above, the opening 129 is polygonal when viewed from above, and the shape of the embedded gate 132 disposed within the opening 129 is also polygonal when viewed from above. Furthermore, the embedded gate 132 and the substrate surface gate 133 can be formed simultaneously.

[0076] Wiring region 140 is a region in which wiring arranged on the front surface side of semiconductor substrate 120 and transmitting signals to components of semiconductor substrate 120 is disposed. Wiring region 140 includes wiring layers 142 and 143 and insulating layer 141. Wiring layers 142 and 143 are wirings that transmit signals to components of semiconductor substrate 120. Wiring layers 142, etc., can be formed of metals such as copper (Cu), tungsten (W), etc. Wiring layer 142 is wiring connected to the gate (substrate surface gate 133) of charge transfer unit 103, and wiring layer 143 is wiring connected to the semiconductor region 124 of charge retention unit 102. Although not shown in the figures, wiring layers constituting other wirings are also disposed in wiring region 140. Insulating layer 141 insulates wiring layers 142, etc. Insulating layer 141 can be formed of SiO2, for example. The semiconductor region of semiconductor substrate 120 constituting components, the gate of charge transfer unit 103, wiring layer 142, etc., can be connected to each other via contact plugs 144. The contact plug 144 is formed of a metal pillar.

[0077] The insulating film 150 is a film disposed on the rear surface side of the semiconductor substrate 120 to protect the semiconductor substrate 120. The insulating film 150 may be formed, for example, from SiO2.

[0078] Color filter 160 is an optical filter that transmits light of a predetermined wavelength in incident light. As color filter 160, three types of color filters can be used, such as those that transmit red, green, and blue light. One of these three types of color filters 160 is arranged in pixel 100.

[0079] The protective film 170 is a film that protects the rear surface side of the pixel 100 in which the color filter 160 is arranged. The protective film 170 can be formed of the same material as the on-chip lens 180 described later.

[0080] The on-chip lens 180 is a lens provided for each pixel 100 to focus incident light onto the photoelectric conversion unit. The on-chip lens 180 in the figure is configured as a hemispherical shape to focus the incident light. The on-chip lens 180 may be formed of an inorganic material such as silicon nitride (SiN) or an organic material such as acrylic resin.

[0081] As described above, the photoelectric conversion unit 101 of pixel 100 receives incident light from the rear surface side of semiconductor substrate 120. The imaging element 1 including such pixel 100 is called a back-illuminated imaging element.

[0082] As described above, the substrate surface gate 133 can be arranged in the charge transfer unit 103. By providing the substrate surface gate 133, the influence of the potential barrier formed between the photoelectric conversion unit 101 and the charge transfer unit 103 can be reduced. During the exposure period, the charge transfer unit 103 is set to a non-conductive state to accumulate charge in the semiconductor region 121 of the photoelectric conversion unit 101. In this case, for example, a negative voltage is applied to the gate (embedded gate 132) of the charge transfer unit 103, and the charge transfer unit 103 has a higher potential than the semiconductor region 121. When the charge of the photoelectric conversion unit 101 is transferred after the exposure period has passed, a positive voltage is applied to the gate of the charge transfer unit 103. The potential of the charge transfer unit 103 becomes lower than the potential of the semiconductor region 121, and the charge in the semiconductor region 121 is moved to the charge transfer unit 103 and transferred.

[0083] However, in the charge transfer unit 103, a p-type semiconductor region 123 is arranged for fixation, forming a relatively high potential barrier. When the charge transfer unit 103 is set to a conductive state, the potential barrier is maintained between the charge transfer unit 103 and the photoelectric conversion unit 101 to suppress charge movement. As a result, the substrate surface gate 133 is configured to cover the p-type semiconductor region 123. By applying a voltage to the substrate surface gate 133, a voltage is also applied to the semiconductor region 123 just below the substrate surface gate 133, and the potential barrier can be reduced. Charge movement is not suppressed, and charge transfer efficiency can be improved.

[0084] Furthermore, the substrate surface gate 133 is configured to cover the p-type semiconductor region 123, thereby reducing the electric field strength on the surface of the semiconductor substrate 120 near the gate of the charge transfer unit 103. As the size of the pixel 100 decreases, the charge transfer unit 103 and the charge retention unit 102 approach each other. Since the p-type semiconductor region 123 is configured to have a relatively high impurity concentration, the electric field changes abruptly at the interface between the semiconductor regions 123 and 124 of the charge retention unit 102, causing a tunneling effect and increasing leakage current. Therefore, the substrate surface gate 133 is arranged near the boundary of the semiconductor region 123 to apply a voltage, and thus the abrupt change in the electric field near the surface of the semiconductor substrate 120 can be mitigated. Therefore, leakage current can be reduced.

[0085] [Pixel surface configuration]

[0086] Figure 4 This is a plan view illustrating an example of pixel configuration according to a first embodiment of the present disclosure. The drawing is a plan view showing an example of pixel 100 configuration, and is a plan view from the front surface side of the semiconductor substrate 120. Note: Figure 3 This corresponds to the cross-sectional view along line A-A' in the diagram.

[0087] In the accompanying drawings, the semiconductor region 121 of the photoelectric conversion unit 101 is arranged on the upper right side, and the semiconductor region 124 of the charge retention unit 102 is arranged on the lower left side. A charge transfer unit 103 is disposed between the photoelectric conversion unit 101 and the charge retention unit 102. The three-dimensional polygon of the charge transfer unit 103 represents the substrate surface gate 133. Additionally, the opening portion 129 is represented by a polygon with alternating dashed and dotted lines. The dashed polygon represents the embedded gate 132. The opening portion 129 and the embedded gate 132 in the figure represent an example of an octagon in top view. Here, the plan view represents a view taken from a direction perpendicular to the surface of the semiconductor substrate 120. The opening portion 129, etc., are configured to have polygons on a surface parallel to the surface of the semiconductor substrate 120.

[0088] In addition, Figure 2MOS transistors 104 to 106 are described in the figure. They are arranged on the lower right side of the figure. MOS transistor 104 is composed of semiconductor regions 125 and 126 and a gate 134. Semiconductor regions 125 and 126 correspond to the source and drain regions, respectively. MOS transistor 105 is composed of semiconductor regions 126 and 127 and a gate 135. Semiconductor regions 126 and 127 correspond to the drain and source regions, respectively. MOS transistor 106 is composed of semiconductor regions 127 and 128 and a gate 136. Semiconductor regions 127 and 128 correspond to the drain and source regions, respectively. Note that gates 134 to 136 are gates formed by electrodes disposed on the front surface side of the semiconductor substrate 120, similar to the surface gate 133.

[0089] The semiconductor region 125 constituting the source region of MOS transistor 104 and the gate 135 of MOS transistor 105 are connected to the semiconductor region 124 constituting the charge retention unit 102. Wiring 109 in the figure represents the wiring used to connect these and is constructed by... Figure 3 The wiring layer 143 described in the figure constitutes the wiring. Additionally, the black circles in the figure indicate connection portions to wiring 109, semiconductor region 124, etc. Contact plugs are arranged in the connection portions. As described above, MOS transistors 105 and 106 constitute the image signal generation unit 110.

[0090] Note that a configuration in which the charge retention unit 102 and MOS transistors 104 to 106 are shared by multiple pixels 100 can be adopted. As shown, the charge transfer unit 103 and the photoelectric conversion unit 101 are disposed in one long side of the octagonal semiconductor region 124. Alternatively, by disposing of the charge transfer unit 103 and the photoelectric conversion unit 101 in each of the other three long sides of the semiconductor region 124, four pixels 100 can share the charge retention unit 102, the MOS transistor 104, and the image signal generation unit 110.

[0091] By recrystallizing the Si in the inner wall of the opening formed in the semiconductor substrate 120, an opening 129 configured as a polygon in a top view can be formed. Specifically, a circular opening is formed on the front surface side of the semiconductor substrate 120 and heated to several hundred degrees Celsius. This heating causes Si migration in the semiconductor substrate 120. The migrated Si precipitates and recrystallizes on the side of the opening. During recrystallization, by growing a face with a specific orientation (100 face or 110 face), an opening 129 with a polygonal cross-section surrounded by that face can be formed.

[0092] The semiconductor substrate can be heated immediately before the step of forming the gate insulating film 131 in the opening portion 129. As described above, the gate insulating film 131 can be formed by oxidizing the surface of the semiconductor substrate 120 including the opening portion 129. Because the semiconductor substrate 120 is heated in the oxidation step, the steps of manufacturing the imaging element 1 can be simplified by successively performing the steps of forming the inner wall of the opening portion 129 into a polygon and the oxidation step. As a method of oxidizing the semiconductor substrate 120, free radical oxidation and plasma oxidation can be applied. These are oxidation methods of oxidizing the semiconductor substrate 120 with oxygen free radicals.

[0093] [Effect of embedded gate]

[0094] Figure 5 This is a plan view illustrating an example configuration of an embedded gate according to a first embodiment of the present disclosure. The drawing is... Figure 4 An enlarged view of a portion of the embedded gate 132 of the charge transfer unit 103 described herein. In the figure, the gate oxide film 131 is indicated by a shaded line. Note that the description of the substrate surface gate 133 is omitted. As described above, the opening portion 129 can be formed as an octagon when viewed from above. Furthermore, the gate insulating film 131 formed along the inner wall of the opening portion 129 is also octagonal, and the outline of the embedded gate 132 is also octagonal.

[0095] When the charge in the semiconductor region 121 of the photoelectric conversion unit 101 is transferred to the semiconductor region 124 of the charge retention unit 102, the charge moves along a channel formed on the outside of the opening portion 129. Since the channel is formed along the octagonal shape of the opening portion 129, the charge from the semiconductor region 121 moves along the octagonal shape of the opening portion 129. The dashed line in the figure represents the circle surrounding the octagonal opening portion 129, which is formed as a circle when viewed from above. Furthermore, the curved arrows in the figure represent examples of charge movement paths.

[0096] As shown in the figure, the sides of the octagon are shorter than the circumference of the circumscribed circle. Therefore, compared to the case where the charge transfer unit 103 includes a gate embedded in a circular opening, the charge transfer unit 103 including the octagonal opening 129 and the embedded gate 132 embedded in the opening can have a reduced charge transfer path. Thus, the time required to transfer charge can be reduced. Furthermore, the charge transfer path is expanded by forming the opening 129 as an octagon. This is because the channel extends from the circumference shown in the figure to the position of the octagon's sides. Therefore, the charge transfer efficiency in the charge transfer unit 103 can be improved.

[0097] Furthermore, since the opening 129 is octagonal when viewed from above, the area of ​​the inner surface of the opening 129 can be reduced compared to a circular opening 129. This reduces defects in the semiconductor substrate 120 formed within the opening 129. It also lowers the surface level of the opening 129 and reduces the generation of dark current.

[0098] This effect can be achieved by making the opening 129 a polygon with six or more sides when viewed from above. On the other hand, if the opening 129 is formed as a quadrilateral or pentagon when viewed from above, the electric field concentrates on the gate insulating film 131 at the vertices of the opening 129, which may cause defects such as broken wires. This is because the vertices of the opening 129 have small angles. The vertices of the opening 129 can be set to 120 to 150 degrees. This reduces the electric field concentration on the gate insulating film 131 at the vertices of the opening 129.

[0099] Furthermore, the spacing between the opening 129 and the semiconductor region 121 of the photoelectric conversion unit 101 can be widened by configuring the opening 129 as a polygon. The "D" shown in the figures indicates an increase in the spacing between the opening 129 and the semiconductor region 121 compared to a circular opening 129. By widening the spacing between the semiconductor region 121 and the photoelectric conversion unit 101, the spacing between the boundary of the P-type semiconductor region 123 (not shown) near the opening 129 and the semiconductor region 121 can be widened. As described above, the substrate surface gate 133 is configured to cover the semiconductor region 123. The effect of the potential barrier at the interface between the substrate surface gate 133 and the photoelectric conversion unit 101 can be reduced. The effect of the potential barrier can be further reduced by relatively widening the spacing between the boundaries of the semiconductor region 123 and the semiconductor region 121.

[0100] Similarly, since the opening portion 129 is configured as a polygon, the distance between the boundaries of the semiconductor region 123 and the semiconductor region 124 can be relatively increased, thereby improving the effect of mitigating the rapidly changing electric field.

[0101] The side of the opening portion 129, configured as a polygon, is positioned parallel to the interface with the semiconductor region 121 of the photoelectric conversion unit 101, thus maximizing the spacing between the boundaries of the semiconductor region 123 and the semiconductor region 121. This can be achieved by forming an alignment plane in a direction parallel to the boundary of the semiconductor region 121. The alignment plane 129a in the figure represents an alignment plane in a direction parallel to the boundary of the semiconductor region 121. For example, the 100 facet of grown Si can be used as the alignment plane 129a, thus allowing the side of the opening portion 129 to be positioned parallel to the boundary of the semiconductor region 121.

[0102] Such an orientation surface 129a can be formed, for example, by adjusting the orientation of the wafer-shaped semiconductor substrate 120 on the surface side and the orientation of the orientation plane. For example, using a wafer with a 100-facet surface, the orientation plane is set to a 100-facet, thereby allowing a 100-facet to be formed on the surface of the opening portion perpendicular or parallel to the orientation plane. Then, the boundary of the semiconductor region 121 is arranged in a direction perpendicular or parallel to the orientation plane, so that a 100-facet, which is an orientation plane parallel to the boundary of the semiconductor region 121, can be formed in the opening portion 129 near the semiconductor region 121. In this case, an orientation surface 110-facet is formed on the surface adjacent to the orientation surface 129a disposed on the 100-facet of the opening portion 129. "A" shown in the figures indicates the angle formed by these planes. A can be set to 120 to 150 degrees.

[0103] Similarly, the side of the polygonal opening 129 can be positioned parallel to the interface with the semiconductor region 124 of the charge holding unit 102. In this case, the spacing between the boundaries of the semiconductor region 123 and the semiconductor region 124 can be widened, and the aforementioned effect of mitigating changes in the electric field can be improved.

[0104] [Methods for creating pixels]

[0105] Figures 6 to 9 This is a diagram illustrating an example of a pixel manufacturing method according to a first embodiment of the present disclosure. First, a p-type well region is formed in a semiconductor substrate 120. Next, an n-type semiconductor region 121 is formed in the well region. Figure 6 A in the middle.

[0106] Next, a silicon-based insulating film 401 is formed on the surface of the semiconductor substrate 120. The silicon-based insulating film 401 is an insulating film composed of laminated SiN and SiO2, and serves as a mask when forming the opening 129 in the semiconductor substrate 120. The silicon-based insulating film 401 can be formed by chemical vapor deposition (CVD). Figure 6 (B in the middle).

[0107] Next, an opening 402 is formed in the silicon-based insulating film 401, the opening 402 being in the region where the opening 129 is formed. This can be achieved by applying a resist with the opening 402 at the location of the opening on the surface of the silicon-based insulating film 401 and performing etching. Figure 6 It is formed by C in the middle.

[0108] Next, the opening 129 is formed. This can be done by etching the front surface side of the semiconductor substrate 120 using a silicon-based insulating film 401 as a mask. Dry etching can be applied. The formed opening 129 is configured, for example, as a circle. Figure 7 (D in the middle).

[0109] Next, a sacrificial oxide film 403 is formed on the surface of the silicon-based insulating film 401 and the inner wall of the opening 129. The sacrificial oxide film 403 can be formed as follows: First, the semiconductor substrate 120 is heated while supplying oxygen (O2) and hydrogen (H2). Under the supplied gas conditions, oxygen free radicals are generated by raising the temperature of the semiconductor substrate 120 to several hundred degrees Celsius. The surface of the semiconductor substrate 120 is oxidized by the oxygen free radicals, and a sacrificial oxide film 403 is formed. Figure 7 (E in the middle).

[0110] Next, semiconductor region 123 is formed. This can be achieved by implanting boron (B) ions using a silicon-based insulating film 401 as a mask. Figure 8 (F in the middle).

[0111] Next, using substances such as hydrofluoric acid ( Figure 8 The chemical liquid in G) removes the sacrificial oxide film 403 and the silicon-based insulating film 401.

[0112] Next, the Si on the inner wall of the opening 129 is recrystallized. This can be done by heating the semiconductor substrate 120. The semiconductor substrate 120 is heated to several hundred degrees and held, which causes the Si constituting the semiconductor substrate 120 to migrate, and the Si recrystallizes on the inner wall of the opening 129. Thus, an opening 129 with a polygonal shape in plan view can be formed. Furthermore, the opening 129, due to the Si (… Figure 8 The narrowing occurs due to the recrystallization of H in Si. During the recrystallization of Si, it is preferable to supply O2 gas or O2 gas mixed with H2 gas. This is because it can be used in conjunction with the next free radical oxidation step.

[0113] Next, a gate insulating film 131 is formed on the front surface of the semiconductor substrate 120 by oxidizing Si. As described above, free radical oxidation can be applied to the oxidation of Si. Similar to the formation of the sacrificial oxide film 403 described above, the gate insulating film 131 can be formed by heating the semiconductor substrate 120 to several hundred degrees Celsius while supplying O2 gas or O2 gas mixed with H2 gas. Figure 8 (I in the middle).

[0114] Next, a polycrystalline silicon film 404 is formed on the surface side of the semiconductor substrate 120. In this case, a polycrystalline silicon film 404 is also formed in the opening portion 129. This can be achieved by CVD (…). Figure 9 (J) is carried out.

[0115] Next, the polysilicon film 404 is removed from the region of the substrate surface gate 133 on the surface side of the semiconductor substrate 120. This can be done by etching the polysilicon film 404. Therefore, the substrate surface gate 133 and the embedded gate 132 can be formed. Figure 9 K in the middle.

[0116] Next, semiconductor regions 122 and 124 are formed in the semiconductor substrate 120. This can be done by ion implantation. Figure 9 L in the middle.

[0117] Next, wiring region 140 is formed on the front surface side of semiconductor substrate 120. Next, the rear surface side of semiconductor substrate 120 is ground to thin semiconductor substrate 120. Next, insulating film 150, color filter 160, protective film 170, and on-chip lens 180 are sequentially formed on the rear surface side of semiconductor substrate 120. Thus, imaging element 1 can be manufactured.

[0118] Note that the sacrificial oxide film 403 and the gate insulating film 131 can be formed by plasma oxidation, which uses oxygen plasma to oxidize Si and generate oxygen free radicals. Alternatively, the Si on the inner wall of the opening portion 129 can be recrystallized during the formation of the sacrificial oxide film 403.

[0119] [Variation Example]

[0120] In the charge transfer unit 103 described above, the gate insulating film 131 and the embedded gate 132 are arranged in the octagonal opening 129 in the plan view, but other shapes of openings 129 can also be used.

[0121] Figure 10 This is a plan view illustrating another configuration example of pixels according to a first embodiment of the present disclosure. The view shows the shape of the opening portion 129, etc., of the charge transfer unit 103, and... Figure 5 Similarly. The opening 129 in the diagram is similar. Figure 5 The opening portion 129 in the figure is different. The opening portion is configured as a flat octagon. When the opening portion of the semiconductor substrate 120 before Si recrystallization is configured as an ellipse in the top view, a flat polygonal opening portion 129 as shown can be formed. By arranging the embedded gate 132 in the opening portion 129, a flat octagonal embedded gate 132 can be formed. The charge transfer path can also be reduced in the embedded gate 132 with a flat octagon.

[0122] As described above, in the imaging element 1 according to the first embodiment of this disclosure, the embedded gate 132 of the charge transfer unit 103, which is composed of a vertical transistor, is configured as a polygon in a plan view, and thus the charge transfer path of the charge transfer unit 103 can be reduced. Therefore, the charge transfer efficiency in the charge transfer unit 103 can be improved.

[0123] <2. Second Implementation Method>

[0124] In the imaging element 1 of the first embodiment, a substrate surface gate 133 is disposed in the charge transfer unit 103 of the pixel 100. On the other hand, the imaging element 1 of the second embodiment of the present invention differs from the imaging element of the first embodiment in that the substrate surface gate 133 is omitted.

[0125] [Pixel configuration]

[0126] Figure 11 This is a cross-sectional view illustrating an example of pixel configuration according to a second embodiment of the present disclosure. The accompanying drawing is a schematic cross-sectional view illustrating an example of pixel configuration 100, similar to... Figure 3 This pixel and Figure 3 The pixel 100 described in the text is different. The substrate surface gate 133 of the charge transfer unit 103 is omitted.

[0127] The charge transfer unit 103 in the figure controls the transfer of charge from the photoelectric conversion unit 101 to the charge retention unit 102 through the embedded gate 132. In addition, in the figure, the opening portion 129 and the embedded gate 132 are polygonal when viewed from above.

[0128] The configuration of imaging element 1 other than that described above is the same as that of imaging element 1 described in the first embodiment of this disclosure, and therefore its description will be omitted.

[0129] As described above, in the imaging element 1 of the second embodiment of the present disclosure, the charge transfer path can be reduced by omitting the substrate surface gate 133 of the charge transfer unit 103.

[0130] <3. Third Implementation Method>

[0131] In the imaging element 1 of the first embodiment, the photoelectric conversion unit 101 of the pixel 100 is disposed near the front surface side of the semiconductor substrate 120. On the other hand, the imaging element 1 of the third embodiment of this disclosure differs from the imaging element of the first embodiment in that the photoelectric conversion unit 101 is disposed deep within the semiconductor substrate 120.

[0132] [Pixel configuration]

[0133] Figure 12This is a cross-sectional view illustrating an example of pixel configuration according to a third embodiment of the present disclosure. The accompanying drawing is a schematic cross-sectional view illustrating an example of pixel configuration 100, similar to... Figure 3 Pixel 100 and in Figure 3 The pixel 100 described in the text is different. The semiconductor region 121 of the photoelectric conversion unit 101 is disposed on the rear surface side of the semiconductor substrate 120.

[0134] In the attached figure, the semiconductor region 121 of the photoelectric conversion unit 101 is not arranged on the front surface side of the semiconductor substrate 120. Therefore, the semiconductor region 124 of the charge retention unit 102 provided on the front surface side of the semiconductor substrate 120 can be provided at a position overlapping with the semiconductor region 121 of the photoelectric conversion unit 101. As a result, the pixel 100 can be miniaturized.

[0135] In the figure, the charge transfer unit 103 transfers the charge generated by the photoelectric conversion unit 101 in the thickness direction of the semiconductor substrate 120. The opening portion 129 and the embedded gate 132 of the charge transfer unit 103 are arranged as polygons in the plan view, corresponding to the... Figure 3 Similar to the charge transfer unit 103 in the semiconductor substrate. Therefore, the area of ​​the inner surface of the opening 129 can be reduced, and the surface level of the semiconductor substrate 120 in the opening 129 can be reduced. Furthermore, the generation of dark current can be suppressed.

[0136] The configuration of imaging element 1 other than that described above is the same as that of imaging element 1 described in the first embodiment of this disclosure, and therefore its description will be omitted.

[0137] As described above, in the imaging element 1 of the third embodiment of this disclosure, the charge generated by the photoelectric conversion unit 101 disposed on the rear surface side of the semiconductor substrate 120 is transferred in the thickness direction of the semiconductor substrate 120 through the charge transfer unit 103. Even in this case, the opening portion 129 and the embedded gate 132 of the charge transfer unit 103 are configured as polygons, and thus the surface level formed in the opening portion 129 can be reduced and the generation of dark current can be reduced.

[0138] It is important to note that, in Figure 10 The opening portion 129 and the embedded gate 132 can be applied to other embodiments. Specifically, Figure 10 The opening portion 129 and the embedded gate 132 can be applied to Figure 11 and Figure 12 The charge transfer unit 103 in the middle.

[0139] <4. Examples of application to cameras>

[0140] The technology disclosed herein (the technology) can be applied to a variety of products. For example, the technology can be implemented as an imaging element mounted on an imaging device such as a camera.

[0141] Figure 13 This is a block diagram illustrating an example of a schematic configuration of a camera as an imaging device to which the present technology can be applied. The camera 1000 in the figure includes a lens 1001, an imaging element 1002, an imaging control unit 1003, a lens driving unit 1004, an image processing unit 1005, an operation input unit 1006, a frame memory 1007, a display unit 1008, and a recording unit 1009.

[0142] Lens 1001 is the imaging lens of camera 1000. Lens 1001 focuses light from the subject, so that the light is incident on the imaging element 1002 (described later) and forms an image of the subject.

[0143] Imaging element 1002 is a semiconductor element that images light from a subject focused by lens 1001. Imaging element 1002 generates an analog image signal corresponding to the emitted light, converts the analog image signal into a digital image signal, and outputs the digital image signal.

[0144] The imaging control unit 1003 controls the imaging in the imaging element 1002. The imaging control unit 1003 controls the imaging element 1002 by generating a control signal and outputting the control signal to the imaging element 1002. Furthermore, the imaging control unit 1003 can perform autofocus in the camera 1000 based on the image signal output from the imaging element 1002. Here, autofocus is a system that detects the focal position of the lens 1001 and automatically adjusts the focal position. As autofocus, a method can be used to detect the image surface phase difference based on phase difference pixels arranged in the imaging element 1002 to detect the focal position (image surface phase difference autofocus). Alternatively, a method can be used to apply the position where the contrast of the image is maximized as the focal position (contrast autofocus). The imaging control unit 1003 adjusts the position of the lens 1001 via the lens drive unit 1004 and performs autofocus based on the detected focal position. Meanwhile, the imaging control unit 1003 can be configured, for example, as a digital signal processor (DSP) with firmware.

[0145] The lens driving unit 1004 drives the lens 1001 based on the control of the imaging control unit 1003. The lens driving unit 1004 can drive the lens 1001 by changing the position of the lens 1001 using a built-in motor.

[0146] The image processing unit 1005 processes the image signal generated by the imaging element 1002. This processing includes, for example, demosaicing to generate an image signal with insufficient color in the image signal corresponding to the red, green, and blue of each pixel; noise reduction to remove noise from the image signal; and image signal encoding. The image processing unit 1005 may be configured as, for example, a microcomputer equipped with firmware.

[0147] The operation input unit 1006 receives operation input from the user of the camera 1000. For example, a button or touch panel can be used as the operation input unit 1006. The operation input received by the operation input unit 1006 is sent to the imaging control unit 1003 and the image processing unit 1005. Thereafter, processing corresponding to the operation input begins, such as processing for imaging the subject.

[0148] The frame memory 1007 is a memory that stores frames as image signals corresponding to the screen. The frame memory 1007 is controlled by the image processing unit 1005 and holds the frames during image processing.

[0149] Display unit 1008 displays the image processed by image processing unit 1005. For example, a liquid crystal panel can be used as display unit 1008.

[0150] The recording unit 1009 records the images processed by the image processing unit 1005. For example, a memory card or hard disk can be used as the recording unit 1009.

[0151] The camera to which this disclosure is applicable has been described above. This technology can be applied to the imaging element 1002 in the aforementioned components. Specifically, in Figure 1 The imaging element 1 shown is applicable to the imaging element 1002. Since applying the imaging element 1 to the imaging element 1002 improves the charge transfer efficiency in the charge transfer unit 103, the imaging speed of the camera 1000 can be increased. Note that the image processing unit 1005 is an example of the processing circuit described in the claims. The camera 1000 is an example of the imaging apparatus described in the claims.

[0152] <5. Examples of the Application of Endoscopic Surgical Systems>

[0153] The technology disclosed herein can be applied to various products. For example, the technology disclosed herein can be applied to endoscope operating systems.

[0154] Figure 14 This is a diagram illustrating an example of a schematic configuration of an endoscope operating system to which the technology according to this disclosure can be applied.

[0155] Figure 14The illustration shows an operator (doctor) 11131 performing surgery on a patient 11132 on bed 11133 using an endoscopic surgery system 11000. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, a pneumoperitoneum tube 11111, an energy processor 11112, and other surgical tools 11110, a support arm device 11120 supporting the endoscope 11100, and a trolley 11200 carrying various devices for endoscopic surgery.

[0156] Endoscope 11100 includes: a main tube 11101, having a region of predetermined length inserted distally into a body cavity of patient 11132; and a camera 11102 connected to the base of the main tube 11101. In the illustrated example, an endoscope 11100 configured as a so-called rigid endoscope having a rigid main tube 11101 is shown; however, it may also be configured as a so-called flexible endoscope having a flexible body tube.

[0157] An opening for inserting an objective lens is provided at the front end of the main tube 11101. A light source device 11203 is connected to the endoscope 11100. Light generated by the light source device 11203 is guided by a light guide extending into the main tube 11101 to the distal end of the main tube, and then illuminates the subject within the cavity of the patient 11132 through the objective lens. The endoscope 11100 can be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0158] An optical system and imaging element are housed inside the camera 11102, and light reflected from the observed target (observation light) is focused onto the imaging element by the optical system. The imaging element performs photoelectric conversion on the observation light to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent as RAW data to the CCU (camera control unit) 11201.

[0159] The CCU 11201 consists of a central processing unit (CPU), a graphics processing unit (GPU), etc., and comprehensively controls the operation of the endoscope 11100 and the display device 11202. In addition, the CCU 111201 receives image signals from the camera 11102 and performs various image processing on the image signals used for displaying images based on the image signals, such as image processing (de-mosaic processing).

[0160] The display device 11202 displays an image based on the image signal that has undergone image processing by the CCU 11201 under the control of the CCU 11201.

[0161] The light source device 11203 has a light source such as a light-emitting diode (LED) and supplies illumination light to the endoscope 11100 for imaging the operating unit and the like.

[0162] Input device 11204 is the input interface of endoscopic surgery system 11000. Users can input various information or commands into endoscopic surgery system 11000 through input device 11204. For example, users can input commands to change the imaging conditions of endoscope 11100 (type of illumination light, magnification, focal length, etc.).

[0163] The treatment device control device 11205 controls the drive of the energy treatment device 11112 for use in tissue cauterization, incision, vascular closure, etc. The pneumoperitoneum device 11206 delivers gas into the body cavity via the pneumoperitoneum tube 11111 to inflate the patient's body cavity 11132, ensuring the field of vision of the endoscope 11100 and ensuring the operator's working space. The recorder 11207 is a device capable of recording various information about the surgery. The printer 11208 is a device capable of printing various information about the operation in various forms such as text, images, and graphics.

[0164] The light source device 11203 that provides illumination light to the endoscope 11100 during imaging in the operating section can be composed of, for example, an LED, a laser light source, or a white light source configured in combination with them. When the white light source is configured as a combination of RGB laser light sources, the output intensity and timing of each color (each wavelength) can be controlled with high precision. Therefore, the light source device 11203 can adjust the white balance of the captured image. Furthermore, in this case, by illuminating the observed target with laser light from the RGB laser light source in chronological order and controlling the driving of the imaging element of the camera 11102 in sync with the illumination timing, images corresponding to RGB can also be captured in chronological order. According to this method, color images can be obtained even if a color filter is not provided in the imaging element.

[0165] The drive of the light source device 11203 can be controlled to change the intensity of the light to be output at predetermined intervals. By controlling the drive of the imaging element of the camera 11102 in time synchronization with the change in light intensity, acquiring images sequentially, and combining images, an image with a high dynamic range that does not have so-called black and white spots can be generated.

[0166] The light source device 11203 can be configured to supply light with a predetermined wavelength band corresponding to special light observation. Special light observation, for example, involves irradiating a specific tissue, such as blood vessels on the mucosal surface, with high contrast by using light whose absorption of light by biological tissue is wavelength-dependent and has a narrower band than the illumination light used in normal observation (i.e., white light). Alternatively, special light observation can also involve fluorescence observation, where an image is obtained using fluorescence generated by irradiation with excitation light. Fluorescence observation can be performed by emitting excitation light into body tissue and observing fluorescence from the body tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into body tissue and emitting excitation light corresponding to the fluorescence wavelength of the reagent into the body tissue to obtain a fluorescence image. The light source device 11203 can be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0167] Figure 15 It is shown in Figure 14 A block diagram showing an example of the functional configuration of camera 11102 and CCU 11201.

[0168] Camera 11102 includes a lens unit 11401, an imaging unit 12, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. CCU 11201401 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. Camera 11102 and CCU 11201 are connected to communicate with each other via transmission cable 11400.

[0169] Lens unit 11401 is an optical system disposed in the connecting unit along with main tube 11101. Observation light received from the distal end of main tube 11101 is guided to camera 11102 and incident on lens unit 11401. Lens unit 11401 is configured to include multiple lenses comprising a combination of zoom lens and focusing lens.

[0170] Imaging unit 11402 is composed of imaging elements. The imaging elements constituting imaging unit 11402 can be a single element (so-called single-plate type) or multiple elements (so-called multi-plate type). When imaging unit 11402 is configured as a multi-plate type, for example, an image signal corresponding to RGB is generated by the imaging elements, and a color image can be obtained by synthesizing the image signals. Optionally, imaging unit 11402 can be configured to include a pair of imaging elements for acquiring right-eye and left-eye image signals corresponding to 3D (dimensional) display, respectively. By performing 3D display, the surgical operator 11131 can more accurately grasp the depth of biological tissue within the operating unit. When imaging unit 11402 is configured as multi-plate, multiple systems of lens unit 11401 can be set to correspond to each imaging element.

[0171] Furthermore, the imaging unit 11402 need not be located within the camera 11102. For example, the imaging unit 11402 can be located inside the main body tube 11101 immediately after the objective lens.

[0172] The drive unit 11403 is composed of an actuator, and the zoom lens and focusing lens of the lens unit 11401 move a predetermined distance along the optical axis under the control of the camera control unit 11405. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0173] The communication unit 11404 comprises a communication device for sending various information to or receiving various information from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as raw data to the CCU 11201 via the transmission cable 11400.

[0174] Furthermore, the communication unit 11404 receives control signals from the CCU 11201 for controlling the camera 11102 and supplies the control signals to the camera control unit 11405. The control signals include, for example, information about imaging conditions, such as information indicating the frame rate of a specified captured image, information indicating the exposure value when a specified image is captured, and / or information indicating the magnification and focus of a specified captured image.

[0175] It should be noted that imaging conditions (e.g., the frame rate, exposure value, magnification, and focus mentioned above) can be appropriately specified by the user or can be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is provided with so-called automatic exposure (AE), automatic focus (AF), and automatic white balance (AWB) functions.

[0176] The camera control unit 11405 controls the driving of the camera 11102 based on the control signals received from the CCU 111201 via the communication unit 11404.

[0177] The communication unit 11411 comprises a communication device for sending various information to or receiving various information from the camera 11102. The communication unit 11411 receives image signals transmitted from the camera 11102 via the transmission cable 11400.

[0178] In addition, the communication unit 11411 sends control signals to the camera 11102 to control the camera 11102. The image signal or control signal can be transmitted via electrical communication, optical communication, etc.

[0179] The image processing unit 11412 applies various types of image processing to the image signal, which is raw data sent from the camera 11102.

[0180] The control unit 11413 performs various controls on the imaging of the endoscope 11100's operating unit and the display of the resulting image. For example, the control unit 11413 generates control signals for controlling the drive of the camera 11102.

[0181] Furthermore, based on the image signal processed in the image processing unit 11412, the control unit 11413 causes the display device 11202 to display a captured image showing the operation section, etc. At this time, the control unit 11413 can use various image recognition technologies to identify various subjects in the captured image. For example, by detecting the shape, color, etc. of the edges of the subjects contained in the imaging image, the control unit 11413 can identify surgical instruments such as forceps used with the energy processing tool 11112, specific biological parts, bleeding, and spray. When the display device 11202 displays the captured image, the control unit 11413 can use the recognition results to overlay various operation support information onto the image of the operation section for display. By overlaying and displaying operation support information and prompting the surgical operator 11131, the burden on the surgical operator 11131 can be reduced, or the surgical operator 11131 can perform the operation reliably.

[0182] The transmission cable 11400 connecting the camera 11102 and the CCU 11201 is an electrical signal cable that supports electrical signal communication, an optical fiber that supports optical communication, or a composite cable thereof.

[0183] In the example shown in the accompanying drawings, communication is performed wired using transmission cable 11400, but communication between camera 11102 and CCU 11201 can be performed wirelessly.

[0184] Examples of endoscope operating systems that can be applied according to the technology of this disclosure have been described above. The technology of this disclosure can be applied to the imaging unit 11402 of the camera 11102 in the above configuration. Specifically, Figure 1 The imaging element 1 can be applied to the imaging unit 10402. High-speed imaging can be performed by applying the technology according to this disclosure to the imaging unit 10402.

[0185] Although the endoscopic operating system has been described here as an example, the techniques according to this disclosure can be applied to others, such as microscopic operating systems.

[0186] <6. Examples of application to moving bodies>

[0187] The technology disclosed herein can be applied to a variety of products. For example, the technology disclosed herein can be implemented as a device installed in any type of mobile body (such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, aircraft, drones, ships, and robots).

[0188] Figure 16 This is a block diagram illustrating an example of a schematic configuration of a vehicle control system, which is an example of a mobile body control system to which the technology according to this disclosure can be applied.

[0189] The vehicle control system 12000 includes multiple electronic control units interconnected via a communication network 12001. Figure 16 In the example shown, the vehicle control system 12000 further includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, as functional components of the integrated control unit 12050, a microcomputer 12051, a sound and image output unit 12052, and an in-vehicle network I / F (interface) 12053 are shown.

[0190] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a drive force generation unit that generates drive force for a vehicle such as an internal combustion engine or drive electric motor, a drive force transmission mechanism that transmits drive force to the wheels, a steering mechanism that adjusts the vehicle's steering angle, and a braking device that generates braking force for the vehicle.

[0191] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for keyless entry systems, smart key systems, power window devices, or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches transmitted from a portable device that serves as a substitute key can be input to the body system control unit 12020. The body system control unit 12020 receives these radio wave or signal inputs and controls the vehicle's door locking devices, power window devices, lights, etc.

[0192] The vehicle exterior information detection unit 12030 detects external information of the vehicle on which the vehicle control system 12000 is installed. For example, the imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives the captured images. The vehicle exterior information detection unit 12030 can perform object detection processing or distance detection processing for people, cars, obstacles, signs, and letters on the road based on the received images.

[0193] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can also output the electrical signal as an image and ranging information. In addition, the light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0194] The vehicle interior information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 for detecting the driver's state is connected to the vehicle interior information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures images of the driver, and the vehicle interior information detection unit 12040 can calculate the driver's fatigue level or concentration level based on the detection information input from the driver state detection unit 12041, or determine whether the driver is dozing off.

[0195] The microcomputer 12051 can calculate the control target values ​​for the drive force generation device, steering mechanism, or braking device based on information from the vehicle's external information detection unit 12030 or internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, to implement the functions of an advanced driver assistance system (ADAS), the microcomputer 12051 can perform cooperative control, including collision avoidance or shock mitigation, distance-based following, speed maintenance, collision warning, lane departure warning, etc.

[0196] In addition, the microcomputer 12051 controls the driving force generation device, steering mechanism, braking device, etc., based on the information about the vehicle's surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040, thereby enabling coordinated control of autonomous driving and other functions that can be performed automatically without the driver's operation.

[0197] Additionally, the microcomputer 12051 can output control commands to the body system control unit 12020 based on information about the exterior of the vehicle obtained by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for glare prevention, such as switching from high beam to low beam, by controlling the headlights according to the position of the vehicle in front or oncoming vehicles detected by the vehicle exterior information detection unit 12030.

[0198] The sound and image output unit 12052 sends an output signal of at least one of audio and image to an output device capable of visually or audibly notifying passengers or the outside of the vehicle of information. Figure 16 In the example, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are shown as output devices. For example, the display unit 12062 may include at least one of an on-board display and a head-up display.

[0199] Figure 17 This diagram shows an example of the placement of the camera unit 12031.

[0200] exist Figure 17 In addition, vehicle 12100 is equipped with camera units 12101, 12102, 12103, 12104, and 12105 as camera unit 12031.

[0201] Imaging units 12101, 12102, 12103, 12104, and 12105 are positioned, for example, at the front nose, side mirrors, rear bumper, rear door, and the upper part of the windshield inside the vehicle 12100. Imaging unit 12101 at the front nose and imaging unit 12105 at the upper part of the windshield inside the vehicle primarily acquire images of the front of the vehicle 12100. Imaging units 12102 and 12103 at the side mirrors primarily acquire images of the lateral sides of the vehicle 12100. Imaging unit 12104 at the rear bumper or rear door primarily acquires images of the rear of the vehicle 12100. The front view images acquired by imaging units 12101 and 12105 are mainly used for the detection of vehicles, pedestrians, obstacles, traffic signals, traffic signs, lanes, etc.

[0202] Notice: Figure 17An example of the imaging range of imaging units 12101 to 12104 is shown. Imaging range 12111 indicates the imaging range of imaging unit 12101 located in the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located in the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located in the rear bumper or rear door. For example, by overlaying the image data captured by imaging units 12101 to 12104, a top-down view of vehicle 12100 can be obtained.

[0203] At least one of the imaging units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0204] For example, the microcomputer 12051 can extract the nearest three-dimensional object on the path that the vehicle 12100 is traveling (i.e., a three-dimensional object traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher)) as the vehicle ahead by acquiring the distance to each three-dimensional object in the shooting range 12111 to 12114 and the time change of that distance (relative to the vehicle 12100) based on distance information obtained from the shooting units 12101 to 12104. Furthermore, the microcomputer 12051 can set a pre-set distance in front of the vehicle and can perform automatic braking control (including follow-stop control) or automatic acceleration control (including follow-start control). Therefore, for example, cooperative control for autonomous driving purposes, such as allowing the vehicle to drive itself without driver intervention, can be performed.

[0205] For example, the microcomputer 12051 can classify and extract three-dimensional data related to three-dimensional objects, such as two-wheeled vehicles, normal vehicles, large vehicles, pedestrians, and electrodes, based on distance information obtained from imaging units 12101 to 12104, and can use these other three-dimensional objects to perform automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around vehicle 12100 as obstacles that the driver of vehicle 12100 can see and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk, which represents the degree of risk of colliding with each obstacle. When the collision risk is equal to or higher than a set value and there is a possibility of collision, it outputs an alarm to the driver through audio speaker 12061 and display unit 12062, and performs forced deceleration and evasive steering through drive system control unit 12010, thus providing driving support for collision avoidance.

[0206] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian is present in the images captured by the imaging units 12101 to 12104. This pedestrian identification is performed, for example, by extracting feature points from the images captured by the imaging units 12101 to 12104, which act as infrared cameras, and by performing pattern matching processing on a series of feature points representing the outline of a subject to determine whether the subject is a pedestrian. When the microcomputer 12051 determines that a pedestrian is in the images captured by the imaging units 12101 to 12104 and identifies the pedestrian, the sound and image output unit 12052 controls the display unit 12062 to overlay and display a rectangular outline for emphasis on the identified pedestrian. Furthermore, the sound and image output unit 12052 may control the display unit 12062 to display an icon or similar indicating the pedestrian at a desired location.

[0207] Examples of vehicle control systems to which the technology according to this disclosure can be applied have been described above. The technology according to this disclosure can be applied to the imaging unit 12031, etc., in the above configuration. Specifically, in Figure 1 The imaging element 1 described herein can be applied to imaging unit 12031, etc. High-speed imaging can be performed by applying the technology according to this disclosure to imaging device 12031, etc.

[0208] Finally, the above description of the embodiments is merely an example of this disclosure, and this disclosure is not limited to the above embodiments. Therefore, it goes without saying that various changes other than the above embodiments can be made according to design and other factors without departing from the technical spirit of this disclosure.

[0209] Furthermore, the effects described in this specification are merely illustrative and not limiting. Other effects may also be achieved.

[0210] Furthermore, the accompanying drawings in the above embodiments are schematic, and the dimensional ratios of each part may not necessarily match the actual dimensions. Additionally, the drawings naturally include parts with different dimensional relationships and scales.

[0211] It should be noted that this technology may also have the following configurations.

[0212] (1) An imaging element, comprising:

[0213] A photoelectric conversion unit is configured to be arranged on a semiconductor substrate and generate a charge corresponding to the incident light through photoelectric conversion;

[0214] A charge retention unit is configured to retain charge;

[0215] A charge transfer unit is configured to include an opening portion and an embedded gate. The opening portion is formed in a semiconductor substrate and has a polygonal shape in a plan view. The embedded gate is disposed in the opening portion. The charge transfer unit is configured to transfer charge from a photoelectric conversion unit to a charge retention unit.

[0216] The image signal generation unit is configured to generate an image signal based on the held charge.

[0217] (2) The imaging element according to (1), wherein the charge transfer unit includes an opening portion of a polygon with more than six sides.

[0218] (3) The imaging element according to (2), wherein the charge transfer unit includes a polygonal opening portion, wherein the interior angle of the vertex is 120 degrees to 150 degrees.

[0219] (4) The imaging element according to (3), wherein the charge transfer unit includes an octagonal opening portion.

[0220] (5) The imaging element according to any one of (1) to (4), wherein the charge transfer unit includes an opening portion having a polygon formed by recrystallizing a component constituting a semiconductor substrate.

[0221] (6) The imaging element according to any one of (1) to (5), wherein the photoelectric conversion unit includes a boundary surface parallel to the side of the polygon of the opening portion of the charge transfer unit.

[0222] (7) The imaging element according to any one of (1) to (6), wherein the charge holding unit includes a boundary surface parallel to the side of the polygon of the opening portion of the charge transfer unit.

[0223] (8) The imaging element according to any one of (1) to (7), wherein the charge transfer unit further comprises a gate insulating film disposed between the semiconductor substrate and the embedded gate.

[0224] (9) The imaging element according to (8), wherein the charge transfer unit includes a gate insulating film formed by oxidizing a semiconductor substrate.

[0225] (10) The imaging element according to (9), wherein the charge transfer unit includes a gate insulating film formed by oxidizing a semiconductor substrate using oxygen free radicals.

[0226] (11) The imaging element according to any one of (1) to (10), wherein the semiconductor substrate is formed of silicon.

[0227] (12) The imaging element according to any one of (1) to (11), wherein the charge transfer unit further includes a high impurity concentration region disposed on a semiconductor substrate adjacent to the opening portion and configured to have a high impurity concentration.

[0228] (13) The imaging element according to (12), wherein the charge transfer unit further includes a substrate surface gate, the substrate surface gate being adjacent to the embedded gate and configured to have a shape having a high impurity concentration region covering the front surface side of the semiconductor substrate.

[0229] (14) The imaging element according to any one of (1) to (13) further includes: a second high impurity concentration region, which is adjacent to the photoelectric conversion unit, disposed on the front surface side of the semiconductor substrate, and configured to have a high impurity concentration.

[0230] (15) An imaging device, comprising:

[0231] A photoelectric conversion unit is configured to be arranged on a semiconductor substrate and generate a charge corresponding to the incident light through photoelectric conversion;

[0232] A charge retention unit is configured to retain charge;

[0233] A charge transfer unit is configured to include an opening portion and an embedded gate, the opening portion being formed in a semiconductor substrate and having a polygonal shape in a plan view, the embedded gate being disposed in the opening portion, and the charge transfer unit being configured to transfer charge from a photoelectric conversion unit to a charge retention unit.

[0234] An image signal generation unit is configured to generate an image signal based on the held charge; and

[0235] The processing circuitry is configured to process the generated image signal.

[0236] [List of Reference Numbers]

[0237] 1. 1002 Imaging Element

[0238] 10-pixel array

[0239] 30 signal processing units

[0240] 100 pixels

[0241] 101 Photoelectric Conversion Unit

[0242] 102 charge retention units

[0243] 103 Charge Transfer Units

[0244] 104-106 MOS transistors

[0245] 110 Image Signal Generation Unit

[0246] 120 Semiconductor substrate

[0247] 129 Opening section

[0248] 131 Gate insulating film

[0249] 132 Embedded Gate

[0250] 133 Surface gate of substrate

[0251] 403 Sacrificial Oxide Film

[0252] 1000 cameras

[0253] 1005 Image Processing Unit

[0254] Imaging units 10402, 12031, 12101 to 12105

Claims

1. An imaging element, comprising: A photoelectric conversion unit is configured to be arranged on a semiconductor substrate and generate a charge corresponding to the incident light through photoelectric conversion; A charge holding unit is configured to hold the charge; A charge transfer unit is configured to include an opening portion and an embedded gate, the opening portion being formed in the semiconductor substrate and having a polygonal shape in a plan view, the embedded gate being disposed in the opening portion, and the charge transfer unit being configured to transfer charge from the photoelectric conversion unit to the charge retention unit, wherein the charge transfer unit includes the opening portion having a polygonal shape formed by recrystallizing a component constituting the semiconductor substrate; and The image signal generation unit is configured to generate an image signal based on the held charge. The photoelectric conversion unit includes a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit, and the charge retention unit includes a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit.

2. The imaging element according to claim 1, wherein, The charge transfer unit includes the opening portion of a polygon with more than six sides.

3. The imaging element according to claim 1, wherein, The charge transfer unit includes the polygonal opening portion, wherein the interior angle of the vertex is 120 degrees to 150 degrees.

4. The imaging element according to claim 3, wherein, The charge transfer unit includes the octagonal opening portion.

5. The imaging element according to claim 1, wherein, The charge transfer unit further includes a gate insulating film disposed between the semiconductor substrate and the embedded gate.

6. The imaging element according to claim 5, wherein, The charge transfer unit includes the gate insulating film formed by oxidizing the semiconductor substrate.

7. The imaging element according to claim 6, wherein, The charge transfer unit includes the gate insulating film formed by oxidizing the semiconductor substrate using oxygen free radicals.

8. The imaging element according to claim 1, wherein, The semiconductor substrate is formed of silicon.

9. The imaging element according to claim 1, wherein, The charge transfer unit further includes a high impurity concentration region disposed on the semiconductor substrate adjacent to the opening and configured to have a high impurity concentration.

10. The imaging element according to claim 9, wherein, The charge transfer unit further includes a substrate surface gate, which is adjacent to the embedded gate and configured to have the shape of the high impurity concentration region covering the front surface side of the semiconductor substrate.

11. The imaging element according to claim 1, further comprising: The second high impurity concentration region is adjacent to the photoelectric conversion unit, is disposed on the front surface side of the semiconductor substrate, and is configured to have a high impurity concentration.

12. An imaging device, comprising: A photoelectric conversion unit is configured to be arranged on a semiconductor substrate and generate a charge corresponding to the incident light through photoelectric conversion; A charge holding unit is configured to hold the charge; A charge transfer unit is configured to include an opening portion and an embedded gate, the opening portion being formed in the semiconductor substrate and having a polygonal shape in a plan view, the embedded gate being disposed in the opening portion, and the charge transfer unit being configured to transfer charge from the photoelectric conversion unit to the charge retention unit, wherein the charge transfer unit includes the opening portion having a polygonal shape formed by recrystallizing the components constituting the semiconductor substrate; The image signal generation unit is configured to generate an image signal based on the held charge. The photoelectric conversion unit includes a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit, and the charge holding unit includes a boundary surface parallel to the sides of the polygon of the opening portion of the charge transfer unit; and The processing circuitry is configured to process the generated image signal.

Images