Image sensor and method of forming an image sensor

Abstract

The present invention relates to image sensors having image sensing elements surrounded by a BDTI structure and related formation methods. In some embodiments, a first image sensing element and a second image sensing element are arranged adjacent to each other within an image sensing die. A pixel dielectric stack is disposed along a backside of the image sensing die over the image sensing elements. The pixel dielectric stack includes a first high-k dielectric layer and a second high-k dielectric layer. A BDTI structure is disposed between the first image sensing element and the second image sensing element and extends from a backside of the image sensor die to a location within the image sensor die. The BDTI structure includes a trench fill layer surrounded by an isolation dielectric stack. The pixel dielectric stack has a different composition than a composition of the isolation dielectric stack.

Description

Technical Field

[0001] Embodiments of this application relate to image sensors and methods for forming image sensors. Background Technology

[0002] Many modern electronic devices include optical imaging devices that use image sensors (e.g., digital cameras). An image sensor may include a pixel sensor array and supporting logic. The pixel sensor measures incident radiation (e.g., light) and converts it into digital data, and the supporting logic facilitates the reading of the measured values. One type of image sensor is the back-illuminated (BSI) image sensor device. BSI image sensor devices are used to sense the amount of light projected onto the back side of a substrate (which faces the front side of the substrate, including an interconnect structure of multiple metal and dielectric layers built on the front side of the substrate). Compared to front-illuminated (FSI) image sensor devices, BSI image sensor devices offer reduced destructive interference. Summary of the Invention

[0003] Some embodiments of this application provide an image sensor, including: an image sensing die having a front side and a back side opposite to the front side; a first image sensing element and a second image sensing element disposed adjacent to each other within the image sensing die, the first image sensing element and the second image sensing element having a first doping type; a pixel dielectric stack disposed along the back side of the image sensing die above the first image sensing element and the second image sensing element, wherein the pixel dielectric stack includes a first high-k dielectric layer and a second high-k dielectric layer disposed above the first high-k dielectric layer; and a back-side deep trench isolation (BDTI) structure disposed between the first image sensing element and the second image sensing element and extending from the back side of the image sensor die into a location within the image sensor die, wherein the back-side deep trench isolation structure includes a trench filling layer surrounded by an isolation dielectric stack; and wherein the pixel dielectric stack has a first component different from a second component of the isolation dielectric stack.

[0004] Other embodiments of this application provide an image sensor, including: an image sensing die having a front side and a back side opposite to the front side; an image sensing element disposed within the image sensing die, the image sensing element having a first doping type; a back-side deep trench isolation (BDTI) structure surrounding the image sensing element and extending from the back side of the image sensor die to a position within the image sensor die, wherein the back-side deep trench isolation structure includes a trench filling layer surrounded by a first high-k dielectric layer, wherein the first high-k dielectric layer is disposed along the bottom and sidewall surfaces of the trench filling layer and extends upward to cover the lateral surface of the image sensing element; and a second high-k dielectric layer disposed on the first high-k dielectric layer and extending laterally to cover the top surface of the trench filling layer.

[0005] Some embodiments of this application provide a method for forming an image sensor, comprising: forming a photodiode doped layer having a first doping type in a substrate from the front side of an image sensing die; forming a deep trench from the back side of the image sensing die to separate the photodiode doped layer into a first image sensing element and a second image sensing element; forming a first high-k dielectric layer and an isolation dielectric pad extending upward along the lateral surfaces of the first image sensing element and the second image sensing element along the bottom and sidewall surfaces of the deep trench; forming a trench filling layer in the internal spacing of the deep trench; and forming a second high-k dielectric layer on the top surface of the first high-k dielectric layer and the trench filling layer. Attached Figure Description

[0006] The various aspects of the invention will be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industrial practice, the components are not drawn to scale. In fact, for clarity of discussion, the dimensions of the components may be arbitrarily increased or decreased.

[0007] Figure 1 Cross-sectional views of some embodiments of an image sensor are shown, including image sensing elements located below the pixel dielectric stack and surrounded by a back-side deep trench isolation (BDTI) structure.

[0008] Figure 2 Cross-sectional views of some alternative embodiments of an image sensor are shown, including image sensing elements located below the pixel dielectric stack and surrounded by a back-side deep trench isolation (BDTI) structure.

[0009] Figure 3 Cross-sectional views of some alternative embodiments of an image sensor are shown, including image sensing elements located below the pixel dielectric stack and surrounded by a back-side deep trench isolation (BDTI) structure.

[0010] Figure 4Cross-sectional views of some alternative embodiments of an image sensor are shown, including image sensing elements located below the pixel dielectric stack and surrounded by a back-side deep trench isolation (BDTI) structure.

[0011] Figure 5 Cross-sectional views of some embodiments of an integrated chip including an image sensing die and a logic die joined together are shown, wherein the image sensing die includes an image sensing element located below a pixel dielectric stack and surrounded by a back-side deep trench isolation (BDTI) structure.

[0012] Figures 6 to 20 Some embodiments of a method for forming an image sensor having image sensing elements located below a pixel dielectric stack and surrounded by a BDTI structure are shown in cross-sectional views.

[0013] Figures 21 to 25 Some alternative embodiments of a method for forming an image sensor having image sensing elements located below a pixel dielectric stack and surrounded by a BDTI structure are shown in cross-sectional views.

[0014] Figure 26 Flowcharts of some embodiments of a method for forming an image sensor having image sensing elements located below a pixel dielectric stack and surrounded by a BDTI structure are shown. Detailed Implementation

[0015] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the invention. Of course, these are merely examples and are not intended to limit the invention. For example, in the following description, forming a first component on or over a second component can include embodiments where the first and second components are in direct contact, and can also include embodiments where an additional component can be formed between the first and second components, such that the first and second components are not in direct contact. Furthermore, reference numerals and / or characters may be repeated in various instances of the invention. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0016] Furthermore, for ease of description, this document uses spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” to describe the relationship between one element or component and another (or other elements or components) as shown in the figures. In addition to the orientations shown in the figures, spatial relative terms are intended to include different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein can be interpreted accordingly.

[0017] Integrated circuit (IC) technology is constantly improving. This improvement typically involves scaling down device geometry to achieve lower manufacturing costs, higher device integration density, higher speed, and better performance. Complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) devices comprise multiple pixels arranged on or within a substrate. Each pixel has an image sensing element to receive incident light and convert it into an electrical signal. Due to device scaling, the multiple pixels in a CIS device become smaller and closer together. To improve the quantum efficiency of CIS and enhance electrical and optical isolation between adjacent pixels in the image sensor, the multiple pixels are separated from each other by isolation structures.

[0018] Isolation structures can include back-side deep trench isolation (BDTI) structures between adjacent pixels of an image sensor. One image sensor manufacturing process involves forming a grid of deep isolation trenches between adjacent pixels and subsequently forming layers of different materials to fill the deep trenches and extend over the pixels. However, forming high aspect ratio BDTI structures in scaled-down CIS devices is challenging. For example, as the lateral dimensions of the deep isolation trenches decrease, it becomes difficult to implement deep injection or complete filling of the deep isolation trenches. Incomplete filling of the deep isolation trenches results in voids in the BDTI structure, which can adversely affect the optical and electrical performance of the CIS device.

[0019] In view of the above, the present invention relates to an image sensor including a back-side structure and a related method of forming it. In some embodiments, the back-side structure includes a back-side deep trench isolation (BDTI) structure between adjacent pixels of the image sensor and a pixel dielectric stack located on top of the corresponding pixels. The pixel dielectric stack includes some dielectric material that enhances light absorption within the pixel, while the BDTI structure includes some other dielectric material that reduces halo and crosstalk between pixels. By having different dielectric components for the BDTI structure between the pixel and the pixel dielectric stack located on top of the corresponding pixel, the BDTI structure can be better filled, and the pixel dielectric stack can be formed more flexibly. Therefore, the optical and electrical performance of the CIS device is improved.

[0020] In some embodiments, the image sensor includes an image sensing die having a front side and a back side opposite the front side. A first image sensing element and a second image sensing element having a first doping type are arranged adjacent to each other within the image sensing die. A pixel dielectric stack is disposed along the back side of the image sensing die above the first and second image sensing elements. The pixel dielectric stack includes a first high-k dielectric layer and a second high-k dielectric layer disposed above the first high-k dielectric layer. A BDTI structure is disposed between the first and second image sensing elements and extends from the back side of the image sensor die to a location within the image sensor die. The BDTI structure includes a trench-filled layer surrounded by an isolation dielectric stack. As discussed above, the pixel dielectric stack has a first component different from the second component of the isolation dielectric stack.

[0021] In some further embodiments, a first high-k dielectric layer extends downward along the trench fill layer as part of the isolation dielectric stack. A second high-k dielectric layer may be disposed on the first high-k dielectric layer and extend laterally to cover the top surface of the trench fill layer. In some alternative embodiments, the first and second high-k dielectric layers terminate at and directly contact the sidewalls of the isolation dielectric stack. The isolation dielectric stack may include an isolation dielectric pad made of silicon dioxide or a high-k dielectric material. The isolation dielectric stack may also include an isolation conductive pad disposed between the isolation dielectric pad and the trench fill layer. The trench fill layer may be or be composed of metal.

[0022] Figure 1 A cross-sectional view of an image sensor 100 is shown. The image sensor 100 includes an image sensing die 134 having multiple pixel regions that can be arranged in an array including rows and / or columns, such as... Figure 1 The pixel regions 103a and 103b shown are illustrated. Pixel regions 103a and 103b respectively include a first image sensing element 104a and a second image sensing element 104b configured to convert incident radiation (e.g., photons) into electrical signals. In some embodiments, image sensing elements 104a and 104b are portions of a photodiode doped array or a photodiode doped layer 130, or doped wells having a first doping type (e.g., n-type doping by dopants such as phosphorus, arsenic, antimony, etc.). Image sensing elements 104a and 104b may be disposed in adjacent second regions ( Figure 1 (not shown) on or inside a doped substrate or well having a second doping type different from the first doping type (e.g., p-type doping by dopants such as boron, aluminum, indium, etc.).

[0023] Image sensing die 134 has a front side 122 and a back side 124. A BDTI structure 111 is disposed between a first image sensing element 104a and a second image sensing element 104b and extends from the back side 124 of image sensing die 134 into a location within image sensing die 134. According to some embodiments, the BDTI structure 111 includes a trench-filled layer 112 surrounded by an isolation dielectric stack 128. The isolation dielectric stack 128 may include isolation dielectric pads 118 lining the bottom and sidewall surfaces of the trench-filled layer 112. The isolation dielectric stack 128 may also include other conformal dielectric layers to reduce halo and crosstalk between pixel regions 103a, 103b.

[0024] Pixel dielectric stack 126 is disposed along the back surface 124 of the image sensing die 134, above the first image sensing element 104a and the second image sensing element 104b. Pixel dielectric stack 126 has a first component different from the second component of the isolation dielectric stack 128. Pixel dielectric stack 126 includes a dielectric material that enhances light absorption within pixel regions 103a, 103b and can have a greater thickness. By having different dielectric components for the BDTI structure 111 and the pixel dielectric stack 126, the BDTI structure 111 can be better filled, and the pixel dielectric stack 126 can be arranged more flexibly. In some embodiments, a planarization layer 120 is formed on the pixel dielectric stack 126 to provide a flat upper surface. In some embodiments, the planarization layer 120 or an additional dielectric layer disposed above the planarization layer 120 can be used as a bottom antireflective layer (BARL) to reduce the reflection of incident photons. In some embodiments, the planarization layer 120 can be, for example, silicon oxynitride or some other suitable antireflective material, or composed of, for example, silicon oxynitride or some other suitable antireflective material. Therefore, the optical and electrical performance of the image sensor 100 is improved.

[0025] In some embodiments, the pixel dielectric stack 126 includes a first high-k dielectric layer 114 and a second high-k dielectric layer 116 disposed above the first high-k dielectric layer 114. The second high-k dielectric layer 116 may be disposed directly on the first high-k dielectric layer 114. In some embodiments, the first high-k dielectric layer 114 extends downward along the bottom and sidewall surfaces of the trench fill layer 112 as part of the isolation dielectric stack 128. The first high-k dielectric layer 114 may be a conformal layer. The second high-k dielectric layer 116 may cover the entire top surface of the trench fill layer 112 or the BDTI structure 111. The BDTI structure 111 may not have the second high-k dielectric layer 116.

[0026] In some embodiments, the first high-k dielectric layer 114 is composed of aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium silicon oxide (HfSiO), or hafnium aluminum oxide (HfAlO). The second high-k dielectric layer 116 is composed of tantalum oxide (Ta2O5). Other suitable high-k dielectric materials are also within the scope of the invention. Tantalum oxide (Ta2O5) or other similar high-k dielectric materials that are more prone to drooping when formed are undesirable for the BDTI structure 111. Filling the isolation trench with these types of materials may create voids in the BDTI structure 111, which will adversely affect the optical and electrical performance of the image sensor 100. The isolation dielectric liner 118 is composed of silicon dioxide. Alternatively, the isolation dielectric liner 118 is composed of a high-k dielectric material. The trench filling layer 112 is composed of a metal, such as aluminum, ruthenium, etc. Optionally, the trench filling layer 112 is or is composed of a dielectric material, such as silicon dioxide, silicon nitride, and / or other suitable dielectric materials. In some embodiments, the first high-k dielectric layer 114 may have a dielectric layer with a dielectric density of approximately [missing information]. to approximately ( (As an example) within the range of thickness. The insulating dielectric pad 118 can have a thickness of approximately... to approximately ( For the same instance), the thickness is within the range. The second high-k dielectric layer 116 can have a thickness of approximately... to approximately ( For the same instance), the thickness may be within the range of approximately 1.5 μm to approximately 5 μm. In some embodiments, the BDTI structure 111 may have a depth in the range of approximately 1.5 μm to approximately 5 μm. The lateral dimension of the BDTI structure 111 may have a depth in the range of approximately 0.1 μm to approximately 0.3 μm. The lateral dimension of the BDTI structure 111 should be sufficient to implement the formation of dielectric and conductive layers within the BDTI structure (e.g., as with...). Figures 1 to 5 (Related description).

[0027] A first high-k dielectric layer 114 and a second high-k dielectric layer 116 promote light absorption within pixel regions 103a, 103b. The second high-k dielectric layer 116 may be thicker than the first high-k dielectric layer 114. In some embodiments, the second high-k dielectric layer 116 is approximately twice the thickness of or thicker than the first high-k dielectric layer 114. A thinner and more conformal first high-k dielectric layer 114 helps to better fill deep trenches and form a BDTI structure 111 with better consistency. The first high-k dielectric layer 114 can also be used as a passivation layer to passivate surface damage caused by trench etching. An isolation dielectric pad 118 can absorb or reflect incident light to help reduce halo and crosstalk between pixel regions 103a, 103b. A thicker second high-k dielectric layer 116 helps to enhance light absorption within pixel regions 103a, 103b.

[0028] In some embodiments, a plurality of color filters 154 are arranged above the back surface 124 of the image sensing die 134. The plurality of color filters 154 are each configured to transmit incident radiation of a specific wavelength. For example, a first color filter (e.g., a red color filter) may transmit light having wavelengths within a first range, while a second color filter may transmit light having wavelengths within a second range different from the first range. In some embodiments, the plurality of color filters 154 may be arranged within a grid structure of the image sensing elements 104a, 104b located in the pixel regions 103a, 103b.

[0029] Figure 2 A cross-sectional view of an image sensor 200, including image sensing elements 104a, 104b surrounded by a BDTI structure 111, is shown according to some other embodiments. Where applicable, Figure 1 Other components of the image sensor 100 shown in the figure can be incorporated into the image sensor 200. Furthermore, in alternative... Figure 1 In some embodiments, the pixel dielectric stack 126 includes a first high-k dielectric layer 114 and a second high-k dielectric layer 116 terminating at and in direct contact with the sidewalls of the isolation dielectric stack 128. In some embodiments, the isolation dielectric stack 128 may include an isolation dielectric pad 118. In some embodiments, the isolation dielectric pad 118 is or is composed of silicon dioxide. Optionally, the isolation dielectric pad 118 is or is composed of aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium silicon oxide (HfSiO), or hafnium aluminum oxide (HfAlO). Tantalum oxide (Ta2O5) or other similar high-k dielectric materials that are more likely to drape when formed may be used to form the second high-k dielectric layer 116, but are not desirable for the isolation dielectric pad 118 within the BDTI structure 111. Filling the isolation trench with these types of materials may create voids in the BDTI structure 111, which will adversely affect the optical and electrical performance of the image sensor 200.

[0030] Figure 3 A cross-sectional view of an image sensor 300, including image sensing elements 104a, 104b surrounded by a BDTI structure 111, is shown according to some other embodiments. Where applicable, Figure 1 and Figure 2 The image sensors 100 and 200 shown, as well as other components of the image sensors shown in the figures, can be incorporated into image sensor 300. Furthermore, in alternative... Figure 1 and Figure 2 In some embodiments, the isolation dielectric stack 128 further includes an isolation conductive pad 302 disposed between the isolation dielectric pad 118 and the trench fill layer 112. The isolation conductive pad 302 may be or is composed of a metal, such as aluminum, ruthenium, etc. The trench fill layer 112 may be or is composed of a dielectric material, such as silicon dioxide, silicon nitride, and / or other suitable dielectric materials. In some embodiments, during operation, the isolation conductive pad 302 may be negatively biased to generate a positive charge to recover from damage to the sidewalls of the BDTI structure 111, and thus improve performance.

[0031] Figure 4 A cross-sectional view of an image sensor 400, including image sensing elements 104a, 104b surrounded by a BDTI structure 111, is shown according to some other embodiments. Where applicable, Figures 1 to 3 The image sensors 100-300 shown and other components of the image sensors shown in the figures can be incorporated into image sensor 400. Furthermore, in alternative... Figures 1 to 3 In some embodiments, the trench fill layer 112 within the BDTI structure 111 may extend upward and be disposed laterally along the back surface 124 of the image sensing die 134. A planarization layer 120 is then disposed on the trench fill layer 112 as a bottom antireflective layer (BARL) to reduce the reflection of incident photons. In some embodiments, the planarization layer 120 may be or be composed of, for example, silicon oxynitride or some other suitable antireflective material.

[0032] Figure 5 A cross-sectional view of an integrated chip 500 comprising an image sensing die 134 and a logic die 136 bonded together, according to some other embodiments, is shown, wherein the image sensing die 134 has an image sensing element 104 surrounded by a BDTI structure 111. Where applicable, Figures 1 to 4 The image sensors 100-400 shown and other components of the image sensors shown in the figures can be incorporated into the image sensing die 134. In some embodiments, the photodiode doped layer 130 includes an array of deep n-wells 131 and an n-type photodiode layer 132. The BDTI structure 111 can extend from the back side 124 of the image sensing die 134 through the array of deep n-wells 131, as shown in the figure. Figure 1 As shown in the image.

[0033] In some embodiments, a doped shallow isolation well 110 is disposed between adjacent pixel regions 103a and 103b and isolates the adjacent pixel regions 103a and 103b, extending from the front side 122 of the image sensing die 134 into the photodiode doped layer 130. The doped shallow isolation well 110 may have a second doping type (e.g., p-type doping). In some embodiments, the bottom of the BDTI structure 111 may be disposed within a recessed top surface of the doped shallow isolation well 110. In this case, the doped shallow isolation well 110 may reach a depth less than half or less than one-quarter of the depth of the BDTI structure 111. The doped shallow isolation well 110 may be vertically aligned with the BDTI structure 111 (e.g., sharing a common centerline 516). The BDTI structure 111 and the doped shallow isolation well 110 together serve as isolation for the pixel regions 103a and 103b, thereby reducing crosstalk and halo between the pixel regions 103a and 103b. The doped shallow isolation well 110 also promotes the depletion of the image sensing element 104 during operation by providing additional p-type dopant to the image sensing element 104, thereby increasing the full well capacity.

[0034] In some embodiments, the floating diffusion well 204 is positioned between adjacent pixel regions 103a, 103b, extending from the front side 122 of the image sensing die 134 into the photodiode doped layer 130. In some embodiments, the BDTI structure 111 extends to a position located above the floating diffusion well 204. The BDTI structure 111 and the floating diffusion well 204 may be vertically aligned (e.g., sharing a common centerline 516). The transfer gate 202 is arranged laterally between the image sensing element 104 and the floating diffusion well 204 along the front side 122 of the image sensing die 134. The transfer gate 202 may extend from the front side 122 of the image sensing die 134 into a position within the n-type photodiode layer 132. During operation, the transfer gate 202 controls charge transfer from the image sensing element 104 to the floating diffusion well 204. If the charge level is sufficiently high within the floating diffusion well 204, a source follower transistor (not shown) is activated, and charge is selectively output according to the operation of the row selection transistor (not shown) used for addressing. A reset transistor (not shown) can be used to reset the image sensing element 104 between exposure cycles.

[0035] Furthermore, a shallow trench isolation (STI) structure 514 can be positioned between adjacent pixel regions 103a and 103b, extending from the front side 122 of the image sensing die 134 to a location within the photodiode doped layer 130. The STI structure 514 and the BDTI structure 111 can be vertically aligned (e.g., sharing a common centerline, which may or may not share a centerline with the doped shallow isolation well 110). In some embodiments, the doped shallow isolation well 110 extends from the front side 122 of the image sensing die 134 to a location within the photodiode doped layer 130 and surrounds the STI structure 514. In some alternative embodiments, the doped shallow isolation well 110 can separate the STI structure 514 from the photodiode doped layer 130 and / or the BDTI structure 111. The BDTI structure 111, the doped shallow isolation well 110, and the STI structure 514 collectively serve as isolation for the pixel regions 103a and 103b, thereby reducing crosstalk and haloing between the pixel regions 103a and 103b.

[0036] The image sensor die 134 may further include a composite grid 506 disposed between and above pixel regions 103a and 103b. The composite grid 506 may include a metal layer 502 and a dielectric layer 504 stacked on top of each other at the back surface 124 of the image sensor die 134. A dielectric pad 508 liners the sidewalls and top of the composite grid 506. The metal layer 502 may be or is composed of one or more layers of tungsten, copper, aluminum copper, or titanium nitride. The metal layer 502 may have a thickness ranging from approximately 100 nm to approximately 500 nm. The dielectric layer 504 may be or is composed of one or more layers of silicon dioxide, silicon nitride, or combinations thereof. The dielectric layer 504 may have a thickness ranging from approximately 200 nm to approximately 800 nm. The dielectric pad 508 may be an oxide or composed of oxides, such as silicon dioxide. The dielectric pad 508 can have a thickness ranging from approximately 5 nm to approximately 50 nm. Other suitable metallic materials are also within the scope of this invention.

[0037] Metallization stack 108 may be disposed on the front side 122 of image sensing die 134. Metallization stack 108 includes multiple metal interconnect layers disposed within one or more interlayer dielectric (ILD) layers 106. ILD layers 106 may include one or more of a low-k dielectric layer (i.e., a dielectric having a dielectric constant less than about 3.9), an ultra-low-k dielectric layer, or an oxide (e.g., silicon oxide). In some alternative embodiments, BDTI structure 111 may extend through photodiode doped layer 130 and reach ILD layer 106 or the gate dielectric layer of a transistor device, such as the gate dielectric of transport gate 202.

[0038] The logic die 136 may include a logic device 142 disposed above the logic substrate 140. The logic die 136 may also include a metallization stack 144 disposed within the ILD layer 146 located above the logic device 142. The image sensing die 134 and the logic die 136 may be surface-to-surface, surface-to-back, or back-to-back bonded. As an example, Figure 5 A surface-to-surface bonding structure is shown, wherein a pair of intermediate bonding dielectric layers 138, 148 and bonding pads 150, 152 are arranged between an image sensing die 134 and a logic die 136 and are bonded to metallized stacks 108, 144 respectively via fusion or eutectic bonding structures.

[0039] In some embodiments, a plurality of microlenses 156 are arranged above a plurality of color filters 154. The respective microlenses 156 are laterally aligned with the color filters 154 and located above pixel regions 103a, 103b. In some embodiments, the plurality of microlenses 156 have a substantially flat bottom surface adjacent to the plurality of color filters 154 and a curved upper surface. The curved upper surface is configured to focus incident radiation 158 onto the underlying pixel regions 103a, 103b. During operation of the integrated chip 500, the incident radiation 158 is focused onto the underlying pixel regions 103a, 103b by the microlenses 156. When incident radiation or incident light of sufficient energy illuminates the image sensing element 104, it generates electron-hole pairs that produce photocurrent. It should be noted that although the plurality of microlenses 156 are... Figure 5 The image is shown as being fixed to the image sensor, but it should be understood that the image sensor may not include the microlens, and the microlens may be attached to the image sensor later in a separate manufacturing process.

[0040] Figures 6 to 20 Cross-sectional views 600-2000 illustrate some embodiments of a method for forming an image sensor having an image sensing element surrounded by a BDTI structure. In some embodiments, forming the BDTI structure includes forming a deep trench from the back side of the image sensing die and subsequently forming an isolation dielectric stack along the sidewalls and bottom surface of the deep trench, and forming a trench filling layer within the remaining spacing of the deep trench. A pixel dielectric stack is formed along the back side of the image sensing die above the image sensing element. By forming pixel dielectric stacks and isolation dielectric stacks with different dielectric compositions, the deep trench can be filled better, and the pixel dielectric stacks can be formed more flexibly. Therefore, the optical and electrical performance of the CIS device is improved.

[0041] like Figure 6As shown in cross-sectional view 600, a substrate 102 is prepared for use as an image sensing die 134. In various embodiments, the substrate 102 may include any type of semiconductor body (e.g., silicon / germanium / CMOS block, SiGe, SOI, etc.) such as a semiconductor wafer or one or more dies on a wafer, and any other type of semiconductor and / or epitaxial layer formed thereon and / or otherwise associated with it. As an example, a photodiode doped layer 130 of a first doping type is formed on or within a processing substrate comprising a plurality of image sensing elements 104 formed within pixel regions 103a, 103b. In some embodiments, the photodiode doped layer 130 is formed by forming a doped well, such as an array of deep n-type wells 131, within a p-type substrate or well, and then forming an n-type photodiode layer 132 on the array of deep n-type wells 131. The array of deep n-type wells 131 and the n-type photodiode layer 132 may be formed by a doping process that may be or consists of, for example, ion implantation or some other suitable doping process. In some embodiments, the n-type photodiode layer 132 may be selectively implanted based on a patterned masking layer (not shown) including photoresist. In some alternative embodiments, the photodiode doped layer 130 is formed on the substrate 102 by an epitaxial process.

[0042] like Figure 7 As shown in cross-sectional view 700, in some embodiments, dopant is implanted into substrate 102 to form doped regions. Multiple doped shallow isolation wells 110 can be formed by implanting p-type dopant into the photodiode doped layer 130 between adjacent pixel regions 103a, 103b. A p-type fixing layer 133 can be formed on the n-type photodiode layer 132. Multiple doped shallow isolation wells 110 and p-type fixing layer 133 can be formed from the front side 122 of the image sensing die 134.

[0043] Also Figure 7 As shown, multiple STI structures 514 can be formed from the front side 122 of the image sensing die 134 at the boundary and / or between adjacent pixel regions 103a, 103b. One or more STI structures 514 can be formed by selectively etching the front side 122 of the image sensing die 134 to form shallow trenches and subsequently forming oxide within the shallow trenches. The STI structures 514 can be centered and aligned with the doped shallow isolation wells 110, respectively.

[0044] like Figure 8As shown in cross-sectional view 800, in some embodiments, a transmission gate 202 is formed over the front side 122 of the image sensing die 134. The transmission gate 202 can be formed by depositing and patterning a gate dielectric layer and a gate electrode layer to form a gate dielectric 802 and a gate electrode 804. In some embodiments, a trench can be formed extending from the front side 122 of the image sensing die 134 into a location within the n-type photodiode layer 132, and the transmission gate 202 can subsequently be formed within the trench and over the front side 122 of the image sensing die 134. In some embodiments, an implantation process is performed within the front side 122 of the image sensing die 134 to form a floating diffusion well 204 along one side of the transmission gate 202 or the opposite sides of a pair of transmission gates 202.

[0045] like Figure 9 As shown in cross-sectional view 900, in some embodiments, a metallization stack 108 may be formed on the front side 122 of the image sensing die 134. In some embodiments, the metallization stack 108 may be formed by forming an ILD layer 106 (which comprises one or more layers of ILD material) on the front side 122 of the image sensing die 134. The ILD layer 106 is then etched to form vias and / or metal trenches. The vias and / or metal trenches are then filled with a conductive material to form a plurality of metal interconnect vias 510 and metal lines 512. In some embodiments, the ILD layer 106 may be deposited using physical vapor deposition techniques (e.g., PVD, CVD, etc.). The plurality of metal interconnect layers may be formed using deposition processes and / or plating processes (e.g., electroplating, electroless plating, etc.). In various embodiments, for example, the plurality of metal interconnect layers may comprise tungsten, copper, or aluminum-copper.

[0046] like Figure 10 As shown in the cross-sectional view 1000, in some embodiments, the image sensing die 134 can then be bonded to one or more other dies. For example, the image sensing die 134 can be bonded to a logic die 136 prepared to have logic devices 142. The image sensing die 134 and the logic die 136 can be bonded face-to-face, face-to-back, or back-to-back. For example, the bonding process can use a pair of intermediate bonding dielectric layers 138, 148 and bonding pads 150, 152 to bond the metallized stacks 108, 144 of the image sensing die 134 and the logic die 136. The bonding process can include a fusion or eutectic bonding process. The bonding process can also include a hybrid bonding process, which includes a metal-to-metal bonding of the bonding pads 150, 152 and a dielectric-to-dielectric bonding of the intermediate bonding dielectric layers 138, 148. An annealing process can be performed after the hybrid bonding process and, for example, for a time ranging from about 0.5 hours to about 4 hours at a temperature ranging from about 250°C to about 450°C.

[0047] like Figure 11As shown in cross-sectional view 1100, in some embodiments, a deep trench 1202 is formed from the back surface 124 of the image sensing element 104, which laterally separates the image sensing die 134. In some embodiments, the photodiode doped layer 130 can be etched by forming a masking layer on the back surface 124 of the image sensing die 134 and exposing the photodiode doped layer 130 to an etchant in an area not covered by the masking layer. In some alternative embodiments, when the deep trench 1202 is formed, the substrate 102 or the photodiode doped layer 130 is thoroughly etched at depth, and the deep trench 1202 extends through the substrate 102 and can reach the ILD layer 106, thereby achieving complete isolation. In various embodiments, the masking layer may include a photoresist or nitride (e.g., SiN) patterned using a photolithography process. The masking layer may also include a layer with a diameter of about 200 angstroms. approximately 1000 Angers Atomic layer deposition (ALD) or plasma-enhanced CVD oxide layer of thickness within the range between [specified range]. In various embodiments, the etchant may include a dry etchant or a wet etchant (e.g., hydrofluoric acid (HF) or tetramethylammonium hydroxide (TMAH)) having an etching chemical comprising fluorine substances (e.g., CF4, CHF3, C4F8, etc.). The deep trench 1202 may have a depth ranging between approximately 1.5 μm and approximately 5 μm. The lateral dimension may have a range between approximately 0.1 μm and approximately 0.3 μm. The etching process for forming the deep trench 1202 may involve an anisotropic etching process including dry etching and wet etching that can create an undercut profile. In some embodiments, the etching for forming the deep trench 1202 may introduce an arcuate tip at the apex of the deep trench 1202, which has an arcuate angle ranging from approximately 8° to 15° from the upper sidewall of the deep trench 1202 to a vertical line perpendicular to the lateral plane of the array deep n-type well 131. In some alternative embodiments, the bow tip is less than about 8°. The bow tip can then be removed or reduced by a cleaning process, leaving a smooth sidewall surface and a smaller bow neck for the deep groove 1202.

[0048] In some embodiments, the image sensing die 134 is thinned on the back side 124 before the deep trench 1202 is formed. The thinning process may partially or completely remove the p-type substrate (see...). Figure 10 This allows radiation to pass through the back surface 124 of the image sensing die 134 to reach the image sensing element 104. In some embodiments, the image sensing die 134 is thinned to expose the image sensing element 104, thereby allowing radiation to more easily reach the photodiode. A BDTI structure, which is formed later, can then be formed (see, for example, [link to relevant documentation]). Figure 13The BDTI structure 111 in the image sensor die 134 is used to reach the surface of the image sensor element 104. The thinning process can be implemented by etching or mechanically grinding the back surface 124 of the image sensor die 134. Examples of etchants may include hydrogen fluoride / nitric acid / acetic acid (HNA). Subsequently, chemical mechanical etching and tetramethylammonium hydroxide (TMAH) wet etching can be performed to further thin the image sensor die 134.

[0049] like Figure 12 As shown in cross-sectional view 1200, in some embodiments, the deep trench 1202 is then filled with a dielectric material. In some embodiments, a first high-k dielectric layer 114 is formed within the deep trench 1202. The first high-k dielectric layer 114 can be formed by a deposition technique and may include aluminum oxide (AlO), hafnium oxide (HfO), or other dielectric materials having a dielectric constant greater than that of silicon oxide. The first high-k dielectric layer 114 lines the sidewalls and bottom surface of the deep trench 1202. In some embodiments, the first high-k dielectric layer 114 may be conformally formed and extend over the back surface 124 of the image sensing die 134 located between the deep trenches 1202. In some embodiments, an isolation dielectric liner 118 is then formed on the first high-k dielectric layer 114. For example, the isolation dielectric liner 118 may be formed of silicon dioxide. The isolation dielectric liner 118 may also be conformally formed and extend over the back surface 124 of the image sensing die 134. The first high-k dielectric layer 114 and the isolation dielectric pad 118 can be formed by atomic layer deposition (ALD) or other suitable conformal deposition techniques. For example, the first high-k dielectric layer 114 can have a dielectric layer of approximately [missing information - likely a dielectric layer diameter]. to approximately The thickness is within a certain range. For example, the insulating dielectric pad 118 can have a thickness of approximately... to approximately The thickness is within the range. Dielectric materials that are more likely to droop during formation are not desired as dielectric materials to fill the deep trench 1202, because filling the deep trench 1202 with such a material may result in closed voids in the deep trench 1202, which will adversely affect the optical and electrical performance of the image sensor.

[0050] like Figure 13As shown in cross-sectional view 1300, in some embodiments, a trench fill layer 112 is formed to fill the remaining portion of the deep trench 1202. In some embodiments, the trench fill layer 112 is or is composed of a metal, such as aluminum, ruthenium, etc. The trench fill layer 112 can be deposited using physical vapor deposition or chemical vapor deposition techniques. The trench fill layer 112 may undergo a planarization process that removes the lateral portion of the trench fill layer 112 directly above the image sensing element 104. Therefore, a BDTI structure 111 is formed in the substrate 102, extending from the back surface 124 to a location within the photodiode doped layer 130. The BDTI structure 111 is formed between adjacent pixel regions 103a, 103b and isolates the adjacent pixel regions 103a, 103b.

[0051] like Figure 14 As shown in cross-sectional view 1400, in some embodiments, the lateral portion of the isolation dielectric pad 118 can be removed from the area located above the image sensing element 104. In some embodiments, for example, the isolation dielectric pad is removed by wet impregnation using diluted HF. The first high-k dielectric layer 114 and the isolation dielectric pad 118 reduce halo and crosstalk between pixel regions 103a, 103b.

[0052] like Figure 15 As shown in cross-sectional view 1500, in some embodiments, a second high-k dielectric layer 116 is formed on the top surface of the first high-k dielectric layer 114 and the trench fill layer 112. In some embodiments, the second high-k dielectric layer 116 is composed of tantalum oxide (Ta2O5). The second high-k dielectric layer 116 enhances light absorption within the corresponding pixel regions 103a, 103b. The second high-k dielectric layer 116 may be formed to have a greater thickness than the first high-k dielectric layer 114.

[0053] like Figure 16 As shown in cross-sectional view 1600, in some embodiments, a planarization layer 120 is then disposed on the second high-k dielectric layer 116. The planarization layer 120 can serve as a bottom antireflective layer (BARL) to reduce the reflection of incident photons. In some embodiments, the planarization layer 120 may be or is composed of, for example, silicon oxynitride or some other suitable antireflective material.

[0054] Figures 17 to 19 Some embodiments of a method for forming a color filter 154 located on an image sensing element 104a are shown. For example... Figure 17As shown in cross-sectional view 1700, metal layer 502 and dielectric layer 504 are stacked above substrate 102 along the back side 124 of image sensing die 134. Metal layer 502 may be or consist of one or more layers of tungsten, copper, aluminum copper, or titanium nitride. Other suitable metallic materials are also within the scope of this invention. Dielectric layer 504 may be or consist of one or more layers of silicon dioxide, silicon nitride, or combinations thereof. Dielectric layer 504 can be used as a hard mask layer.

[0055] like Figure 18 As shown in cross-sectional view 1800, the metal layer 502 and dielectric layer 504 are etched to form a composite grid 506. The opening 1802 can be centrally aligned with the image sensing element 104, such that the composite grid 506 is arranged around and between the image sensing element 104. Optionally, the opening 1802 can be laterally displaced or offset from the image sensing element 104 in at least one direction, such that the composite grid 506 is at least partially located above the image sensing element 104. A dielectric pad 508 is then formed lining the sidewalls and top of the composite grid 506 and lining the opening 1802. The dielectric pad 508 can be formed using conformal deposition techniques, such as, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD). The dielectric pad 508 can be formed, for example, from an oxide, such as silicon dioxide.

[0056] like Figure 19 As shown in cross-sectional view 1900, a color filter 154 corresponding to the pixel sensor is formed in the opening 1802 of the corresponding pixel sensor. The color filter layer is formed of a material that allows light of the corresponding color to pass through while blocking light of other colors. Furthermore, the color filter 154 can be formed with a specified color. For example, the color filter 154 can be formed with specified colors of red, green, and blue alternately. The color filter 154 can be formed with an upper surface aligned with the upper surface of the composite grid 506. The color filter 154 can be laterally shifted or offset from the image sensing element 104a of the corresponding pixel sensor in at least one direction. Depending on the degree of shift or offset, the color filter 154 can partially fill the opening of the corresponding pixel sensor and can partially fill the opening of a pixel sensor adjacent to the corresponding pixel sensor. Optionally, the color filter 154 can be symmetrical about a vertical axis aligned with the center of the photodiode of the corresponding pixel sensor. The process for forming the color filter 154 can include (for each different color assigned) forming a color filter layer and patterning the color filter layer. The color filter layer can be planarized after its formation. Patterning can be performed by forming a patterned photoresist layer over the color filter layer, applying an etchant to the color filter layer according to the pattern of the photoresist layer, and removing the patterned photoresist layer.

[0057] like Figure 20As shown, a microlens 156 corresponding to the pixel sensor is formed above the color filter 154 of the corresponding pixel sensor. In some embodiments, multiple microlenses can be formed by depositing microlens material over multiple color filters (e.g., by spin coating or deposition process). A microlens template having a curved upper surface is patterned over the microlens material. In some embodiments, the microlens template may include a photoresist material that is exposed, developed, and baked to form a circular shape using a distributed exposure light dose (e.g., for negative photoresist, more light is exposed at the bottom of the curvature and less light is exposed at the top of the curvature). The microlens 156 is then formed by selectively etching the microlens material according to the microlens template.

[0058] Figures 21 to 25 Some alternative embodiments of a method for forming an image sensor having image sensing elements covered by pixel dielectric stacks and surrounded by BDTI structures are shown in cross-sectional views.

[0059] from Figure 10 Continue, as Figure 21 As shown in cross-sectional view 2100, in some embodiments, the image sensing die 134 is thinned on the back side 124 to remove the substrate 102. The thinning process can partially or completely remove the p-type substrate (see...). Figure 10 This allows radiation to pass through the back surface 124 of the image sensing die 134 to reach the image sensing element 104. The thinning process can be implemented by etching or mechanically grinding the back surface 124 of the image sensing die 134. In some embodiments, a pixel dielectric stack 126 is formed along the back surface 124 of the image sensing die 134 before forming the deep trench 1202. The pixel dielectric stack 126 may include a first high-k dielectric layer 114 and a second high-k dielectric layer 116 formed on the top surface of the first high-k dielectric layer 114. A hard masking layer 402 may be formed on top of the pixel dielectric stack 126. In some embodiments, the second high-k dielectric layer 116 is or is composed of tantalum oxide (Ta2O5). The second high-k dielectric layer 116 enhances light absorption within the corresponding pixel regions 103a, 103b.

[0060] like Figure 22 As shown in cross-sectional view 2200, a deep trench 1202 is formed from the back side 124 of the image sensing die 134 through the pixel dielectric stack 126 that laterally separates the photodiode doped layer 130 from the image sensing element 104. The deep trench 1202 can be formed by etching the pixel dielectric stack 126 and the photodiode doped layer 130 according to a patterned hard mask layer 402.

[0061] like Figure 23As shown in cross-sectional view 2300, in some embodiments, an isolation dielectric liner 118 and a trench fill layer 112 are formed to fill the deep trench 1202. In some embodiments, the isolation dielectric liner 118 is made of a high-k dielectric material such as Al₂O₃. Alternatively, the isolation dielectric liner 118 is made of silicon dioxide. In some embodiments, the trench fill layer 112 is or is composed of a metal, such as aluminum, ruthenium, etc. The trench fill layer 112 can be deposited using physical vapor deposition or chemical vapor deposition techniques.

[0062] like Figure 24 As shown in cross-sectional view 2400, in some embodiments, the trench fill layer 112 and the isolation dielectric pad 118 may undergo a planarization process or another etching process that removes the lateral portions of the trench fill layer 112 and the isolation dielectric pad 118 directly above the respective pixel regions 103a, 103b. Therefore, a BDTI structure 111 is formed in the substrate 102, extending from the back surface 124 to a location within the photodiode doped layer 130. The BDTI structure 111 is formed between adjacent pixel regions 103a, 103b and isolates the adjacent pixel regions 103a, 103b.

[0063] like Figure 25 As shown in the cross-sectional view 2500, similar to Figures 17 to 19 As shown, color filters 154 are formed on pixel regions 103a and 103b. In some embodiments, a composite grid 506 of metal layer 502 and dielectric layer 504 is stacked above substrate 102 along the back side 124 of image sensing die 134. A dielectric pad 508 is then formed to line the sidewalls and top of the composite grid 506. Metal layer 502 may be or may consist of one or more layers of tungsten, copper, aluminum copper, or titanium nitride. Other suitable metallic materials are also within the scope of this invention. Dielectric layer 504 may be or may consist of one or more layers of silicon dioxide, silicon nitride, or combinations thereof. Dielectric layer 504 can be used as a hard mask layer.

[0064] Figure 26 Flowcharts of some embodiments of a method 2600 for forming an image sensor having an image sensing element surrounded by a BDTI structure are shown. While the disclosed method 2600 is shown and described herein as a series of steps or events, it should be understood that the order in which such steps or events are shown should not be construed as limiting. For example, some steps may occur in a different order and / or simultaneously with other steps or events in addition to those shown and / or described herein. Furthermore, it may not be necessary to implement all the steps shown to achieve one or more aspects or embodiments described herein. Additionally, one or more steps described herein may be performed in one or more separate steps and / or stages.

[0065] In step 2602, a substrate for the image sensing die is prepared. A photodiode doped layer and a doped isolation well can be formed in the substrate from the front side of the image sensing die. In some embodiments, individual epitaxial layers can be formed above the substrate as photodiode doped layers, and photodiode doped columns and / or doped isolation wells can be formed by implanting dopant into the epitaxial layers. The doped isolation wells can be formed by selective implantation to form multiple columns extending into the photodiode doped layer. In some embodiments, a shallow trench isolation region can be formed in the front side of the image sensing die by selectively etching the substrate to form shallow trenches and subsequently forming a dielectric (e.g., oxide) within the shallow trenches. Figures 6 to 7 A cross-sectional view corresponding to some embodiments (corresponding to step 2602) is shown.

[0066] In step 2604, a transmission gate is formed on the front side of the image sensing die. Then, a metallization stack is formed over the transmission gate. Figures 8 to 9 A cross-sectional view corresponding to some embodiments (corresponding to step 2604) is shown.

[0067] In step 2606, in some embodiments, the image sensor is coupled to one or more other dies, such as logic dies or other image sensing dies. Figure 10 A cross-sectional view corresponding to some embodiments (corresponding to step 2606) is shown.

[0068] In step 2608, in some embodiments, the substrate is selectively etched from the back side to form deep trenches between adjacent sensing pixel regions, and an isolation dielectric is formed along the sidewalls and bottom surface of the deep trenches. In some embodiments, the deep trenches and the isolation dielectric are formed after the pixel dielectric stack is formed. Figures 11 to 12 or Figures 22 to 23 A cross-sectional view corresponding to some embodiments (corresponding to step 2608) is shown.

[0069] In step 2610, the remaining gaps in the deep trench are filled with a dielectric or metallic material. Figure 13 or Figure 23 A cross-sectional view corresponding to some embodiments (corresponding to step 2610) is shown.

[0070] In step 2612, after or before forming the deep trench, a pixel dielectric stack is formed along the back side of the image sensing die. Figures 14 to 15 or Figures 21 to 22 A cross-sectional view corresponding to some embodiments (corresponding to step 2612) is shown.

[0071] In step 2614, an anti-reflective layer and a composite grid are formed on the back side of the image sensing die. Figures 16 to 18 and Figure 25Cross-sectional views corresponding to some embodiments (corresponding to step 2614) are shown.

[0072] In step 2616, a color filter and a microlens are formed on the back side of the image sensing die. Figures 19 to 20 and Figure 25 Cross-sectional views corresponding to some embodiments (corresponding to step 2616) are shown.

[0073] In some embodiments, the present invention relates to an image sensor. An image sensing die has a front side and a back side opposite the front side. A first image sensing element and a second image sensing element are arranged adjacent to each other within the image sensing die. The first and second image sensing elements have a first doping type. A pixel dielectric stack is disposed along the back side of the image sensing die above the first and second image sensing elements. The pixel dielectric stack includes a first high-k dielectric layer and a second high-k dielectric layer disposed above the first high-k dielectric layer. A back-side deep trench isolation (BDTI) structure is disposed between the first and second image sensing elements and extends from the back side of the image sensor die into a location within the image sensor die. The BDTI structure includes a trench-filled layer surrounded by the isolation dielectric stack. The pixel dielectric stack has a first component different from the second component of the isolation dielectric stack.

[0074] In some embodiments, the back-side deep trench isolation structure does not have a second high-k dielectric layer. In some embodiments, the first high-k dielectric layer extends downward along the trench fill layer as part of the isolation dielectric stack. In some embodiments, the second high-k dielectric layer covers the entire top surface of the back-side deep trench isolation structure. In some embodiments, the first and second high-k dielectric layers terminate at and directly contact the sidewalls of the isolation dielectric stack. In some embodiments, the isolation dielectric stack includes an isolation dielectric pad. In some embodiments, the isolation dielectric pad is silicon dioxide. In some embodiments, the isolation dielectric pad includes a high-k dielectric material. In some embodiments, the isolation dielectric stack further includes an isolation conductive pad disposed between the isolation dielectric pad and the trench fill layer. In some embodiments, the trench fill layer is metal. In some embodiments, the image sensor further includes: a doped isolation well having a second doping type, disposed between the first image sensing element and the second image sensing element and extending from the front side of the image sensing die into the image sensing die; wherein the doped isolation well has a bottom surface recessed by the back-side deep trench isolation structure. In some embodiments, the image sensor further includes: a shallow trench isolation (STI) structure disposed between the first image sensing element and the second image sensing element and extending from the front side of the image sensing die into the image sensing die. In some embodiments, the first high-k dielectric layer comprises aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium silicon oxide (HfSiO), or hafnium aluminum oxide (HfAlO). In some embodiments, the second high-k dielectric layer comprises tantalum oxide (Ta2O5). In some embodiments, the second high-k dielectric layer is approximately twice the thickness of the first high-k dielectric layer or thicker than the first high-k dielectric layer.

[0075] In some alternative embodiments, the present invention relates to an image sensor. The image sensing die has a front side and a back side opposite the front side. A first-doped image sensing element is disposed within the image sensing die. A back-side deep trench isolation (BDTI) structure surrounds the image sensing element and extends from the back side of the image sensor die to a location within the image sensor die. The BDTI structure includes a trench-filling layer surrounded by a first high-k dielectric layer. The first high-k dielectric layer is disposed along the bottom and sidewall surfaces of the trench-filling layer and extends upward to cover the lateral surface of the image sensing element. A second high-k dielectric layer is disposed on the first high-k dielectric layer and extends laterally to cover the top surface of the trench-filling layer.

[0076] In some embodiments, the second high-k dielectric layer is at least twice as thick as the first high-k dielectric layer. In some embodiments, the image sensor further includes an isolation dielectric pad disposed between the first high-k dielectric layer and the trench fill layer.

[0077] In some other embodiments, the present invention relates to a method of forming an image sensor. The method includes forming a photodiode doped layer having a first doping type within a substrate from the front side of an image sensing die and forming a deep trench from the back side of the image sensing die, separating the photodiode doped layer into a first image sensing element and a second image sensing element. The method further includes forming a first high-k dielectric layer and an isolation dielectric pad extending upward along the lateral surfaces of the first and second image sensing elements along the bottom and sidewall surfaces of the deep trench. The method further includes forming a trench fill layer in the internal spacing of the deep trench and forming a second high-k dielectric layer on the top surface of the first high-k dielectric layer and the trench fill layer.

[0078] In some embodiments, the first high-k dielectric layer, the isolation dielectric liner, and the trench fill layer are formed by a series of deposition processes and a subsequent planarization process to remove the lateral portions of the isolation dielectric liner and the trench fill layer that are directly located above the first image sensing element and the second image sensing element.

[0079] The foregoing outlines features of several embodiments to enable those skilled in the art to better understand aspects of the invention. Those skilled in the art should understand that they can readily use this invention as a basis to design or modify other processes and structures for implementing the same purposes and / or achieving the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the invention, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of the invention.

Claims

1. An image sensor, comprising: An image sensing die has a front side and a back side opposite to the front side; A first image sensing element and a second image sensing element are arranged adjacent to each other within the image sensing die, and the first image sensing element and the second image sensing element have a first doping type; A pixel dielectric stack is disposed along the back side of the image sensing die above the first image sensing element and the second image sensing element, wherein the pixel dielectric stack includes a first high-k dielectric layer and a second high-k dielectric layer disposed above the first high-k dielectric layer; A back-side deep trench isolation (BDTI) structure is disposed between the first image sensing element and the second image sensing element and extends from the back side of the image sensor die into the image sensor die. The BDTI structure includes a trench-filling layer surrounded by an isolation dielectric stack, wherein the isolation dielectric stack includes an isolation dielectric pad that is in direct contact with the first high-k dielectric layer. The isolation dielectric pad has a apex extending vertically toward the back side, the apex being higher than the top surface of the first high-k dielectric layer. The pixel dielectric stack has a first component that is different from the second component of the isolation dielectric stack.

2. The image sensor according to claim 1, wherein, The back-side deep trench isolation structure does not have a second high-k dielectric layer.

3. The image sensor according to claim 1, wherein, The first high-k dielectric layer extends downward along the trench fill layer as part of the isolation dielectric stack.

4. The image sensor according to claim 1, wherein, The second high-k dielectric layer covers the entire top surface of the back-side deep trench isolation structure.

5. The image sensor according to claim 1, wherein, The first high-k dielectric layer and the second high-k dielectric layer terminate at the sidewall of the isolation dielectric stack and directly contact the sidewall of the isolation dielectric stack.

6. The image sensor according to claim 1, wherein, The top surface of the isolation dielectric liner is located between the top and bottom of the second high-k dielectric layer.

7. The image sensor according to claim 1, wherein, The insulating dielectric pad is silicon dioxide.

8. The image sensor according to claim 1, wherein, The insulating dielectric liner comprises a high-k dielectric material.

9. The image sensor according to claim 1, wherein, The isolation dielectric stack also includes an isolation conductive pad disposed between the isolation dielectric pad and the trench filling layer.

10. The image sensor according to claim 1, wherein, The trench filling layer is metal.

11. The image sensor according to claim 1, further comprising: A doped isolation well of a second doping type is disposed between the first image sensing element and the second image sensing element and extends from the front side of the image sensing die into a position within the image sensing die; The doped isolation trap has a bottom surface recessed by the back-side deep trench isolation structure.

12. The image sensor according to claim 1, further comprising: A shallow trench isolation (STI) structure is disposed between the first image sensing element and the second image sensing element and extends from the front side of the image sensing die into the image sensing die.

13. The image sensor according to claim 1, wherein, The first high-k dielectric layer includes aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium silicon oxide (HfSiO) or hafnium aluminum oxide (HfAlO).

14. The image sensor according to claim 1, wherein, The second high-k dielectric layer comprises tantalum oxide (Ta2O5).

15. The image sensor according to claim 1, wherein, The second high-k dielectric layer is approximately twice the thickness of the first high-k dielectric layer or is thicker than the first high-k dielectric layer.

16. An image sensor, comprising: An image sensing die has a front side and a back side opposite to the front side; An image sensing element is disposed within the image sensing die, and the image sensing element has a first doping type; A back-side deep trench isolation (BDTI) structure surrounds the image sensing element and extends from the back side of the image sensor die to a location within the image sensor die. The BDTI structure includes a trench-filling layer surrounded by a first high-k dielectric layer, wherein the first high-k dielectric layer is disposed along the bottom and sidewall surfaces of the trench-filling layer and extends upward to cover the lateral surface of the image sensing element. A second high-k dielectric layer is disposed on the first high-k dielectric layer and extends laterally across the top surface of the trench fill layer.

17. The image sensor according to claim 16, wherein, The second high-k dielectric layer is at least twice as thick as the first high-k dielectric layer.

18. The image sensor of claim 16, further comprising: An isolation dielectric pad is disposed between the first high-k dielectric layer and the trench filling layer.

19. A method for forming an image sensor, comprising: A photodiode doped layer of the first doping type is formed in the substrate from the front side of the image sensing die; A deep trench is formed on the back side of the image sensing die to separate the photodiode doped layer into a first image sensing element and a second image sensing element; A first high-k dielectric layer and an isolation dielectric pad are formed along the bottom and sidewall surfaces of the deep trench, extending upward along the lateral surfaces of the first image sensing element and the second image sensing element; A trench filling layer is formed in the internal spacing of the deep trench; as well as A second high-k dielectric layer is formed on the top surface of the first high-k dielectric layer and the trench filling layer, wherein the second high-k dielectric layer extends laterally across the topmost surface of the trench filling layer.

20. The method according to claim 19, wherein, The first high-k dielectric layer, the isolation dielectric liner, and the trench fill layer are formed by a series of deposition processes and a subsequent planarization process to remove the lateral portions of the isolation dielectric liner and the trench fill layer that are directly located above the first image sensing element and the second image sensing element.

Images