Light-emitting transistor and display substrate

Abstract

The present disclosure provides a light-emitting transistor and a display substrate, wherein the display substrate includes a plurality of pixel circuits, wherein the pixel circuit uses a light-emitting transistor that integrates a control transistor and a quantum dot light-emitting device in the same device, and the light-emitting transistor can simultaneously realize the functions of controlling a switch and light-emitting display. When the light-emitting transistor is applied to the pixel circuit, the circuit structure can be simplified, that is, compared with the pixel circuit provided by the related art, one transistor can be saved, the area occupied by the device can be effectively reduced, and the aperture ratio of the device can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting transistor and a display substrate. Background Art

[0002] As a new type of luminescent material, quantum dots (QD) have the advantages of high light color purity, high luminescent quantum efficiency, adjustable luminescent color, and long service life, and have become a research hotspot for new light-emitting diode (LED) luminescent materials. Therefore, light-emitting devices using quantum dot materials as the luminescent layer have become the main research direction of new display devices.

[0003] Active quantum dot light-emitting display panels (AMQLED) have also received more and more attention due to their potential advantages in wide color gamut and long life. Their research has become increasingly in-depth, and their quantum efficiency has been continuously improved, basically reaching the level of industrialization. Further adopting new processes and technologies to realize their industrialization has become a future trend.

[0004] In mass production, the driving backplane of the quantum dot light-emitting display panel (QLED) usually uses a thin-film transistor (TFT) backplane as the control circuit of the light-emitting device, which occupies a certain position in the sub-pixel, thereby compressing the light-emitting area of ​​the light-emitting device and affecting the aperture ratio of the light-emitting device. Summary of the invention

[0005] The present disclosure provides a light emitting transistor, comprising:

[0006] substrate;

[0007] A gate, located on the substrate;

[0008] an insulating layer, located on a side of the gate facing away from the substrate;

[0009] An active layer, located on a side of the insulating layer away from the gate;

[0010] A first electrode, located at a side of the active layer away from the insulating layer, the first electrode having a set pattern;

[0011] A quantum dot light-emitting layer, located on a side of the first electrode away from the active layer, the quantum dot light-emitting layer is filled between the set patterns of the first electrode and in contact with the active layer;

[0012] The second pole is located on a side of the quantum dot light-emitting layer away from the first pole.

[0013] In a possible implementation, in the above-mentioned light-emitting transistor provided in the embodiment of the present disclosure, the set pattern of the first electrode is a comb pattern or a grid pattern.

[0014] In a possible implementation, in the above-mentioned light-emitting transistor provided in an embodiment of the present disclosure, the second electrode is disposed on the entire surface, and the orthographic projection of the second electrode on the substrate completely covers the orthographic projection of the first electrode on the substrate.

[0015] In a possible implementation, the light-emitting transistor provided in the embodiment of the present disclosure further includes an electron transport layer, the active layer includes an N-type semiconductor material, and the electron transport layer and the active layer have an integral structure.

[0016] In a possible implementation, the light-emitting transistor provided in the embodiment of the present disclosure further includes: at least one of a hole injection layer and a hole transport layer located between the quantum dot light-emitting layer and the second electrode.

[0017] In a possible implementation, the light-emitting transistor provided in the embodiment of the present disclosure further includes a hole transport layer, the active layer includes a P-type semiconductor material, and the hole transport layer and the active layer have an integrated structure.

[0018] In a possible implementation, the light-emitting transistor provided in the embodiment of the present disclosure further includes: at least one of an electron injection layer and an electron transport layer located between the quantum dot light-emitting layer and the second electrode.

[0019] On the other hand, an embodiment of the present disclosure further provides a display substrate, including a plurality of pixel circuits, each of the pixel circuits including:

[0020] A switch transistor, wherein a gate of the switch transistor is coupled to the scan signal terminal, and a first electrode of the switch transistor is coupled to the data signal terminal;

[0021] The light-emitting transistor provided in the embodiment of the present disclosure has a gate electrode coupled to the second electrode of the switch transistor, a first electrode of the light-emitting transistor coupled to the first power signal terminal, and a second electrode of the light-emitting transistor coupled to the second power signal terminal;

[0022] A capacitor is coupled between the first electrode and the gate of the light emitting transistor.

[0023] In a possible implementation, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the first power signal terminal is grounded.

[0024] In a possible implementation, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the active layer of the light-emitting transistor includes an N-type semiconductor material, and the second power signal terminal is configured to load a positive voltage signal.

[0025] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the active layer of the light-emitting transistor includes a P-type semiconductor material, and the second power signal terminal is configured to load a negative voltage signal.

[0026] On the other hand, the embodiment of the present disclosure further provides another display substrate, including a plurality of pixel circuits, each of the pixel circuits including:

[0027] A switch transistor, wherein a gate of the switch transistor is coupled to the scan signal terminal, and a first electrode of the switch transistor is coupled to the data signal terminal;

[0028] A light-emitting transistor, comprising a gate, an insulating layer, a first electrode, an active layer, a quantum dot light-emitting layer and a second electrode stacked in sequence; the first electrode has a set pattern, the active layer is filled between the set patterns of the first electrode and contacts the insulating layer; the gate of the light-emitting transistor is coupled to the second electrode of the switch transistor, the first electrode of the light-emitting transistor is coupled to a first power signal terminal, and the second electrode of the light-emitting transistor is coupled to a second power signal terminal;

[0029] A capacitor is coupled between the first electrode and the gate of the light emitting transistor.

[0030] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the set pattern of the first electrode of the light-emitting transistor is a comb pattern or a grid pattern.

[0031] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the second pole of the light-emitting transistor is arranged on the entire surface, and the orthographic projection of the second pole of the light-emitting transistor on the substrate completely covers the orthographic projection of the first pole of the light-emitting transistor on the substrate.

[0032] In a possible implementation, in the display substrate provided in the embodiment of the present disclosure, the gate of the switch transistor, the gate of the light emitting transistor and the first electrode of the capacitor are arranged in the same layer;

[0033] The first electrode and the second electrode of the switch transistor, the first electrode of the light emitting transistor, and the second electrode of the capacitor are arranged in the same layer;

[0034] The second electrode of the light emitting transistor is electrically connected to the second electrode of the capacitor.

[0035] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the light-emitting transistor also includes an electron transport layer, the active layer of the light-emitting transistor includes an N-type semiconductor material, and the electron transport layer of the light-emitting transistor and the active layer have an integrated structure.

[0036] In a possible implementation, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the first power signal terminal is grounded, and the second power signal terminal is configured to load a positive voltage signal.

[0037] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the light-emitting transistor further includes: at least one of a hole injection layer and a hole transport layer located between the quantum dot light-emitting layer and the second electrode of the light-emitting transistor.

[0038] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the light-emitting transistor also includes a hole transport layer, the active layer of the light-emitting transistor includes a P-type semiconductor material, and the hole transport layer of the light-emitting transistor and the active layer have an integrated structure.

[0039] In a possible implementation, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the first power signal terminal is grounded, and the second power signal terminal is configured to load a negative voltage signal.

[0040] In a possible implementation, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the light-emitting transistor further includes: at least one of an electron injection layer and an electron transport layer located between the quantum dot light-emitting layer and the second electrode of the light-emitting transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A schematic diagram of a structure of a light-emitting transistor provided in some embodiments of the present disclosure;

[0042] Figure 2 Another structural schematic diagram of a light-emitting transistor provided in some embodiments of the present disclosure;

[0043] Figure 3 A schematic diagram of a light-emitting transistor provided in some embodiments of the present disclosure;

[0044] Figure 4 Another principle schematic diagram of a light emitting transistor provided in some embodiments of the present disclosure;

[0045] Figure 5a to Figure 5c They are respectively a schematic top view of a light emitting transistor provided in some embodiments of the present disclosure;

[0046] Figure 6 A schematic diagram of the circuit structure of a pixel circuit in a display substrate provided in some embodiments of the present disclosure;

[0047] Figure 7 A schematic diagram of a structure of a display substrate provided in some embodiments of the present disclosure;

[0048] Figure 8 Another structural schematic diagram of a display substrate provided in some embodiments of the present disclosure;

[0049] Fig. 9 Another principle schematic diagram of a light emitting transistor provided in some embodiments of the present disclosure;

[0050] Fig.10 Another principle schematic diagram of a light emitting transistor provided in some embodiments of the present disclosure;

[0051] Fig.11 A schematic diagram of the circuit structure of a pixel circuit in a display substrate provided in the related art. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present disclosure.

[0053] The shapes and sizes of the components in the drawings do not reflect the actual proportions, and are only intended to illustrate the present disclosure.

[0054] Some embodiments of the present disclosure provide a light-emitting transistor, such as Figure 1 and Figure 2 As shown in the figure, including:

[0055] Substrate 1;

[0056] A gate 2, located on the substrate 1;

[0057] An insulating layer 3, located on a side of the gate 2 facing away from the substrate 1;

[0058] The active layer 4 is located on the side of the insulating layer 3 away from the gate 2;

[0059] A first electrode 5, located on a side of the active layer 4 away from the insulating layer 3, and having a set pattern;

[0060] The quantum dot light-emitting layer 6 is located on the side of the first pole 5 away from the active layer 4. The quantum dot light-emitting layer 6 is filled between the set patterns of the first pole 5 and is in contact with the active layer 4.

[0061] The second electrode 7 is located on the side of the quantum dot light-emitting layer 6 away from the first electrode 5 .

[0062] Specifically, the light-emitting transistor provided in some embodiments of the present disclosure integrates the control transistor and the quantum dot light-emitting device in the same device, and can simultaneously realize the functions of controlling the switch and the light-emitting display. When the light-emitting transistor is applied to the pixel circuit, the circuit structure can be simplified, the area occupied by the device can be effectively reduced, and the aperture ratio of the device can be improved.

[0063] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the substrate 1 is used as a supporting element to provide support for the layers thereon. The substrate 1 may be a glass substrate, a silicon wafer substrate or a flexible substrate, and the material of the flexible substrate may be, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN) and polyimide (PI). It is understood that a film layer such as a buffer layer may also be provided between the substrate 1 and the gate 2. The buffer layer may specifically include suitable materials such as PET, PEN, polyacrylate and / or polyimide, in a layered structure in the form of a single layer or a multilayer stack. The buffer layer may also be formed of silicon oxide or silicon nitride material, or may include a composite layer of organic material and / or inorganic material.

[0064] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the gate 2 is located on the substrate 1, and the gate 2 can be an ITO transparent electrode or an Al, Ag, Au, Pt, Mo metal electrode, etc.

[0065] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the insulating layer 3 is located on the gate 2, and the insulating layer 3 may be an inorganic oxide insulating layer or an organic polymer insulating layer. The material of the inorganic oxide insulating layer may be SiO2, Al2O3 or ZrO2, etc. The material of the organic polymer insulating layer may be PMMA, PVDF-TrFE, PVDF-TrFE-CtFE, PVP, etc.

[0066] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the active layer 4 is located on the insulating layer 3, and optionally, as Figure 1 and Figure 3 As shown, the active layer 4 may include an N-type semiconductor material, specifically an oxide semiconductor such as indium gallium zinc oxide (IGZO), indium tin oxide (IZO), indium zinc tin oxide (IZTO), gallium tin oxide (GTO), etc., and an organic semiconductor such as PCBM, C60, etc. At this time, the light-emitting transistor may also include an electron transport layer, and the active layer 4 also serves as an electron transport layer and has the performance of transmitting electrons, that is, the electron transport layer and the active layer have an integral structure. In addition, the energy level of the selected N-type semiconductor material needs to match the energy level of the quantum dot light-emitting layer 6 material, and the conduction band bottom energy level (CBM) of the active layer 4 of the N-type semiconductor material is required to be approximately between -3.8eV and -4.2eV.

[0067] Alternatively, in some other embodiments of the present disclosure, in the light emitting transistor provided, Figure 2 and Figure 4 As shown, the active layer 4 may include a P-type semiconductor material, specifically a small molecule semiconductor such as C8-BTBT, Pentacene, DNTT, F8T2, etc., or a polymer semiconductor such as P2HT, DPP-TT, etc., or an inorganic semiconductor material such as LTPS. At this time, the light-emitting transistor may also include a hole transport layer, and the active layer 4 also serves as a hole transport layer, having the performance of transporting holes, that is, the hole transport layer and the active layer have an integrated structure. In addition, the energy level of the selected P-type semiconductor material needs to match the energy level of the quantum dot light-emitting layer 6 material, and the valence band top energy level (VBM) of the active layer 4 of the P-type semiconductor material is approximately between -5.3eV and -6.2eV.

[0068] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the first electrode 5 is located on the active layer 4. Optionally, the setting pattern of the first electrode 5 can be as follows: Figure 5a The comb pattern shown or Figure 5c The grid pattern shown in FIG. 1 and the dressing pattern can be as shown in FIG. Figure 5b The two structures are shown as interdigitated structures. It is worth noting that Figures 1 to 4 It can be considered Figure 5a to Figure 5c Cross-section along line AA.

[0069] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the first pole 5 is set to have a set pattern to expose the active layer 4 below, so that the quantum dot light-emitting layer 6 is in direct contact with the first pole 5 and the active layer 4, and the quantum dot light-emitting layer 6 covers the surface and side of the set pattern of the first pole 5 away from the active layer 4, and the quantum dot light-emitting layer 6 covers the surface of the active layer 4 not covered by the first pole 5. In this way, the quantum dot light-emitting layer 6 located on the first pole 5 is in direct contact with the active layer 4, so that after power is turned on, the active layer 4 acts as an electron transport layer to transfer electrons to the quantum dot light-emitting layer 6, and the holes transferred to the quantum dot light-emitting layer 6 by the second pole 7 are recombined to generate exciton light emission, or after power is turned on, the active layer 4 acts as a hole transport layer to transfer holes to the quantum dot light-emitting layer 6, and the electrons transferred to the quantum dot light-emitting layer 6 by the second pole 7 are recombined to generate exciton light emission.

[0070] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, the second electrode 7 is located above the quantum dot light-emitting layer 6, and optionally, Figure 5a to Figure 5c As shown, the second electrode 7 is generally arranged on the entire surface, and the orthographic projection of the second electrode 7 on the substrate 1 generally completely covers the orthographic projection of the first electrode 5 on the substrate 1 to increase the light-emitting area.

[0071] Specifically, in the light-emitting transistor provided in some embodiments of the present disclosure, considering the conductivity, the first electrode 5 and the second electrode 7 can be formed by a single material layer or a composite material layer including at least one material of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and copper (Cu) or other suitable alloys.

[0072] Optionally, in the light emitting transistor provided in some embodiments of the present disclosure, Figure 1 and Figure 3 As shown, when the active layer 4 includes an N-type semiconductor material and has an integral structure with the electron transport layer, at least one of a hole injection layer 81 and a hole transport layer 82 may be provided between the quantum dot light-emitting layer 6 and the second electrode 7 . Figure 1 and Figure 3 The hole injection layer 81 and the hole transport layer 82 are shown to exist at the same time. The hole transport layer 82 can be made of TFB, NPB, TPD or PEDOT:PSS. Of course, the materials of the above-mentioned film layers are not limited thereto.

[0073] Optionally, in the light emitting transistor provided in some embodiments of the present disclosure, Figure 2 and Figure 4 As shown, when the active layer 4 includes a P-type semiconductor material and has an integral structure with the hole transport layer, at least one of an electron injection layer 91 and an electron transport layer 92 may be further provided between the quantum dot light-emitting layer 6 and the second electrode 7 . Figure 2 and Figure 4 The case where the electron injection layer 91 and the electron transport layer 92 exist at the same time is shown. The material of the electron transport layer 92 can be Alq3, PBD, PTCDI or TPBi. The material of the electron injection layer 91 can be alkali metal fluoride, etc. Of course, the material of the above-mentioned film layer is not limited thereto.

[0074] Combine the following Figure 3 and Figure 4 The working principle of the light-emitting transistor provided in some embodiments of the present disclosure is described.

[0075] When the active layer 4 in the light emitting transistor comprises an N-type semiconductor material, as Figure 3As shown, a positive voltage signal V3, such as +5V, is applied to the gate 2, the first power supply signal terminal V1 connected to the first pole 5 is grounded, and another positive voltage signal, such as +8V, is applied to the second power supply terminal V2 connected to the second pole 7. Under the action of the electric field between the gate 2 and the first pole 5, a large number of electrons are induced in the active layer 4. At the same time, under the action of the electric field between the second pole 7 and the first pole 5, holes are gradually injected from the second pole 7 into the hole injection layer 81 through the hole transport layer 82 into the quantum dot light-emitting layer 6. Electrons are also injected into the quantum dot light-emitting layer 5 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the first pole 5, and between the second pole 7 and the gate 2, so as to realize the light emission of the light-emitting transistor, and the light emission of the light-emitting transistor can be jointly regulated by the V3 signal voltage loaded on the gate 2 and the V2 signal voltage loaded on the second pole 7.

[0076] When the active layer 4 in the light emitting transistor comprises a P-type semiconductor material, as Figure 4 As shown, a negative voltage signal V3, for example -5V, is applied to the gate 2, the first power supply signal terminal V1 connected to the first pole 5 is grounded, and another negative voltage signal, for example -8V, is applied to the second power supply terminal V2 connected to the second pole 7. Under the action of the electric field between the gate 2 and the first pole 5, a large number of holes are induced in the active layer 4. At the same time, under the action of the electric field between the second pole 7 and the first pole 5, electrons are gradually injected from the second pole 7 into the electron injection layer 91 through the electron transport layer 92 into the quantum dot light-emitting layer 6. Holes are also injected into the quantum dot light-emitting layer 5 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the first pole 5, and between the second pole 7 and the gate 2, so as to realize the light emission of the light-emitting transistor, and the light emission of the light-emitting transistor can be jointly regulated by the V3 signal voltage loaded by the gate 2 and the V2 signal voltage loaded by the second pole 7.

[0077] Based on the same inventive concept, the embodiment of the present disclosure also provides a display substrate, including a plurality of pixel circuits, such as Figure 6 and Figure 7 A pixel circuit as shown, each pixel circuit comprises:

[0078] A switch transistor 101, wherein a gate electrode 101g of the switch transistor 101 is coupled to a scan signal terminal S, and a first electrode 101a of the switch transistor 101 is coupled to a data signal terminal D;

[0079] The light emitting transistor 102 provided in the embodiment of the present disclosure has a gate 2 coupled to the second electrode 101b of the switch transistor 101, a first electrode 5 coupled to the first power signal terminal V1, and a second electrode 7 coupled to the second power signal terminal V2;

[0080] The capacitor 103 is coupled between the first electrode 5 and the gate 2 of the light emitting transistor 102 .

[0081] Specifically, in the display substrate provided in some embodiments of the present disclosure, the pixel circuit adopts the light-emitting transistor 102 provided in some embodiments of the present disclosure. The light-emitting transistor 102 integrates the control transistor and the quantum dot light-emitting device in the same device. When applied to the pixel circuit, the circuit structure can be simplified. Fig.11 The pixel circuit provided by the related technology shown can save a transistor, effectively reduce the area occupied by the device, and improve the aperture ratio of the device.

[0082] Optionally, in the display substrate provided in some embodiments of the present disclosure, Figure 7 As shown, the gate 101g of the switch transistor 101, the gate 2 of the light emitting transistor 102 and the first electrode 103a of the capacitor 103 can be arranged in the same layer; the first electrode 101a and the second electrode 101b of the switch transistor 101, the first electrode 5 of the light emitting transistor 102, and the second electrode 103b of the capacitor 103 can be arranged in the same layer to simplify the film layer structure in the display substrate. The second electrode 7 of the light emitting transistor 102 is electrically connected to the second electrode 103b of the capacitor 103, specifically, they can be electrically connected through a via hole penetrating the pixel defining layer 10.

[0083] Optionally, in the display substrate provided in some embodiments of the present disclosure, the first power signal terminal V1 is generally grounded to fix the potential.

[0084] Optionally, in the display substrate provided in some embodiments of the present disclosure, the active layer 4 of the light-emitting transistor 102 may include an N-type semiconductor material, and in this case, the second power signal terminal V2 is configured to load a positive voltage signal. Generally, in order to simplify the manufacturing process and the substrate film layer structure, the active layer of the switching transistor 101 is made of the same material and on the same layer as the active layer 4 of the light-emitting transistor. In this way, when a positive voltage signal such as +5V is loaded on the scanning signal terminal S, the switching transistor 101 is turned on, and at the same time, a positive voltage signal V3 such as +5V is also loaded on the data signal terminal D, and the V3 signal is transmitted to the gate 2 of the light-emitting transistor 102, that is, the gate 2 of the light-emitting transistor 102 is applied with a voltage of about +5V, and under the action of this gate voltage, a large number of electrons are induced in the active layer 4 of the light-emitting transistor 102. At the same time, under the action of the electric field between the second pole 7 and the first pole 5 of the light-emitting transistor 102, holes gradually enter the quantum dot light-emitting layer 6 from the second pole 7, and electrons are also injected into the quantum dot light-emitting layer 5 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the gate 2, thereby realizing the light-emitting transistor 102. The light-emitting transistor 102 can be jointly regulated by the signal voltage loaded by the gate 2 (related to the voltage provided by the data signal terminal D) and the V2 signal voltage loaded by the second pole 7.

[0085] Alternatively, optionally, in the display substrate provided in some embodiments of the present disclosure, the active layer 4 of the light-emitting transistor 102 may include a P-type semiconductor material, and in this case, the second power signal terminal V2 is configured to load a negative voltage signal. Generally, in order to simplify the manufacturing process and the substrate film layer structure, the active layer of the switching transistor 101 is made of the same material and on the same layer as the active layer 4 of the light-emitting transistor. In this way, when a negative voltage signal such as -5V is loaded on the scanning signal terminal S, the switching transistor 101 is turned on, and at the same time, a negative voltage signal V3 such as -5V is also loaded on the data signal terminal D, and the V3 signal is transmitted to the gate 2 of the light-emitting transistor 102, that is, the gate 2 of the light-emitting transistor 102 is applied with a voltage of about -5V. Under the action of this gate voltage, a large number of holes are induced in the active layer 4 of the light-emitting transistor 102. At the same time, under the action of the electric field between the second pole 7 and the first pole 5 of the light-emitting transistor 102, electrons gradually enter the quantum dot light-emitting layer 6 from the second pole 7, and holes are also injected into the quantum dot light-emitting layer 5 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the gate 2, thereby realizing the light-emitting transistor 102. The light-emitting transistor 102 can be jointly regulated by the signal voltage loaded by the gate 2 (related to the voltage provided by the data signal terminal D) and the V2 signal voltage loaded by the second pole 7.

[0086] Based on the same inventive concept, the embodiment of the present disclosure also provides another display substrate, including a plurality of pixel circuits, such as Figure 6 and Figure 8 A pixel circuit as shown, each pixel circuit comprises:

[0087] A switch transistor 101, wherein a gate electrode 101g of the switch transistor 101 is coupled to a scan signal terminal S, and a first electrode 101a of the switch transistor 101 is coupled to a data signal terminal D;

[0088] The light-emitting transistor 102 includes a gate 2, an insulating layer 3, a first electrode 5, an active layer 4, a quantum dot light-emitting layer 6, and a second electrode 7 which are stacked in sequence; the first electrode 4 has a set pattern, and the active layer 4 is filled between the set patterns of the first electrode 4 and contacts the insulating layer 3; the gate 2 of the light-emitting transistor 102 is coupled to the second electrode 101b of the switch transistor 101, the first electrode 102a of the light-emitting transistor 102 is coupled to the first power signal terminal V1, and the second electrode 7 of the light-emitting transistor 102 is coupled to the second power signal terminal V2;

[0089] The capacitor 103 is coupled between the first electrode 5 and the gate 2 of the light emitting transistor 102 .

[0090] Specifically, in the display substrate provided in some embodiments of the present disclosure, the pixel circuit uses a light-emitting transistor 102 that integrates a control transistor and a quantum dot light-emitting device in the same device, which can simultaneously realize the functions of controlling the switch and the light-emitting display. When the light-emitting transistor is applied to the pixel circuit, the circuit structure can be simplified, that is, compared with the example Fig.11 The pixel circuit provided by the related technology shown can save a transistor, effectively reduce the area occupied by the device, and improve the aperture ratio of the device.

[0091] Specifically, in the display substrate provided by some embodiments of the present disclosure, the first pole 5 of the light-emitting transistor 102 is set to have a set pattern to expose the insulating layer 3 below, so that the active layer 4 is in direct contact with the first pole 5 and the insulating layer 3, and the active layer 4 covers the surface and side of the set pattern of the first pole 5 away from the insulating layer 3, and the active layer 4 covers the surface of the insulating layer 3 not covered by the first pole 5. In this way, the active layer 4 located on the first pole 5 is in direct contact with the insulating layer 3, so that after power is turned on, the insulating layer 3 induces electrons, so that the active layer 4 acts as an electron transport layer, transfers electrons to the quantum dot light-emitting layer 6, and the holes transferred to the quantum dot light-emitting layer 6 by the second pole 7 are recombined to generate exciton light emission, or after power is turned on, the insulating layer 3 induces holes, so that the active layer 4 acts as a hole transport layer, transfers holes to the quantum dot light-emitting layer 6, and the electrons transferred to the quantum dot light-emitting layer 6 by the second pole 7 are recombined to generate exciton light emission.

[0092] Optionally, in the display substrate provided in some embodiments of the present disclosure, the setting pattern of the first electrode 5 of the light emitting transistor 102 can be as follows: Figure 5a The comb pattern shown or Figure 5c The grid pattern shown, and the dressing pattern can be as Figure 5b Shown are two mutually staggered interdigitated structures.

[0093] Optionally, in the display substrate provided in some embodiments of the present disclosure, Figure 5a to Figure 5c As shown, the second electrode 7 of the light-emitting transistor 102 can be arranged on the entire surface, and the orthographic projection of the second electrode 7 of the light-emitting transistor 102 on the substrate 1 can completely cover the orthographic projection of the first electrode 5 of the light-emitting transistor 102 on the substrate 1 to increase the light-emitting area.

[0094] Optionally, in the display substrate provided by some embodiments of the present disclosure, the gate 101g of the switch transistor 101, the gate 2 of the light emitting transistor 102, and the first electrode 103a of the capacitor 103 can be arranged in the same layer; the first electrode 101a and the second electrode 101b of the switch transistor 101, the first electrode 5 of the light emitting transistor 102, and the second electrode 103b of the capacitor 103 can be arranged in the same layer to simplify the film layer structure in the display substrate. The second electrode 7 of the light emitting transistor 102 is electrically connected to the second electrode 103b of the capacitor 103, specifically, it can be electrically connected through a via hole penetrating the pixel defining layer 10.

[0095] Optionally, in the display substrate provided in some embodiments of the present disclosure, Fig. 9 As shown, the active layer 4 of the light-emitting transistor 102 may include an N-type semiconductor material. In this case, the light-emitting transistor 102 may also include an electron transport layer. The active layer 4 of the light-emitting transistor 102 also serves as an electron transport layer, that is, the electron transport layer and the active layer have an integrated structure. In addition, the energy level of the selected N-type semiconductor material needs to match the energy level of the quantum dot light-emitting layer 6 material, and the conduction band bottom energy level (CBM) of the active layer 4 of the N-type semiconductor material is required to be approximately between -3.8eV and -4.2eV. Generally, in order to simplify the manufacturing process and the substrate film layer structure, the active layer of the switch transistor 101 will be made of the same material and on the same layer as the active layer 4 of the light-emitting transistor.

[0096] Optionally, in the display substrate provided in some embodiments of the present disclosure, when the active layer 4 of the light emitting transistor 102 and the electron transport layer have an integrated structure, as Fig. 9As shown, the first power signal terminal V1 is generally grounded, and the second power signal terminal V2 is configured to load a positive voltage signal. In this way, when a positive voltage signal such as +5V is loaded on the scan signal terminal S, the switch transistor 101 is turned on, and at the same time, a positive voltage signal V3 such as +5V is also loaded on the data signal terminal D, and the V3 signal is transmitted to the gate 2 of the light emitting transistor 102, that is, the gate 2 of the light emitting transistor 102 is applied with a voltage of about +5V. Under the action of this gate voltage, a large number of electrons are induced on the side of the insulating layer 3 of the light emitting transistor 102 close to the active layer 4. At the same time, under the action of the electric field between the second pole 7 and the first pole 5 of the light-emitting transistor 102, holes gradually enter the quantum dot light-emitting layer 6 from the second pole 7, and electrons are also injected into the quantum dot light-emitting layer 5 through the active layer 4 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the gate 2, thereby realizing the light-emitting transistor 102. The light-emitting transistor 102 can be jointly regulated by the signal voltage loaded by the gate 2 (related to the voltage provided by the data signal terminal D) and the V2 signal voltage loaded by the second pole 7.

[0097] Optionally, in the display substrate provided in some embodiments of the present disclosure, when the active layer 4 of the light emitting transistor 102 and the electron transport layer have an integrated structure, as Fig. 9 As shown, the light emitting transistor 102 may further include: at least one of a hole injection layer 81 and a hole transport layer 82 located between the quantum dot light emitting layer 6 and the second electrode 7 of the light emitting transistor 102, Fig. 9 The case where the hole injection layer 81 and the hole transport layer 82 exist at the same time is shown.

[0098] Alternatively, optionally, in the display substrate provided in some embodiments of the present disclosure, as Fig.10 As shown, the active layer 4 of the light-emitting transistor 102 may include a P-type semiconductor material. In this case, the light-emitting transistor 102 may also include a hole transport layer. The active layer 4 of the light-emitting transistor 102 also serves as a hole transport layer, that is, the hole transport layer and the active layer have an integrated structure. In addition, the energy level of the selected P-type semiconductor material needs to match the energy level of the quantum dot light-emitting layer 6 material. The valence band top energy level (VBM) of the active layer 4 of the P-type semiconductor material is approximately between -5.3eV and -6.2eV. Generally, in order to simplify the manufacturing process and the substrate film layer structure, the active layer of the switch transistor 101 will be made of the same material and on the same layer as the active layer 4 of the light-emitting transistor.

[0099] Optionally, in the display substrate provided in some embodiments of the present disclosure, when the active layer 4 of the light emitting transistor 102 and the hole transport layer have an integrated structure, as Fig.10As shown, the first power signal terminal V1 can be grounded, and the second power signal terminal V2 is configured to load a negative voltage signal. In this way, when a negative voltage signal such as -5V is loaded on the scanning signal terminal S, the switch transistor 101 is turned on, and at the same time, a negative voltage signal V3 such as -5V is also loaded on the data signal terminal D, and the V3 signal is transmitted to the gate 2 of the light emitting transistor 102, that is, the gate 2 of the light emitting transistor 102 is applied with a voltage of about -5V. Under the action of this gate voltage, a large number of holes are induced on the side of the insulating layer 3 of the light emitting transistor 102 close to the active layer 4. At the same time, under the action of the electric field between the second pole 7 and the first pole 5 of the light-emitting transistor 102, electrons gradually enter the quantum dot light-emitting layer 6 from the second pole 7, and holes are also injected into the quantum dot light-emitting layer 5 through the active layer 4 under the action of the electric field between the second pole 7 and the first pole 5, and under the action of the electric field between the second pole 7 and the gate 2, thereby realizing the light-emitting transistor 102. The light-emitting transistor 102 can be jointly regulated by the signal voltage loaded by the gate 2 (related to the voltage provided by the data signal terminal D) and the V2 signal voltage loaded by the second pole 7.

[0100] Optionally, in the display substrate provided in some embodiments of the present disclosure, when the active layer 4 of the light emitting transistor 102 and the hole transport layer have an integrated structure, as Fig.10 As shown, the light emitting transistor 102 may further include: at least one of an electron injection layer 91 and an electron transport layer 92 located between the quantum dot light emitting layer 6 and the second electrode 7 of the light emitting transistor 102, Fig.10 The case where the electron injection layer 91 and the electron transport layer 92 exist at the same time is shown.

[0101] Optionally, in the display substrate provided in some embodiments of the present disclosure, the display substrate may be a conventional display product, specifically, may be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function.

[0102] Obviously, those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to include these modifications and variations.

Claims

1. A light emitting transistor, wherein: include: substrate; A gate, located on the substrate; an insulating layer, located on a side of the gate facing away from the substrate; An active layer, located on a side of the insulating layer away from the gate; A first electrode, located at a side of the active layer away from the insulating layer, the first electrode having a set pattern; A quantum dot light-emitting layer, located on a side of the first pole away from the active layer, the quantum dot light-emitting layer is filled between the set patterns of the first pole and in contact with the active layer, the quantum dot light-emitting layer covers the surface and side of the set pattern of the first pole away from the active layer, and the quantum dot light-emitting layer covers the surface of the active layer not covered by the first pole; The second pole is located on a side of the quantum dot light-emitting layer away from the first pole.

2. The light emitting transistor according to claim 1, wherein: The setting pattern of the first pole is a comb pattern or a grid pattern.

3. The light emitting transistor according to claim 1, wherein: The second pole is disposed over the entire surface, and the orthographic projection of the second pole on the substrate completely covers the orthographic projection of the first pole on the substrate.

4. The light emitting transistor according to any one of claims 1 to 3, wherein: It also includes an electron transport layer, the active layer includes an N-type semiconductor material, and the electron transport layer and the active layer have an integrated structure.

5. The light emitting transistor according to claim 4, wherein: Also includes: At least one of a hole injection layer and a hole transport layer is located between the quantum dot light-emitting layer and the second electrode.

6. The light emitting transistor according to any one of claims 1 to 3, wherein: It also includes a hole transport layer, the active layer includes a P-type semiconductor material, and the hole transport layer and the active layer have an integrated structure.

7. The light emitting transistor according to claim 6, wherein: Also includes: At least one of an electron injection layer and an electron transport layer is located between the quantum dot light-emitting layer and the second electrode.

8. A display substrate, wherein: The method comprises a plurality of pixel circuits, each of the pixel circuits comprising: A switch transistor, wherein a gate of the switch transistor is coupled to the scan signal terminal, and a first electrode of the switch transistor is coupled to the data signal terminal; The light emitting transistor according to any one of claims 1 to 7, wherein the gate of the light emitting transistor is coupled to the second electrode of the switch transistor, the first electrode of the light emitting transistor is coupled to the first power signal terminal, and the second electrode of the light emitting transistor is coupled to the second power signal terminal; A capacitor is coupled between the first electrode and the gate of the light emitting transistor.

9. The display substrate according to claim 8, wherein: The first power signal terminal is grounded.

10. The display substrate according to claim 9, wherein: The active layer of the light emitting transistor includes an N-type semiconductor material, and the second power signal terminal is configured to load a positive voltage signal.

11. The display substrate according to claim 9, wherein: The active layer of the light emitting transistor includes a P-type semiconductor material, and the second power signal terminal is configured to load a negative voltage signal.

12. A display substrate, wherein: The method comprises a plurality of pixel circuits, each of the pixel circuits comprising: A switch transistor, wherein a gate of the switch transistor is coupled to the scan signal terminal, and a first electrode of the switch transistor is coupled to the data signal terminal; A light-emitting transistor, comprising a gate, an insulating layer, a first electrode, an active layer, a quantum dot light-emitting layer and a second electrode which are stacked in sequence; the first electrode has a set pattern, the active layer is filled between the set patterns of the first electrode and contacts the insulating layer, the quantum dot light-emitting layer covers the surface and side of the set pattern of the first electrode away from the active layer, and the quantum dot light-emitting layer covers the surface of the active layer not covered by the first electrode; the gate of the light-emitting transistor is coupled to the second electrode of the switch transistor, the first electrode of the light-emitting transistor is coupled to the first power signal terminal, and the second electrode of the light-emitting transistor is coupled to the second power signal terminal; A capacitor is coupled between the first electrode and the gate of the light emitting transistor.

13. The display substrate according to claim 12, wherein: The setting pattern of the first electrode of the light emitting transistor is a comb pattern or a grid pattern.

14. The display substrate according to claim 12, wherein: The second electrode of the light emitting transistor is arranged on the entire surface, and the orthographic projection of the second electrode of the light emitting transistor on the substrate completely covers the orthographic projection of the first electrode of the light emitting transistor on the substrate.

15. The display substrate according to claim 12, wherein: The gate of the switch transistor, the gate of the light emitting transistor and the first electrode of the capacitor are arranged in the same layer; The first electrode and the second electrode of the switch transistor, the first electrode of the light emitting transistor, and the second electrode of the capacitor are arranged in the same layer; The second electrode of the light emitting transistor is electrically connected to the second electrode of the capacitor.

16. The display substrate according to any one of claims 12 to 15, wherein: The light emitting transistor further comprises an electron transport layer, the active layer of the light emitting transistor comprises an N-type semiconductor material, and the electron transport layer of the light emitting transistor and the active layer have an integral structure.

17. The display substrate according to claim 16, wherein: The first power signal terminal is grounded, and the second power signal terminal is configured to load a positive voltage signal.

18. The display substrate according to claim 16, wherein: The light emitting transistor further includes: at least one of a hole injection layer and a hole transport layer located between the quantum dot light emitting layer and the second electrode of the light emitting transistor.

19. The display substrate according to any one of claims 12 to 15, wherein: The light emitting transistor further comprises a hole transport layer, the active layer of the light emitting transistor comprises a P-type semiconductor material, and the hole transport layer of the light emitting transistor and the active layer have an integrated structure.

20. The display substrate according to claim 19, wherein: The first power signal terminal is grounded, and the second power signal terminal is configured to load a negative voltage signal.

21. The display substrate according to claim 19, wherein: The light emitting transistor further includes: at least one of an electron injection layer and an electron transport layer located between the quantum dot light emitting layer and the second electrode of the light emitting transistor.

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