A semiconductor structure manufacturing method, semiconductor structure and memory

Abstract

The application discloses a semiconductor structure manufacturing method, a semiconductor structure and a memory. The method comprises the following steps: providing a substrate, wherein the substrate comprises a storage area and a peripheral area; forming a first transistor in the storage area; forming a second transistor in the peripheral area, wherein the structure of the second transistor is different from that of the first transistor; forming a first capacitor electrically connected with a drain of the first transistor in the storage area, and forming a second capacitor electrically connected with a second drain of the second transistor in the peripheral area, wherein the first capacitor and the second capacitor are formed synchronously. The method can reduce the mask cost of the process, improve the yield of the antifuse semiconductor, avoid the damage of the antifuse semiconductor structure memory caused by the misbreakdown of the source / drain pad, and improve the space utilization rate of the antifuse structure.

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