An array substrate and a display panel

Abstract

This invention relates to an array substrate and a display panel. In this invention, the angles between the two sidewalls of the first sub-active portion and the first bottom surface of the portion near the second active portion are both acute angles. This reduces the angle of the corner encountered by the signal as it is transmitted from the first electrode through the active layer to the second electrode, optimizes current distribution, facilitates smoother charge transfer, reduces the congestion and accumulation effect of charge at the corners, thereby reducing the resistance at the corners. With a constant current, this reduces heat generation, thus reducing the probability of thin-film transistor burnout, ultimately extending the lifespan of the display panel and improving its reliability.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to an array substrate and a display panel. Background Technology

[0002] Currently, thin-film transistors (TFTs) are an important component of display panels and can be formed on glass or plastic substrates.

[0003] like Figure 1 As shown in the top view of the existing thin-film transistor 200, the first electrode 201 and the second electrode 202 are parallel to each other, and the active layer 203 is orthogonal to the first electrode 201. That is, the angle α1 between the active layer 203 and the first electrode 201 is 90°, and the angle α2 between the active layer 203 and the second electrode 202 is 90°. During the process of the signal being transmitted from the first electrode 201 to the second electrode 202 via the active layer 203 (e.g., from...),... Figure 1 During the process from the upper right corner of the first electrode to the lower left corner of the second electrode, the signal encounters two corners. One corner has an angle of 180° + α1 = 270°, and the other corner has an angle of 180° + α2 = 270°. When the thin-film transistor 200 is turned on, charge accumulation occurs at these two corners, resulting in higher resistance at the corners. According to the formula Q = I... 2 From Rt, we know that Q represents heat generation in joules (J); I represents current in amperes (A); R represents resistance in ohms (Ω); and t represents time in seconds (s). The larger the resistance R, the larger the heat generation Q, and the easier it is for the thin-film transistor 200 to burn out. Summary of the Invention

[0004] The purpose of this invention is to provide an array substrate and a display panel that can solve the problems of charge accumulation at the corners of existing thin-film transistors, which leads to high resistance at the corners and causes the thin-film transistors to burn out.

[0005] To address the aforementioned problems, the present invention provides an array substrate comprising: a substrate; an active layer disposed on the substrate, the active layer comprising: a first active portion and a second active portion and a third active portion respectively connected to opposite ends of the first active portion; a first electrode covering the second active portion and electrically connected to the second active portion; and a second electrode covering the third active portion and electrically connected to the third active portion; wherein the orthographic projection of the first active portion on the substrate is located between the orthographic projections of the first electrode and the second electrode on the substrate; the first active portion comprises a first sub-active portion and a second sub-active portion, the first sub-active portion being connected between the second active portion and the second sub-active portion, and the second sub-active portion being connected between the first sub-active portion and the third active portion; the included angles between the two sidewalls of the first sub-active portion and its first bottom surface near the second active portion are both acute angles.

[0006] Furthermore, the angles between the two sidewalls of the second active part and the third bottom surface of the part closest to the third active part are both acute angles.

[0007] Furthermore, the width of the first bottom surface of the first sub-active part is greater than the width of the second bottom surface on the side away from the second active part; the width of the third bottom surface of the second sub-active part is greater than the width of the fourth bottom surface on the side away from the third active part.

[0008] Furthermore, the distance between the first bottom surface and the second bottom surface of the first sub-active portion is less than or equal to half the distance between the first electrode and the second electrode, and the distance between the first bottom surface and the second bottom surface of the first sub-active portion is greater than or equal to one-tenth of the distance between the first electrode and the second electrode; the distance between the third bottom surface and the fourth bottom surface of the second sub-active portion is less than or equal to half the distance between the first electrode and the second electrode, and the distance between the third bottom surface and the fourth bottom surface of the second sub-active portion is greater than or equal to one-tenth of the distance between the first electrode and the second electrode.

[0009] Furthermore, the maximum distance between the sidewalls of the first sub-active portion and the second active portion located on the same side is greater than or equal to the distance between the first bottom surface and the second bottom surface of the first sub-active portion; the maximum distance between the sidewalls of the second sub-active portion and the third active portion located on the same side is greater than or equal to the distance between the third bottom surface and the fourth bottom surface of the second sub-active portion.

[0010] Furthermore, the first active part also includes a third active part connected between the first sub-active part and the second sub-active part.

[0011] Furthermore, the distance between the fifth bottom surface of the third sub-active part on the side close to the first sub-active part and the sixth bottom surface on the side away from the first sub-active part is greater than or equal to 1 μm.

[0012] Furthermore, the distance between the fifth bottom surface and the sixth bottom surface of the third sub-active part is greater than or equal to the distance between the first bottom surface and the second bottom surface of the first sub-active part; the distance between the fifth bottom surface and the sixth bottom surface of the third sub-active part is greater than or equal to the distance between the third bottom surface and the fourth bottom surface of the second sub-active part.

[0013] Furthermore, the shape of the orthographic projection of the sidewall of the first sub-active portion onto the substrate includes one or more of a straight line and an arc; the shape of the orthographic projection of the sidewall of the second sub-active portion onto the substrate includes one or more of a straight line and an arc.

[0014] To address the aforementioned problems, the present invention also provides a display panel comprising the array substrate described herein.

[0015] The advantages of this invention are: the angles between the two sidewalls of the first active part and the first bottom surface of the side closest to the second active part are both acute angles, thereby reducing the angle of the corner encountered by the signal as it is transmitted from the first electrode through the active layer to the second electrode, optimizing the current distribution, making charge transmission smoother, reducing the congestion and accumulation effect of charge at the corner, thereby reducing the resistance at the corner, reducing heat generation while keeping the current constant, thereby reducing the probability of thin film transistor burnout, and ultimately improving the lifespan and reliability of the display panel. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a top view of an existing thin-film transistor;

[0018] Figure 2 This is a schematic diagram of the array substrate of the present invention;

[0019] Figure 3 This is a top view of the active layer, first electrode, and second electrode of the array substrate in Embodiment 1 of the present invention;

[0020] Figure 4 This is a top view of the active layer of the array substrate in Embodiment 1 of the present invention;

[0021] Figure 5 This is a top view of the active layer, first electrode, and second electrode of the array substrate in Embodiment 2 of the present invention;

[0022] Figure 6 This is a top view of the active layer of the array substrate in Embodiment 2 of the present invention;

[0023] Figure 7 This is a top view of the active layer, first electrode, and second electrode of the array substrate in Embodiment 3 of the present invention;

[0024] Figure 8 This is a top view of the active layer of the array substrate in Embodiment 3 of the present invention.

[0025] Explanation of reference numerals in the attached figures:

[0026] 100. Array substrate;

[0027] 1. Substrate; 2. Gate electrode;

[0028] 3. Gate insulating layer; 4. Active layer;

[0029] 5. First electrode; 6. Second electrode;

[0030] 41. First active part; 42. Second active part;

[0031] 43. The third active part;

[0032] 411. First sub-source; 412. Second sub-source;

[0033] 413. The third sub-sub ...

[0034] 4111, First base surface; 4112, Second base surface;

[0035] 4121. Third base surface; 4122. Fourth base surface;

[0036] 4131, Fifth base surface; 4132, Sixth base surface. Detailed Implementation

[0037] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings to fully introduce the technical content of the present invention to those skilled in the art, and to demonstrate that the present invention can be implemented, making the disclosed technical content of the present invention clearer and enabling those skilled in the art to more easily understand how to implement the present invention. However, the present invention can be embodied in many different forms of embodiments, and the scope of protection of the present invention is not limited to the embodiments mentioned herein. The following description of the embodiments is not intended to limit the scope of the present invention.

[0038] The directional terms used in this invention, such as "up", "down", "front", "back", "left", "right", "inner", "outer", and "side", are only for the directions shown in the accompanying drawings. The directional terms used herein are for the purpose of explaining and illustrating this invention, and not for limiting the scope of protection of this invention.

[0039] In the accompanying drawings, components with the same structure are indicated by the same numerical designation, and components with similar structures or functions are indicated by similar numerical designations. Furthermore, for ease of understanding and description, the dimensions and thicknesses of each component shown in the drawings are arbitrary, and the present invention does not limit the dimensions and thicknesses of each component.

[0040] Example 1

[0041] This embodiment provides a display panel, which includes either a liquid crystal display (LCD) or an organic light-emitting display (OLED). The display panel includes an array substrate 100.

[0042] like Figure 2 As shown, the array substrate 100 includes: a substrate 1, a gate 2, a gate insulating layer 3, an active layer 4, a first electrode 5, and a second electrode 6.

[0043] The substrate 1 is one or more of glass, polyimide, polycarbonate, polyethylene terephthalate, and polyethylene naphthalate. In this embodiment, the substrate 1 has a single-layer structure. In other embodiments, the substrate 1 may include two opposing substrate layers and a barrier layer disposed between the two substrates, thereby utilizing the two substrate layers to enhance the strength of the substrate 1 and utilizing the barrier layer to enhance the substrate 1's ability to block water and oxygen intrusion.

[0044] The gate 2 is disposed on the substrate 1. The material of the gate 2 can be Mo, a combination of Mo and Al, a combination of Mo and Cu, a combination of Mo, Cu and IZO, a combination of IZO, Cu and IZO, a combination of Mo, Cu and ITO, a combination of Ni, Cu and Ni, a combination of NiCr, Cu and NiCr, CuNb, etc. In this embodiment, the material of the gate 2 is Cu.

[0045] In this embodiment, the gate insulating layer 3 is disposed on the side of the gate 2 away from the substrate 1 and extends to cover the substrate 1. The gate insulating layer 3 is mainly used to prevent short circuits between the gate 2 and the active layer 4. The gate insulating layer 3 can be made of SiOx, SiNx, Al2O3, a combination of SiNx and SiOx, or a combination of SiOx, SiNx, and SiOx, etc. In this embodiment, the gate insulating layer 3 is made of SiOx.

[0046] The active layer 4 is disposed on the side of the gate insulating layer 3 away from the substrate 1. The active layer 4 is made of metal oxide. Since IGZO (indium gallium zinc oxide) is an amorphous oxide containing indium, gallium, and zinc, it has high mobility, with carrier mobility 20 to 30 times that of amorphous silicon. This significantly improves the charging and discharging rate of the TFT to the pixel electrode, exhibiting high on-state current and low off-state current, thus enabling rapid switching and preventing leakage, improving pixel response speed, and achieving a faster refresh rate. The faster response also greatly improves the pixel's line scan rate, making ultra-high resolution possible in display panels. Therefore, in this embodiment, the active layer 4 is made of IGZO. In other embodiments, the active layer 4 can also be made of amorphous silicon, low-temperature polycrystalline silicon, etc.

[0047] like Figure 2 As shown, the active layer 4 includes a first active section 41, a second active section 42, and a third active section 43. The second active section 42 and the third active section 43 are respectively connected to opposite ends of the first active section 41.

[0048] In this embodiment, the first electrode 5 and the second electrode 6 are respectively the source and the drain. In this embodiment, the first electrode 5 is the source and the second electrode 6 is the drain. In other embodiments, the first electrode 5 may be the drain and the second electrode 6 may be the source.

[0049] The first electrode 5 covers and is electrically connected to the second active portion 42. The first electrode 5 can be made of Mo, a combination of Mo and Al, a combination of Mo and Cu, a combination of Mo, Cu, and IZO, a combination of IZO, Cu, and IZO, a combination of Mo, Cu, and ITO, a combination of Ni, Cu, and Ni, a combination of NiCr, Cu, and NiCr, CuNb, etc. In this embodiment, the first electrode 5 is made of Cu.

[0050] The second electrode 6 covers and is electrically connected to the third active portion 43. The material of the second electrode 6 can be Mo, a combination of Mo and Al, a combination of Mo and Cu, a combination of Mo, Cu, and IZO, a combination of IZO, Cu, and IZO, a combination of Mo, Cu, and ITO, a combination of Ni, Cu, and Ni, a combination of NiCr, Cu, and NiCr, CuNb, etc. In this embodiment, the material of the second electrode 6 is Cu.

[0051] like Figure 2 and Figure 3 As shown, the orthographic projection of the first active portion 41 on the substrate 1 lies between the orthographic projections of the first electrode 5 and the second electrode 6 on the substrate 1. In other words, the first electrode 5 and the second electrode 6 do not cover the first active portion 41.

[0052] like Figure 3 and Figure 4 As shown, the first active part 41 includes a first sub-active part 411 and a second sub-active part 412.

[0053] The first sub-active part 411 is connected between the second active part 42 and the second sub-active part 412. The bottom surface of the first sub-active part 411 on the side closer to the second active part 42 is the first bottom surface 4111, and the bottom surface of the first sub-active part 411 on the side away from the second active part 42 is the second bottom surface 4112.

[0054] The orthographic projection of the sidewall of the first sub-active portion 411 onto the substrate 1 includes one or more shapes, such as straight lines and arcs. In this embodiment, the orthographic projections of both sidewalls of the first sub-active portion 411 onto the substrate 1 are arcs.

[0055] The second active sub-unit 412 is connected between the third active sub-unit 43 and the first active sub-unit 411. The bottom surface of the second active sub-unit 412 closest to the third active sub-unit 43 is the third bottom surface 4121, and the bottom surface of the second active sub-unit 412 furthest from the third active sub-unit 43 is the fourth bottom surface 4122. In this embodiment, the fourth bottom surface 4122 completely overlaps with the second bottom surface 4112.

[0056] The orthographic projection of the sidewall of the second sub-active portion 412 onto the substrate 1 includes one or more shapes, such as straight lines and arcs. In this embodiment, the orthographic projections of both sidewalls of the second sub-active portion 412 onto the substrate 1 are arcs.

[0057] In this embodiment, the angles between the two sidewalls of the first sub-active portion 411 and the first bottom surface 4111 are both acute angles. The width of the first bottom surface 4111 of the first sub-active portion 411 is greater than the width of its second bottom surface 4112. In this embodiment, the orthographic projections of the two sidewalls of the first sub-active portion 411 onto the substrate 1 are both arcs. Specifically, the angle α3 between the tangent at any point other than the endpoint of one sidewall of the first sub-active portion 411 and the first bottom surface 4111 is an acute angle; the angle α4 between the tangent at any point other than the endpoint of the other sidewall of the first sub-active portion 411 and the first bottom surface 4111 is an acute angle. Thus, as the signal flows from the first electrode 5 through the active layer 4, the signal passes through a corner, the size of which is 180° + α3 or 180° + α4. Since α3 and α4 are acute angles, 180° + α3 is less than 270°, and 180° + α4 is less than 270°. This reduces the angle of the bend in the signal transmission from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transmission smoother, reduces the congestion and accumulation effect of charge at the bend, and thus reduces the resistance at the bend. Under the condition of constant current, it reduces heat generation, thereby reducing the probability of thin film transistor burnout, and ultimately improving the lifespan and reliability of the display panel.

[0058] The width of the first bottom surface 4111 refers to the length of its orthographic projection onto the substrate 1. The width of the second bottom surface 4112 refers to the length of its orthographic projection onto the substrate 1.

[0059] In this embodiment, the angles between the two sidewalls of the second sub-active portion 412 and the third bottom surface 4121 are both acute angles. The width of the third bottom surface 4121 of the second sub-active portion 412 is greater than the width of its fourth bottom surface 4122. In this embodiment, the orthographic projections of the two sidewalls of the second sub-active portion 412 onto the substrate 1 are both arcs. Specifically, the angle α5 between the tangent at any point other than the endpoint of one sidewall of the second sub-active portion 412 and the third bottom surface 4121 is an acute angle; the angle α6 between the tangent at any point other than the endpoint of the other sidewall of the second sub-active portion 411 and the third bottom surface 4121 is an acute angle. Thus, during the process of the signal flowing from the first electrode 5 through the active layer 4 to the second electrode 6, the signal passes through a corner, the size of which is 180°+α5 or 180°+α6. Since α7 and α8 are acute angles, 180° + α5 is less than 270°, and 180° + α6 is less than 270°. This further reduces the angle of the corner encountered by the signal as it is transmitted from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transfer smoother, reduces the congestion and accumulation effect of charge at the corner, and thus reduces the resistance at the corner. With the current remaining constant, this reduces heat generation, thereby reducing the probability of thin-film transistor burnout, ultimately improving the lifespan and reliability of the display panel.

[0060] The width of the third bottom surface 4121 refers to the length of its orthographic projection onto the substrate 1. The width of the fourth bottom surface 4122 refers to the length of its orthographic projection onto the substrate 1.

[0061] like Figure 3 As shown, the distance L1 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411 is less than or equal to half of the distance L between the first electrode 5 and the second electrode 6, and the distance L1 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411 is greater than or equal to one-tenth of the distance L between the first electrode 5 and the second electrode 6. In this embodiment, the distance L1 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411 is equal to half of the distance L between the first electrode 5 and the second electrode 6.

[0062] In this embodiment, the maximum distance L2 between the sidewalls of the first sub-active portion 411 and the second active portion 42 located on the same side is greater than or equal to the distance L1 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411. In this embodiment, the maximum distance L2 between the sidewalls of the first sub-active portion 411 and the second active portion 42 on the same side is equal to the distance L1 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411. This optimizes current distribution, facilitates smoother charge flow, and reduces the congestion and accumulation effect of charge at corners.

[0063] In this embodiment, the distance L3 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is less than or equal to half of the distance L between the first electrode 5 and the second electrode 6, and the distance L3 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is greater than or equal to one-tenth of the distance L between the first electrode 5 and the second electrode 6. In this embodiment, the distance L3 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is equal to half of the distance L between the first electrode 5 and the second electrode 6.

[0064] In this embodiment, the maximum distance L4 between the sidewalls of the second sub-active portion 412 and the third active portion 43 on the same side is greater than or equal to the distance L2 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412. In this embodiment, the maximum distance L4 between the sidewalls of the second sub-active portion 412 and the third active portion 43 on the same side is equal to the distance L3 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412. This optimizes current distribution, facilitates smoother charge transfer, and reduces the congestion and accumulation effect of charge at corners.

[0065] Example 2

[0066] like Figure 5 and Figure 6 As shown, this embodiment includes most of the technical features of embodiment 1. The difference between this embodiment and embodiment 1 is that the first active part 41 in this embodiment also includes a third active part 413 connected between the first sub-active part 411 and the second sub-active part 412.

[0067] Among them, the bottom surface of the third sub-active part 413 on the side closer to the first sub-active part 411 is the fifth bottom surface 4131, and the bottom surface of the third sub-active part 413 on the side away from the first sub-active part 411 is the sixth bottom surface 4132.

[0068] In this embodiment, the width of the fifth bottom surface 4131 of the third sub-active portion 413 is equal to the width of the second bottom surface 4112 of the first sub-active portion 411. That is, in this embodiment, the fifth bottom surface 4131 and the second bottom surface 4112 completely overlap. The width of the fifth bottom surface 4131 refers to the length of the orthographic projection of the fifth bottom surface 4131 onto the substrate 1.

[0069] In this embodiment, the width of the sixth bottom surface 4132 of the third sub-active portion 413 is equal to the width of the fourth bottom surface 4122 of the second sub-active portion 412. That is, in this embodiment, the sixth bottom surface 4132 and the fourth bottom surface 4122 completely overlap. The width of the sixth bottom surface 4132 refers to the length of the orthographic projection of the sixth bottom surface 4132 onto the substrate 1.

[0070] In this embodiment, the distance L9 between the fifth bottom surface 4131 and the sixth bottom surface 4132 of the third sub-active part 413 is greater than or equal to 1 μm. In this embodiment, the distance L9 between the fifth bottom surface 4131 and the sixth bottom surface 4132 of the third sub-active part 413 is equal to 1.5 μm.

[0071] In this embodiment, the distance L9 between the fifth bottom surface 4131 and the sixth bottom surface 4132 of the third sub-active part 413 is greater than or equal to the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active part 411.

[0072] In this embodiment, the distance L9 between the fifth bottom surface 4131 and the sixth bottom surface 4132 of the third sub-active part 413 is greater than or equal to the distance L7 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active part 412.

[0073] In this embodiment, the angles α7 and α8 between the two sidewalls of the first sub-active portion 411 and the first bottom surface 4111 are both acute angles, and the width of the first bottom surface 4111 of the first sub-active portion 411 is greater than the width of its second bottom surface 4112. In this embodiment, the orthographic projections of the two sidewalls of the first sub-active portion 411 onto the substrate 1 are both arcs. Specifically, the angle α7 between the tangent at any point on one sidewall of the first sub-active portion 411 (excluding its endpoint) and the first bottom surface 4111 is acute; the angle α8 between the tangent at any point on the other sidewall of the first sub-active portion 411 (excluding its endpoint) and the first bottom surface 4111 is acute. Thus, as the signal flows from the first electrode 5 through the active layer 4, the signal passes through a corner, the size of which is 180° + α7 or 180° + α8. Since α7 and α8 are acute angles, 180° + α7 is less than 270°, and 180° + α8 is less than 270°. This reduces the angle of the bend in the signal transmission from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transmission smoother, reduces the congestion and accumulation effect of charge at the bend, and thus reduces the resistance at the bend. Under the condition of constant current, it reduces heat generation, thereby reducing the probability of thin film transistor burnout, and ultimately improving the lifespan and reliability of the display panel.

[0074] In this embodiment, the angles between the two sidewalls of the second sub-active portion 412 and the third bottom surface 4121 are both acute angles. The width of the third bottom surface 4121 of the second sub-active portion 412 is greater than the width of its fourth bottom surface 4122. In this embodiment, the orthographic projections of the two sidewalls of the second sub-active portion 412 onto the substrate 1 are both arcs. Specifically, the angle α9 between the tangent at any point other than the endpoint of one sidewall of the second sub-active portion 412 and the third bottom surface 4121 is an acute angle; the angle α9 between the tangent at any point other than the endpoint of the other sidewall of the second sub-active portion 411 and the third bottom surface 4121 is an acute angle. 10 The angle is acute. Thus, as the signal flows from the first electrode 5 through the active layer 4 to the second electrode 6, the signal passes through a corner, the size of which is 180° + α9, or 180° + α 10 Due to α9 and α 10 Since it is an acute angle, 180° + α9 is less than 270°. 10 Less than 270°. This further reduces the angle of the corner encountered by the signal as it is transmitted from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transmission smoother, reduces the congestion and accumulation effect of charge at the corner, and thus reduces the resistance at the corner. With the current remaining constant, it reduces heat generation, thereby reducing the probability of thin-film transistor burnout, and ultimately improving the lifespan and reliability of the display panel.

[0075] In this embodiment, the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active part 411 is less than or equal to half of the distance L (L1+L3+L5) between the first electrode 5 and the second electrode 6, and the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active part 411 is greater than or equal to one-tenth of the distance L between the first electrode 5 and the second electrode 6. In this embodiment, the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active part 411 is equal to one-sixth of the distance L between the first electrode 5 and the second electrode 6.

[0076] In this embodiment, the maximum distance L6 between the sidewalls of the first sub-active portion 411 and the second active portion 42 on the same side is greater than or equal to the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411. In this embodiment, the maximum distance L6 between the sidewalls of the first sub-active portion 411 and the second active portion 42 on the same side is equal to the distance L5 between the first bottom surface 4111 and the second bottom surface 4112 of the first sub-active portion 411. This optimizes current distribution, improves charge flow, and reduces charge congestion at corners.

[0077] In this embodiment, the distance L7 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is less than or equal to half of the distance L (L1+L3+L5) between the first electrode 5 and the second electrode 6, and the distance L7 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is greater than or equal to one-tenth of the distance L between the first electrode 5 and the second electrode 6. In this embodiment, the distance L7 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412 is equal to one-sixth of the distance L between the first electrode 5 and the second electrode 6.

[0078] In this embodiment, the maximum distance L8 between the sidewall of the second sub-active portion 412 and the sidewall of the third active portion 43 on the same side is greater than or equal to the distance L7 between the third bottom surface 4121 and the fourth bottom surface 4122 of the second sub-active portion 412. This optimizes current distribution, facilitates smoother charge transfer, and reduces charge congestion at corners.

[0079] Example 3

[0080] like Figure 7 and Figure 8 As shown, this embodiment includes most of the technical features of embodiment 2. The difference between this embodiment and embodiment 2 is that in this embodiment, the projections of the two sidewalls of the first sub-active part 411 onto the substrate 1 are both straight lines. The projections of the two sidewalls of the second sub-active part 412 onto the substrate 1 are both straight lines.

[0081] The included angle α between the two sidewalls of the first active part 411 and the first bottom surface 4111. 11 and α 12 Both angles are acute, and the width of the first bottom surface 4111 of the first sub-active portion 411 is greater than the width of its second bottom surface 4112. In this embodiment, the orthographic projections of the two sidewalls of the first sub-active portion 411 onto the substrate 1 are both straight lines. Specifically, the included angle α between one sidewall of the first sub-active portion 411 and the first bottom surface 4111 is... 11 An acute angle; the angle α between the other sidewall of the first sub-active part 411 and the first bottom surface 4111. 12 The angle is acute. Thus, as the signal flows from the first electrode 5 through the active layer 4, it passes through a corner with a radius of 180° + α. 11 Or 180°+α 12 Due to α 11 and α 12 Since it is an acute angle, therefore 180° + α 11 Less than 270°, 180°+α 12 Less than 270°. This reduces the angle of the bend that the signal passes through as it travels from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transfer smoother, reduces the congestion and accumulation effect of charge at the bend, and thus reduces the resistance at the bend. With the current remaining constant, this reduces the heat generation, thereby reducing the probability of thin-film transistor burnout, and ultimately improving the lifespan and reliability of the display panel.

[0082] In this embodiment, the angles between the two sidewalls of the second sub-active portion 412 and the third bottom surface 4121 are both acute angles. The width of the third bottom surface 4121 of the second sub-active portion 412 is greater than the width of its fourth bottom surface 4122. In this embodiment, the orthographic projections of the two sidewalls of the second sub-active portion 412 onto the substrate 1 are both straight lines. Specifically, the angle α between one sidewall of the second sub-active portion 412 and the third bottom surface 4121 is... 13 The angle α is acute; the angle α between the other sidewall of the second sub-source 411 and the third bottom surface 4121 is acute. 14The angle is acute. Thus, as the signal flows from the first electrode 5 through the active layer 4 to the second electrode 6, the signal passes through a corner with a size of 180° + α. 13 Or 180° + α4. Because α 13 and α 14 Since it is an acute angle, therefore 180° + α 13 Less than 270°, 180°+α 14 Less than 270°. This further reduces the angle of the corner encountered by the signal as it is transmitted from the first electrode 5 through the active layer 4 to the second electrode 6, optimizes the current distribution, makes charge transmission smoother, reduces the congestion and accumulation effect of charge at the corner, and thus reduces the resistance at the corner. With the current remaining constant, it reduces heat generation, thereby reducing the probability of thin-film transistor burnout, and ultimately improving the lifespan and reliability of the display panel.

[0083] Furthermore, the array substrate and display panel provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. An array substrate, characterized in that, include: substrate; An active layer is disposed on the substrate, the active layer comprising: a first active portion and a second active portion and a third active portion respectively connected to opposite ends of the first active portion; A first electrode covers the second active portion and is electrically connected to the second active portion; and The second electrode covers the third active part and is electrically connected to the third active part; Wherein, the orthographic projection of the first active part on the substrate is located between the orthographic projections of the first electrode and the second electrode on the substrate, the first active part includes a first sub-active part and a second sub-active part, the first sub-active part is connected between the second active part and the second sub-active part, and the second sub-active part is connected between the first sub-active part and the third active part; the included angles between the two sidewalls of the first sub-active part and the first bottom surface of the side closest to the second active part are both acute angles.

2. The array substrate according to claim 1, characterized in that, The angles between the two sidewalls of the second active part and its third bottom surface on the side closest to the third active part are both acute angles.

3. The array substrate according to claim 2, characterized in that, The width of the first bottom surface of the first sub-active part is greater than the width of the second bottom surface on the side away from the second active part; The width of the third bottom surface of the second active part is greater than the width of the fourth bottom surface on the side away from the third active part.

4. The array substrate according to claim 3, characterized in that, The distance between the first bottom surface of the first sub-active part and its second bottom surface is less than or equal to half the distance between the first electrode and the second electrode, and the distance between the first bottom surface of the first sub-active part and its second bottom surface is greater than or equal to one-tenth of the distance between the first electrode and the second electrode. The distance between the third bottom surface and the fourth bottom surface of the second sub-active part is less than or equal to half the distance between the first electrode and the second electrode, and the distance between the third bottom surface and the fourth bottom surface of the second sub-active part is greater than or equal to one-tenth of the distance between the first electrode and the second electrode.

5. The array substrate according to claim 3, characterized in that, The maximum distance between the sidewall of the first sub-active part and the sidewall of the second active part located on the same side is greater than or equal to the distance between the first bottom surface of the first sub-active part and its second bottom surface. The maximum distance between the sidewall of the second sub-active part and the sidewall of the third active part located on the same side is greater than or equal to the distance between the third bottom surface and the fourth bottom surface of the second sub-active part.

6. The array substrate according to claim 3, characterized in that, The first active part further includes a third active part connected between the first sub-active part and the second sub-active part.

7. The array substrate according to claim 6, characterized in that, The distance between the fifth bottom surface of the third sub-active part on the side closest to the first sub-active part and the sixth bottom surface on the side furthest from the first sub-active part is greater than or equal to 1 μm.

8. The array substrate according to claim 7, characterized in that, The distance between the fifth bottom surface and the sixth bottom surface of the third sub-active part is greater than or equal to the distance between the first bottom surface and the second bottom surface of the first sub-active part; The distance between the fifth bottom surface and the sixth bottom surface of the third sub-active part is greater than or equal to the distance between the third bottom surface and the fourth bottom surface of the second sub-active part.

9. The array substrate according to claim 2, characterized in that, The shape of the orthographic projection of the sidewall of the first active part onto the substrate includes one or more of straight lines and arcs; The shape of the orthographic projection of the sidewall of the second active part onto the substrate includes one or more of straight lines and arcs.

10. A display panel, characterized in that, The array substrate includes any one of claims 1-9.

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