Audio power amplifiers for reducing clicks and pops (CNPs)

Abstract

A power amplifier provides reduction of clicks and pops in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to tilt the power amplifier from ground to an offset voltage to reduce the clicks and pops. The first amplifier and the auxiliary amplifier share a feedback loop. The outputs of the first amplifier and the auxiliary amplifier can be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple either the first amplifier output or the auxiliary amplifier output to the shared feedback loop.

Description

[0001] Priority requirements

[0002] This patent application claims priority to non-provisional application number 16 / 827,280 entitled “AUDIO POWER AMPLIFIER FORREDUCED CLICK AND POP (CNP)”, filed on March 23, 2020, which has been assigned to its assignee and is hereby expressly incorporated by reference. Technical Field

[0003] This disclosure generally relates to power amplifiers. More specifically, this disclosure relates to audio power amplifiers for reducing clicks and pops at amplifier outputs. Background Technology

[0004] Electronic devices, such as multimedia devices, are extremely popular. Multimedia devices can be used to deliver audio and / or video entertainment experiences to millions of users worldwide. Devices such as wireless mobile phones can be used for wireless communication as well as audio, video, and gaming. Users may choose to use headphones in noisy environments, when they wish to prevent others from hearing received multimedia output (statements made by others on the phone or explicit lyrics from a song being played), or for other reasons.

[0005] Wireless or mobile communication devices and other multimedia devices include power amplifiers to amplify input radio frequency (RF) signals to desired levels for communication and / or multimedia playback. When headphones are connected to mobile communication or other multimedia devices, whether via line input or wireless earpiece, unwanted audio artifacts (such as audible pops or clicks) can be output when the headphone device is powered on or off.

[0006] In headphone (HPH) power amplifier design, reducing or mitigating clicks and pops when the power amplifier is turned on or off is helpful. The root cause of clicks is the voltage shift from ground to the power amplifier output offset voltage. An auxiliary amplifier can be used to reduce this voltage shift. However, offset mismatch between the main and auxiliary path resistors can result in relatively large offsets because common-mode current flows through each of these paths. This causes two distinct DC offsets, one for each auxiliary path in the main path. When switching between these two paths, an audible click sound is produced at the output. Audible clicks and pops are frustrating for users and detract from their entertainment experience, and in some cases, may even cause discomfort. Summary of the Invention

[0007] In one aspect of this disclosure, a power amplifier is provided. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier tilts the power amplifier output from ground to an offset voltage to reduce "clicking" and popping sounds. The first amplifier and the auxiliary amplifier have a shared feedback loop.

[0008] In another aspect of this disclosure, a power amplification method is disclosed. The method includes switchably coupling a first amplifier or an auxiliary amplifier of a power amplifier to a shared feedback loop. The method also includes tilting the output of the power amplifier from ground to an offset voltage to reduce audible clicks and pops.

[0009] In another aspect, the power amplifier has components for switchably coupling either the first amplifier or an auxiliary amplifier of the power amplifier to a shared feedback loop. The power amplifier also has components for tilting the output of the power amplifier from ground to an offset voltage to reduce pops and / or clicks.

[0010] This has already provided a fairly broad overview of the features and technical advantages of this disclosure so that the following detailed description can be better understood. Additional features and advantages of this disclosure will be described below. Those skilled in the art will understand that this disclosure can be readily used as the basis for modifying or designing other structures for performing the same purposes of this disclosure. Those skilled in the art will also recognize that such equivalent constructions do not depart from the teachings of this disclosure set forth in the appended claims. When considered in conjunction with the accompanying drawings, the novel features relating to the organization and operation of this disclosure, as well as other objectives and advantages, which are considered characteristic of this disclosure, will be better understood from the following description. However, it is to be clearly understood that each drawing in the accompanying drawings is provided for illustrative and descriptive purposes only and is not intended to be a definition of limitation of this disclosure. Attached Figure Description

[0011] For a more complete understanding of this disclosure, reference is now made to the following description taken in conjunction with the accompanying drawings.

[0012] Figure 1 A wireless device communicating with a wireless communication system is shown.

[0013] Figure 2 One aspect of this disclosure is shown. Figure 1 A block diagram of a wireless device.

[0014] Figure 3 The illustration shows a power amplifier according to various aspects of this disclosure.

[0015] Figures 4A to 4E The illustrations show power amplifiers in various operating states according to various aspects of this disclosure.

[0016] Figure 5A A digital wave generator according to various aspects of this disclosure is illustrated.

[0017] Figure 5B This is a diagram illustrating a digital wave generator and a power amplifier that generate example waveforms according to various aspects of this disclosure.

[0018] Figure 6 A simplified flowchart of a power amplification method according to various aspects of this disclosure is depicted. Detailed Implementation

[0019] The detailed description set forth below with reference to the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configuration in which the concepts described herein can be practiced. The detailed description includes specific details to provide a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts can be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form to avoid confusion with such concepts. As described herein, the use of the term “and / or” is intended to mean “inclusive OR”, and the use of the term “or” is intended to mean “exclusive OR”.

[0020] Wireless communication devices such as user equipment (UE) may include a transmission chain consisting of multiple radio frequency (RF) transmitters, multiple power amplifiers, multiple antennas, and one or more front-end (FE) devices through which signals are transmitted from the UE. However, the UE's transmission chain may include a class of power amplifiers designed to generate a specified power level for the current device.

[0021] The UE may be referred to by those skilled in the art as a mobile station (MS), subscriber station, mobile unit, subscriber unit, wireless unit, remote unit, mobile device, wireless device, wireless communication device, remote device, mobile subscriber station, access terminal (AT), mobile terminal, wireless terminal, remote terminal, mobile phone, terminal, user agent, mobile client, client, or some other suitable term.

[0022] Various aspects of this disclosure relate to a power amplifier having a main amplifier and an auxiliary amplifier, with a common resistor feedback (RFB) for the main loop and the auxiliary loop. When the main amplifier is on, the signal path is configured such that there is no switching in the path to the output. Therefore, resistor mismatch encountered when switching between the main loop and the auxiliary loop can be reduced, and in some respects eliminated. In doing so, the clicking and / or popping sounds caused by this resistor mismatch can be reduced to levels close to or below human inaudibility (e.g., <100 μV or -80 dB).

[0023] Figure 1 A wireless device 110 communicating with a wireless communication system 120 is shown. The wireless device 110 includes a multi-stage (e.g., three-stage) power architecture for an RF power amplifier and utilizes the inherent advantages of a multi-stage power architecture. The wireless communication system 120 can be a 5G system, a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, millimeter-wave (mmW) technology, or some other wireless system. The CDMA system can implement Wideband CDMA (WCDMA), Time Division Synchronous CDMA (TD-SCDMA), CDMA2000, or some other version of CDMA. In a millimeter-wave (mmW) system, multiple antennas are used for beamforming (e.g., in the 30 GHz, 60 GHz, etc. range). For simplicity, Figure 1 A wireless communication system 120 is shown, comprising two base stations 130 and 132 and a system controller 140. Typically, a wireless system may include any number of base stations and any number of network entities.

[0024] Wireless device 110 may be referred to as user equipment (UE), mobile station, terminal, access terminal, subscriber unit, station, etc. Wireless device 110 may also be a cellular phone, smartphone, tablet computer, wireless modem, personal digital assistant (PDA), handheld device, laptop computer, smartbook, netbook, cordless phone, wireless local loop (WLL) station, etc. The wireless device 110 may also be able to communicate with the wireless communication system 120. The wireless device 110 may also be able to receive signals from a broadcasting station (e.g., broadcasting station 134), signals from one or more satellites in a Global Navigation Satellite System (GNSS) (e.g., satellite 150), etc. The wireless device 110 may support one or more radio technologies for wireless communication, such as 5G, LTE, CDMA2000, WCDMA, TD-SCDMA, GSM, 802.11, etc.

[0025] Wireless device 110 may support carrier aggregation, which is operation on multiple carriers. Carrier aggregation can also be referred to as multi-carrier operation. According to one aspect of this disclosure, wireless device 110 may be able to operate in Long Term Evolution (LTE) in the low-frequency band from 698 to 960 MHz, the mid-frequency band from 1475 to 2170 MHz and / or the high-frequency band from 2300 to 2690 MHz, the ultra-high-frequency band from 3400 to 3800 MHz, and the LTE unlicensed band (LTE-U / LAA) from 5150 MHz to 5950 MHz. Low-frequency band, mid-frequency band, high-frequency band, ultra-high-frequency band, and LTE-U refer to five groups of frequency bands (or band sets), each group comprising multiple frequency bands (or simply "bands"). For example, in some systems, each band may cover up to 200 MHz and may include one or more carriers. For example, each carrier may cover up to 40 MHz in LTE. Of course, the range of each frequency band is merely exemplary and not limiting, and other frequency ranges may be used. LTE Release 11 supports 35 frequency bands, referred to as LTE / UMTS bands, and is listed in 3GPP TS 36.101. In LTE Release 11, a wireless device 110 can be configured with up to five carriers in one or two frequency bands.

[0026] Figure 2 It shows Figure 1 A block diagram of an exemplary design of wireless device 110 is shown below. In this exemplary design, wireless device 110 includes transceiver 220 and transceiver 222. Transceiver 220 is coupled to a primary antenna 210, and transceiver 222 is coupled to a secondary antenna 212 via antenna interface circuitry 226 and is also coupled to a data processor / controller 280. Transceiver 220 includes multiple (K) receivers 230pa to 230pk and multiple (K) transmitters 250pa to 250pk to support multiple frequency bands, multiple radio technologies, carrier aggregation, etc. Transceiver 222 includes L receivers 230sa to 230sl and L transmitters 250sa to 250sl to support multiple frequency bands, multiple radio technologies, carrier aggregation, receive diversity, multiple-input multiple-output (MIMO) transmission from multiple transmit antennas to multiple receive antennas, etc.

[0027] exist Figure 2In the exemplary design shown, each receiver 230 includes a low-noise amplifier (LNA) 240 and a receiving circuit 242. For data reception, antenna 210 receives signals from a base station and / or other transmitter station and provides the received radio frequency (RF) signal, which is routed through antenna interface circuit 224 and presented as an input RF signal to the selected receiver 230. Antenna interface circuit 224 may include switches, duplexers, transmit filters, receive filters, matching circuits, etc. The following description assumes that receiver 230pa is the selected receiver. Within receiver 230pa, LNA 240pa amplifies the input RF signal and provides an output RF signal. Receiving circuit 242pa down-converts the output RF signal from RF to baseband, amplifies and filters the down-converted signal, and provides the analog input signal to data processor 280. Receiving circuit 242pa may include mixers, filters, amplifiers, matching circuits, oscillators, local oscillator (LO) generators, phase-locked loops (PLLs), etc. Each of the remaining receivers 230 in transceivers 220 and 222 can operate in a similar manner to receiver 230pa.

[0028] exist Figure 2 In the exemplary design shown, each transmitter 250 includes a transmitting circuit 252 and a power amplifier (PA) 254. For example, a three-stage power supply architecture modulates the power supply to the power amplifier 254. For data transmission, a data processor 280 processes (e.g., encodes and modulates) the data to be transmitted and provides an analog output signal to the selected transmitter. The following description assumes that transmitter 250pa is the selected transmitter. Within transmitter 250pa, transmitting circuit 252pa amplifies, filters, and up-converts the analog output signal from baseband to RF and provides a modulated RF signal. Transmitting circuit 252pa may include amplifiers, filters, mixers, matching circuits, oscillators, LO generators, PLLs, etc. Power amplifier (PA) 254pa receives and amplifies the modulated RF signal and provides a transmitted RF signal with an appropriate output power level. The transmitted RF signal is routed through antenna interface circuitry 224 and transmitted via antenna 210. Each of the remaining transmitters 250 in transceivers 220 and 222 may operate in a similar manner to transmitter 250pa.

[0029] Figure 2 An exemplary design of receiver 230 and transmitter 250 is shown. Receiver 230 and transmitter 250 may also include components not shown in... Figure 2Other circuitry shown includes filters, matching circuits, etc. All or part of transceivers 220 and 222 can be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed-signal ICs, etc. For example, the LNA 240 and receiver circuitry 242 within transceivers 220 and 222 can be implemented on multiple ICs, as described below. The circuitry in transceivers 220 and 222 can also be implemented in other ways.

[0030] The data processor / controller 280 can perform various functions for the wireless device 110. For example, the data processor 280 can process data received via receiver 230 and data transmitted via transmitter 250. The controller 280 can control the operation of various circuits within transceivers 220 and 222. In some aspects, transceivers 220 and 222 may also include controllers to control various circuits within the respective transceivers (e.g., LNA 240). The memory 282 can store program code and data for the data processor / controller 280. The data processor / controller 280 can be implemented on one or more application-specific integrated circuits (ASICs) and / or other ICs.

[0031] Figure 3 The illustration shows a power amplifier 300 according to various aspects of this disclosure. The power amplifier (PA) 300 is configured to reduce, and in some cases mitigate, clicking or popping sounds when the PA 300 is turned on and / or off. Clicking / popping sounds are believed to be caused by the voltage transition from ground to the PA output offset voltage.

[0032] Reference Figure 3 PA 300 includes a main PA 302, an auxiliary PA 304, and a wave generator 310. The input stages of the main PA 302 and the auxiliary PA 304 can be shared. Therefore, the inherent offsets of the main PA 302 and the auxiliary PA can be equal or approximately equal. Figure 3 The output stages of the main PA 302 and auxiliary PA 304 shown can be different. However, the main contribution to the inherent amplifier offset is the input stage, so the offsets of the main PA 302 and auxiliary PA 304 may be equal.

[0033] PA 300 also includes a set of switches s1 to s7, which can be controlled to configure PA 300 to utilize either the primary PA 302 or the auxiliary PA 304. Furthermore, switches s1 to s7 can be controlled (e.g., via wave generator 310) to configure PA 300 to include one or more resistors (e.g., R1 to R11 and RL) to reduce resistor-related mismatches, such as when switching from a configuration where the auxiliary PA 304 is active to a configuration where the primary PA 302 is active. In some aspects, switch s7 can be controlled via wave generator 310, while other switches (e.g., s1 to s6) can be controlled via a separate digital controller (e.g., data processor / controller 280), where the order in which the switches are actuated can be encoded into the controller design. Each of the resistors R1 to R11 and RL is shown as having a specific resistance value. However, Figure 3 The specified resistor values ​​throughout this disclosure are merely exemplary and for ease of understanding, and those skilled in the art will appreciate that other values ​​may also be used, for example, due to design preferences. Additionally, R12 and R13 in Figure 3 R12 and R13 are shown as included in PA 300. However, R12 and R13 can include effective resistance values ​​for, for example, inputs (e.g., digital-to-analog converters). For example, the main PA 302 receives an input voltage (Vin) that can be supplied via a digital-to-analog converter (DAC).

[0034] The primary PA 302 and the auxiliary PA 304 have a common or shared resistor feedback 308 coupled between the inverting terminal of the primary PA 302 and the output of the primary PA 302. The common resistor feedback 308 includes resistors (e.g., R2 and R4) that are included in the feedback path or loop when the auxiliary PA 304 is active or when the primary PA 302 is active. When the auxiliary PA 304 is active, switch s5 can be controlled to close to provide a tap for the resistor feedback to the primary PA 302 (e.g., R2 and R4). Resistors along the m-path (e.g., R2 and R4) and along the p-path (e.g., R9 and R10) can be matched. Additionally, PA 300 can operate without a switch in the feedback path of the primary PA 302 (e.g., from the primary PA output (Vout) across resistors R2 and R4 to the inverting input of the primary PA 302).

[0035] Figures 4A to 4D The illustration shows a power amplifier (PA) 400 in various operating states according to various aspects of this disclosure. PA 400 has a configuration similar to PA 300 and includes the features described above relative to... Figure 3 Described characteristics. (Refer to...) Figure 4A PA400 is shown in state 0. In state 0, an input (e.g., a DAC) can be turned on to drive PA 400. Switch s7 is controlled to be open via wave generator 410. Switches s2 and s6 are also controlled to be open, while switches s3 through s5 are controlled to be closed. By closing switch s5, the auxiliary output tap is coupled to the shared resistor feedback 408. The main PA 402 and auxiliary PA 404 are disabled, so neither drives the output in state 0. Additionally, the outputs of the main PA 402 and auxiliary PA 404 are pulled down via the main pull-down resistors (e.g., R5 and R6) coupled to the output of the main PA 402 and the auxiliary pull-down R11. For example, in operation, the input voltage Vin begins to slope from 0 to 1.5V. However, the input voltage (Vin) is attenuated by pull-down resistors (e.g., R5, R6, R11), thereby reducing and, in some respects, eliminating audible clicking or popping sounds from the output.

[0036] Figure 4B The diagram illustrates PA 400 in operating state 1 according to various aspects of this disclosure. In state 1, CnP switch s7, as well as switches s5 and s6, remain open. The main PA 402 remains off, and the auxiliary PA 404 is turned on via an enable signal (AUX_EN). The auxiliary loop stabilizes to the offset voltage (Vout_Aux). However, since the auxiliary loop is energized, a large transient may exist at the output of the auxiliary PA. The main loop may receive transients at a dummy ground, which are attenuated by a (RL||R5||R6) / 18K resistor divider (e.g., attenuation of approximately 60dB). Since the main PA 402 is not turned on, the p and m sides do not need to be matched. On the m side, further attenuation is provided at the VOUT_HPH terminal when the input (e.g., DAC) is turned on by closing S5 and turning on the 100-ohm auxiliary pull-down S1. Similarly, while various resistor values ​​are provided for ease of understanding, this disclosure is not limited thereto, and different resistor values ​​may also be used.

[0037] Figure 4C The diagram illustrates PA 400 in operating state 2 according to various aspects of this disclosure. In state 2, switch S5 is closed, causing the auxiliary loop to connect to the main resistor feedback. Therefore, the same feedback components (e.g., R4) used when switching back to the main feedback loop are used in the auxiliary loop. The output of auxiliary PA 404 is supplied to resistor R4 and the output (VOUT_HPH) of PA 400. However, the output is attenuated via the main pull-down resistor and load resistor RL (e.g., headphone, earpiece, line output, etc.). Therefore, resistance mismatch between the main loop and the auxiliary loop can be reduced and, in some respects, avoided.

[0038] Figure 4D The diagram illustrates PA 400 in operating state 3 according to various aspects of this disclosure. In state 3, switch S7 is closed, and the resistance of switch S7 is ramped down, allowing the output offset from auxiliary PA 404 to be ramped down through the resistance of switch S7. Specifically, wave generator 410, under its control, ramps down the click and pop (CnP) switch resistance (e.g., S7). Therefore, the output of auxiliary PA 404 can be transmitted to the PA 400 output (VOUT_HPH). That is, the PA 400 output ramps up to the offset voltage. The final value of the voltage depends on the resistive voltage divider between the CnP switch S7 and the load resistor RL (e.g., 32 ohms).

[0039] Figure 4E The diagram illustrates PA 400 in operating state 4 according to various aspects of this disclosure. In state 4, auxiliary PA 404 is turned off, and switch S5 is opened to remove the tap between the output of auxiliary PA 404 and the feedback of the main resistor. Furthermore, main PA 402 is turned on.

[0040] Figure 5A A digital wave generator 500 according to various aspects of this disclosure is illustrated. The digital wave generator 500 includes a click and pop (CnP) switch 502 and a digital controller 504. The digital controller 504 includes a main controller 506, a clock divider 508, a source 510, an eight-bit shift register 516, a first integrator 512, and a second integrator 514. The first integrator 512 is cascaded and coupled to the second integrator 514.

[0041] Digital controller 504 receives an input clock signal CLK, which is supplied to clock divider 508 and distributed to source 510, first integrator 512, and second integrator 514. For example, in some aspects, digital controller 504 can operate on a 32kHz clock.

[0042] Under the control of the main controller 506, source 510 can be configured to output +1, 0, or -1, so that the first integrator 512 can output a wave with a slope of +1, 0, or -1. The second integrator 514 integrates the output of the first integrator 512. The output of the second integrator 514 is supplied to an eight-bit shift register 516. By controlling the outputs of source 510 and the cascaded integrators (e.g., 512, 514), the digital controller 504 can be programmable to change the shape of the waveform used to drive the CnP switch 502.

[0043] CnP switch 502 can be coupled between the output of main power amplifier 520 and the output of auxiliary power amplifier 522. CnP switch 502 may include multiple internal switches (e.g., b0 to b7). The resistance of CnP switch 502 can be a weighted combination of the internal switches (e.g., b0 to b7), such that CnP switch 502 is configured as a binary weighted switch. In some aspects, CnP switch 502 can be an 8-bit binary weighted switch. For example, however, this switch configuration and / or number of bits is merely exemplary, and CnP switch 502 can be configured with more or fewer bits or configured as a thermometer-encoded switch in some aspects.

[0044] Using cascaded integrators (e.g., 512 and 514), digital controller 504 can be operated to generate a second-order S-shaped wave that can be used to drive CnP switch 502.

[0045] Therefore, in some aspects, the digital wave generator 500 can have a ramp time independent of process, voltage, and temperature. Additionally, compared to an analog wave generator, the digital wave generator 500 can be configured to have a smaller footprint. By way of example only, the digital wave generator 500 can be configured to have a size that is 10% of the size of a 150nm analog wave generator.

[0046] Figure 5B This is a diagram illustrating example waveforms generated by a digital wave generator and a power amplifier according to various aspects of this disclosure. (Refer to...) Figure 5B Waveform 552 represents the output of the digital controller (e.g., 504) of the digital wave generator (e.g., 500). Waveform 554 represents the output of the auxiliary PA (e.g., 404), and waveform 556 represents the output of the main PA (e.g., 402). Additionally, waveforms 558 and 560 represent the filtered output and A-weighted output of the main PA (e.g., 402), respectively. In this exemplary aspect, the digital controller (e.g., 504) can be operated to generate waveform 552 as an sigmoid waveform. The sigmoid waveform (552) output of the digital controller (e.g., 504) is applied to control the closing of the CnP switch (e.g., s7), causing the output of the main amplifier to gradually ramp up (see, for example, waveforms 556 and 558). In doing so, an electronic device (e.g., a smartphone) configured with a power amplifier (e.g., 400) can operate without the interference of audible clicks or pops.

[0047] Figure 6A simplified flowchart of a power amplification method 600 according to various aspects of this disclosure is depicted. In block 602, a first amplifier or an auxiliary amplifier of the power amplifier is switchably coupled to a shared feedback loop. In some aspects, the first amplifier or the auxiliary amplifier of the power amplifier may be coupled to the shared feedback loop via a switch. For example, as... Figure 3 As shown, the primary PA 302 can be coupled to the shared feedback 308 via switch s7, and the auxiliary PA 304 can be coupled to the shared feedback 308 via switch s5. In some aspects, the switches (e.g., s7) can each comprise binary weighted switches. For example, as shown in Figure 5, the CnP switch 502 includes multiple internal switches (e.g., b0 to b7). The resistance of the CnP switch 502 can be a weighted combination of the internal switches (e.g., b0 to b7), such that the CnP switch 502 is configured as a binary weighted switch. In some aspects, the CnP switch 502 can be an 8-bit binary weighted switch.

[0048] Switch s7 can be operated under the control of wave generator 310. In some aspects, wave generator 310 may include an analog wave generator or a digital wave generator. For example, a digital wave generator 500 is shown in Figure 5. Digital wave generator 500 includes a digital controller 504 and cascaded integrators (e.g., 512 and 514). Digital controller 504 can be operated to generate, for example, a second-order S-shaped wave that can drive CnP switch 502.

[0049] In box 604, the power amplifier output is tilted from ground to an offset voltage to reduce popping and clicking sounds. For example, as Figure 4D As shown, PA 400 is in operating state 3. In state 3, switch s7 is closed, and the resistance of switch s7 is ramped down, allowing the output offset from auxiliary PA 404 to be ramped down through the resistance of switch s7. That is, under the control of wave generator 410, the click and pop switching resistor (e.g., s7) is ramped down. Therefore, the output of auxiliary PA 404 can be transmitted to the output of PA 400 (VOUT_HPH). That is, the output of PA 400 is ramped up to the offset voltage. In doing so, the pop and click sounds caused by resistor mismatch during the transition between the feedback loop of the auxiliary PA (e.g., 404) and the feedback loop of the main PA (e.g., 402) can be reduced, and in some respects eliminated. In doing so, the click and / or pop sounds that may be caused by such resistor mismatch can be reduced to a level close to or below the range of human inaudibility (e.g., -80dB).

[0050] In block 606, method 600 may optionally decouple the first amplifier of the power amplifier or the auxiliary amplifier of the power amplifier from the shared feedback loop. For example, in Figure 4E In the current state, PA 400 is in state 4. In state 4, auxiliary PA 404 is turned off and switch S5 is opened to remove the tap between the output of auxiliary PA 404 and the feedback of the main resistor.

[0051] According to one aspect of this disclosure, a set of power amplifiers is described. The power amplifier includes components for switchably coupling a first amplifier or an auxiliary amplifier of the power amplifier to a shared feedback loop. The power amplifier also includes components for tilting the output of the power amplifier from ground to an offset voltage to reduce pops and clicks. The components for switchable coupling may be, for example, a switch s7, a wave generator 310, a CnP switch 502, and a digital controller 504. The components for tilting may be, for example, an auxiliary power amplifier 304, a switch s7, a wave generator 310, a CnP switch 502, and a digital controller 504. In another aspect of this disclosure, the aforementioned components may be any module or any device or material configured to perform the functions described by the aforementioned components.

[0052] For firmware and / or software implementations, the methods can be implemented using modules (e.g., programs, functions, etc.) that perform the functions described herein. Machine-readable media that tangibly embody the instructions can be used to implement the methods described herein. For example, software code can be stored in memory and executed by a processor unit. Memory can be implemented within or outside the processor unit. As used herein, the term "memory" refers to a type of long-term, short-term, volatile, non-volatile, or other memory, and is not limited to a particular type of memory or the number of memories or the type of medium in which memory is stored.

[0053] If implemented in firmware and / or software, functionality can be stored as one or more instructions or code on a computer-readable medium. Examples include computer-readable media encoded using data structures and computer-readable media encoded using computer programs. Computer-readable media includes physical computer storage media. Storage media can be any available medium accessible to a computer. By way of example and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disc storage devices, disk storage devices or other magnetic storage devices, or other media that can be used to store desired program code in the form of instructions or data structures and that are accessible to a computer; as used herein, disks and optical discs include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, wherein disks typically magnetically copy data, while optical discs optically copy data using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0054] In addition to being stored on a computer-readable medium, instructions and / or data may also be provided as signals on a transmission medium included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicating instructions and data. The instructions and data are configured to cause one or more processors to perform the functions outlined in the claims.

[0055] The various illustrative logic blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0056] Although this disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and modifications may be made herein without departing from the technology of this disclosure as defined by the appended claims. For example, relational terms such as “above” and “below” are used relative to a substrate or electronic device. Of course, if the substrate or electronic device is inverted, above becomes below, and vice versa. Additionally, if lateral orientation is used, above and below may refer to the sides of the substrate or electronic device. Moreover, the scope of this application is not intended to be limited to the specific configurations of the processes, machines, manufactures, and material compositions, components, methods, and steps described in the specification. Those skilled in the art will readily appreciate from this disclosure that existing or later-developed processes, machines, manufactures, material compositions, components, methods, or steps that perform substantially the same function or achieve substantially the same results as the corresponding configurations described herein can be used according to this disclosure. Therefore, the appended claims are intended to include such processes, machines, manufactures, material compositions, components, methods, or steps within their scope.

Claims

1. A power amplifier, comprising: A first amplifier having an input and an output, wherein a shared feedback loop is coupled between the output and the input of the first amplifier, the shared feedback loop comprising a first resistor and a second resistor coupled in series; An auxiliary amplifier having an output, wherein the first amplifier and the auxiliary amplifier have the shared feedback loop, wherein the output of the auxiliary amplifier is coupled between the first resistor and the second resistor in the shared feedback loop; A set of switches configured to switchably couple the output of the first amplifier or the output of the auxiliary amplifier to the shared feedback loop; and The input stage is shared between the first amplifier and the auxiliary amplifier.

2. The power amplifier of claim 1, wherein the auxiliary amplifier is configured to tilt the power amplifier output from ground to an offset voltage to reduce popping and / or clicking sounds.

3. The power amplifier according to claim 1, wherein, The switch set includes switches coupled between the output of the auxiliary amplifier and the output of the power amplifier.

4. The power amplifier of claim 3 further includes a wave generator configured to control the operation of the switch.

5. The power amplifier of claim 4, wherein the wave generator is a digital wave generator and comprises: Digital controller; as well as A binary weighted switch, wherein the digital controller is configured to generate a second-order S-shaped wave to control the binary weighted switch.

6. A power amplification method, comprising: A first amplifier or an auxiliary amplifier of a power amplifier is switchably coupled to a shared feedback loop. The first amplifier has an input and an output, wherein the shared feedback loop is coupled between the output and the input of the first amplifier. The shared feedback loop includes a first resistor and a second resistor coupled in series. The auxiliary amplifier has an output, wherein the output of the auxiliary amplifier is coupled between the first resistor and the second resistor in the shared feedback loop. The output of the power amplifier is tilted from ground to an offset voltage to reduce popping and / or clicking sounds.

7. The method according to claim 6, further comprising: Decouple the first amplifier of the power amplifier or the auxiliary amplifier of the power amplifier from the shared feedback loop.

8. The method of claim 6, wherein the first amplifier of the power amplifier or the auxiliary amplifier of the power amplifier is coupled to the shared feedback loop via a switch, and the method further comprises controlling the operation of the switch via a digital wave generator.

9. The method of claim 8, wherein the switch is a binary weighted switch.

10. The method of claim 8, further comprising: The digital wave generator is configured to generate a second-order S-shaped wave to control the operation of the switch to couple the first amplifier or the auxiliary amplifier to the shared feedback loop.

11. A power amplifier, comprising: Components for switchably coupling a first amplifier or an auxiliary amplifier of the power amplifier to a shared feedback loop, the first amplifier having an input and an output, wherein the shared feedback loop is coupled between the output and the input of the first amplifier, the shared feedback loop including a first resistor and a second resistor coupled in series, wherein the auxiliary amplifier has an output, wherein the output of the auxiliary amplifier is coupled between the first resistor and the second resistor of the shared feedback loop; and A component used to tilt the output of the power amplifier from ground to an offset voltage to reduce popping and / or clicking sounds.

12. The power amplifier of claim 11, further comprising a component for decoupling the first amplifier of the power amplifier or the auxiliary amplifier of the power amplifier from the shared feedback loop.

13. The power amplifier of claim 11, further comprising components for controlling the operation of the switch via a digital wave generator.

14. The power amplifier of claim 11, further comprising a component for generating a second-order S-shaped wave, the component for switchable coupling coupling the first amplifier of the power amplifier or the auxiliary amplifier of the power amplifier to the shared feedback loop based on the second-order S-shaped wave.

Images