A matrix multiplication circuit module and method

Abstract

The embodiment of the present disclosure discloses a matrix multiplication circuit module and method. The module comprises: at least one row-column calculation unit for implementing row-column multiplication calculation; the row-column calculation unit comprises at least one multiplication unit and an addition unit; the output end of the multiplication unit is connected with the input end of the addition unit; the multiplication unit comprises an electrical signal adjusting subunit and a load, the electrical signal adjusting subunit is used for adjusting the size of the input electrical signal; the electrical signal input into the multiplication unit is responded by the electrical signal adjusting subunit and the load to realize multiplication operation; the load value of the load is fixed. Using the load with fixed load value, the size of the electrical signal is adjusted by adjusting the duty cycle of the electrical signal, and the electrical signal with adjusted size is applied to the load, so that the corresponding matrix element can be realized, which is convenient for adapting to the change of the matrix element. The structure of the circuit module for implementing matrix multiplication is simplified, and the complexity of the circuit module is reduced.

Description

Technical Field

[0001] This disclosure relates to the field of neural network technology, and in particular to a matrix multiplication circuit module and method for implementing matrix multiplication using hardware. Background Technology

[0002] With technological advancements, a large number of computational operations are required. The aforementioned calculations will include matrix multiplication.

[0003] The matrix multiplication described above can be implemented using software. To improve computation speed, matrix multiplication can be implemented using hardware. Summary of the Invention

[0004] This disclosure is provided to briefly introduce the concepts, which will be described in detail in the subsequent Detailed Description section. This disclosure is not intended to identify key or essential features of the claimed technical solution, nor is it intended to limit the scope of the claimed technical solution.

[0005] This disclosure provides a matrix multiplication circuit module and a matrix implementation method.

[0006] In a first aspect, embodiments of this disclosure provide a matrix multiplication circuit module, comprising: at least one row and column calculation unit for performing row and column multiplication calculations; the row and column calculation unit includes at least one multiplication unit and an addition unit; the output terminal of the at least one multiplication unit is connected to the input terminal of the addition unit; the multiplication unit includes an electrical signal conditioning subunit and a load, wherein the electrical signal conditioning subunit is used to adjust the magnitude of the input electrical signal; wherein the electrical signal conditioning subunit and the load respond to the electrical signal input to the multiplication unit to realize the multiplication operation; wherein the load value of the load is fixed.

[0007] In a second aspect, embodiments of this disclosure provide a matrix multiplication implementation method applied to a circuit module of the first aspect, comprising: obtaining row matrix elements of a row of a first matrix and column matrix elements of a column corresponding to the row in a second matrix, wherein the row matrix elements are represented by electrical signals; inputting the electrical signals corresponding to the row matrix elements into a row-column calculation unit, and adjusting the electrical signals based on the size of the column matrix elements using an electrical signal adjustment subunit, wherein the row-column calculation unit includes at least one multiplication unit and an addition unit, and the multiplication unit includes an electrical signal adjustment subunit and a load; and accumulating the response signals of each multiplication unit as the calculation result corresponding to the row-column calculation unit, wherein the response signal of the multiplication unit is obtained by applying the electrical signal adjusted by the electrical signal adjustment subunit of the multiplication unit to the load of the multiplication unit.

[0008] Thirdly, embodiments of this disclosure provide an integrated circuit that includes the matrix multiplication circuit module described in the first aspect.

[0009] The matrix multiplication circuit module and matrix multiplication implementation method provided in this disclosure use a load with a fixed load value. The electrical signal adjustment subunit of the multiplication unit adjusts the electrical signal, and the adjustment ratio and the load together represent the column matrix elements. The adjusted electrical signal is applied to the load to achieve the effect of multiplying the electrical signal representing the row matrix element with the corresponding column matrix element. The above method is easy to adapt to changes in the column matrix elements. It simplifies the structure of the circuit module for implementing matrix multiplication and reduces the complexity of the circuit module. Attached Figure Description

[0010] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0011] Figure 1 This is a schematic diagram of the structure of some embodiments of the matrix multiplication circuit module according to the present disclosure;

[0012] Figure 2 yes Figure 1 A schematic diagram of the electrical signal conditioning subunit in the example shown;

[0013] Figure 3 yes Figure 1 Some schematic structural diagrams of the row and column calculation units in the circuit module shown;

[0014] Figure 4 yes Figure 1 Further schematic structural diagrams of the row and column calculation units in the circuit module shown;

[0015] Figure 5 This is a flowchart illustrating some embodiments of the matrix multiplication implementation method according to the present disclosure. Detailed Implementation

[0016] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0017] It should be understood that the steps described in the method embodiments of this disclosure may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of this disclosure is not limited in this respect.

[0018] The term "comprising" and its variations as used herein are open-ended inclusions, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the description below.

[0019] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0020] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0021] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0022] Please refer to Figure 1 This illustrates a schematic diagram of the structure of some embodiments of the matrix multiplication circuit module according to the present disclosure. For example... Figure 1 As shown, the matrix multiplication circuit module includes:

[0023] At least one row and column calculation unit 11 implements row and column multiplication calculations. The row and column calculation unit 11 includes at least one multiplication unit 110 and an addition unit 111. For example... Figure 1 As shown, the multiplication unit 110 includes an electrical signal conditioning subunit 1101 and a load 1102. The electrical signal conditioning subunit 1101 is used to adjust the magnitude of the input electrical signal. The electrical signal conditioning subunit 1101 and the load 1102 respond to the electrical signal input to the multiplication unit 110 to realize the multiplication operation.

[0024] At least one output terminal of multiplication unit 110 is connected to the input terminal of addition unit 111.

[0025] The load value of load 1102 is fixed. That is, the load value of load 1102 cannot be adjusted.

[0026] In this embodiment, the electrical signals input to the row and column calculation units 11 in a row and column calculation unit may be different.

[0027] In some applications, the matrix multiplication described above performs the multiplication of the eigenvalue matrix and the weight matrix output by a neuron in a neural network. The electrical signals described above can represent the matrix elements in the eigenvalue matrix output by the neuron. Different electrical signals in the same row and column computation unit can represent different matrix elements in the eigenvalue matrix. The eigenvalue matrix described above can be represented as an electrical signal matrix.

[0028] The aforementioned electrical signal adjustment unit can adjust the magnitude of the electrical signal. Taking a voltage signal as an example, the electrical signal adjustment unit can adjust the magnitude of the voltage signal input to the row and column calculation unit.

[0029] In some alternative implementations, the aforementioned electrical signal can be a voltage signal or a current signal. This disclosure uses a voltage signal as an example for illustration. The aforementioned electrical signal adjustment unit may include a voltage signal duty cycle adjustment unit.

[0030] In these alternative implementations, the aforementioned electrical signal can be a pulse signal. The period of the aforementioned pulse signal can be T. The duty cycle of the pulse signal is adjusted by regulating the duration of the effective operating level (e.g., high level) within the period T. In this example, the magnitude of the voltage signal can be adjusted by regulating the duty cycle of the pulse signal.

[0031] In this disclosure, an electrical signal conditioning subunit and a load are used to jointly implement the weights in the aforementioned matrix multiplication. While keeping the load parameters constant, the electrical signal conditioning subunit adjusts the duty cycle of the electrical signal according to the changes in the weights. Applying the adjusted electrical signal to the load yields a response signal that achieves the same effect as the response signal obtained by adjusting the load value according to the weights. That is, by adjusting the duty cycle of the electrical signal according to the weights, and applying the duty cycle-adjusted electrical signal to the load, the effect of changing the weights is achieved.

[0032] In related technologies, to achieve the multiplication of the feature matrix and weight matrix output by a neuron, an adjustable load (e.g., a resistor) is used to represent the weights in the weight matrix. For different weight values, the load is adjusted to the corresponding value. For each row and column computation unit, to adjust the load value of that unit, multiple loads with fixed values ​​are required. These loads are connected according to a preset connection method, and then logic circuits, switching circuits, etc., are used to control the load values. This circuit implementation, which achieves different weights by adjusting the load value, has a relatively complex structure.

[0033] The matrix multiplication circuit module provided in this embodiment uses a load with a fixed load value. The magnitude of the electrical signal is adjusted by regulating the duty cycle of the electrical signal according to the matrix elements (weights) in the weight matrix. Applying the adjusted electrical signal to the load achieves the effect of multiplying the corresponding weight with the electrical signal. This method is easily adaptable to changes in weights. It simplifies the structure of the circuit module implementing matrix multiplication and reduces its complexity.

[0034] One implementation method is to adjust the duty cycle of the voltage signal using electronically controlled pulse width modulation (PWM) technology.

[0035] The aforementioned electronically controlled pulse width modulation (PWM) technique can use a phase-locked loop (LLL) based phase interposer to generate a control signal. This control signal is then applied to a switching circuit, controlling the circuit's on / off state to adjust the duty cycle of the electrical signal.

[0036] Alternatively, please refer to Figure 2 , Figure 2 It shows Figure 1 This is a schematic diagram of the electrical signal conditioning subunit in the matrix multiplication circuit module shown. Figure 2 As shown, the electrical signal conditioning subunit 1101 (voltage signal duty cycle conditioning unit) includes a control signal generation circuit 1103 and a switching circuit 1104. The control signal generation circuit 1103 may include a phase inserter based on a phase-locked loop. The switching circuit 1104 may include various switching devices, including transistors, field-effect transistors, and insulated-gate bipolar transistors that implement switching functions. The control signal generated by the control signal generation circuit controls the duty cycle of the voltage signal by controlling the switching circuit to turn on or off.

[0037] The aforementioned control signal generation circuit can adjust the duration of the effective operating signal within the control signal period T1 by changing the value of a matrix element in the weight matrix. This effective operating signal turns on the switching device, and when the switching device is on, the electrical signal acts on the load. During the ineffective operating signal duration within period T1, the switching device is off, and the electrical signal cannot act on the load. For example, when the control signal is high, the switching circuit is on; when the control signal is low, the switching circuit is off. The on-time of the switching circuit is positively correlated with the duty cycle of the control signal. By adjusting the duty cycle of the electrical signal applied to the load in this way, the magnitude of the electrical signal is adjusted.

[0038] For illustrative purposes, taking a 12V electrical signal as an example, with a duty cycle of 1, the electrical signal applied to the aforementioned load is 12V. The duty cycle of the electrical signal applied to the load can be adjusted to 1 / 2 using the aforementioned control signal, resulting in a 6V electrical signal applied to the aforementioned load.

[0039] Furthermore, the same control signal generating circuit 1103 (e.g., a phase-locked loop-based phase inserter) can be used to generate control signals Cin corresponding to multiple row and column calculation units. Multiple control signals generated by the same phase-locked loop-based phase inserter can be input to the corresponding row and column calculation units via multiplexers. The input terminal of the aforementioned switching circuit in the row and column calculation unit receives the electrical signal output from the aforementioned multiplexer, and the output terminal of the switching circuit is connected to the load. After the aforementioned electrical signal conditioning subunit outputs a control signal Cin with a preset duty cycle through the aforementioned multiplexer, the aforementioned switching circuit is turned on or off under the action of the aforementioned pulse signal.

[0040] By using the same control signal generating circuit 1103 to generate control signals Cin corresponding to multiple row and column calculation units, the structure of the circuit module for implementing matrix multiplication can be further simplified.

[0041] In some alternative implementations, at least one multiplication unit 110 within the same row and column calculation unit 11 uses a load 1102 with the same parameters. The use of a load with the same parameters by each multiplication unit means that the parameter values ​​of the load used by each multiplication unit are identical. For example, if the load is a resistor, the resistance value (or conductance value) of the resistor used by each row and column calculation unit is the same.

[0042] In these optional implementations, each multiplication unit of the row and column calculation unit can use a load 1102 with identical parameters. The weights corresponding to each multiplication unit of the row and column calculation unit can be implemented jointly by the electrical signal conditioning subunit of each multiplication unit and the load.

[0043] Among these alternative implementations, since the same load is used in the same row and column computing unit, the process of load fabrication can be simplified compared to fabricating different loads in a single path of the row and column computing unit. This reduces the complexity of the fabrication process of the circuit module that implements matrix multiplication and simplifies the structure of the circuit that implements matrix multiplication.

[0044] Optionally, for at least one row-column calculation unit implementing row-column multiplication, the multiplication units corresponding to each row-column calculation unit can use loads with the same parameters. Using loads with the same parameters for each row-column calculation unit means that the load values ​​used by each row-column calculation unit are the same. Taking a resistor as an example, the resistance value (or conductance value) of the resistor used by each row-column calculation unit is the same. This can further simplify the load fabrication process, thereby further reducing the complexity of the fabrication process of the circuit module implementing matrix multiplication.

[0045] In some application scenarios, please refer to Figure 3 This illustrates a circuit diagram of one implementation of the row and column calculation unit. For example... Figure 3 As shown, the load in this row and column calculation unit is a resistor. The electrical signal is a voltage signal. The resistance value in each multiplication unit is equal, which is R.

[0046] Figure 3 The row and column calculation unit shown has two matrix elements, Vin1 and Vin2, in one row of the electrical signal matrix. The weight matrix has two matrix elements, D11×(1 / R) and D21×(1 / R), in one column. Here, D11 represents the voltage signal magnitude adjustment ratio achieved by the duty cycle of the voltage signal Vin1 adjusted by the electrical signal adjustment subunit 1101. Here, D12 represents the voltage signal magnitude adjustment ratio achieved by the duty cycle of the voltage signal Vin2 adjusted by the electrical signal adjustment subunit 1101'.

[0047] For the input signal Vin1, after passing through the multiplication unit 110, the resistor 1102(R) responds to the input Vin1, and the response signal output by the resistor 1102 is the current signal I1:

[0048]

[0049] For the input signal Vin2, after passing through the multiplication unit 110', the resistor 1102'(R) responds to the input Vin2, and the response signal output by the resistor 1102' is the current signal I2:

[0050]

[0051] The aforementioned addition unit 111 is implemented by connecting multiplication units 110 and 110' in parallel. With multiplication units 110 and 110' connected in parallel, the output *out* of the aforementioned row and column calculation unit is the sum of the aforementioned current signals I1 and I2. That is:

[0052]

[0053] Figure 3The row and column calculation unit shown uses a fixed load value and an electrical signal adjustment subunit to adjust the duty cycle of the input voltage signal, adjusting the magnitude of the electrical signal acting on the load according to the change of weights. Matrix multiplication can be achieved through multiple row and column calculation units. The circuit module for implementing matrix multiplication composed of the above row and column calculation units has relatively low structural complexity.

[0054] Please refer to Figure 4 This illustrates a circuit diagram of another implementation of the row and column calculation unit. For example... Figure 4 As shown, the load in this row and column calculation unit is a capacitor. The electrical signal is a voltage signal. The capacitance value of each multiplication unit is equal, which is C.

[0055] The above electrical signal matrix has two matrix elements, Vin1 and Vin2, in one row. The above weight matrix has two matrix elements, D11×C and D21×C, in one column. Here, D11 represents the voltage signal magnitude adjustment ratio achieved by the duty cycle of the voltage signal Vin1 adjusted by the electrical signal adjustment subunit 1101. Here, D12 represents the voltage signal magnitude adjustment ratio achieved by the duty cycle of the voltage signal Vin2 adjusted by the electrical signal adjustment subunit 1101'.

[0056] For the input signal Vin1, after passing through the multiplication unit 110, the capacitor 1102 (C) responds to the input Vin1, and the response signal output by the capacitor 1102 is the charge signal Q1:

[0057] Q1 = Vin1 × D11 × C (4);

[0058] For the input signal Vin2, after passing through the multiplication unit 110', the capacitor 1102'(R) responds to the input Vin2, and the response signal output by the resistor 1102' is the charge signal Q2:

[0059] Q2=Vin2×D12×C (5);

[0060] The aforementioned addition unit 111 is implemented by connecting multiplication units 110 and 110' in parallel. With multiplication units 110 and 110' connected in parallel, the output *out* of the aforementioned row and column calculation unit is the sum of the charge signals Q1 and Q2. That is:

[0061] out=Q1+Q2=Vin1×D11×C+Vin2×D12×C (6);

[0062] Figure 4The row and column calculation unit shown uses a fixed load value and an electrical signal adjustment subunit to adjust the duty cycle of the input voltage signal, adjusting the magnitude of the electrical signal acting on the load according to changes in weights. Matrix multiplication can be performed using multiple row and column calculation units. The matrix multiplication module composed of these units has relatively low structural complexity.

[0063] This disclosure also provides an integrated circuit. The integrated circuit includes... Figures 1-4 The matrix multiplication circuit module shown in the embodiment. This integrated circuit can be an integrated circuit that implements various functions.

[0064] The following is for reference. Figure 5 The diagram illustrates a flowchart of some embodiments of a matrix multiplication implementation method according to the present disclosure. This matrix multiplication implementation method is used for... Figure 1 The matrix multiplication circuit module shown.

[0065] like Figure 5 As shown, the matrix multiplication implementation method includes the following steps:

[0066] Step 501: Obtain the row matrix element of a row of the first matrix and the column matrix element of the corresponding column of the second matrix, wherein the row matrix element is represented by an electrical signal.

[0067] Matrix multiplication involves performing row-matrix multiplication on each row element of the first matrix and the corresponding column element of the second matrix. This embodiment uses row-column multiplication as an example to illustrate the implementation of matrix multiplication.

[0068] The first matrix here can include n x m matrix elements. That is, it includes n rows and m columns of matrix elements. n and m are integers greater than or equal to 1.

[0069] The second matrix can contain m x p matrix elements, that is, it includes m rows and p columns of matrix elements. m and p are integers greater than or equal to 1.

[0070] The matrix elements in the first matrix can be represented as electrical signals. That is, the magnitude of the aforementioned electrical signal can be used to represent the minimum value of the matrix element. The electrical signal here can include voltage signals or current signals. This disclosure uses voltage signals as an example for illustration.

[0071] In some applications, the first matrix described above represents the feature matrix output by a neuron in a neural network. In these applications, each element of the first matrix can be considered a feature value output by the neuron. The second matrix described above can be a weight matrix. The weights in the weight matrix correspond one-to-one with the feature values.

[0072] Step 502: Input the electrical signal corresponding to the row matrix element into the row and column calculation unit, and use the electrical signal adjustment subunit to adjust the electrical signal based on the size of the column matrix element. The row and column calculation unit includes at least one multiplication unit and an addition unit. The multiplication unit includes an electrical signal adjustment subunit and a load. The load value of the load is fixed.

[0073] The number of multiplication units included in a row and column calculation unit can match the number of matrix elements included in a row of the first matrix.

[0074] The multiplication unit described above is used to implement the product of a row element of the first matrix and a column element of the second matrix corresponding to that row.

[0075] In this embodiment, the load value of the aforementioned load remains constant.

[0076] The load mentioned above can be either a resistor or a capacitor.

[0077] The aforementioned electrical signal includes a voltage signal, and the electrical signal conditioning subunit includes a voltage signal duty cycle adjustment unit. The voltage signal duty cycle adjustment unit includes: a control signal generation circuit and a switching circuit; step 502 includes:

[0078] First, the control signal generating circuit generates a control signal that matches the size of the column matrix elements.

[0079] Secondly, the control signal is applied to the switching circuit. By controlling the switching circuit to turn on or off, the magnitude of the voltage signal applied to the load is adjusted to match the elements of the column matrix. For a more detailed explanation, please refer to [reference needed]. Figure 2 The description of the electrical signal conditioning subunit shown will not be repeated here.

[0080] For each multiplication unit implementing the multiplication of row and column matrix elements, the magnitude of the electrical signal representing the row matrix element can be adjusted using an electrical signal adjustment subunit based on the size of the column matrix element. The adjustment ratio of the electrical signal, combined with the load, can be matched to the size of the column matrix element.

[0081] For neural networks, the same neural network unit can correspond to multiple matrix multiplications. The matrix elements in the weight matrix corresponding to each matrix multiplication can be different. To accommodate the issue of changing weights for multiple matrix multiplications, the matrix multiplication circuit module provided in this disclosure and the matrix method implementation method provided in this embodiment can be used to complete matrix multiplication. By adjusting the input electrical signal, the complexity of the circuit structure for implementing matrix multiplication can be reduced.

[0082] Step 503: The sum of the response signals of each multiplication unit is used as the calculation result corresponding to the row and column calculation unit. The response signal of the multiplication unit is obtained by applying the electrical signal regulated by the electrical signal regulation subunit of the multiplication unit to the load of the multiplication unit.

[0083] If the load is a resistor, the response signal output by the multiplication unit is a current signal. If the load is a capacitor, the response signal output by the multiplication unit is a charge signal.

[0084] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0085] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in a sequential order. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0086] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A matrix multiplication circuit module, comprising: At least one row and column calculation unit that performs row and column multiplication; The row and column calculation unit includes at least one multiplication unit and an addition unit; The output of at least one multiplication unit is connected to the input of the addition unit; The multiplication unit includes an electrical signal conditioning subunit and a load, wherein the electrical signal conditioning subunit is used to adjust the magnitude of the input electrical signal; The electrical signal conditioning subunit and the load respond to the electrical signal input to the multiplication unit to perform the multiplication operation; wherein The load values ​​for the above loads are fixed; The calculation unit in the same row and column includes at least one multiplication unit that uses the same load parameters; The electrical signal includes a voltage signal, and the electrical signal conditioning subunit includes a voltage signal duty cycle conditioning unit. The voltage signal duty cycle adjustment unit includes a control signal generation circuit and a switching circuit. The control signal generated by the control signal generation circuit controls the duty cycle of the voltage signal by controlling the switching circuit to turn on or off. In this process, several different electrical signals represent different row matrix elements in the row-column multiplication calculation, and several different duty cycles and loads with the same parameters jointly realize several different column matrix elements in the row-column multiplication calculation.

2. The circuit module according to claim 1, characterized in that, The multiplication units corresponding to each of the at least one row and column multiplication units that implement row and column multiplication calculations use the same load parameters.

3. The circuit module according to claim 1, characterized in that, The load includes a resistor or a capacitor.

4. The circuit module according to claim 1, characterized in that, The electrical signal is a voltage signal, the load is a resistor, and The addition unit of the row and column calculation unit is used to sum the current signals output by each multiplication unit.

5. The circuit module according to claim 1, characterized in that, The electrical signal is a voltage signal, the load is a capacitor, and The addition unit of the row and column calculation unit is used to sum the charge signals output by each multiplication unit.

6. The circuit module according to claim 1, characterized in that, The circuit module is used to perform convolution calculations between the weight matrix and the feature matrix output by the neuron in the neural network.

7. A matrix multiplication implementation method, used in the matrix multiplication circuit module as described in any one of claims 1-6, comprising: Obtain the row matrix elements of a row of a first matrix and the column matrix elements of the corresponding column of a second matrix, wherein the row matrix elements are represented by electrical signals; The electrical signals corresponding to the row matrix elements are input to the row and column calculation unit. The electrical signal adjustment subunit adjusts the electrical signals based on the size of the column matrix elements. The row and column calculation unit includes at least one multiplication unit and an addition unit. The multiplication unit includes an electrical signal adjustment subunit and a load. The sum of the response signals of each multiplication unit is used as the calculation result corresponding to the row and column calculation unit. The response signal of the multiplication unit is obtained by applying the electrical signal regulated by the electrical signal regulation subunit of the multiplication unit to the load of the multiplication unit. The calculation unit in the same row and column includes at least one multiplication unit that uses the same load parameters; The electrical signal includes a voltage signal, and the electrical signal conditioning subunit includes a voltage signal duty cycle conditioning unit. The voltage signal duty cycle adjustment unit includes a control signal generation circuit and a switching circuit. The control signal generated by the control signal generation circuit controls the duty cycle of the voltage signal by controlling the switching circuit to turn on or off. In this process, several different electrical signals represent different row matrix elements in the row-column multiplication calculation, and several different duty cycles and loads with the same parameters jointly realize several different column matrix elements in the row-column multiplication calculation.

8. The method according to claim 7, characterized in that, The step of inputting the electrical signals corresponding to the row matrix elements into the row and column calculation unit, and adjusting the electrical signals using the electrical signal adjustment subunit based on the size of the column matrix elements, includes: The control signal generating circuit generates a control signal that matches the size of the column matrix elements. The control signal is applied to the switching circuit, and by controlling the switching circuit to turn on or off, the magnitude of the voltage signal applied to the load is adjusted to match the column matrix elements.

9. The method according to any one of claims 7-8, characterized in that, The first matrix is ​​the feature matrix output by the neurons of the neural network, and the second matrix is ​​the weight matrix.

10. An integrated circuit comprising at least one matrix multiplication circuit module as described in claims 1-6.

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