A carrier synchronization control method and device for a parallel energy storage converter

Abstract

The application provides a carrier synchronization control method and device of a parallel energy storage converter. In the execution of the method, first, a master carrier synchronization signal and a slave carrier synchronization signal are acquired; then, the zero-crossing time of the master carrier synchronization signal and the slave carrier synchronization signal is recorded; the frequency of the master carrier synchronization signal is calculated according to the zero-crossing time of the master carrier synchronization signal, and the frequency of the slave carrier synchronization signal is calculated according to the zero-crossing time of the slave carrier synchronization signal; finally, the frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal, so as to realize the synchronization of the slave carrier synchronization signal and the master carrier synchronization signal. In this way, the carrier synchronization of each parallel energy storage converter is achieved by adjusting the carrier synchronization signal of the slave by using the carrier synchronization signal of the master, and the problem that the carrier cannot be synchronized when a single point or multiple points of the parallel system fail in the prior art is solved.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a carrier synchronization control method and device for a parallel energy storage converter. Background Technology

[0002] With the rapid development of energy storage systems, the demand for process control systems is increasingly shifting towards larger capacities. In order to meet market demand, achieving high power output through multi-unit parallel connection has become an industry trend.

[0003] However, in a multi-machine parallel system, high-frequency circulating currents may occur between the parallel process control systems due to the asynchronous carrier phase. This not only increases system losses and reduces system efficiency, but may also cause serious electromagnetic interference, endangering the safe operation of the system.

[0004] To address the issue of carrier phase asynchrony, existing technologies typically employ carrier synchronization. Common solutions for carrier synchronization include master-slave carrier synchronization, automatic master-slave allocation based on the Serial Availability Communication Protocol (CAN), or automatic master-slave identification and allocation based on a single-transmitter-receiver ring network.

[0005] Master-slave carrier synchronization technology involves a pre-defined master in the system sending synchronization correction commands to the other slave devices at a fixed phase point, such as when the carrier crosses zero. This approach has low flexibility; if the master fails, the system cannot establish a new master, causing the entire system to malfunction.

[0006] The masterless synchronization method based on CAN communication mechanism has shortcomings such as insufficient synchronization accuracy due to the inability to accurately calculate CAN communication time and software response time. In addition, when the channel fails, the signals of lower priority nodes may be temporarily or permanently blocked.

[0007] Based on the master-slave automatic identification and allocation scheme of fiber optic single-transmitter ring network, when two or more non-adjacent nodes fail, the devices between the failed nodes cannot continue to operate synchronously because the synchronization signal transmission network is interrupted. Summary of the Invention

[0008] In view of this, embodiments of this application provide a carrier synchronization control method and apparatus for a parallel energy storage converter, which aims to solve the problem of carrier synchronization failure when a single or multiple point fault occurs in a parallel system in the prior art.

[0009] In a first aspect, embodiments of this application provide a carrier synchronization control method for a parallel energy storage converter, the method comprising:

[0010] Acquire the host carrier synchronization signal and the slave carrier synchronization signal;

[0011] Record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal;

[0012] The frequency of the host carrier synchronization signal is calculated based on the zero-crossing time of the host carrier synchronization signal, and the frequency of the slave carrier synchronization signal is calculated based on the zero-crossing time of the slave carrier synchronization signal.

[0013] The frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal.

[0014] Optionally, the methods for determining the master and slave devices may include:

[0015] The centralized controller can designate any one of the multiple parallel energy storage converters as the master; the undesignated energy storage converters are designated as slaves.

[0016] Optionally, if the host fails, the method further includes:

[0017] According to the rule of increasing serial number, the non-faulty energy storage converter with the smallest difference from the faulty host serial number is selected as the new host.

[0018] Optionally, adjusting the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal specifically includes:

[0019] Read the time base count register value at the rising edge of the slave carrier synchronization signal;

[0020] If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is an incrementing count, then the period value of the slave carrier synchronization signal is increased.

[0021] If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is a decrement, then the period value of the slave carrier synchronization signal is reduced.

[0022] Optionally, the method for generating the host carrier synchronization signal and the slave carrier synchronization signal specifically includes:

[0023] When the carrier count is zero or reaches the period register value, the level of the preset interface is flipped to obtain the host carrier synchronization signal and the slave carrier synchronization signal.

[0024] Secondly, embodiments of this application provide a carrier synchronization control device for a parallel energy storage converter, the device comprising: an acquisition module, a recording module, a calculation module, and an adjustment module;

[0025] The acquisition module is used to acquire the host carrier synchronization signal and the slave carrier synchronization signal;

[0026] The recording module is used to record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal;

[0027] The calculation module is used to calculate the frequency of the host carrier synchronization signal based on the zero-crossing time of the host carrier synchronization signal, and to calculate the frequency of the slave carrier synchronization signal based on the zero-crossing time of the slave carrier synchronization signal.

[0028] The adjustment module is used to adjust the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal, so as to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal.

[0029] Optionally, the device further includes a determining module, which is specifically used for:

[0030] The centralized controller can designate any one of the multiple parallel energy storage converters as the master; the undesignated energy storage converters are designated as slaves.

[0031] Optionally, the determining module is further configured to:

[0032] According to the rule of increasing serial number, the non-faulty energy storage converter with the smallest difference from the faulty host serial number is selected as the new host.

[0033] Optionally, the adjustment module specifically includes: a reading unit, a first adjustment unit, and a second adjustment unit;

[0034] The reading unit is specifically used to read the time base count register value at the rising edge of the slave carrier synchronization signal;

[0035] If the value of the time base counter register exceeds a preset proportion of the period value of the host carrier synchronization signal, and the value of the time base counter register is an incrementing count, the first adjustment unit is used to increase the period value of the slave carrier synchronization signal;

[0036] If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is a decrement, the second adjustment unit is used to reduce the period value of the slave carrier synchronization signal.

[0037] Optionally, the apparatus further includes a generation module, which is specifically used for:

[0038] When the carrier count is zero or reaches the period register value, the level of the preset interface is flipped to obtain the host carrier synchronization signal and the slave carrier synchronization signal.

[0039] This application provides a carrier synchronization control method for parallel energy storage converters. When executing the method, firstly, a master carrier synchronization signal and a slave carrier synchronization signal are acquired; then, the zero-crossing times of the master and slave carrier synchronization signals are recorded; the frequency of the master carrier synchronization signal is calculated based on its zero-crossing time, and the frequency of the slave carrier synchronization signal is calculated based on its zero-crossing time; finally, the frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave and master carrier synchronization signals. In this way, by using the master carrier synchronization signal to adjust the slave carrier synchronization signal, carrier synchronization of the parallel energy storage converters is achieved, solving the problem of carrier synchronization failure in existing parallel systems when single-point or multi-point faults occur. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in this embodiment or the prior art, the drawings used in the description of the embodiment or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 A block diagram of a parallel carrier synchronization system for a process control system provided in this application embodiment;

[0042] Figure 2 A flowchart illustrating a carrier synchronization control method for a parallel energy storage converter provided in this application embodiment;

[0043] Figure 3 This is a schematic diagram of the carrier synchronization adjustment process provided in an embodiment of this application;

[0044] Figure 4 This is a schematic diagram of the structure of a carrier synchronization control device for a parallel energy storage converter provided in an embodiment of this application. Detailed Implementation

[0045] With the rapid development of energy storage systems, the demand for process control systems is increasingly shifting towards larger capacities. In order to meet market demand, achieving high power output through multi-unit parallel connection has become an industry trend.

[0046] However, in a multi-machine parallel system, high-frequency circulating currents may occur between the parallel process control systems due to the asynchronous carrier phase. This not only increases system losses and reduces system efficiency, but may also cause serious electromagnetic interference, endangering the safe operation of the system.

[0047] To address the issue of carrier phase asynchrony, existing technologies typically employ carrier synchronization. Common solutions for carrier synchronization include master-slave carrier synchronization, automatic master-slave allocation based on the Serial Availability Communication Protocol (CAN), or automatic master-slave identification and allocation based on a single-transmitter-receiver ring network.

[0048] Master-slave carrier synchronization technology involves a pre-defined master in the system sending synchronization correction commands to the other slave devices at a fixed phase point, such as when the carrier crosses zero. This approach has low flexibility; if the master fails, the system cannot establish a new master, causing the entire system to malfunction.

[0049] The masterless synchronization method based on CAN communication mechanism has shortcomings such as insufficient synchronization accuracy due to the inability to accurately calculate CAN communication time and software response time. In addition, when the channel fails, the signals of lower priority nodes may be temporarily or permanently blocked.

[0050] Based on the master-slave automatic identification and allocation scheme of fiber optic single-transmitter ring network, when two or more non-adjacent nodes fail, the devices between the failed nodes cannot continue to operate synchronously because the synchronization signal transmission network is interrupted.

[0051] In view of this, in order to overcome the shortcomings of the prior art, the inventors of this application, in combination with the hardware control architecture of existing energy storage converters, provide a masterless carrier synchronization method based on an optical fiber transceiver network and decided by a centralized controller. This method solves the problem of carrier synchronization failure when a single or multiple point fault occurs in a parallel system from the system level, thereby improving the stability and reliability of carrier synchronization in a parallel system.

[0052] This invention provides a masterless carrier synchronization scheme based on an optical fiber transceiver network and decided by a centralized controller. Its architecture includes: a system centralized control layer, an optical fiber network transmission layer, and a converter autonomous synchronization control layer. The system centralized control layer consists of a centralized controller, and the converter autonomous synchronization control layer consists of N parallel-operating energy storage converters. The centralized controller and the N energy storage converters are interconnected through the optical fiber transceiver network. The centralized controller designates any one converter unit as the master, and the remaining converter units become slaves accordingly. The centralized controller individually selects the synchronization square wave signal sent by the current master and sends it to the remaining slave units. After receiving the synchronization square wave signal, the slave units adjust their carrier phase to synchronize with the master.

[0053] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0054] See Figure 1 , Figure 1 The block diagram of the parallel carrier synchronization system of the process control system (PCS) provided in the embodiments of this application shows that the centralized controller is mainly composed of chip select module 1, chip select module 2, centralized control DSP, etc.

[0055] The input channels (IN1, IN2...INn) of chip select module 1 and chip select module 2 simultaneously receive carrier synchronization square wave signals sent from each parallel PCS unit.

[0056] See Figure 2 , Figure 2 A flowchart of a carrier synchronization control method for a parallel energy storage converter provided in this application embodiment includes:

[0057] S201. Obtain the host carrier synchronization signal and the slave carrier synchronization signal.

[0058] like Figure 1 The input channel of the chip select module 1 simultaneously receives carrier synchronization square wave signals sent from each parallel PCS unit, which are the slave carrier synchronization signals; the input channel of the chip select module 2 simultaneously receives carrier synchronization square wave signals sent from each parallel PCS unit, which are the master carrier synchronization signals.

[0059] S202. Record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal.

[0060] S203. Calculate the frequency of the host carrier synchronization signal based on the zero-crossing time of the host carrier synchronization signal, and calculate the frequency of the slave carrier synchronization signal based on the zero-crossing time of the slave carrier synchronization signal.

[0061] The output of the chip select module 1 is connected to the CAP1 module of the centralized control DSP. The CAP1 module records the zero-crossing time t1 of the current carrier synchronization signal by triggering the rising edge, and at the same time calculates the frequency of the square wave synchronization signal to determine whether the carrier frequency of the currently selected PCS unit is normal.

[0062] Chip select module 2 outputs a square wave signal as the current host carrier synchronization signal. It connects to two channels. One channel connects to the CAP2 module of the centralized control DSP. The CAP2 module records the zero-crossing time t2 of the current host carrier synchronization signal via a rising edge trigger, and simultaneously calculates the frequency of the square wave synchronization signal to determine if the current host carrier frequency is normal. The other channel transmits the synchronization signal to each PCS unit in the system via an electro-optical conversion circuit and an optical fiber network, used to adjust their respective carrier phases to maintain synchronization with the host.

[0063] S204. Adjust the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal.

[0064] If the absolute value of the time difference between t1 and t2 is within a preset threshold range, it is determined that the carrier synchronization tracking status of the slave device currently selected by chip select module 1 with the master device is good. If the absolute value of the time difference between t1 and t2 exceeds the preset threshold, it is determined that the carrier of the slave device currently selected by chip select module 1 is not synchronized with the master device, and an alarm is triggered to request the system to handle the slave device. Using this method, the synchronization status of all slave devices and the master device in the system can be determined within half a power frequency cycle, and a fault in the master or slave device in the system can also be identified.

[0065] This application provides a carrier synchronization control method for parallel energy storage converters. When executing the method, firstly, a master carrier synchronization signal and a slave carrier synchronization signal are acquired; then, the zero-crossing times of the master and slave carrier synchronization signals are recorded; the frequency of the master carrier synchronization signal is calculated based on its zero-crossing time, and the frequency of the slave carrier synchronization signal is calculated based on its zero-crossing time; finally, the frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave and master carrier synchronization signals. In this way, by using the master carrier synchronization signal to adjust the slave carrier synchronization signal, carrier synchronization of the parallel energy storage converters is achieved, solving the problem of carrier synchronization failure in existing parallel systems when single-point or multi-point faults occur.

[0066] In an optional embodiment of this application, the centralized controller designates any one energy storage converter as the master and the remaining energy storage converters as slaves, that is, the centralized controller makes master decisions for multiple PCS units.

[0067] The process of determining the master and slave devices is as follows: After the system powers on and stabilizes, for systems that have previously been assigned a master, the centralized control DSP reads the current master ID number stored in the memory unit and switches the output channel of chip select module 2 to the input channel (IN1, IN2...INn) corresponding to the ID number to specify the master synchronization control signal for the current system. For parallel systems running for the first time, if the memory unit does not store any master ID number, the system defaults to using input IN1 in chip select module 2 as the master synchronization control signal for the current system. If there is no synchronization signal in IN1, then IN2 is selected, and so on, specifying the master synchronization control signal in the system according to the increasing sequence number, while storing the ID number corresponding to the current master.

[0068] If a host malfunctions, the centralized controller automatically switches the chip select signal of chip select module 2 to the next input according to the sequential increment rule. Before switching, it checks whether the ID number of the host to be selected is saved in the historical fault ID list. If so, it is not selected. This rule determines the new host in the system, and the ID number of the currently faulty host is saved in the storage unit. Before the fault is resolved, the faulty host does not have the authority to be reassigned as a host. The storage unit has a power-off storage function, which records not only the current host ID number but also the ID numbers of historical faulty PCs.

[0069] Furthermore, since the operation of high-power energy storage converters results in significant electromagnetic interference affecting communication, and considering the reliability and timeliness of carrier synchronization signal transmission, this embodiment employs fiber optic transmission, which is more stable than CAN transmission. The autonomous synchronization control layer primarily handles the input judgment of the host carrier synchronization signal, the adjustment of its own carrier period, and the generation and transmission of the high-frequency square wave synchronization signal corresponding to its own carrier.

[0070] In an optional embodiment of this application, the input judgment of the carrier synchronization signal does not employ the DSP's CAP port capture scheme. Since the three-phase high-power energy storage converter needs to detect the frequency of the three-phase grid voltage, the DSP's three CAP port resources are fully occupied. Instead, the external XINT interrupt of the DSP is used to detect the input of the external synchronization signal. Any I / O port is configured as the interrupt input source. When the high-frequency synchronization signal is input to the corresponding external interrupt input I / O port and a rising edge transition occurs, the system's external XINT interrupt is triggered. The interrupt response program reads the value of the TBCTR time base counter register of the DSP EPWM module. Theoretically, when the PCS's own carrier phase and the external synchronization input signal are synchronized, the corresponding TBCTR value should be 0 at the rising edge of the synchronization input signal. However, due to delay errors, it is defined that when the TBCTR value is less than 0.5% of the current carrier period value, the carrier is considered to be synchronized, and the target PCS does not need to adjust its own carrier period.

[0071] See Figure 3 , Figure 3 This is a schematic diagram of the carrier synchronization adjustment process provided in an embodiment of this application. When the carriers are not synchronized, the TBCTR value at the rising edge of the synchronization signal is read. If the TBCTR value exceeds a preset proportion of the current carrier period value (which can be set to 0.5%), and the current count is increasing, then the carrier of the target PCS module is ahead of the synchronization signal, and the target module should increase its own carrier period value. If the TBCTR value exceeds 0.5% of the current carrier period value, and the current count is decreasing, then the carrier of the target PCS is lagging behind the synchronization signal, and the target PCS should decrease its own carrier period value.

[0072] In optional embodiments of this application, the generation method of the host carrier synchronization signal and the slave carrier synchronization signal may be as follows:

[0073] The program is configured to trigger an EPWM interrupt when the carrier count reaches zero and when the period register value is reached. The interrupt response routine then toggles the level of a specified I / O port, generating a high-frequency square wave signal that is in phase and frequency with its own carrier. This high-frequency square wave signal is transmitted to the central controller via a fiber optic network. The central controller determines which high-frequency square wave signal serves as the current system's host carrier synchronization signal and simultaneously checks whether the current PCS unit's carrier accurately tracks the system's host carrier signal.

[0074] The above describes some specific implementations of a carrier synchronization control method for a parallel energy storage converter provided in this application. Based on this, this application also provides a corresponding carrier synchronization control device for a parallel energy storage converter. The device provided in this application will be described below from the perspective of functional modularity.

[0075] See Figure 4 , Figure 4 This is a schematic diagram of a carrier synchronization control device for a parallel energy storage converter provided in an embodiment of this application. The device includes: an acquisition module 401, a recording module 402, a calculation module 403, and an adjustment module 404.

[0076] The acquisition module 401 is used to acquire the host carrier synchronization signal and the slave carrier synchronization signal;

[0077] The recording module 402 is used to record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal;

[0078] The calculation module 403 is used to calculate the frequency of the host carrier synchronization signal based on the zero-crossing time of the host carrier synchronization signal, and to calculate the frequency of the slave carrier synchronization signal based on the zero-crossing time of the slave carrier synchronization signal.

[0079] The adjustment module 404 is used to adjust the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal, so as to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal.

[0080] This application provides a carrier synchronization control method for parallel energy storage converters. When executing the method, firstly, a master carrier synchronization signal and a slave carrier synchronization signal are acquired; then, the zero-crossing times of the master and slave carrier synchronization signals are recorded; the frequency of the master carrier synchronization signal is calculated based on its zero-crossing time, and the frequency of the slave carrier synchronization signal is calculated based on its zero-crossing time; finally, the frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave and master carrier synchronization signals. In this way, by using the master carrier synchronization signal to adjust the slave carrier synchronization signal, carrier synchronization of the parallel energy storage converters is achieved, solving the problem of carrier synchronization failure in existing parallel systems when single-point or multi-point faults occur.

[0081] Furthermore, in an optional embodiment of this application, the apparatus further includes a determining module, which is specifically used for:

[0082] The centralized controller can designate any one of the multiple parallel energy storage converters as the master; the undesignated energy storage converters are designated as slaves.

[0083] Furthermore, in an optional embodiment of this application, the determining module is further configured to:

[0084] According to the rule of increasing serial number, the non-faulty energy storage converter with the smallest difference from the faulty host serial number is selected as the new host.

[0085] Furthermore, in an optional embodiment of this application, the adjustment module 404 specifically includes: a reading unit, a first adjustment unit, and a second adjustment unit;

[0086] The reading unit is specifically used to read the time base count register value at the rising edge of the slave carrier synchronization signal;

[0087] If the value of the time base counter register exceeds a preset proportion of the period value of the host carrier synchronization signal, and the value of the time base counter register is an incrementing count, the first adjustment unit is used to increase the period value of the slave carrier synchronization signal;

[0088] If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is a decrement, the second adjustment unit is used to reduce the period value of the slave carrier synchronization signal.

[0089] Furthermore, in an optional embodiment of this application, the apparatus further includes a generation module, which is specifically used for:

[0090] When the carrier count is zero or reaches the period register value, the level of the preset interface is flipped to obtain the host carrier synchronization signal and the slave carrier synchronization signal.

[0091] In the embodiments of this application, the terms "first" and "second" in the names such as "first adjustment unit" and "second adjustment unit" are only used as name identifiers and do not represent the order of first and second.

[0092] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the methods of the above embodiments can be implemented by means of software plus a general-purpose hardware platform. Based on this understanding, the technical solution of this application can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as a read-only memory (ROM) / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, a server, or a network communication device such as a router) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0093] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on its differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0094] The above description is merely an exemplary implementation of this application and is not intended to limit the scope of protection of this application.

Claims

1. A carrier synchronization control method for a parallel energy storage converter, characterized in that, The method is applied to a system including a centralized controller and multiple parallel energy storage converters, wherein the centralized controller is connected to each of the energy storage converters via a fiber optic network, and the method includes: Acquire the host carrier synchronization signal and the slave carrier synchronization signal; Record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal; The frequency of the host carrier synchronization signal is calculated based on the zero-crossing time of the host carrier synchronization signal, and the frequency of the slave carrier synchronization signal is calculated based on the zero-crossing time of the slave carrier synchronization signal. The frequency of the slave carrier synchronization signal is adjusted according to the frequency of the master carrier synchronization signal to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal; The methods for determining the master and slave devices specifically include: The centralized controller designates any one of the multiple parallel energy storage converters as the master; the undesignated energy storage converters are slaves; if the master fails, the non-faulty energy storage converter with the smallest difference in sequence number from the faulty master is selected as the new master according to the rule of increasing sequence number.

2. The method according to claim 1, characterized in that, The step of adjusting the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal specifically includes: Read the time base count register value at the rising edge of the slave carrier synchronization signal; If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is an incrementing count, then the period value of the slave carrier synchronization signal is increased. If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is a decrement, then the period value of the slave carrier synchronization signal is reduced.

3. The method according to claim 1, characterized in that, The method for generating the host carrier synchronization signal and the slave carrier synchronization signal specifically includes: When the carrier count is zero or reaches the period register value, the level of the preset interface is flipped to obtain the host carrier synchronization signal and the slave carrier synchronization signal.

4. A carrier synchronization control device for parallel energy storage converters, the device being applied to a system including a centralized controller and multiple parallel energy storage converters, wherein the centralized controller is connected to each of the energy storage converters via an optical fiber network, characterized in that... The device includes: an acquisition module, a recording module, a calculation module, and an adjustment module; The acquisition module is used to acquire the host carrier synchronization signal and the slave carrier synchronization signal; The recording module is used to record the zero-crossing times of the host carrier synchronization signal and the slave carrier synchronization signal; The calculation module is used to calculate the frequency of the host carrier synchronization signal based on the zero-crossing time of the host carrier synchronization signal, and to calculate the frequency of the slave carrier synchronization signal based on the zero-crossing time of the slave carrier synchronization signal. The adjustment module is used to adjust the frequency of the slave carrier synchronization signal according to the frequency of the master carrier synchronization signal, so as to achieve synchronization between the slave carrier synchronization signal and the master carrier synchronization signal; The determining module is specifically used for: The centralized controller can designate any one of the multiple parallel energy storage converters as the master; the undesignated energy storage converters are designated as slaves. The determining module is further configured to: According to the rule of increasing serial number, the non-faulty energy storage converter with the smallest difference from the faulty host serial number is selected as the new host.

5. The apparatus according to claim 4, characterized in that, The adjustment module specifically includes: a reading unit, a first adjustment unit, and a second adjustment unit; The reading unit is specifically used to read the time base count register value at the rising edge of the slave carrier synchronization signal; If the value of the time base counter register exceeds a preset proportion of the period value of the host carrier synchronization signal, and the value of the time base counter register is an incrementing count, the first adjustment unit is used to increase the period value of the slave carrier synchronization signal; If the value of the time base counter register exceeds a preset proportion of the period value of the master carrier synchronization signal, and the value of the time base counter register is a decrement, the second adjustment unit is used to reduce the period value of the slave carrier synchronization signal.

6. The apparatus according to claim 4, characterized in that, The apparatus further includes a generation module, which is specifically used for: When the carrier count is zero or reaches the period register value, the level of the preset interface is flipped to obtain the host carrier synchronization signal and the slave carrier synchronization signal.

Images