Pwm modulation method and system for three-level semiconductor inverter

Abstract

The application discloses a PWM modulation method and system of a three-level semiconductor converter, and the method comprises the following steps: 1) obtaining three-phase AC control voltage of the three-level semiconductor converter; 2) according to the three-phase AC control voltage and DC half voltage, taking the output current harmonic of the three-level semiconductor converter as a performance index, calculating zero sequence voltage which makes the performance index minimum as the optimal zero sequence voltage value; 3) superimposing the three-phase AC control voltage with the optimal zero sequence voltage value respectively to obtain three-phase carrier comparison voltage; 4) comparing the three-phase carrier comparison voltage with the superimposed carrier comparison to output the switching signal of the switching device in the three-phase three-level semiconductor converter. The application has the advantages of guaranteeing the minimum output current harmonic, simple operation and good real-time performance.

Description

Technical Field

[0001] This invention mainly relates to the field of power electronics technology, specifically to a PWM modulation method and system for a three-level semiconductor converter. Background Technology

[0002] A typical three-phase three-level semiconductor converter main circuit topology is as follows: Figure 1 The diode clamping three-level converter topology shown, and as follows Figure 2 The diagram shows a T-type three-level converter topology. Compared to a two-level converter topology, the three-level converter topology has advantages such as lower output current harmonics and lower overall system cost. In particular, in the diode-clamped three-level converter topology, since the voltage across each semiconductor device is only half of the system voltage, the power conversion level of the converter can be improved by increasing the system voltage.

[0003] Figure 1 , Figure 2 The system includes a diode-clamped three-level converter bridge 1, a T-type three-level converter bridge 1', a three-phase AC power supply or load 2 (three-phase AC power supply in the case of a rectifier, and a three-phase load in the case of an inverter), an AC reactor 3 for smoothing current between the three-level converter bridge and the three-phase power supply (or load), a DC power supply or load 4, and large-capacity support capacitors 5 and 6 to smooth the DC voltage and provide DC power to the AC circuit. These can be regarded as DC voltage sources. From the control perspective, the large-capacity support capacitors 5 and 6 can be regarded as positive and negative DC voltage sources for the positive and negative output voltages of the converter, respectively.

[0004] The power conversion of a converter is accomplished by the switching action of a group of semiconductor switching devices, and the switching action command is generally given by a PWM (Pulse Width Modulation) modulator.

[0005] The following describes the specific working principle of the PWM of a three-phase three-level converter:

[0006] The control of a three-phase converter generally revolves around the inner-loop control of the AC reactor current (i.e., the output current), achieved by providing switching signals to the switching devices of the semiconductor converter bridge. These switching signals are typically generated through PWM modulation, voltage command value comparison, and carrier wave comparison. In the case of a three-level converter, the switching signals for the four switching devices in each phase are usually generated using a layered PWM carrier wave method. A general block diagram of the inner-loop control of a three-level converter can be obtained using... Figure 3 express.

[0007] Figure 3In the process, the current comparator 7 compares the three-phase AC current with its command value to obtain the current control error; the current controller 8 amplifies the current error to obtain the three-phase control voltage command value that the converter should output; the PWM modulation stage 9 compares the stacked carrier with the voltage command value to generate the switching signal of the switching device constituting the three-level semiconductor converter 10.

[0008] Most modern controllers use digital control methods, and the sampling period is based on the integrity of the signal. It is often synchronized with the carrier signal, that is, the sampling period is consistent with one or half a carrier period, and the signal is sampled and the switching control information is loaded at the peak and valley time points of the carrier.

[0009] The following combination Figure 4 Taking one phase of a three-level converter as an example, the principle of switching signal generation is described. Figure 4 The topmost (A) shows the comparison between the voltage command for this phase and the stacked carrier consisting of two PWM carriers. The switching signals of the switching devices Q1 to Q4 generated by this comparison are shown in (B). In the figure, a level of 1 indicates that the corresponding switch is on, and a level of 0 indicates that it is off. (C) shows the real-time waveform of the control voltage output for this phase.

[0010] The advantage of using the carrier comparison method is that the switching signal is patterned. Within one carrier cycle, only one on and off action is performed, that is, the switching frequency is basically consistent with the carrier frequency, which is a preset fixed value.

[0011] When a three-phase converter system uses a three-phase three-wire system, meaning the neutral point of the three-phase AC power supply or load is not connected to the DC side of the converter, a zero-sequence voltage degree of freedom is generated in the inverter output voltage (PWM pulse width). This degree of freedom does not change the AC output voltage control effect and can be freely adjusted. This redundancy property has previously been used for purposes such as controlling the three-level DC neutral point potential balance and improving the maximum modulation rate of the inverter output.

[0012] As is well known, while inverters can achieve the required power conversion, they also have the negative effect of output harmonic current. The output harmonic rate of an inverter has always been an important indicator for evaluating its performance.

[0013] Traditional three-phase three-level PWM modulation methods are limited to generating the required output voltage. Although there are improved methods, such as using the redundancy of pulse generation to increase the maximum modulation rate of the output voltage and reduce the number of switching actions, there are very few applications of actively reducing output harmonics. Even when there are considerations for reducing harmonics, they are limited to improvements in the open-loop and inverter output voltage harmonic levels. There is still no PWM modulation method based on the evaluation of output current harmonics that is suitable for real-time closed-loop control calculations. Summary of the Invention

[0014] The technical problem to be solved by the present invention is: aiming at the problems existing in the prior art, the present invention provides a PWM modulation method and system for a three-level semiconductor converter that ensures minimum output current harmonics and has good real-time performance.

[0015] To solve the above technical problem, the technical scheme proposed by the present invention is as follows:

[0016] A PWM modulation method for a three-level semiconductor converter, comprising the steps:

[0017] 1) Obtain the three-phase AC control voltages of the three-level semiconductor converter;

[0018] 2) Using the output current harmonic of the three-level semiconductor converter directly as a performance indicator according to the three-phase AC control voltages and the DC half voltage, calculate the zero-sequence voltage that minimizes this performance indicator, which is taken as the optimal zero-sequence voltage value;

[0019] 3) Superimpose the optimal zero-sequence voltage value on each of the three-phase AC control voltages to obtain three-phase carrier comparison voltages;

[0020] 4) Compare the three-phase carrier comparison voltages with the stacked carriers, and output switching signals for the switching devices in the three-phase three-level semiconductor converter.

[0021] Preferably, the specific process of step 2) is:

[0022] 2.1) Perform per-unit normalization processing on each of the three-phase AC control voltages with respect to the DC half voltage E, to obtain the normalized modulation voltage v k ;

[0023] Calculate the upper limit value H and the lower limit value L of the zero-sequence voltage;

[0024] 2.2) According to the normalized modulation voltage v k , calculate the minimum point zero-sequence voltage v 0m :

[0025] 2.3) According to the upper limit value H and the lower limit value L, perform limit processing on the minimum point zero-sequence voltage v 0m to obtain the optimal zero-sequence voltage value with the minimum harmonic If v 0m >H, then If v 0m <L, then Otherwise

[0026] Preferably, the specific process of step 2.2) is:

[0027] According to the definition of total harmonics, obtain the current harmonic D generated in one carrier cycle;

[0028] Taking the current harmonic D twice, we obtain the following results: the harmonic performance index function D is an upward-opening parabola with respect to the superimposed zero-sequence voltage v0. The vertex of the parabola is the minimum point of D, and the corresponding v0 is... 0m It is obtained from the first differential result when the first differential is equal to 0.

[0029] Preferably, based on the per-unit modulation voltage v k Specifically, the minimum zero-sequence voltage value v is obtained through the following formula. 0m :

[0030]

[0031] Where v1, v2, and v3 are the standardized three-phase AC control voltages.

[0032] Preferably, the specific process for obtaining the current harmonic D generated during the carrier cycle is as follows:

[0033] The circuit equations corresponding to the three-level semiconductor converter are simplified by per-unit processing, and the simplified circuit equations are represented by vectors.

[0034] By integrating the above vector-represented circuit equations using the output switching function of a three-level semiconductor converter, the current value at any time within the carrier cycle can be obtained.

[0035] The current ripple is obtained by using the straight line connecting the starting current and the ending current within the carrier cycle as the benchmark for evaluating harmonics.

[0036] Based on the current ripple and the per-unit three-phase AC control voltage, the ripple current after adding the zero-sequence component is obtained;

[0037] Based on the ripple current after adding the zero-sequence voltage component, the current harmonic D generated within the carrier period is obtained.

[0038] Preferably, current harmonics Where e(τ,v0) is the ripple current after adding the zero-sequence voltage component, and τ is the per-unit time.

[0039] Preferably, the ripple current after adding the zero-sequence voltage component

[0040] e(τ,v0)=A(R(τ+v k +v0-1)+R(τ+v k +v0)-R(v k +v0))-Avτ

[0041] Where R represents the ramp function and A is a constant matrix.

[0042] This invention also discloses a PWM modulation system for a three-level semiconductor converter, comprising:

[0043] An AC controller is used to obtain the three-phase AC control voltage of a three-level semiconductor converter.

[0044] The minimum harmonic zero-sequence voltage calculation unit is used to calculate the zero-sequence voltage that minimizes the three-phase AC control voltage and DC half-voltage, with the output current harmonics of the three-level semiconductor converter directly used as the performance index, as the optimal zero-sequence voltage value.

[0045] The zero-sequence voltage superposition unit is used to superimpose the optimal zero-sequence voltage value onto the three-phase AC control voltages to obtain the three-phase carrier comparison voltage;

[0046] The PWM carrier comparison unit is used to compare the three-phase carrier comparison voltage with the stacked carrier and output the switching signal of the switching device in the three-phase three-level semiconductor converter.

[0047] The present invention further discloses a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when run by a processor, executes the steps of the PWM modulation method for a three-level semiconductor converter as described above.

[0048] The present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, and the computer program, when run by the processor, executes the steps of the PWM modulation method of the three-level semiconductor converter as described above.

[0049] Compared with the prior art, the advantages of the present invention are as follows:

[0050] This invention directly uses the current harmonics generated during the carrier control cycle as a performance indicator to find the optimal analytical solution for the superimposed zero-sequence voltage that minimizes them. By superimposing the optimal zero-sequence voltage onto each AC control voltage and comparing it with the PWM carrier, the resulting switching signal of the switching device can guarantee that the output current harmonics are minimized. Under the same carrier frequency and main circuit conditions, it theoretically guarantees that the output current harmonics of the three-level converter are minimized. Under the same current harmonic rate condition, the switching frequency can be appropriately lowered to reduce switching losses and improve converter conversion efficiency; or the filter parameters can be appropriately reduced to reduce system cost.

[0051] The PWM modulation method of this invention can obtain the theoretical maximum modulation rate because the range of zero-sequence voltage is only limited by the theoretical upper and lower limits, and can make the most effective use of DC bus voltage. This invention only uses the AC voltage command to be output (AC voltage control value) and the instantaneous value of DC half voltage, and the formula only contains simple arithmetic operations. Therefore, it is suitable for real-time control systems and there is no resistance to its use. Attached Figure Description

[0052] Figure 1 This is a topology diagram of the main circuit of a diode-clamped three-level converter in the prior art.

[0053] Figure 2 This is a diagram of the main circuit topology of a T-type three-level converter in the prior art.

[0054] Figure 3 This is a control block diagram of a three-level converter in the prior art.

[0055] Figure 4 This is a schematic diagram of the three-level PWM carrier comparison principle in the existing technology.

[0056] Figure 5 This is a control block diagram of the three-level converter PWM modulation of the present invention in an embodiment.

[0057] Figure 6 The flowchart shows an embodiment of the minimum harmonic PWM modulation method for a three-level converter according to the present invention.

[0058] Legend: 1. Diode-clamped three-level converter bridge; 1'. T-type three-level converter bridge; 2. Three-phase AC power supply or load; 3. AC reactor; 4. DC power supply or load; 5-6. Supporting capacitor; 7. Current comparator; 8. Current controller; 9. PWM modulation stage; 10. Three-level converter; 11. Three-level semiconductor converter; 12. AC controller; 13. Minimum harmonic zero-sequence voltage calculation unit; 14. Zero-sequence voltage superposition unit; 15. PWM carrier comparison unit. Detailed Implementation

[0059] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0060] like Figure 5 As shown, the PWM modulation method for a three-level semiconductor converter in this embodiment includes the following steps:

[0061] 1) Obtain the three-phase AC control voltage of the three-level semiconductor converter;

[0062] 2) Based on the three-phase AC control voltage and DC half voltage, the output current harmonics of the three-level semiconductor converter are directly used as the performance index. The zero-sequence voltage that minimizes this performance index is calculated and taken as the optimal zero-sequence voltage value.

[0063] 3) The optimal zero-sequence voltage value is superimposed on the three-phase AC control voltages to obtain the three-phase carrier comparison voltage;

[0064] 4) Compare the three-phase carrier comparison voltage with the stacked carrier and output the switching signal of the switching device in the three-phase three-level semiconductor converter.

[0065] In a specific embodiment, the specific process of step 2) is:

[0066] 2.1) Perform per-unit processing on the three-phase AC control voltages respectively with respect to the DC half-voltage E, to obtain the per-unit modulation voltage v k ;

[0067] Calculate the upper limit value H and the lower limit value L of the zero-sequence voltage;

[0068] 2.2) According to the per-unit modulation voltage v k , calculate the minimum point zero-sequence voltage v 0m :

[0069] 2.3) According to the upper limit value H and the lower limit value L, perform limiting processing on the minimum point zero-sequence voltage v 0m to obtain the optimal zero-sequence voltage value with the minimum harmonic If v 0m >H, then If v 0m <L, then Otherwise

[0070] Specifically, as shown in Figure 6 , the process of obtaining the optimal zero-sequence voltage for the three-phase three-level converter PWM modulation method can be executed cyclically in synchronization with the PWM carrier control period. After entering the calculation program, first read the three-phase AC control voltage values V1, V2, V3 and the DC half-voltage E output by the upper controller, and execute the following steps based on the above input variables:

[0071] Perform per-unit processing on the control voltages respectively with respect to the DC half-voltage E, to obtain the per-unit modulation voltage v k =V k / E, k=1,2,3;

[0072] Calculate the upper limit value H and the lower limit value L of the zero-sequence voltage, as follows:

[0073] H=1-max(v1,v2,v3)

[0074] L=-1-min(v1,v2,v3)

[0075] According to the calculated per-unit voltage, calculate the minimum point zero-sequence voltage value v 0m :

[0076]

[0077] Use the upper and lower limit values H and L to perform limiting processing on the minimum point zero-sequence voltage v 0m to obtain the optimal zero-sequence voltage value with the minimum harmonic That is, if v 0m >H, then If v 0m < L, then Otherwise

[0078] The above-obtained is output as the optimal zero-sequence voltage value.

[0079] The present invention is executed periodically and repeatedly through the above steps, directly taking the current harmonic generated in the carrier control period as the performance index to obtain the optimal analytical solution of the superimposed zero-sequence voltage that minimizes it. By superimposing the optimal zero-sequence voltage on each AC control voltage and then comparing it with the PWM carrier, the obtained switching signals of the switching devices can ensure that the output current harmonic is minimized; under the same carrier frequency and main circuit conditions, it theoretically ensures that the output current harmonic of the three-level converter is minimized; under the condition of ensuring the same current harmonic rate, the switching frequency can be appropriately reduced to lower the switching loss and improve the conversion efficiency of the converter; or the filter parameters can be appropriately reduced to lower the system cost.

[0080] Since the value range of the zero-sequence voltage of the PWM modulation method of the present invention is only limited by the theoretical upper and lower limits, the theoretically maximum modulation rate can be obtained, and the DC bus voltage can be utilized to the maximum extent effectively; the present invention only uses the AC voltage command (AC voltage control value) to be output and the instantaneous value of the DC half-voltage, and the calculation formula only contains simple four arithmetic operations, so it is suitable for real-time control systems and has no incompatibility in use.

[0081] The above method will be further and completely described below with reference to a specific embodiment:

[0082] The basic idea of carrier comparison-based PWM modulation is: taking the carrier period or half period (T) as the basic processing time unit, making the equivalent output control voltage (average voltage value) of the converter in this period consistent with the voltage command value required by the controller to achieve the control target; at the same time, within one processing time unit, the switching devices in each phase leg only perform one switching state switching action from ON to OFF or from OFF to ON to keep the switching frequency constant.

[0083] For a three-phase three-level converter, its inputs are three-phase AC voltage command values (V1, V2, V3), and its outputs are the ON-OFF switching times (α1, α2, α3) of the switching devices of each phase leg.

[0084] Taking the attached Figure 1 , 2 shown three-phase three-wire three-level conversion main circuit as the object, the inductance value of the AC reactor is denoted as L, and the three-phase AC power supply or load voltage Vg=(V g1 , V g2 , V g3 ), and the output current is denoted as iL =(i L1 i L2 i L3 If the positive and negative half-voltages on the DC side are represented by ±E, then the dynamic equation of the AC circuit is as shown in equation (2):

[0085]

[0086] Among them, u k The switching function for the k-th phase is defined as follows:

[0087]

[0088] The PWM modulation method of this invention is based on digital control. If the system characteristics are normalized using the basic processing time unit (T) of the carrier wave, the theoretical analysis becomes simpler and clearer. Therefore, the following explanation uses T for the time axis, E for the voltage, and (ET / L) for the current, and is presented on a normalized time axis. That is: τ = t / T, v = V / E, i = (L / ET)i L ;

[0089] During the carrier processing period, the per-unit time τ satisfies 0 ≤ τ ≤ 1. In this case, the circuit equation in (2) simplifies to:

[0090]

[0091] Represented as a vector:

[0092]

[0093] in

[0094]

[0095] The following describes the waveform of the output switching function (u) of a three-level converter based on carrier comparison. When a sawtooth wave is used as the carrier, the basic processing time unit is consistent with the carrier period. When a triangular wave is used, the basic processing time unit can be divided into two modes: rising segment and falling segment, with the period being half of the carrier period. When the modulation voltage is v, the switching functions of the rising and falling segments can be expressed as follows, where U(x) is the step function.

[0096]

[0097] By integrating equation (5) using this switching function, the current value at any time within the period can be obtained. Taking the carrier descent segment as an example,

[0098]

[0099] Where R(τ) represents the ramp function, i0 represents the initial value of the current at the starting point τ=0, and A is a constant matrix.

[0100] If the current value at the end of the carrier cycle is marked with i1, the straight line connecting i0 and i1 is used as the baseline for evaluating harmonics. c If (τ), then equations (9) and (10) hold true.

[0101] i1=i(1)=i0+Av-v g ..............................(9)

[0102] i c (τ)=i0+(i1-i0)τ=i0+(Av-v g )τ.............................(10)

[0103] The output current ripple of the converter is defined as the deviation e(τ) between the current waveform and the baseline. Based on equations (8) and (10), the current ripple expression in equation (11) is obtained:

[0104] e(τ)=i(τ)-i c (τ)=A(R(τ+v k -1)+R(τ+v k )-R(v k ))-Avτ..........(11).

[0105] As is well known, for a three-phase three-wire converter, adding the same zero-sequence component to each phase AC voltage before comparing it with the carrier wave has no effect on the control of the system AC current; the only difference lies in the maximum modulation rate and output harmonic performance. Based on this fact, this invention solves for the optimal superimposed zero-sequence voltage within each fundamental cycle of the three-level converter modulation. The value is set to minimize the accompanying current harmonics within that cycle.

[0106] Let the per-unit normalized three-phase AC voltage command value requested by the host controller be (v1, v2, v3), satisfying v1 + v2 + v3 = 0. Then it meets the control requirements, and the general expression for the comparison voltage (modulation voltage) assigned to the superimposed carrier comparator can be expressed as:

[0107] α k =v k +v0 k=1,2,3........................(12)

[0108] Where v0 is the superimposed zero-sequence voltage component, it can be selected as any value as long as over-modulation does not occur, i.e.:

[0109] -1≤v k +v0≤1 k=1,2,3........................(13)

[0110] Or it can be expressed directly as:

[0111] -1-min(v1,v2,v3)≤v0≤1-max(v1,v2,v3)............(14)

[0112] According to equations (11) and (12), the ripple current equation after adding the zero-sequence component is:

[0113] e(τ,v0)=A(R(τ+v k +v0-1)+R(τ+v k +v0)-R(v k +v0))-Avτ.........(15)

[0114] The PWM modulation method of this invention directly evaluates the total harmonic distortion (THD) of the output current and finds the optimal injection zero-sequence voltage analytical solution that minimizes it. According to the definition of total harmonic distortion, the square of the current harmonics (D) generated in one carrier processing cycle is shown in equation (16):

[0115]

[0116] To obtain the minimum value v0 corresponding to the minimum harmonic D, we differentiate D with respect to v0, resulting in equation (17):

[0117]

[0118] In the formula, sgn(v) represents the sign function, defined as follows:

[0119]

[0120] Taking the second derivative of D with respect to v0, we get equation (19):

[0121]

[0122] From equations (17) and (19), it can be seen that the harmonic performance index function D is an upward-opening parabola with respect to the superimposed zero-sequence voltage v0. The vertex of the parabola is the minimum point of D, and the corresponding v0 value (v 0m The result is obtained when the first differential of equation (17) equals 0, as shown in equation (20):

[0123]

[0124] Since the range of values ​​for v0 is limited by the upper and lower limits of equation (14), the optimal value of v0 for minimizing harmonics is... For: Minimum value v 0m One of the three values: upper limit, lower limit, and lower limit. When v 0m When within the upper and lower limits, v 0m That is, the optimal value; when v 0m When it is greater than the upper limit, the segment from the lower limit to the upper limit is at the vertex (minimal point v). 0m The left side is a decreasing function; therefore, the upper limit is the optimal value. 0m When the value is less than the lower limit, the segment from the lower limit to the upper limit is an increasing function to the right of the vertex; therefore, the lower limit value is the optimal value. This can be summarized in equation (21):

[0125]

[0126] The above are the analytical results of the carrier falling segment period. During the carrier rising segment period, when the same zero-sequence voltage is superimposed, since the ripple current of the carrier rising segment period is evenly symmetric with the ripple current of the falling segment period, the integral performance index function of equation (16) is equal. Therefore, the optimal zero-sequence voltage superposition solution must also be equal, that is, the conclusion obtained above also applies to the carrier rising segment.

[0127] This invention also discloses a PWM modulation system for a three-level semiconductor converter, comprising:

[0128] AC controller 12 is used to obtain the three-phase AC control voltage of the three-level semiconductor converter 11;

[0129] The minimum harmonic zero-sequence voltage calculation unit 13 is used to calculate the zero-sequence voltage that minimizes the performance index based on the three-phase AC control voltage and DC half voltage, using the output current harmonics of the three-level semiconductor converter 11 as the performance index, and as the optimal zero-sequence voltage value.

[0130] Zero-sequence voltage superposition unit 14 is used to superimpose the optimal zero-sequence voltage value onto the three-phase AC control voltages respectively to obtain the three-phase carrier comparison voltage;

[0131] The PWM carrier comparison unit 15 is used to compare the three-phase carrier comparison voltage with the stacked carrier and output the switching signal of the switching device in the three-phase three-level semiconductor converter 11.

[0132] The PWM modulation system of the present invention is used to perform the modulation method described above, and also has the advantages described in the modulation method above.

[0133] The present invention further discloses a computer-readable storage medium storing a computer program thereon, which, when run by a processor, executes the steps of the PWM modulation method for a three-level semiconductor converter as described above. The present invention also discloses a computer device including a memory and a processor, wherein the memory stores a computer program that, when run by a processor, executes the steps of the PWM modulation method for a three-level semiconductor converter as described above.

[0134] The present invention can implement all or part of the processes in the methods of the above embodiments, or it can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form. The computer-readable medium can include: any entity or device capable of carrying computer program code, recording media, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. The memory can be used to store computer programs and / or modules. The processor implements various functions by running or executing the computer programs and / or modules stored in the memory, and by calling data stored in the memory. The memory may include high-speed random access memory, as well as non-volatile memory, such as hard disks, RAM, plug-in hard disks, smart media cards (SMC), secure digital (SD) cards, flash cards, at least one disk storage device, flash memory device, or other volatile solid-state storage devices.

[0135] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A PWM modulation method for a three-level semiconductor converter, characterized in that, Including the following steps: 1) Obtain the three-phase AC control voltage of the three-level semiconductor converter; 2) Based on the three-phase AC control voltage and DC half voltage, the output current harmonics of the three-level semiconductor converter are directly used as the performance index. The zero-sequence voltage that minimizes this performance index is calculated and taken as the optimal zero-sequence voltage value. 3) Superimpose the optimal zero-sequence voltage value onto the three-phase AC control voltages to obtain the three-phase carrier comparison voltage; 4) Compare the three-phase carrier comparison voltage with the stacked carrier voltage, and output the switching signal of the switching device in the three-phase three-level semiconductor converter; The specific process of step 2) is as follows: 2.1) Standardize the three-phase AC control voltages to the DC half-voltage E respectively, and obtain the standardized modulation voltage. Find the upper limit H and lower limit L of the zero-sequence voltage; 2.2) Based on the per-unit modulation voltage Find the zero-sequence voltage at the minimum point. : 2.3) According to the upper limit value H and the lower limit value L, the minimum point zero-sequence voltage is subjected to limit processing to obtain the optimal zero-sequence voltage value with the minimum harmonic ; if >H, then =H; if <L, then =L; otherwise = .

2. The PWM modulation method for a three-level semiconductor converter according to claim 1, characterized in that, The specific process of step 2.2) is as follows: Based on the definition of total harmonics, the current harmonics D generated within one carrier cycle are obtained; Taking the current harmonic D twice, and based on the results of the two differentiations, we obtain: the harmonic performance index function D for superimposed zero-sequence voltage. Let D be an upward-opening parabola. The vertex of the parabola is the minimum point of D. It is obtained from the first differential result when the first differential is equal to 0.

3. The PWM modulation method for a three-level semiconductor converter according to claim 2, characterized in that, Based on the per-unit modulation voltage The minimum zero-sequence voltage value is obtained using the following formula. : in This refers to the standardized three-phase AC control voltage.

4. The PWM modulation method for a three-level semiconductor converter according to claim 2, characterized in that, The specific process of obtaining the current harmonic D generated within the carrier period is as follows: The circuit equations corresponding to the three-level semiconductor converter are simplified by per-unit processing, and the simplified circuit equations are represented by vectors. By integrating the above vector-represented circuit equations using the output switching function of a three-level semiconductor converter, the current value at any time within the carrier cycle can be obtained. The current ripple is obtained by using the straight line connecting the starting current and the ending current within the carrier cycle as the benchmark for evaluating harmonics. Based on the current ripple and the per-unit three-phase AC control voltage, the ripple current after adding the zero-sequence component is obtained; Based on the ripple current after adding the zero-sequence voltage component, the current harmonic D generated within the carrier period is obtained.

5. The PWM modulation method for a three-level semiconductor converter according to claim 4, characterized in that, Current harmonics ;in The ripple current is the current after adding the zero-sequence voltage component, and τ is the per-unit time.

6. The PWM modulation method for a three-level semiconductor converter according to claim 5, characterized in that, Ripple current after adding zero-sequence voltage component Where R represents the ramp function and A is a constant matrix.

7. A PWM modulation system for a three-level semiconductor converter, used to execute the steps of the PWM modulation method for a three-level semiconductor converter as described in any one of claims 1 to 6, characterized in that, include: An AC controller (12) is used to obtain the three-phase AC control voltage of the three-level semiconductor converter (11); The minimum harmonic zero-sequence voltage calculation unit (13) is used to calculate the zero-sequence voltage that minimizes the performance index based on the three-phase AC control voltage and DC half voltage, with the output current harmonics of the three-level semiconductor converter directly used as the performance index, and to take the optimal zero-sequence voltage value as the minimum. The zero-sequence voltage superposition unit (14) is used to superimpose the optimal zero-sequence voltage value onto the three-phase AC control voltages respectively to obtain the three-phase carrier comparison voltage; The PWM carrier comparison unit (15) is used to compare the three-phase carrier comparison voltage with the stacked carrier and output the switching signal of the switching device in the three-phase three-level semiconductor converter (11).

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is run by the processor, it executes the steps of the PWM modulation method for a three-level semiconductor converter as described in any one of claims 1 to 6.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the computer program is run by the processor, it executes the steps of the PWM modulation method for a three-level semiconductor converter as described in any one of claims 1 to 6.

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