CMOS Image Sensor

Abstract

A CMOS image sensor includes: a first reset tube, a second reset tube, a first source follower tube, a first switch tube, a second switch tube, a first capacitor and a second capacitor, wherein: the first reset tube, the first end of which is coupled to a preset first voltage source, the second end of which is coupled to a control end of the first source follower tube, and the control end of which inputs a first reset control signal; the first source follower tube, the first end of which is coupled to a preset second voltage source, and the second end of which outputs an image signal; the first switch tube, the first end of which inputs an image signal, the second end of which is coupled to a first end of a first capacitor, and the control end of which inputs a first switch control signal; the second switch tube, the first end of which inputs an image signal, the second end of which is coupled to a first end of a second capacitor, and the control end of which inputs a second switch control signal; the second reset tube, the second end of which is grounded, and the control end of which inputs a second reset control signal. The above scheme can reduce the power consumption of the CMOS image sensor.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a CMOS image sensor. Background Art

[0002] According to the different exposure modes, CMOS image sensors can be divided into global shutter (GS) shutter and rolling shutter (RS) shutter. In the global shutter working mode, each row of pixel units is simultaneously exposed, and the image signal is simultaneously transmitted outward by the pixel PD, which can avoid the image distortion problem in the rolling shutter working mode.

[0003] In order to store electrical energy signals, global CMOS image sensors need to set up additional storage units, which are divided into voltage domain and charge domain according to the signal storage method. Voltage domain global CMOS image sensors first convert the signals into voltage signals through amplifiers and then store them in storage units, which are less affected by parasitic light signals.

[0004] However, in the traditional voltage domain global CMOS image sensor, a source follower tube needs to be set for each pixel, and each source follower tube needs to be set with a current bias tube. The current bias tube is in the saturation region for a long time, and the power consumption is large. Summary of the invention

[0005] The embodiment of the present invention solves the technical problem of high power consumption of CMOS image sensors.

[0006] To solve the above technical problems, an embodiment of the present invention provides a CMOS image sensor, comprising: a first reset tube, a second reset tube, a first source follower tube, a first switch tube, a second switch tube, a first capacitor and a second capacitor, wherein: the first reset tube, a first end thereof is coupled to a preset first voltage source, a second end thereof is coupled to a control end of the first source follower tube, and a first reset control signal is input to the control end thereof; the first source follower tube, a first end thereof is coupled to a preset second voltage source, and a second end thereof outputs an image signal; the first switch tube, a first end thereof is input to the image signal, a second end thereof is coupled to a first end of the first capacitor, and a first switch control signal is input to the control end thereof; the second switch tube, a first end thereof is input to the image signal, a second end thereof is coupled to a first end of the second capacitor, and a second switch control signal is input to the control end thereof; the second reset tube, a second end thereof is grounded, and a second reset control signal is input to the control end thereof; the second reset tube is suitable for being turned on under the control of the second reset control signal to release the charge stored on the first capacitor and / or the second capacitor; the second ends of the first capacitor and the second capacitor are both grounded.

[0007] Optionally, a first end of the first switch tube is coupled to a second end of the first source follower tube; a first end of the second switch tube is coupled to a second end of the first switch tube.

[0008] Optionally, a first end of the second reset tube is respectively coupled to the first end of the first capacitor and the first end of the second switch tube.

[0009] Optionally, the CMOS image sensor also includes: a second source follower tube and a first row select tube, wherein: the second source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the first row select tube, and a control end coupled to the second end of the second switch tube; the first row select tube has a second end coupled to the column bus, and a control end inputs a third switch control signal.

[0010] Optionally, a first end of the first switch tube is coupled to a second end of the first source follower tube; a first end of the second switch tube is coupled to a second end of the first source follower tube.

[0011] Optionally, a first end of the second reset tube is coupled to the first end of the first capacitor and the first end of the second capacitor respectively.

[0012] Optionally, the CMOS image sensor also includes: a third source follower tube, a fourth source follower tube, a second row selection tube and a third row selection tube, wherein: the third source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the second row selection tube, and a control end coupled to the second end of the first switch tube; the second row selection tube has a second end coupled to the column bus, and a control end inputs a fourth switch control signal; the fourth source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the third row selection tube, and a control end coupled to the second end of the second switch tube; the third row selection tube has a second end coupled to the column bus, and a control end inputs a fifth switch control signal.

[0013] Optionally, the CMOS image sensor further includes: a transmission tube; an output end of the transmission tube is coupled to the control end of the first source follower tube and the second end of the first reset tube, and is suitable for outputting the image signal.

[0014] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0015] A second reset tube is provided to replace the current bias tube PC, and the conduction of the second reset tube is controlled by a second reset control signal to release the charge stored on the first capacitor and / or the second capacitor. Since the second reset tube does not need to work in the saturation region for a long time, the power consumption of the second reset tube is greatly reduced, and the power consumption of the CMOS image sensor is reduced accordingly. At the same time, compared with the traditional CMOS image sensor, the component data is not increased.

[0016] Furthermore, the first end of the second reset tube is coupled to the first end of the first capacitor and the first end of the second capacitor respectively, and the first switch is connected in parallel with the second switch, which can avoid the redistribution of the image signal between the first capacitor and the second capacitor, thereby avoiding the reduction of the amplitude of the image signal voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic structural diagram of a CMOS image sensor in an embodiment of the present invention;

[0018] Figure 2 is a control timing diagram of a CMOS image sensor in an embodiment of the present invention;

[0019] Figure 3 is a schematic structural diagram of another CMOS image sensor in an embodiment of the present invention;

[0020] Figure 4 is a control timing diagram of another CMOS image sensor in an embodiment of the present invention;

[0021] Figure 5 It is a schematic diagram of the structure of an existing CMOS image sensor. DETAILED DESCRIPTION

[0022] Reference Figure 5 , a structural schematic diagram of an existing CMOS image sensor is given. Figure 5 The CMOS image sensor in the embodiment includes: a reset transistor RST, a first source follower transistor SF1, a second source follower transistor SF2, a first capacitor C1, a second capacitor C2, a first switch transistor S1, a second switch transistor S2, a current bias transistor PC, a row select transistor RS, and a transmission transistor TG. The drain of the reset transistor RST is connected to a voltage source VR, the drains of the first source follower transistor SF1 and the second source follower transistor SF2 are both coupled to a voltage source VDD, and the drain of the row select transistor RS is connected to a column bus Column Bus.

[0023] exist Figure 5 In the operation process of the CMOS image sensor, the current bias tube PC works in the saturation region for a long time, resulting in a large power consumption of the CMOS image sensor.

[0024] In the embodiment of the present invention, a second reset tube is provided to replace the current bias tube PC, and the conduction of the second reset tube is controlled by a second reset control signal to release the charge stored in the first capacitor and / or the second capacitor. Since the second reset tube does not need to work in the saturation region for a long time, the power consumption of the second reset tube is greatly reduced, and the power consumption of the CMOS image sensor is correspondingly reduced. At the same time, compared with the traditional CMOS image sensor, the component data is not increased.

[0025] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0026] The embodiment of the present invention provides a CMOS image sensor, including: a first reset tube, a second reset tube, a first source follower tube, a first switch tube, a second switch tube, a first capacitor and a second capacitor, wherein:

[0027] The first end of the first reset tube can be coupled to a preset first voltage source, the second end of the first reset tube can be coupled to a control end of the first source follower tube, and the control end of the first reset tube can input a first reset control signal; the first reset tube can be turned on under the action of the first reset control signal, and output a first reset signal through its second end;

[0028] The first end of the first source follower tube can be coupled to a preset second voltage source, the control end of the first source follower tube can be coupled to the second end of the first reset tube, and the second end of the first source follower tube can output an image signal;

[0029] The first end of the first switch tube can input an image signal, the second end of the first switch tube can be coupled to the first end of the first capacitor, and the control end of the first switch tube can input a first switch control signal; the first switch tube can be turned on under the action of the first switch control signal;

[0030] The first end of the second switch tube can input an image signal, the second end of the second switch tube can be coupled to the first end of the second capacitor, and the control end of the second switch tube can input a second switch control signal; the second switch tube can be turned on under the action of the second switch control signal;

[0031] The second end of the second reset tube can be grounded, and the control end of the second reset tube can input a second reset control signal; the second reset tube is turned on under the control of the second reset control signal to release the charge stored in the first capacitor and / or the second capacitor;

[0032] A second terminal of the first capacitor is grounded, and a second terminal of the second capacitor is grounded.

[0033] In a specific implementation, the CMOS image sensor may further include a transmission tube, the output end of which may be coupled to the control end of the first source follower tube and the second end of the first reset tube, and is suitable for outputting an image signal.

[0034] The CMOS image sensor provided in the embodiment of the present invention is described in detail below.

[0035] Reference Figure 1 , a schematic diagram of the structure of a CMOS image sensor in an embodiment of the present invention is given. Figure 2 , a control timing diagram of a CMOS image sensor in an embodiment of the present invention is given. Figure 1 and Figure 2 Provide explanation.

[0036] Figure 1 In the embodiment, a first terminal of the first reset tube RST1 is coupled to a preset first voltage source VR, a second terminal of the first reset tube RST1 is coupled to a control terminal of a first source follower tube SF1, and a first reset control signal is input to the control terminal of the first reset tube RST1.

[0037] The first end of the first source follower SF1 is coupled to the preset second voltage source VDD, the control end of the first source follower SF1 is coupled to the second end of the first reset tube RST1 and the second end of the transmission tube TG, and the second end of the first source follower SF1 can output an image signal.

[0038] like Figure 1 As shown, in the embodiment of the present invention, the first end of the first switch tube S1 can be coupled to the second end of the first source follower tube SF1; the first end of the second switch tube S2 can be coupled to the second end of the first switch tube S1.

[0039] At this time, the first switch tube S1 and the second switch tube S2 can be regarded as a series relationship. The image signal is input through the first end of the first switch tube S1, and output through the second end of the first switch tube S1 to the first end of the second switch tube S2.

[0040] Continue to refer to Figure 1 , the first end of the second reset tube RST2 can be coupled to the first end of the first capacitor C1 and the first end of the second switch tube S2 respectively.

[0041] In the embodiment of the present invention, the CMOS image sensor may further include a second source follower transistor SF2 and a first row select transistor RS1. Figure 1 ,in:

[0042] A first terminal of the second source follower transistor SF2 may be coupled to the second voltage source VDD, a second terminal of the second source follower transistor SF2 may be coupled to a first terminal of the first row selection transistor RS1, and a control terminal of the second source follower transistor SF2 may be coupled to a second terminal of the second switch transistor S2;

[0043] The second end of the first row selection tube RS1 can be coupled to the column bus Column Bus, and the control end of the first row selection tube RS1 can input the third switch control signal; under the action of the third switch control signal, the first row selection tube RS1 is turned on to output the image signal.

[0044] Below Figure 1 The working principle of the CMOS image sensor is described in detail.

[0045] After the exposure is finished, the first reset tube RST1 is turned off. At this time, the floating doped area FD is in a reset state. Since the first reset tube RST1 introduces kTC noise, the potential of the floating doped area FD is fixed at V R +V kTC The second switch tube S2 and the second reset tube RST2 are turned on, and at this time, the potential on the second capacitor C2 is pulled down to zero potential.

[0046] Then, the first switch tube S1 is turned on. At this time, the first source follower tube SF1 is turned on to charge the first capacitor C1 and the second capacitor C2. When the voltage on the first capacitor C1 and the second capacitor C2 is charged to V R +V kTC -V THSF1 When the charging process ends, V THSF1 is the threshold voltage of the first source follower transistor SF1.

[0047] The first switch tube S1 and the second switch tube S2 are turned off, and the second reset tube RST2 is turned on. At this time, the potential on the first capacitor C1 is pulled down to zero potential, and the potential on the second capacitor C2 is maintained at V R +V kTC -V THSF1 .

[0048] Turn on the transmission tube TG and the first switch tube S1. At this time, the potential of the floating doping region FD becomes V R +V Signal +V kTC , the first source follower tube SF1 is turned on and charges the first capacitor C1. When the voltage on the first capacitor C1 is charged to V R +V Signal +V kTC -V THSF1 When V Signal For the image signal.

[0049] The first row selection tube RS1 is turned on row by row, and V R +V kTC -V THSF1 Output to the column bus Column Bus. After the second switch tube S2 is turned on for a period of time, the second switch tube S2 is turned off, and the charges on the first capacitor C1 and the second capacitor C2 are redistributed, and the potential on the second capacitor C2 becomes V R +V kTC -V THSF1 +C2 / (C1+C2)V Signal The signal is output to the column bus Column Bus through the amplification effect of the second source follower SF2, and V can be obtained through the CDS circuit on the column bus Column Bus Signal , turn off the first row selection tube RS1.

[0050] In a specific implementation, the image signal will be redistributed between the first capacitor C1 and the second capacitor C2, resulting in a reduction in the voltage amplitude of the image signal. To avoid the problem of the voltage amplitude reduction of the image signal, an embodiment of the present invention further provides another CMOS image sensor.

[0051] Reference Figure 3 , a schematic diagram of the structure of another CMOS image sensor in an embodiment of the present invention is given. Figure 4 , a control timing diagram of another CMOS image sensor in an embodiment of the present invention is given, and the following is combined with Figure 3 and Figure 4 Provide explanation.

[0052] like Figure 3 As shown, in the embodiment of the present invention, the first end of the first switch transistor S1 can be coupled to the second end of the first source follower transistor SF1, and the second end of the second switch transistor S2 can be coupled to the second end of the first source follower transistor SF1.

[0053] and Figure 1 The structure shown is different in that Figure 3 The first switch tube S1 and the second switch tube S2 can be regarded as being in parallel. The image signal is input to the first end of the first switch tube S1 and the first end of the second switch tube S2 via the second end of the first source follower tube SF1.

[0054] Continue to refer to Figure 3 The first end of the second reset tube RST2 is coupled to the first end of the first capacitor C1 and the first end of the second capacitor C2 respectively.

[0055] The CMOS image sensor may further include a third source follower transistor SF3, a fourth source follower transistor SF4, a second row select transistor RS2 and a third row select transistor RS3, wherein:

[0056] A first terminal of the third source follower transistor SF3 is coupled to the second voltage source VDD, a second terminal of the third source follower transistor SF3 is coupled to a first terminal of the second row selection transistor RS2, and a control terminal of the third source follower transistor SF3 is coupled to a second terminal of the first switch transistor S1;

[0057] A second terminal of the second row selection tube RS2 is coupled to the column bus Column Bus, and a control terminal of the second row selection tube RS2 inputs a fourth switch control signal;

[0058] A first terminal of the fourth source follower transistor SF4 is coupled to the second voltage source VDD, a second terminal of the fourth source follower transistor SF4 is coupled to a first terminal of the third row selection transistor RS3, and a control terminal of the fourth source follower transistor SF4 is coupled to a second terminal of the second switch transistor S2;

[0059] A second terminal of the third row selection tube RS3 is coupled to the column bus Column Bus, and a control terminal of the third row selection tube RS3 inputs the fifth switch control signal.

[0060] Below Figure 3 The working principle of the CMOS image sensor is described in detail.

[0061] After the exposure is finished, the first reset tube RST1 is turned off. At this time, the floating doped area FDFD is in a reset state. Since the first reset tube RST1 introduces kTC noise, the potential of the floating doped area FD is fixed at V R +V kTC The second reset tube RST2 is turned on, and at this time, the potentials on the first capacitor C1 and the second capacitor C2 are pulled down to zero potential.

[0062] After that, the second switch tube S2 is turned on. At this time, the first source follower tube SF1 is turned on, and the first source follower tube SF1 charges the first capacitor C1 and the second capacitor C2. When the voltage on the first capacitor C1 and the second capacitor C2 is charged to V R +V kTC -V THSF1 When , the charging process ends. The second switch tube S2 is turned off.

[0063] Turn on the transmission tube TG and the first switch tube S1. At this time, the potential of the floating doping region FD becomes V R +V Signal +V kTC , the first source follower tube SF1 is turned on and charges the first capacitor C1. When the voltage on the first capacitor C1 is charged to V R +V Signal +V kTC -V THSF1 When , the charging process ends. Turn off the first switch tube S1.

[0064] The third row selection tube RS3 is turned on row by row, and the voltage V of the second capacitor C2 is amplified by the fourth source follower tube SF4. R +V kTC -V THSF1 Output to the column bus Column Bus. Then turn off the third row selector RS3. Turn on the second row selector RS2 row by row, and use the amplification of the third source follower SF3 to increase the voltage V R +V Signal +V kTC -V THSF1 Output to the column bus Column Bus, turn off the second row selector RS2. V can be obtained through the CDS circuit on the column bus Column Bus Signal .

[0065] In the embodiment of the present invention, the first reset tube RST1 can be an NMOS tube, the first end of the first reset tube RST1 is the drain of the first reset tube RST1, the second end of the first reset tube RST1 is the source of the first reset tube RST1, and the control end of the first reset tube RST1 is the gate of the first reset tube RST1.

[0066] The first source follower transistor SF1 may be an NMOS transistor, a first end of the first source follower transistor SF1 is a drain of the first source follower transistor SF1 , a second end of the first source follower transistor SF1 is a source of the first source follower transistor SF1 , and a control end of the first source follower transistor SF1 is a gate of the first source follower transistor SF1 .

[0067] The first switch tube S1 may be an NMOS tube, the first end of the first switch tube S1 is the source of the first switch tube S1, the second end of the first switch tube S1 is the drain of the first switch tube S1, and the control end of the first switch tube S1 is the gate of the first switch tube S1.

[0068] The second switch tube S2 may be an NMOS tube, the first end of the second switch tube S2 is the source of the second switch tube S2, the second end of the second switch tube S2 is the drain of the second switch tube S2, and the control end of the second switch tube S2 is the gate of the second switch tube S2.

[0069] The second reset tube SRT2 can be an NMOS tube, the first end of the second reset tube SRT2 is the drain of the second reset tube SRT2, the second end of the second reset tube SRT2 is the source of the second reset tube SRT2, and the control end of the second reset tube SRT2 is the gate of the second reset tube SRT2.

[0070] The second source follower SF2 may be an NMOS tube, the first end of the second source follower SF2 is the drain of the second source follower SF2, the second end of the second source follower SF2 is the source of the second source follower SF2, and the control end of the second source follower SF2 is the gate of the second source follower SF2.

[0071] The third source follower transistor SF3 may be an NMOS transistor, a first end of the third source follower transistor SF3 is a drain of the third source follower transistor SF3, a second end of the third source follower transistor SF3 is a source of the third source follower transistor SF3, and a control end of the third source follower transistor SF3 is a gate of the third source follower transistor SF3.

[0072] The fourth source follower transistor SF4 may be an NMOS transistor, a first end of the fourth source follower transistor SF4 is a drain of the fourth source follower transistor SF4, a second end of the fourth source follower transistor SF4 is a source of the fourth source follower transistor SF4, and a control end of the fourth source follower transistor SF4 is a gate of the fourth source follower transistor SF4.

[0073] The first row selection tube RS1 can be an NMOS tube, the first end of the first row selection tube RS1 is the source of the first row selection tube RS1, the second end of the first row selection tube RS1 is the drain of the first row selection tube RS1, and the control end of the first row selection tube RS1 is the gate of the first row selection tube RS1.

[0074] The second row selection tube RS2 can be an NMOS tube, the first end of the second row selection tube RS2 is the source of the second row selection tube RS2, the second end of the second row selection tube RS2 is the drain of the second row selection tube RS2, and the control end of the second row selection tube RS2 is the gate of the second row selection tube RS2.

[0075] The third row selection tube RS3 can be an NMOS tube, the first end of the third row selection tube RS3 is the source of the third row selection tube RS3, the second end of the third row selection tube RS3 is the drain of the third row selection tube RS3, and the control end of the third row selection tube RS3 is the gate of the third row selection tube RS3.

[0076] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A CMOS image sensor, characterized in that: include: A first reset tube, a second reset tube, a first source follower tube, a first switch tube, a second switch tube, a first capacitor and a second capacitor, wherein: The first reset tube has a first end coupled to a preset first voltage source, a second end coupled to a control end of the first source follower tube, and a first reset control signal input to the control end; The first source follower tube has a first end coupled to a preset second voltage source and a second end outputting an image signal; The first switch tube has a first end inputting the image signal, a second end coupled to the first end of the first capacitor, and a control end inputting a first switch control signal; The second switch tube has a first end inputting the image signal, a second end coupled to the first end of the second capacitor, and a control end inputting a second switch control signal; The second reset tube has a second end connected to the ground and a control end connected to the ground and inputs a second reset control signal; the second reset tube is adapted to be turned on under the control of the second reset control signal to release the charge stored in the first capacitor and / or the second capacitor; the first end of the second reset tube is coupled to the first end of the first capacitor and the first end of the second capacitor respectively; a third source follower tube, a fourth source follower tube, a second row select tube and a third row select tube, wherein: the third source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the second row select tube, and a control end coupled to the second end of the first switch tube; the second row select tube has a second end coupled to the column bus, and a fourth switch control signal is input to the control end; the fourth source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the third row select tube, and a control end coupled to the second end of the second switch tube; the third row select tube has a second end coupled to the column bus, and a fifth switch control signal is input to the control end; The second ends of the first capacitor and the second capacitor are both grounded.

2. The CMOS image sensor according to claim 1, wherein: The first switch tube, a first end of which is coupled to the second end of the first source follower tube; A first end of the second switch tube is coupled to the second end of the first switch tube.

3. The CMOS image sensor according to claim 2, wherein: The first end of the second reset tube is respectively coupled to the first end of the first capacitor and the first end of the second switch tube.

4. The CMOS image sensor according to claim 3, wherein: Also includes: The second source follows the tube and the first row selects the tube, where: The second source follower tube has a first end coupled to the second voltage source, a second end coupled to the first end of the first row select tube, and a control end coupled to the second end of the second switch tube; The first row selection tube has a second terminal coupled to the column bus, and a control terminal thereof inputs a third switch control signal.

5. The CMOS image sensor according to claim 1, wherein: The first switch tube, a first end of which is coupled to the second end of the first source follower tube; A first end of the second switch tube is coupled to the second end of the first source follower tube.

6. The CMOS image sensor according to any one of claims 1 to 5, characterized in that: Also includes: Transmission pipe; The output end of the transmission tube is coupled to the control end of the first source follower tube and the second end of the first reset tube, and is suitable for outputting the image signal.

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